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charset="utf-8" Content-Transfer-Encoding: quoted-printable Received-SPF: pass (zohomail.com: domain of gnu.org designates 209.51.188.17 as permitted sender) client-ip=209.51.188.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2a00:1450:4864:20::632; envelope-from=philmd@linaro.org; helo=mail-ej1-x632.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1671487817068100003 From: Richard Henderson There are several instances where we need to be able to allocate a pair of registers to related inputs/outputs. Add 'p' and 'm' register constraints for this, in order to be able to allocate the even/odd register first or second. Signed-off-by: Richard Henderson [PMD: Split patch in 3] Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- include/tcg/tcg.h | 3 +- tcg/tcg.c | 318 ++++++++++++++++++++++++++++++++++++++++++++-- 2 files changed, 312 insertions(+), 9 deletions(-) diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h index 2f7bbf4882..5c2254ce9f 100644 --- a/include/tcg/tcg.h +++ b/include/tcg/tcg.h @@ -951,7 +951,8 @@ typedef struct TCGArgConstraint { unsigned ct : 16; unsigned alias_index : 4; unsigned sort_index : 4; - unsigned pair : 1; /* 0: not paired, 1: illegal */ + unsigned pair_index : 4; + unsigned pair : 2; /* 0: none, 1: first, 2: second, 3: second alias */ bool oalias : 1; bool ialias : 1; bool newreg : 1; diff --git a/tcg/tcg.c b/tcg/tcg.c index 67cf36ace8..98d51e538c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1969,15 +1969,32 @@ static void tcg_dump_ops(TCGContext *s, FILE *f, bo= ol have_prefs) static int get_constraint_priority(const TCGOpDef *def, int k) { const TCGArgConstraint *arg_ct =3D &def->args_ct[k]; - int n; + int n =3D ctpop64(arg_ct->regs); =20 - if (arg_ct->oalias) { - /* an alias is equivalent to a single register */ - n =3D 1; - } else { - n =3D ctpop64(arg_ct->regs); + /* + * Sort constraints of a single register first, which includes output + * aliases (which must exactly match the input already allocated). + */ + if (n =3D=3D 1 || arg_ct->oalias) { + return INT_MAX; } - return TCG_TARGET_NB_REGS - n + 1; + + /* + * Sort register pairs next, first then second immediately after. + * Arbitrarily sort multiple pairs by the index of the first reg; + * there shouldn't be many pairs. + */ + switch (arg_ct->pair) { + case 1: + case 3: + return (k + 1) * 2; + case 2: + return (arg_ct->pair_index + 1) * 2 - 1; + } + + /* Finally, sort by decreasing register count. */ + assert(n > 1); + return -n; } =20 /* sort from highest priority to lowest */ @@ -2012,7 +2029,8 @@ static void process_op_defs(TCGContext *s) for (op =3D 0; op < NB_OPS; op++) { TCGOpDef *def =3D &tcg_op_defs[op]; const TCGTargetOpDef *tdefs; - int i, o, nb_args; + bool saw_alias_pair =3D false; + int i, o, i2, o2, nb_args; =20 if (def->flags & TCG_OPF_NOT_PRESENT) { continue; @@ -2053,6 +2071,9 @@ static void process_op_defs(TCGContext *s) /* The input sets ialias. */ def->args_ct[i].ialias =3D 1; def->args_ct[i].alias_index =3D o; + if (def->args_ct[i].pair) { + saw_alias_pair =3D true; + } tcg_debug_assert(ct_str[1] =3D=3D '\0'); continue; =20 @@ -2061,6 +2082,38 @@ static void process_op_defs(TCGContext *s) def->args_ct[i].newreg =3D true; ct_str++; break; + + case 'p': /* plus */ + /* Allocate to the register after the previous. */ + tcg_debug_assert(i > (input_p ? def->nb_oargs : 0)); + o =3D i - 1; + tcg_debug_assert(!def->args_ct[o].pair); + tcg_debug_assert(!def->args_ct[o].ct); + def->args_ct[i] =3D (TCGArgConstraint){ + .pair =3D 2, + .pair_index =3D o, + .regs =3D def->args_ct[o].regs << 1, + }; + def->args_ct[o].pair =3D 1; + def->args_ct[o].pair_index =3D i; + tcg_debug_assert(ct_str[1] =3D=3D '\0'); + continue; + + case 'm': /* minus */ + /* Allocate to the register before the previous. */ + tcg_debug_assert(i > (input_p ? def->nb_oargs : 0)); + o =3D i - 1; + tcg_debug_assert(!def->args_ct[o].pair); + tcg_debug_assert(!def->args_ct[o].ct); + def->args_ct[i] =3D (TCGArgConstraint){ + .pair =3D 1, + .pair_index =3D o, + .regs =3D def->args_ct[o].regs >> 1, + }; + def->args_ct[o].pair =3D 2; + def->args_ct[o].pair_index =3D i; + tcg_debug_assert(ct_str[1] =3D=3D '\0'); + continue; } =20 do { @@ -2084,6 +2137,8 @@ static void process_op_defs(TCGContext *s) default: case '0' ... '9': case '&': + case 'p': + case 'm': /* Typo in TCGTargetOpDef constraint. */ g_assert_not_reached(); } @@ -2093,6 +2148,79 @@ static void process_op_defs(TCGContext *s) /* TCGTargetOpDef entry with too much information? */ tcg_debug_assert(i =3D=3D TCG_MAX_OP_ARGS || tdefs->args_ct_str[i]= =3D=3D NULL); =20 + /* + * Fix up output pairs that are aliased with inputs. + * When we created the alias, we copied pair from the output. + * There are three cases: + * (1a) Pairs of inputs alias pairs of outputs. + * (1b) One input aliases the first of a pair of outputs. + * (2) One input aliases the second of a pair of outputs. + * + * Case 1a is handled by making sure that the pair_index'es are + * properly updated so that they appear the same as a pair of inpu= ts. + * + * Case 1b is handled by setting the pair_index of the input to + * itself, simply so it doesn't point to an unrelated argument. + * Since we don't encounter the "second" during the input allocati= on + * phase, nothing happens with the second half of the input pair. + * + * Case 2 is handled by setting the second input to pair=3D3, the + * first output to pair=3D3, and the pair_index'es to match. + */ + if (saw_alias_pair) { + for (i =3D def->nb_oargs; i < nb_args; i++) { + /* + * Since [0-9pm] must be alone in the constraint string, + * the only way they can both be set is if the pair comes + * from the output alias. + */ + if (!def->args_ct[i].ialias) { + continue; + } + switch (def->args_ct[i].pair) { + case 0: + break; + case 1: + o =3D def->args_ct[i].alias_index; + o2 =3D def->args_ct[o].pair_index; + tcg_debug_assert(def->args_ct[o].pair =3D=3D 1); + tcg_debug_assert(def->args_ct[o2].pair =3D=3D 2); + if (def->args_ct[o2].oalias) { + /* Case 1a */ + i2 =3D def->args_ct[o2].alias_index; + tcg_debug_assert(def->args_ct[i2].pair =3D=3D 2); + def->args_ct[i2].pair_index =3D i; + def->args_ct[i].pair_index =3D i2; + } else { + /* Case 1b */ + def->args_ct[i].pair_index =3D i; + } + break; + case 2: + o =3D def->args_ct[i].alias_index; + o2 =3D def->args_ct[o].pair_index; + tcg_debug_assert(def->args_ct[o].pair =3D=3D 2); + tcg_debug_assert(def->args_ct[o2].pair =3D=3D 1); + if (def->args_ct[o2].oalias) { + /* Case 1a */ + i2 =3D def->args_ct[o2].alias_index; + tcg_debug_assert(def->args_ct[i2].pair =3D=3D 1); + def->args_ct[i2].pair_index =3D i; + def->args_ct[i].pair_index =3D i2; + } else { + /* Case 2 */ + def->args_ct[i].pair =3D 3; + def->args_ct[o2].pair =3D 3; + def->args_ct[i].pair_index =3D o2; + def->args_ct[o2].pair_index =3D i; + } + break; + default: + g_assert_not_reached(); + } + } + } + /* sort the constraints (XXX: this is just an heuristic) */ sort_constraints(def, 0, def->nb_oargs); sort_constraints(def, def->nb_oargs, def->nb_iargs); @@ -3141,6 +3269,52 @@ static TCGReg tcg_reg_alloc(TCGContext *s, TCGRegSet= required_regs, tcg_abort(); } =20 +static TCGReg tcg_reg_alloc_pair(TCGContext *s, TCGRegSet required_regs, + TCGRegSet allocated_regs, + TCGRegSet preferred_regs, bool rev) +{ + int i, j, k, fmin, n =3D ARRAY_SIZE(tcg_target_reg_alloc_order); + TCGRegSet reg_ct[2]; + const int *order; + + /* Ensure that if I is not in allocated_regs, I+1 is not either. */ + reg_ct[1] =3D required_regs & ~(allocated_regs | (allocated_regs >> 1)= ); + tcg_debug_assert(reg_ct[1] !=3D 0); + reg_ct[0] =3D reg_ct[1] & preferred_regs; + + order =3D rev ? indirect_reg_alloc_order : tcg_target_reg_alloc_order; + + /* + * Skip the preferred_regs option if it cannot be satisfied, + * or if the preference made no difference. + */ + k =3D reg_ct[0] =3D=3D 0 || reg_ct[0] =3D=3D reg_ct[1]; + + /* + * Minimize the number of flushes by looking for 2 free registers firs= t, + * then a single flush, then two flushes. + */ + for (fmin =3D 2; fmin >=3D 0; fmin--) { + for (j =3D k; j < 2; j++) { + TCGRegSet set =3D reg_ct[j]; + + for (i =3D 0; i < n; i++) { + TCGReg reg =3D order[i]; + + if (tcg_regset_test_reg(set, reg)) { + int f =3D !s->reg_to_temp[reg] + !s->reg_to_temp[reg += 1]; + if (f >=3D fmin) { + tcg_reg_free(s, reg, allocated_regs); + tcg_reg_free(s, reg + 1, allocated_regs); + return reg; + } + } + } + } + } + tcg_abort(); +} + /* Make sure the temporary is in a register. If needed, allocate the regi= ster from DESIRED while avoiding ALLOCATED. */ static void temp_load(TCGContext *s, TCGTemp *ts, TCGRegSet desired_regs, @@ -3552,6 +3726,8 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) for (k =3D 0; k < nb_iargs; k++) { TCGRegSet i_preferred_regs, i_required_regs; bool allocate_new_reg, copyto_new_reg; + TCGTemp *ts2; + int i1, i2; =20 i =3D def->args_ct[nb_oargs + k].sort_index; arg =3D op->args[i]; @@ -3611,6 +3787,108 @@ static void tcg_reg_alloc_op(TCGContext *s, const T= CGOp *op) } break; =20 + case 1: + /* First of an input pair; if i1 =3D=3D i2, the second is an o= utput. */ + i1 =3D i; + i2 =3D arg_ct->pair_index; + ts2 =3D i1 !=3D i2 ? arg_temp(op->args[i2]) : NULL; + + /* + * It is easier to default to allocating a new pair + * and to identify a few cases where it's not required. + */ + if (arg_ct->ialias) { + i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + if (IS_DEAD_ARG(i1) && + IS_DEAD_ARG(i2) && + ts->val_type =3D=3D TEMP_VAL_REG && + ts->reg < TCG_TARGET_NB_REGS - 1 && + tcg_regset_test_reg(i_required_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg + 1) && + (ts2 + ? ts2->val_type =3D=3D TEMP_VAL_REG && + ts2->reg =3D=3D reg + 1 + : s->reg_to_temp[reg + 1] =3D=3D NULL)) { + break; + } + } else { + /* Without aliasing, the pair must also be an input. */ + tcg_debug_assert(ts2); + if (ts->val_type =3D=3D TEMP_VAL_REG && + ts2->val_type =3D=3D TEMP_VAL_REG && + ts2->reg =3D=3D reg + 1 && + tcg_regset_test_reg(i_required_regs, reg)) { + break; + } + } + reg =3D tcg_reg_alloc_pair(s, i_required_regs, i_allocated_reg= s, + 0, ts->indirect_base); + goto do_pair; + + case 2: /* pair second */ + reg =3D new_args[arg_ct->pair_index] + 1; + goto do_pair; + + case 3: /* ialias with second output, no first input */ + tcg_debug_assert(arg_ct->ialias); + i_preferred_regs =3D op->output_pref[arg_ct->alias_index]; + + if (IS_DEAD_ARG(i) && + ts->val_type =3D=3D TEMP_VAL_REG && + reg > 0 && + s->reg_to_temp[reg - 1] =3D=3D NULL && + tcg_regset_test_reg(i_required_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg) && + !tcg_regset_test_reg(i_allocated_regs, reg - 1)) { + tcg_regset_set_reg(i_allocated_regs, reg - 1); + break; + } + reg =3D tcg_reg_alloc_pair(s, i_required_regs >> 1, + i_allocated_regs, 0, + ts->indirect_base); + tcg_regset_set_reg(i_allocated_regs, reg); + reg +=3D 1; + goto do_pair; + + do_pair: + /* + * If an aliased input is not dead after the instruction, + * we must allocate a new register and move it. + */ + if (arg_ct->ialias && !IS_DEAD_ARG(i)) { + /* + * Because of the alias, and the continued life, make sure + * that the temp is somewhere *other* than reg, and we get + * a copy in reg. + */ + tcg_regset_set_reg(i_allocated_regs, reg); + if (ts->val_type =3D=3D TEMP_VAL_REG && ts->reg =3D=3D reg= ) { + /* If ts was already in reg, copy it somewhere else. */ + TCGReg nr; + bool ok; + + tcg_debug_assert(ts->kind !=3D TEMP_FIXED); + nr =3D tcg_reg_alloc(s, tcg_target_available_regs[ts->= type], + i_allocated_regs, 0, ts->indirect_b= ase); + ok =3D tcg_out_mov(s, ts->type, nr, reg); + tcg_debug_assert(ok); + + set_temp_val_reg(s, ts, nr); + } else { + temp_load(s, ts, tcg_target_available_regs[ts->type], + i_allocated_regs, 0); + copyto_new_reg =3D true; + } + } else { + /* Preferably allocate to reg, otherwise copy. */ + i_required_regs =3D (TCGRegSet)1 << reg; + temp_load(s, ts, i_required_regs, i_allocated_regs, + i_preferred_regs); + copyto_new_reg =3D ts->reg !=3D reg; + } + break; + default: g_assert_not_reached(); } @@ -3681,6 +3959,30 @@ static void tcg_reg_alloc_op(TCGContext *s, const TC= GOp *op) } break; =20 + case 1: /* first of pair */ + tcg_debug_assert(!arg_ct->newreg); + if (arg_ct->oalias) { + reg =3D new_args[arg_ct->alias_index]; + break; + } + reg =3D tcg_reg_alloc_pair(s, arg_ct->regs, o_allocated_re= gs, + op->output_pref[k], ts->indirect_= base); + break; + + case 2: /* second of pair */ + tcg_debug_assert(!arg_ct->newreg); + if (arg_ct->oalias) { + reg =3D new_args[arg_ct->alias_index]; + } else { + reg =3D new_args[arg_ct->pair_index] + 1; + } + break; + + case 3: /* first of pair, aliasing with a second input */ + tcg_debug_assert(!arg_ct->newreg); + reg =3D new_args[arg_ct->pair_index] - 1; + break; + default: g_assert_not_reached(); } --=20 2.38.1