Bernhard posted his "Consolidate PIIX south bridges" v3 series:
https://lore.kernel.org/qemu-devel/20221204190553.3274-1-shentey@gmail.com/
However in order to simplify it, on the Malta board we need to set
the PIIX IRQC[A:D] routing values via the embedded bootloader (used
when no external BIOS is provided). Jiaxun added a "bootloader
generator API" for 32-bit wide instructions, and we use it in the
write_bootloader() function.
This series provides the nanoMIPS equivalent generated instructions
and update the write_bootloader_nanomips() function.
That allow fixing the TODO left in
https://lore.kernel.org/qemu-devel/20221027204720.33611-3-philmd@linaro.org/
and apply Bernhard's consolidation.
Since v1:
- addressed review comments
- generate JALRc
- split write_bootloader_nanomips() convertion in 5 parts
- use bl_gen_jump_kernel()
- merge common code to bl_setup_gt64120_jump_kernel()
Philippe Mathieu-Daudé (11):
hw/mips/bootloader: Handle buffers as opaque arrays
hw/mips/bootloader: Implement nanoMIPS NOP opcode generator
hw/mips/bootloader: Implement nanoMIPS SW opcode generator
hw/mips/bootloader: Implement nanoMIPS LI (LUI+ORI) opcode generator
hw/mips/bootloader: Implement nanoMIPS JALRc opcode generator
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (1/5)
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (2/5)
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (3/5)
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (4/5)
hw/mips/malta: Use bootloader generator API for nanoMIPS CPUs (5/5)
hw/mips/malta: Merge common BL code as bl_setup_gt64120_jump_kernel()
hw/mips/bootloader.c | 141 ++++++++++++++----
hw/mips/malta.c | 281 ++++++++---------------------------
include/hw/mips/bootloader.h | 10 +-
3 files changed, 177 insertions(+), 255 deletions(-)
--
2.38.1