[v2] MIPS system emulation miscellaneous fixes

[PATCH v2 0/3] MIPS system emulation miscellaneous fixes

Jiaxun Yang posted 3 patches 1 year, 6 months ago

Diff against v1
Download series mbox

Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20221031132531.18122-1-jiaxun.yang@flygoat.com

Maintainers: "Philippe Mathieu-Daudé" <philmd@linaro.org>, Aurelien Jarno <aurelien@aurel32.net>, Jiaxun Yang <jiaxun.yang@flygoat.com>, Aleksandar Rikalo <aleksandar.rikalo@syrmia.com>

target/mips/cpu-defs.c.inc    | 4 ++--
target/mips/cpu.c             | 6 ++++++
target/mips/tcg/octeon.decode | 2 +-
3 files changed, 9 insertions(+), 3 deletions(-)

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[PATCH v2 0/3] MIPS system emulation miscellaneous fixes

Posted by Jiaxun Yang 1 year, 6 months ago

Hi all,

I was trying to build a MIPS VirtIO board[1] for QEMU that is able
to work with all processors we support.

When I was bring up varoius CPUs on that board I noticed some issues
with the system emulation code that I'm fixing in this series.

Thanks.

- Jiaxun
[1]: https://gitlab.com/FlyGoat/qemu/-/tree/mips-virt

v2: Address review comments

Jiaxun Yang (3):
  target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
  target/mips: Cast offset field of Octeon BBIT to int16_t
  target/mips: Disable DSP ASE for Octeon68XX

 target/mips/cpu-defs.c.inc    | 4 ++--
 target/mips/cpu.c             | 6 ++++++
 target/mips/tcg/octeon.decode | 2 +-
 3 files changed, 9 insertions(+), 3 deletions(-)

-- 
2.34.1

Re: [PATCH v2 0/3] MIPS system emulation miscellaneous fixes

Posted by Philippe Mathieu-Daudé 1 year, 5 months ago

On 31/10/22 14:25, Jiaxun Yang wrote:
> Hi all,
> 
> I was trying to build a MIPS VirtIO board[1] for QEMU that is able
> to work with all processors we support.
> 
> When I was bring up varoius CPUs on that board I noticed some issues
> with the system emulation code that I'm fixing in this series.
> 
> Thanks.
> 
> - Jiaxun
> [1]: https://gitlab.com/FlyGoat/qemu/-/tree/mips-virt
> 
> v2: Address review comments
> 
> Jiaxun Yang (3):
>    target/mips: Set CP0St_{KX, SX, UX} for Loongson-2F
>    target/mips: Cast offset field of Octeon BBIT to int16_t
>    target/mips: Disable DSP ASE for Octeon68XX

Queued to mips-fixes, thanks.