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envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Received-SPF: pass client-ip=2607:f8b0:4864:20::432; envelope-from=richard.henderson@linaro.org; helo=mail-pf1-x432.google.com X-Spam_score_int: -20 X-Spam_score: -2.1 X-Spam_bar: -- X-Spam_report: (-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1, RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no X-Spam_action: no action X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "Qemu-devel" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org X-ZohoMail-DKIM: pass (identity @linaro.org) X-ZM-MESSAGEID: 1666866464345100001 Content-Type: text/plain; charset="utf-8" The helpers for reset_rf, cli, sti, clac, stac are completely trivial; implement them inline. Drop some nearby #if 0 code. Signed-off-by: Richard Henderson Reviewed-by: Paolo Bonzini Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- target/i386/helper.h | 5 ----- target/i386/tcg/cc_helper.c | 41 ------------------------------------- target/i386/tcg/translate.c | 30 ++++++++++++++++++++++----- 3 files changed, 25 insertions(+), 51 deletions(-) diff --git a/target/i386/helper.h b/target/i386/helper.h index 88143b2a24..b7de5429ef 100644 --- a/target/i386/helper.h +++ b/target/i386/helper.h @@ -56,13 +56,8 @@ DEF_HELPER_2(syscall, void, env, int) DEF_HELPER_2(sysret, void, env, int) #endif DEF_HELPER_FLAGS_2(pause, TCG_CALL_NO_WG, noreturn, env, int) -DEF_HELPER_1(reset_rf, void, env) DEF_HELPER_FLAGS_3(raise_interrupt, TCG_CALL_NO_WG, noreturn, env, int, in= t) DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, int) -DEF_HELPER_1(cli, void, env) -DEF_HELPER_1(sti, void, env) -DEF_HELPER_1(clac, void, env) -DEF_HELPER_1(stac, void, env) DEF_HELPER_3(boundw, void, env, tl, int) DEF_HELPER_3(boundl, void, env, tl, int) =20 diff --git a/target/i386/tcg/cc_helper.c b/target/i386/tcg/cc_helper.c index cc7ea9e8b9..6227dbb30b 100644 --- a/target/i386/tcg/cc_helper.c +++ b/target/i386/tcg/cc_helper.c @@ -346,44 +346,3 @@ void helper_clts(CPUX86State *env) env->cr[0] &=3D ~CR0_TS_MASK; env->hflags &=3D ~HF_TS_MASK; } - -void helper_reset_rf(CPUX86State *env) -{ - env->eflags &=3D ~RF_MASK; -} - -void helper_cli(CPUX86State *env) -{ - env->eflags &=3D ~IF_MASK; -} - -void helper_sti(CPUX86State *env) -{ - env->eflags |=3D IF_MASK; -} - -void helper_clac(CPUX86State *env) -{ - env->eflags &=3D ~AC_MASK; -} - -void helper_stac(CPUX86State *env) -{ - env->eflags |=3D AC_MASK; -} - -#if 0 -/* vm86plus instructions */ -void helper_cli_vm(CPUX86State *env) -{ - env->eflags &=3D ~VIF_MASK; -} - -void helper_sti_vm(CPUX86State *env) -{ - env->eflags |=3D VIF_MASK; - if (env->eflags & VIP_MASK) { - raise_exception_ra(env, EXCP0D_GPF, GETPC()); - } -} -#endif diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c index e19d5c1c64..dc1fa9f9ed 100644 --- a/target/i386/tcg/translate.c +++ b/target/i386/tcg/translate.c @@ -2745,6 +2745,26 @@ static void gen_reset_hflag(DisasContext *s, uint32_= t mask) } } =20 +static void gen_set_eflags(DisasContext *s, target_ulong mask) +{ + TCGv t =3D tcg_temp_new(); + + tcg_gen_ld_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_gen_ori_tl(t, t, mask); + tcg_gen_st_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_temp_free(t); +} + +static void gen_reset_eflags(DisasContext *s, target_ulong mask) +{ + TCGv t =3D tcg_temp_new(); + + tcg_gen_ld_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_gen_andi_tl(t, t, ~mask); + tcg_gen_st_tl(t, cpu_env, offsetof(CPUX86State, eflags)); + tcg_temp_free(t); +} + /* Clear BND registers during legacy branches. */ static void gen_bnd_jmp(DisasContext *s) { @@ -2775,7 +2795,7 @@ do_gen_eob_worker(DisasContext *s, bool inhibit, bool= recheck_tf, bool jr) } =20 if (s->base.tb->flags & HF_RF_MASK) { - gen_helper_reset_rf(cpu_env); + gen_reset_eflags(s, RF_MASK); } if (recheck_tf) { gen_helper_rechecking_single_step(cpu_env); @@ -5501,12 +5521,12 @@ static bool disas_insn(DisasContext *s, CPUState *c= pu) #endif case 0xfa: /* cli */ if (check_iopl(s)) { - gen_helper_cli(cpu_env); + gen_reset_eflags(s, IF_MASK); } break; case 0xfb: /* sti */ if (check_iopl(s)) { - gen_helper_sti(cpu_env); + gen_set_eflags(s, IF_MASK); /* interruptions are enabled only the first insn after sti */ gen_update_eip_next(s); gen_eob_inhibit_irq(s, true); @@ -5788,7 +5808,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) || CPL(s) !=3D 0) { goto illegal_op; } - gen_helper_clac(cpu_env); + gen_reset_eflags(s, AC_MASK); s->base.is_jmp =3D DISAS_EOB_NEXT; break; =20 @@ -5797,7 +5817,7 @@ static bool disas_insn(DisasContext *s, CPUState *cpu) || CPL(s) !=3D 0) { goto illegal_op; } - gen_helper_stac(cpu_env); + gen_set_eflags(s, AC_MASK); s->base.is_jmp =3D DISAS_EOB_NEXT; break; =20 --=20 2.34.1