Signed-off-by: Steffen Görtz <contrib@steffen-goertz.de>
---
 hw/nvram/Makefile.objs        |   1 +
 hw/nvram/nrf51_nvmc.c         | 165 ++++++++++++++++++++++++++++++++++
 include/hw/nvram/nrf51_nvmc.h |  52 +++++++++++
 3 files changed, 218 insertions(+)
 create mode 100644 hw/nvram/nrf51_nvmc.c
 create mode 100644 include/hw/nvram/nrf51_nvmc.h

diff --git a/hw/nvram/Makefile.objs b/hw/nvram/Makefile.objs
index a912d25391..9edd61e8af 100644
--- a/hw/nvram/Makefile.objs
+++ b/hw/nvram/Makefile.objs
@@ -5,3 +5,4 @@ common-obj-y += fw_cfg.o
 common-obj-y += chrp_nvram.o
 common-obj-$(CONFIG_MAC_NVRAM) += mac_nvram.o
 obj-$(CONFIG_PSERIES) += spapr_nvram.o
+obj-$(CONFIG_NRF51_SOC) += nrf51_nvmc.o
diff --git a/hw/nvram/nrf51_nvmc.c b/hw/nvram/nrf51_nvmc.c
new file mode 100644
index 0000000000..839d03d9c4
--- /dev/null
+++ b/hw/nvram/nrf51_nvmc.c
@@ -0,0 +1,165 @@
+/*
+ * nrf51_nvmc.c
+ *
+ * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
+ *
+ * This code is licensed under the GPL version 2 or later.  See
+ * the COPYING file in the top-level directory.
+ */
+
+#include "qemu/osdep.h"
+#include "qapi/error.h"
+#include "qemu/log.h"
+#include "hw/nvram/nrf51_nvmc.h"
+#include "exec/address-spaces.h"
+
+#define NRF51_NVMC_SIZE         0x1000
+
+#define NRF51_NVMC_READY        0x400
+#define NRF51_NVMC_READY_READY  0x01
+#define NRF51_NVMC_CONFIG       0x504
+#define NRF51_NVMC_CONFIG_MASK  0x03
+#define NRF51_NVMC_CONFIG_WEN   0x01
+#define NRF51_NVMC_CONFIG_EEN   0x02
+#define NRF51_NVMC_ERASEPCR1    0x508
+#define NRF51_NVMC_ERASEPCR0    0x510
+#define NRF51_NVMC_ERASEALL     0x50C
+#define NRF51_NVMC_ERASEUICR    0x512
+#define NRF51_NVMC_ERASE        0x01
+
+#define NRF51_UICR_OFFSET       0x10001000UL
+#define NRF51_UICR_SIZE         0x100
+
+static uint64_t io_read(void *opaque, hwaddr offset, unsigned int size)
+{
+    Nrf51NVMCState *s = NRF51_NVMC(opaque);
+    uint64_t r = 0;
+
+    switch (offset) {
+    case NRF51_NVMC_READY:
+        r = NRF51_NVMC_READY_READY;
+        break;
+    case NRF51_NVMC_CONFIG:
+        r = s->state.config;
+        break;
+    default:
+        qemu_log_mask(LOG_GUEST_ERROR,
+                "%s: bad read offset 0x%" HWADDR_PRIx "\n", __func__, offset);
+    }
+
+    return r;
+}
+
+static void io_write(void *opaque, hwaddr offset, uint64_t value,
+        unsigned int size)
+{
+    Nrf51NVMCState *s = NRF51_NVMC(opaque);
+
+    switch (offset) {
+    case NRF51_NVMC_CONFIG:
+        s->state.config = value & NRF51_NVMC_CONFIG_MASK;
+        break;
+    case NRF51_NVMC_ERASEPCR0:
+    case NRF51_NVMC_ERASEPCR1:
+        value &= ~(s->page_size - 1);
+        if (value < (s->code_size * s->page_size)) {
+            address_space_write(&s->as, value, MEMTXATTRS_UNSPECIFIED,
+                    s->empty_page, s->page_size);
+        }
+        break;
+    case NRF51_NVMC_ERASEALL:
+        if (value == NRF51_NVMC_ERASE) {
+            for (uint32_t i = 0; i < s->code_size; i++) {
+                address_space_write(&s->as, i * s->page_size,
+                MEMTXATTRS_UNSPECIFIED, s->empty_page, s->page_size);
+            }
+            address_space_write(&s->as, NRF51_UICR_OFFSET,
+            MEMTXATTRS_UNSPECIFIED, s->empty_page, NRF51_UICR_SIZE);
+        }
+        break;
+    case NRF51_NVMC_ERASEUICR:
+        if (value == NRF51_NVMC_ERASE) {
+            address_space_write(&s->as, NRF51_UICR_OFFSET,
+            MEMTXATTRS_UNSPECIFIED, s->empty_page, NRF51_UICR_SIZE);
+        }
+        break;
+
+    default:
+        qemu_log_mask(LOG_GUEST_ERROR,
+                "%s: bad write offset 0x%" HWADDR_PRIx "\n", __func__, offset);
+    }
+}
+
+static const MemoryRegionOps io_ops = { .read = io_read, .write = io_write,
+        .endianness = DEVICE_LITTLE_ENDIAN, };
+
+static void nrf51_nvmc_init(Object *obj)
+{
+    Nrf51NVMCState *s = NRF51_NVMC(obj);
+    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+    memory_region_init_io(&s->mmio, obj, &io_ops, s,
+    TYPE_NRF51_NVMC, NRF51_NVMC_SIZE);
+    sysbus_init_mmio(sbd, &s->mmio);
+}
+
+static void nrf51_nvmc_realize(DeviceState *dev, Error **errp)
+{
+    Nrf51NVMCState *s = NRF51_NVMC(dev);
+
+    if (!s->mr) {
+        error_setg(errp, "memory property was not set");
+        return;
+    }
+
+    if (s->page_size < NRF51_UICR_SIZE) {
+        error_setg(errp, "page size too small");
+        return;
+    }
+
+    s->empty_page = g_malloc(s->page_size);
+    memset(s->empty_page, 0xFF, s->page_size);
+
+    address_space_init(&s->as, s->mr, "system-memory");
+}
+
+static void nrf51_nvmc_unrealize(DeviceState *dev, Error **errp)
+{
+    Nrf51NVMCState *s = NRF51_NVMC(dev);
+
+    g_free(s->empty_page);
+    s->empty_page = NULL;
+
+}
+
+static Property nrf51_nvmc_properties[] = {
+    DEFINE_PROP_UINT16("page_size", Nrf51NVMCState, page_size, 0x400),
+    DEFINE_PROP_UINT32("code_size", Nrf51NVMCState, code_size, 0x100),
+    DEFINE_PROP_LINK("memory", Nrf51NVMCState, mr, TYPE_MEMORY_REGION,
+                     MemoryRegion *),
+    DEFINE_PROP_END_OF_LIST(),
+};
+
+static void nrf51_nvmc_class_init(ObjectClass *klass, void *data)
+{
+    DeviceClass *dc = DEVICE_CLASS(klass);
+
+    dc->props = nrf51_nvmc_properties;
+    dc->realize = nrf51_nvmc_realize;
+    dc->unrealize = nrf51_nvmc_unrealize;
+}
+
+static const TypeInfo nrf51_nvmc_info = {
+    .name = TYPE_NRF51_NVMC,
+    .parent = TYPE_SYS_BUS_DEVICE,
+    .instance_size = sizeof(Nrf51NVMCState),
+    .instance_init = nrf51_nvmc_init,
+    .class_init = nrf51_nvmc_class_init
+};
+
+static void nrf51_nvmc_register_types(void)
+{
+    type_register_static(&nrf51_nvmc_info);
+}
+
+type_init(nrf51_nvmc_register_types)
diff --git a/include/hw/nvram/nrf51_nvmc.h b/include/hw/nvram/nrf51_nvmc.h
new file mode 100644
index 0000000000..dfd500b14e
--- /dev/null
+++ b/include/hw/nvram/nrf51_nvmc.h
@@ -0,0 +1,52 @@
+/*
+ * nrf51_nvmc.h
+ *
+ * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
+ *
+ * This code is licensed under the GPL version 2 or later.  See
+ * the COPYING file in the top-level directory.
+ *
+ * See Nrf51 reference manual 6 Non-Volatile Memory Controller (NVMC)
+ * See Nrf51 product sheet 8.22 NVMC specifications
+ *
+ * QEMU interface:
+ * + sysbus MMIO regions 0: Memory Region with registers
+ *   to be mapped to the peripherals instance address by the SOC.
+ * + page_size property to set the page size in bytes.
+ * + code_size property to set the code size in number of pages.
+ *
+ * Accuracy of the peripheral model:
+ * + The NVMC is always ready, all requested erase operations succeed
+ *   immediately.
+ * + CONFIG.WEN and CONFIG.EEN flags can be written and read back
+ *   but are not evaluated to check whether a requested write/erase operation
+ *   is legal.
+ * + Code regions (MPU configuration) are disregarded.
+ */
+#ifndef NRF51_NVMC_H
+#define NRF51_NVMC_H
+
+#include "hw/sysbus.h"
+#include "qemu/timer.h"
+#define TYPE_NRF51_NVMC "nrf51_soc.nvmc"
+#define NRF51_NVMC(obj) OBJECT_CHECK(Nrf51NVMCState, (obj), TYPE_NRF51_NVMC)
+
+typedef struct Nrf51NVMCState {
+    SysBusDevice parent_obj;
+
+    MemoryRegion mmio;
+
+    uint32_t code_size;
+    uint16_t page_size;
+    uint8_t *empty_page;
+    MemoryRegion *mr;
+    AddressSpace as;
+
+    struct {
+        uint32_t config:2;
+    } state;
+
+} Nrf51NVMCState;
+
+
+#endif
-- 
2.17.1

On 26.06.2018 10:17, Steffen Görtz wrote:
[...]
> +static const MemoryRegionOps io_ops = { .read = io_read, .write = io_write,
> +        .endianness = DEVICE_LITTLE_ENDIAN, };

Could you please put the entries on a separate line each? That would be
better readable.

> +static void nrf51_nvmc_init(Object *obj)
> +{
> +    Nrf51NVMCState *s = NRF51_NVMC(obj);
> +    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +
> +    memory_region_init_io(&s->mmio, obj, &io_ops, s,
> +    TYPE_NRF51_NVMC, NRF51_NVMC_SIZE);
Please indent the second line of the memory_region_init_io statement.

> +    sysbus_init_mmio(sbd, &s->mmio);
> +}
[...]
> diff --git a/include/hw/nvram/nrf51_nvmc.h b/include/hw/nvram/nrf51_nvmc.h
> new file mode 100644
> index 0000000000..dfd500b14e
> --- /dev/null
> +++ b/include/hw/nvram/nrf51_nvmc.h
> @@ -0,0 +1,52 @@
> +/*
> + * nrf51_nvmc.h
> + *
> + * Copyright 2018 Steffen Görtz <contrib@steffen-goertz.de>
> + *
> + * This code is licensed under the GPL version 2 or later.  See
> + * the COPYING file in the top-level directory.
> + *
> + * See Nrf51 reference manual 6 Non-Volatile Memory Controller (NVMC)
> + * See Nrf51 product sheet 8.22 NVMC specifications
> + *
> + * QEMU interface:
> + * + sysbus MMIO regions 0: Memory Region with registers
> + *   to be mapped to the peripherals instance address by the SOC.
> + * + page_size property to set the page size in bytes.
> + * + code_size property to set the code size in number of pages.
> + *
> + * Accuracy of the peripheral model:
> + * + The NVMC is always ready, all requested erase operations succeed
> + *   immediately.
> + * + CONFIG.WEN and CONFIG.EEN flags can be written and read back
> + *   but are not evaluated to check whether a requested write/erase operation
> + *   is legal.
> + * + Code regions (MPU configuration) are disregarded.
> + */
> +#ifndef NRF51_NVMC_H
> +#define NRF51_NVMC_H
> +
> +#include "hw/sysbus.h"
> +#include "qemu/timer.h"

Any reason for including timer.h here? If not, please drop that line.

> +#define TYPE_NRF51_NVMC "nrf51_soc.nvmc"
> +#define NRF51_NVMC(obj) OBJECT_CHECK(Nrf51NVMCState, (obj), TYPE_NRF51_NVMC)
> +
> +typedef struct Nrf51NVMCState {
> +    SysBusDevice parent_obj;
> +
> +    MemoryRegion mmio;
> +
> +    uint32_t code_size;
> +    uint16_t page_size;
> +    uint8_t *empty_page;
> +    MemoryRegion *mr;
> +    AddressSpace as;
> +
> +    struct {
> +        uint32_t config:2;
> +    } state;
> +
> +} Nrf51NVMCState;
> +
> +
> +#endif

 Thomas

Hi Thomas,

On 26.06.2018 10:45, Thomas Huth wrote:
> On 26.06.2018 10:17, Steffen Görtz wrote:
> [...]
>> +static const MemoryRegionOps io_ops = { .read = io_read, .write = io_write,
>> +        .endianness = DEVICE_LITTLE_ENDIAN, };
> 
> Could you please put the entries on a separate line each? That would be
> better readable.
done
> 
>> +static void nrf51_nvmc_init(Object *obj)
>> +{
>> +    Nrf51NVMCState *s = NRF51_NVMC(obj);
>> +    SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
>> +
>> +    memory_region_init_io(&s->mmio, obj, &io_ops, s,
>> +    TYPE_NRF51_NVMC, NRF51_NVMC_SIZE);
> Please indent the second line of the memory_region_init_io statement.
done
> 
>> +    sysbus_init_mmio(sbd, &s->mmio);

>> +#include "hw/sysbus.h"
>> +#include "qemu/timer.h"
> 
> Any reason for including timer.h here? If not, please drop that line.

No it was a left over, removed.

Best regards,
Steffen