[Qemu-devel] [PATCH 00/35] nanoMIPS

Yongbok Kim posted 35 patches 5 years, 9 months ago
Failed in applying to current master (apply log)
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Test docker-quick@centos7 passed
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hw/mips/mips_malta.c             |  153 +-
include/elf.h                    |    1 +
linux-user/mips/cpu_loop.c       |   25 +-
target/mips/cpu.h                |    3 +
target/mips/gdbstub.c            |   16 +-
target/mips/helper.c             |   39 +-
target/mips/helper.h             |    4 +
target/mips/machine.c            |    1 +
target/mips/mips-defs.h          |    4 +
target/mips/op_helper.c          |  166 ++-
target/mips/translate.c          | 3017 +++++++++++++++++++++++++++++++++++++-
target/mips/translate_init.inc.c |   37 +
12 files changed, 3408 insertions(+), 58 deletions(-)
[Qemu-devel] [PATCH 00/35] nanoMIPS
Posted by Yongbok Kim 5 years, 9 months ago
This series of patches is implementing recently announced nanoMIPS on QEMU.
nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide 
instructions. It is designed to be portable at assembly level with other MIPS
and microMIPS code, but contains a number of changes which enhance code density
and efficiency.
Most of nanoMIPS instructions exist in another MIPS ISAs. Therefore the large
portion of patches is decoding nanoMIPS opcodes.

More patches will be added later after this. 

For more information please refer following link.
https://www.mips.com/products/architectures/nanomips/


James Hogan (5):
  target/mips: Implement nanoMIPS EXTW instruction
  target/mips: Fix nanoMIPS exception_resume_pc
  target/mips: Fix nanoMIPS set_hflags_for_handler
  target/mips: Fix nanoMIPS set_pc
  target/mips: Disable gdbstub nanoMIPS ISA bit

Matthew Fortune (4):
  target/mips: Add nanoMIPS save and restore
  target/mips: Add has_isa_mode
  target/mips: Add nanoMIPS rotx instruction
  hw/mips: Add basic nanoMIPS boot code

Paul Burton (1):
  mips_malta: Setup GT64120 BARs in nanoMIPS bootloader

Stefan Markovic (3):
  target/mips: Add nanoMIPS CP0_BadInstrX register
  hw/mips: Fix semihosting argument passing for nanoMIPS bare metal
  target/mips: Add I7200 CPU

Yongbok Kim (22):
  target/mips: Raise a RI when given fs is n/a from CTC1
  target/mips: Fix microMIPS on reset
  target/mips: Add nanoMIPS OPCODE table
  target/mips: Add decode_nanomips_opc()
  target/mips: Add nanoMIPS 16bit ld/st instructions
  target/mips: Add nanoMIPS pool16c instructions
  target/mips: Add nanoMIPS 32bit instructions
  target/mips: Add nanoMIPS 48bit instructions
  target/mips: Add nanoMIPS pool32f instructions
  target/mips: Add nanoMIPS pool32a0 instructions
  target/mips: Add nanoMIPS pool32axf instructions
  target/mips: Update gen_flt_ldst()
  target/mips: Add nanoMIPS p_lsx instructions
  target/mips: Add nanoMIPS load store instructions
  target/mips: Add nanoMIPS branch instructions
  target/mips: Implement nanoMIPS LLWP/SCWP pair
  target/mips: Fix not to update BadVAddr in Debug Mode
  target/mips: Fix data type for offset
  target/mips: Update BadInstr{P} regs on nanoMIPS
  target/mips: Config3.ISAOnExc is read only in nanoMIPS
  target/mips: Fix ERET/ERETNC can cause ADEL exception
  target/mips: Fix gdbstub to read/write 64 bit FP registers

 hw/mips/mips_malta.c             |  153 +-
 include/elf.h                    |    1 +
 linux-user/mips/cpu_loop.c       |   25 +-
 target/mips/cpu.h                |    3 +
 target/mips/gdbstub.c            |   16 +-
 target/mips/helper.c             |   39 +-
 target/mips/helper.h             |    4 +
 target/mips/machine.c            |    1 +
 target/mips/mips-defs.h          |    4 +
 target/mips/op_helper.c          |  166 ++-
 target/mips/translate.c          | 3017 +++++++++++++++++++++++++++++++++++++-
 target/mips/translate_init.inc.c |   37 +
 12 files changed, 3408 insertions(+), 58 deletions(-)

-- 
1.9.1


Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
Posted by Philippe Mathieu-Daudé 5 years, 9 months ago
Hi Yongbok,

On 06/20/2018 09:05 AM, Yongbok Kim wrote:
> This series of patches is implementing recently announced nanoMIPS on QEMU.
> nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide 
> instructions. It is designed to be portable at assembly level with other MIPS
> and microMIPS code, but contains a number of changes which enhance code density
> and efficiency.
[...]

I noticed various patches use the imgtec.com domain.

In commit 94d973bdaac Paul Burton wrote:

    MIPS will soon no longer be a part of Imagination Technologies
    & as such the @imgtec.com address will soon cease to function.

Your's got updated in 0eb4e1f33a4, and James in a7a2d7d2a04.

Assuming this is rebase using previous internal patches, shouldn't you
update those addresses to your new domain? Else the checkpatch.pl script
will continue to extract imgtec.com addresses from commits.

Regards,

Phil.

Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
Posted by Aleksandar Markovic 5 years, 9 months ago
> From: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> on behalf of Philippe Mathieu-Daudé <f4bug@amsat.org>
> Sent: Friday, June 22, 2018 6:26 AM
> To: Yongbok Kim; James Hogan
> Cc: qemu-devel@nongnu.org; Aleksandar Markovic; Paul Burton; Stefan Markovic; Matthew Fortune; aurelien@aurel32.net; Paul Burton
> Subject: Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
>
> Hi Yongbok,
>
> On 06/20/2018 09:05 AM, Yongbok Kim wrote:
> > This series of patches is implementing recently announced nanoMIPS on QEMU.
> > nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide
> > instructions. It is designed to be portable at assembly level with other MIPS
> > and microMIPS code, but contains a number of changes which enhance code density
> > and efficiency.
> [...]
>
> I noticed various patches use the imgtec.com domain.
>
> In commit 94d973bdaac Paul Burton wrote:
>
>     MIPS will soon no longer be a part of Imagination Technologies
>     & as such the @imgtec.com address will soon cease to function.
>
> Your's got updated in 0eb4e1f33a4, and James in a7a2d7d2a04.
>
> Assuming this is rebase using previous internal patches, shouldn't you
> update those addresses to your new domain? Else the checkpatch.pl script
> will continue to extract imgtec.com addresses from commits.

Thanks for spotting this, Philippe! It probably slipped through the cracks.

If nobody objects, while integrating/applying, I am going to change all instances of "@imgtec.com" to "@mips.com" for this series.

Some of the patches might have been developed while the company was part of Imagination Technologies - however, I think it is reasonable to use email addresses at the moment of submitting changes to this list. This gets complicated if, for example, a person leaves the company before his/her email address changes, but I think, in this case, using "@mips.com" is appropriate for all involved persons.

Regards,

Aleksandar

>
> Regards,
>
> Phil.
Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
Posted by Philippe Mathieu-Daudé 5 years, 9 months ago
Hi Aleksandar,

On 06/22/2018 11:39 AM, Aleksandar Markovic wrote:
>> From: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> on behalf of Philippe Mathieu-Daudé <f4bug@amsat.org>
>> Sent: Friday, June 22, 2018 6:26 AM
>> To: Yongbok Kim; James Hogan
>> Cc: qemu-devel@nongnu.org; Aleksandar Markovic; Paul Burton; Stefan Markovic; Matthew Fortune; aurelien@aurel32.net; Paul Burton
>> Subject: Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
>>
>> Hi Yongbok,
>>
>> On 06/20/2018 09:05 AM, Yongbok Kim wrote:
>>> This series of patches is implementing recently announced nanoMIPS on QEMU.
>>> nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide
>>> instructions. It is designed to be portable at assembly level with other MIPS
>>> and microMIPS code, but contains a number of changes which enhance code density
>>> and efficiency.
>> [...]
>>
>> I noticed various patches use the imgtec.com domain.
>>
>> In commit 94d973bdaac Paul Burton wrote:
>>
>>     MIPS will soon no longer be a part of Imagination Technologies
>>     & as such the @imgtec.com address will soon cease to function.
>>
>> Your's got updated in 0eb4e1f33a4, and James in a7a2d7d2a04.
>>
>> Assuming this is rebase using previous internal patches, shouldn't you
>> update those addresses to your new domain? Else the checkpatch.pl script
>> will continue to extract imgtec.com addresses from commits.
> 
> Thanks for spotting this, Philippe! It probably slipped through the cracks.
> 
> If nobody objects, while integrating/applying, I am going to change all instances of "@imgtec.com" to "@mips.com" for this series.
> 
> Some of the patches might have been developed while the company was part of Imagination Technologies - however, I think it is reasonable to use email addresses at the moment of submitting changes to this list. This gets complicated if, for example, a person leaves the company before his/her email address changes, but I think, in this case, using "@mips.com" is appropriate for all involved persons.

Well, since imgtec.com entries are in .mailmap, and get_maintainer.pl
parses it, maybe there is a bug in the script.

The 'From' is used for the git author, and IMO should be @mips.com.

To respect Imagination Technologies efforts, can this work?

Signed-off-by: James Hogan <james.hogan@mips.com> for Imagination
Technologies

This shouldn't break scripts. However not all names fit in less than 80
characters...

> 
> Regards,
> 
> Aleksandar
> 
>>
>> Regards,
>>
>> Phil.

Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
Posted by Peter Maydell 5 years, 9 months ago
On 22 June 2018 at 16:16, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> On 06/22/2018 11:39 AM, Aleksandar Markovic wrote:
>> If nobody objects, while integrating/applying, I am going to change all instances of "@imgtec.com" to "@mips.com" for this series.
>>
>> Some of the patches might have been developed while the company was part of Imagination Technologies - however, I think it is reasonable to use email addresses at the moment of submitting changes to this list. This gets complicated if, for example, a person leaves the company before his/her email address changes, but I think, in this case, using "@mips.com" is appropriate for all involved persons.
>
> Well, since imgtec.com entries are in .mailmap, and get_maintainer.pl
> parses it, maybe there is a bug in the script.
>
> The 'From' is used for the git author, and IMO should be @mips.com.
>
> To respect Imagination Technologies efforts, can this work?
>
> Signed-off-by: James Hogan <james.hogan@mips.com> for Imagination
> Technologies

That seems a bit weird to me. I would stick with just using
the mips addresses.

thanks
-- PMM

Re: [Qemu-devel] [PATCH 00/35] nanoMIPS
Posted by Aleksandar Markovic 5 years, 9 months ago
Thanks!


I gave "reviewed-by" to five patches (01, 02, 13, 22, and 33) that actually fix or improve pre-nanoMIPS code segments (all these issues exist regardless of nanoMIPS support). I am going to integrate them via pull request next week separately, before the whole nanoMIPS series. Apart from fixing the issues, this will simplify nanoMIPS series, making it easier to understand/review.


For the rest of the patches, I am going to wait for v2.


Aleksandar


________________________________
From: Yongbok Kim
Sent: Wednesday, June 20, 2018 2:05 PM
To: qemu-devel@nongnu.org
Cc: aurelien@aurel32.net; Aleksandar Markovic; James Hogan; Paul Burton; Matthew Fortune; Stefan Markovic
Subject: [PATCH 00/35] nanoMIPS

This series of patches is implementing recently announced nanoMIPS on QEMU.
nanoMIPS is a variable length ISA containing 16, 32 and 48 bit wide
instructions. It is designed to be portable at assembly level with other MIPS
and microMIPS code, but contains a number of changes which enhance code density
and efficiency.
Most of nanoMIPS instructions exist in another MIPS ISAs. Therefore the large
portion of patches is decoding nanoMIPS opcodes.

More patches will be added later after this.

For more information please refer following link.
https://www.mips.com/products/architectures/nanomips/


James Hogan (5):
  target/mips: Implement nanoMIPS EXTW instruction
  target/mips: Fix nanoMIPS exception_resume_pc
  target/mips: Fix nanoMIPS set_hflags_for_handler
  target/mips: Fix nanoMIPS set_pc
  target/mips: Disable gdbstub nanoMIPS ISA bit

Matthew Fortune (4):
  target/mips: Add nanoMIPS save and restore
  target/mips: Add has_isa_mode
  target/mips: Add nanoMIPS rotx instruction
  hw/mips: Add basic nanoMIPS boot code

Paul Burton (1):
  mips_malta: Setup GT64120 BARs in nanoMIPS bootloader

Stefan Markovic (3):
  target/mips: Add nanoMIPS CP0_BadInstrX register
  hw/mips: Fix semihosting argument passing for nanoMIPS bare metal
  target/mips: Add I7200 CPU

Yongbok Kim (22):
  target/mips: Raise a RI when given fs is n/a from CTC1
  target/mips: Fix microMIPS on reset
  target/mips: Add nanoMIPS OPCODE table
  target/mips: Add decode_nanomips_opc()
  target/mips: Add nanoMIPS 16bit ld/st instructions
  target/mips: Add nanoMIPS pool16c instructions
  target/mips: Add nanoMIPS 32bit instructions
  target/mips: Add nanoMIPS 48bit instructions
  target/mips: Add nanoMIPS pool32f instructions
  target/mips: Add nanoMIPS pool32a0 instructions
  target/mips: Add nanoMIPS pool32axf instructions
  target/mips: Update gen_flt_ldst()
  target/mips: Add nanoMIPS p_lsx instructions
  target/mips: Add nanoMIPS load store instructions
  target/mips: Add nanoMIPS branch instructions
  target/mips: Implement nanoMIPS LLWP/SCWP pair
  target/mips: Fix not to update BadVAddr in Debug Mode
  target/mips: Fix data type for offset
  target/mips: Update BadInstr{P} regs on nanoMIPS
  target/mips: Config3.ISAOnExc is read only in nanoMIPS
  target/mips: Fix ERET/ERETNC can cause ADEL exception
  target/mips: Fix gdbstub to read/write 64 bit FP registers

 hw/mips/mips_malta.c             |  153 +-
 include/elf.h                    |    1 +
 linux-user/mips/cpu_loop.c       |   25 +-
 target/mips/cpu.h                |    3 +
 target/mips/gdbstub.c            |   16 +-
 target/mips/helper.c             |   39 +-
 target/mips/helper.h             |    4 +
 target/mips/machine.c            |    1 +
 target/mips/mips-defs.h          |    4 +
 target/mips/op_helper.c          |  166 ++-
 target/mips/translate.c          | 3017 +++++++++++++++++++++++++++++++++++++-
 target/mips/translate_init.inc.c |   37 +
 12 files changed, 3408 insertions(+), 58 deletions(-)

--
1.9.1