From nobody Sat Apr 27 23:35:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529417382083402.75468523797826; Tue, 19 Jun 2018 07:09:42 -0700 (PDT) Received: from localhost ([::1]:42860 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVHKH-0000A7-6e for importer@patchew.org; Tue, 19 Jun 2018 10:09:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36461) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVHIY-0007WO-KA for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:07:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fVHIS-0002hI-TA for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:07:54 -0400 Received: from 8.mo68.mail-out.ovh.net ([46.105.74.219]:53200) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fVHIS-0002g4-Ix for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:07:48 -0400 Received: from player786.ha.ovh.net (unknown [10.109.122.111]) by mo68.mail-out.ovh.net (Postfix) with ESMTP id 11302E8075 for ; Tue, 19 Jun 2018 16:07:46 +0200 (CEST) Received: from zorba.kaod.org (LFbn-TOU-1-49-10.w86-201.abo.wanadoo.fr [86.201.141.10]) (Authenticated sender: clg@kaod.org) by player786.ha.ovh.net (Postfix) with ESMTPSA id AA5A3380089; Tue, 19 Jun 2018 16:07:41 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Tue, 19 Jun 2018 16:07:27 +0200 Message-Id: <20180619140729.21949-2-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180619140729.21949-1-clg@kaod.org> References: <20180619140729.21949-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1022880066051279846 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtiedrtddtgdehfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.74.219 Subject: [Qemu-devel] [PATCH v3 1/3] spapr: introduce a fixed IRQ number space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This proposal introduces a new IRQ number space layout using static numbers for all devices and a bitmap allocator for the MSI IRQ numbers which are negotiated by the guest at runtime. The previous layout is kept in pre-3.0 machines raising the 'legacy_irq_allocation' machine class flag. Signed-off-by: C=C3=A9dric Le Goater --- include/hw/ppc/spapr.h | 5 +++++ include/hw/ppc/spapr_irq.h | 30 +++++++++++++++++++++++++ hw/ppc/spapr.c | 31 +++++++++++++++++++++++++ hw/ppc/spapr_events.c | 12 ++++++++-- hw/ppc/spapr_irq.c | 56 ++++++++++++++++++++++++++++++++++++++++++= ++++ hw/ppc/spapr_pci.c | 29 +++++++++++++++++++----- hw/ppc/spapr_vio.c | 19 ++++++++++++---- hw/ppc/Makefile.objs | 2 +- 8 files changed, 171 insertions(+), 13 deletions(-) create mode 100644 include/hw/ppc/spapr_irq.h create mode 100644 hw/ppc/spapr_irq.c diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 8a9142244f12..b60f84c3adfc 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -7,6 +7,7 @@ #include "hw/ppc/spapr_drc.h" #include "hw/mem/pc-dimm.h" #include "hw/ppc/spapr_ovec.h" +#include "hw/ppc/spapr_irq.h" =20 struct VIOsPAPRBus; struct sPAPRPHBState; @@ -98,6 +99,8 @@ struct sPAPRMachineClass { bool dr_lmb_enabled; /* enable dynamic-reconfig/hotplug of LMBs = */ bool use_ohci_by_default; /* use USB-OHCI instead of XHCI */ bool pre_2_10_has_unused_icps; + bool legacy_irq_allocation; + void (*phb_placement)(sPAPRMachineState *spapr, uint32_t index, uint64_t *buid, hwaddr *pio,=20 hwaddr *mmio32, hwaddr *mmio64, @@ -164,6 +167,8 @@ struct sPAPRMachineState { char *kvm_type; =20 const char *icp_type; + int32_t irq_map_nr; + unsigned long *irq_map; =20 bool cmd_line_caps[SPAPR_CAP_NUM]; sPAPRCapabilities def, eff, mig; diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h new file mode 100644 index 000000000000..ac5cdc44e5d8 --- /dev/null +++ b/include/hw/ppc/spapr_irq.h @@ -0,0 +1,30 @@ +/* + * QEMU PowerPC sPAPR IRQ backend definitions + * + * Copyright (c) 2018, IBM Corporation. + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + */ + +#ifndef HW_SPAPR_IRQ_H +#define HW_SPAPR_IRQ_H + +/* + * IRQ range offsets per device type + */ +#define SPAPR_IRQ_EPOW 0x1000 /* XICS_IRQ_BASE offset */ +#define SPAPR_IRQ_HOTPLUG 0x1001 +#define SPAPR_IRQ_VIO 0x1100 /* 256 VIO devices */ +#define SPAPR_IRQ_PCI_LSI 0x1200 /* 32+ PHBs devices */ + +#define SPAPR_IRQ_MSI 0x1300 /* Offset of the dynamic range covered + * by the bitmap allocator */ + +void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis); +int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align, + Error **errp); +void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num); +void spapr_irq_msi_reset(sPAPRMachineState *spapr); + +#endif diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 78186500e917..5a55b4f45e02 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -188,6 +188,11 @@ static void xics_system_init(MachineState *machine, in= t nr_irqs, Error **errp) sPAPRMachineState *spapr =3D SPAPR_MACHINE(machine); Error *local_err =3D NULL; =20 + /* Initialize the MSI IRQ allocator. */ + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI); + } + if (kvm_enabled()) { if (machine_kernel_irqchip_allowed(machine) && !xics_kvm_init(spapr, &local_err)) { @@ -1635,6 +1640,10 @@ static void spapr_machine_reset(void) ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal); } =20 + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + spapr_irq_msi_reset(spapr); + } + qemu_devices_reset(); =20 /* DRC reset may cause a device to be unplugged. This will cause troub= les @@ -1909,6 +1918,24 @@ static const VMStateDescription vmstate_spapr_patb_e= ntry =3D { }, }; =20 +static bool spapr_irq_map_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return spapr->irq_map && !bitmap_empty(spapr->irq_map, spapr->irq_map_= nr); +} + +static const VMStateDescription vmstate_spapr_irq_map =3D { + .name =3D "spapr_irq_map", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_irq_map_needed, + .fields =3D (VMStateField[]) { + VMSTATE_BITMAP(irq_map, sPAPRMachineState, 0, irq_map_nr), + VMSTATE_END_OF_LIST() + }, +}; + static const VMStateDescription vmstate_spapr =3D { .name =3D "spapr", .version_id =3D 3, @@ -1936,6 +1963,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_cap_cfpc, &vmstate_spapr_cap_sbbc, &vmstate_spapr_cap_ibs, + &vmstate_spapr_irq_map, NULL } }; @@ -4103,8 +4131,11 @@ static void spapr_machine_2_12_instance_options(Mach= ineState *machine) =20 static void spapr_machine_2_12_class_options(MachineClass *mc) { + sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); + spapr_machine_3_0_class_options(mc); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_12); + smc->legacy_irq_allocation =3D true; } =20 DEFINE_SPAPR_MACHINE(2_12, "2.12", false); diff --git a/hw/ppc/spapr_events.c b/hw/ppc/spapr_events.c index e4f5946a2188..cab950d33446 100644 --- a/hw/ppc/spapr_events.c +++ b/hw/ppc/spapr_events.c @@ -709,7 +709,11 @@ void spapr_events_init(sPAPRMachineState *spapr) { int epow_irq; =20 - epow_irq =3D spapr_irq_findone(spapr, &error_fatal); + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + epow_irq =3D spapr_irq_findone(spapr, &error_fatal); + } else { + epow_irq =3D SPAPR_IRQ_EPOW; + } =20 spapr_irq_claim(spapr, epow_irq, false, &error_fatal); =20 @@ -731,7 +735,11 @@ void spapr_events_init(sPAPRMachineState *spapr) if (spapr->use_hotplug_event_source) { int hp_irq; =20 - hp_irq =3D spapr_irq_findone(spapr, &error_fatal); + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + hp_irq =3D spapr_irq_findone(spapr, &error_fatal); + } else { + hp_irq =3D SPAPR_IRQ_HOTPLUG; + } =20 spapr_irq_claim(spapr, hp_irq, false, &error_fatal); =20 diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c new file mode 100644 index 000000000000..24e9c1d4433c --- /dev/null +++ b/hw/ppc/spapr_irq.c @@ -0,0 +1,56 @@ +/* + * QEMU PowerPC sPAPR IRQ interface + * + * Copyright (c) 2018, IBM Corporation. + * + * This code is licensed under the GPL version 2 or later. See the + * COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qemu/log.h" +#include "qemu/error-report.h" +#include "qapi/error.h" +#include "hw/ppc/spapr.h" +#include "hw/ppc/xics.h" + +void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis) +{ + spapr->irq_map_nr =3D nr_msis; + spapr->irq_map =3D bitmap_new(spapr->irq_map_nr); +} + +int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align, + Error **errp) +{ + int irq; + + /* + * The 'align_mask' parameter of bitmap_find_next_zero_area() + * should be one less than a power of 2; 0 means no + * alignment. Adapt the 'align' value of the former allocator + * to fit the requirements of bitmap_find_next_zero_area() + */ + align -=3D 1; + + irq =3D bitmap_find_next_zero_area(spapr->irq_map, spapr->irq_map_nr, = 0, num, + align); + if (irq =3D=3D spapr->irq_map_nr) { + error_setg(errp, "can't find a free %d-IRQ block", num); + return -1; + } + + bitmap_set(spapr->irq_map, irq, num); + + return irq + SPAPR_IRQ_MSI; +} + +void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num) +{ + bitmap_clear(spapr->irq_map, irq - SPAPR_IRQ_MSI, num); +} + +void spapr_irq_msi_reset(sPAPRMachineState *spapr) +{ + bitmap_clear(spapr->irq_map, 0, spapr->irq_map_nr); +} diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 497b896c7d24..cba5340f4bad 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -334,6 +334,9 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRM= achineState *spapr, return; } =20 + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + spapr_irq_msi_free(spapr, msi->first_irq, msi->num); + } spapr_irq_free(spapr, msi->first_irq, msi->num); if (msi_present(pdev)) { spapr_msi_setmsg(pdev, 0, false, 0, 0); @@ -372,7 +375,13 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPR= MachineState *spapr, } =20 /* Allocate MSIs */ - irq =3D spapr_irq_find(spapr, req_num, ret_intr_type =3D=3D RTAS_TYPE_= MSI, &err); + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + irq =3D spapr_irq_find(spapr, req_num, ret_intr_type =3D=3D RTAS_T= YPE_MSI, + &err); + } else { + irq =3D spapr_irq_msi_alloc(spapr, req_num, + ret_intr_type =3D=3D RTAS_TYPE_MSI, &err= ); + } if (err) { error_reportf_err(err, "Can't allocate MSIs for device %x: ", config_addr); @@ -392,6 +401,9 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPRM= achineState *spapr, =20 /* Release previous MSIs */ if (msi) { + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + spapr_irq_msi_free(spapr, msi->first_irq, msi->num); + } spapr_irq_free(spapr, msi->first_irq, msi->num); g_hash_table_remove(phb->msi, &config_addr); } @@ -1708,11 +1720,15 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) uint32_t irq; Error *local_err =3D NULL; =20 - irq =3D spapr_irq_findone(spapr, &local_err); - if (local_err) { - error_propagate(errp, local_err); - error_prepend(errp, "can't allocate LSIs: "); - return; + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + irq =3D spapr_irq_findone(spapr, &local_err); + if (local_err) { + error_propagate(errp, local_err); + error_prepend(errp, "can't allocate LSIs: "); + return; + } + } else { + irq =3D SPAPR_IRQ_PCI_LSI + sphb->index * PCI_NUM_PINS + i; } =20 spapr_irq_claim(spapr, irq, true, &local_err); @@ -2123,6 +2139,7 @@ int spapr_populate_pci_dt(sPAPRPHBState *phb, _FDT(fdt_setprop(fdt, bus_off, "ranges", &ranges, sizeof_ranges)); _FDT(fdt_setprop(fdt, bus_off, "reg", &bus_reg, sizeof(bus_reg))); _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pci-config-space-type", 0x1)); + /* TODO: fine tune the total count of allocatable MSIs per PHB */ _FDT(fdt_setprop_cell(fdt, bus_off, "ibm,pe-total-#msi", XICS_IRQS_SPA= PR)); =20 /* Dynamic DMA window */ diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index daf85130b5ef..2ecee3e8d0ed 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -436,6 +436,9 @@ static void spapr_vio_busdev_reset(DeviceState *qdev) } } =20 +/* TODO : poor VIO device indexing ... */ +static uint32_t vio_index; + static void spapr_vio_busdev_realize(DeviceState *qdev, Error **errp) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); @@ -476,10 +479,18 @@ static void spapr_vio_busdev_realize(DeviceState *qde= v, Error **errp) } =20 if (!dev->irq) { - dev->irq =3D spapr_irq_findone(spapr, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; + if (SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + dev->irq =3D spapr_irq_findone(spapr, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + } else { + dev->irq =3D SPAPR_IRQ_VIO + vio_index++; + if (dev->irq =3D=3D SPAPR_IRQ_PCI_LSI) { + error_setg(errp, "Too many VIO devices"); + return; + } } } =20 diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 86d82a6ec3ac..4fe3b7804d43 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -4,7 +4,7 @@ obj-y +=3D ppc.o ppc_booke.o fdt.o obj-$(CONFIG_PSERIES) +=3D spapr.o spapr_caps.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) +=3D spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-$(CONFIG_PSERIES) +=3D spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o -obj-$(CONFIG_PSERIES) +=3D spapr_cpu_core.o spapr_ovec.o +obj-$(CONFIG_PSERIES) +=3D spapr_cpu_core.o spapr_ovec.o spapr_irq.o # IBM PowerNV obj-$(CONFIG_POWERNV) +=3D pnv.o pnv_xscom.o pnv_core.o pnv_lpc.o pnv_psi.= o pnv_occ.o pnv_bmc.o ifeq ($(CONFIG_PCI)$(CONFIG_PSERIES)$(CONFIG_LINUX), yyy) --=20 2.13.6 From nobody Sat Apr 27 23:35:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529417744721114.26707161082231; Tue, 19 Jun 2018 07:15:44 -0700 (PDT) Received: from localhost ([::1]:42907 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVHQ7-0005AY-Vy for importer@patchew.org; Tue, 19 Jun 2018 10:15:44 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36513) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVHId-0007ZL-Ad for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:08:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fVHIY-0002kG-Af for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:07:59 -0400 Received: from 5.mo4.mail-out.ovh.net ([188.165.44.50]:49170) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fVHIY-0002jE-0B for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:07:54 -0400 Received: from player786.ha.ovh.net (unknown [10.109.122.124]) by mo4.mail-out.ovh.net (Postfix) with ESMTP id 1F8BB180F3F for ; Tue, 19 Jun 2018 16:07:52 +0200 (CEST) Received: from zorba.kaod.org (LFbn-TOU-1-49-10.w86-201.abo.wanadoo.fr [86.201.141.10]) (Authenticated sender: clg@kaod.org) by player786.ha.ovh.net (Postfix) with ESMTPSA id DF3BA380089; Tue, 19 Jun 2018 16:07:46 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Tue, 19 Jun 2018 16:07:28 +0200 Message-Id: <20180619140729.21949-3-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180619140729.21949-1-clg@kaod.org> References: <20180619140729.21949-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1024568915645729766 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtiedrtddtgdehfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.165.44.50 Subject: [Qemu-devel] [PATCH v3 2/3] spapr: introduce a IRQ controller backend to the machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This proposal moves all the related IRQ routines of the sPAPR machine behind a sPAPR IRQ backend interface 'spapr_irq' to prepare for future changes. First of which will be to increase the size of the IRQ number space, then, will follow a new backend for the POWER9 XIVE IRQ controller. Signed-off-by: C=C3=A9dric Le Goater --- include/hw/ppc/spapr.h | 9 +- include/hw/ppc/spapr_irq.h | 24 +++++ hw/ppc/spapr.c | 179 +---------------------------------- hw/ppc/spapr_irq.c | 231 +++++++++++++++++++++++++++++++++++++++++= ++++ 4 files changed, 260 insertions(+), 183 deletions(-) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index b60f84c3adfc..acc2c01e1123 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -107,6 +107,7 @@ struct sPAPRMachineClass { unsigned n_dma, uint32_t *liobns, Error **errp); sPAPRResizeHPT resize_hpt_default; sPAPRCapabilities default_caps; + sPAPRIrq *irq; }; =20 /** @@ -777,14 +778,6 @@ int spapr_get_vcpu_id(PowerPCCPU *cpu); void spapr_set_vcpu_id(PowerPCCPU *cpu, int cpu_index, Error **errp); PowerPCCPU *spapr_find_cpu(int vcpu_id); =20 -int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, - Error **errp); -#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, err= p) -int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp); -void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); -qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); - - int spapr_caps_pre_load(void *opaque); int spapr_caps_pre_save(void *opaque); =20 diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index ac5cdc44e5d8..f2ae0ac0e6cb 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -27,4 +27,28 @@ int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32= _t num, bool align, void spapr_irq_msi_free(sPAPRMachineState *spapr, int irq, uint32_t num); void spapr_irq_msi_reset(sPAPRMachineState *spapr); =20 +typedef struct sPAPRIrq { + uint32_t nr_irqs; + + void (*init)(sPAPRMachineState *spapr, Error **errp); + int (*claim)(sPAPRMachineState *spapr, int irq, bool lsi, Error **errp= ); + void (*free)(sPAPRMachineState *spapr, int irq, int num); + qemu_irq (*qirq)(sPAPRMachineState *spapr, int irq); + void (*print_info)(sPAPRMachineState *spapr, Monitor *mon); +} sPAPRIrq; + +extern sPAPRIrq spapr_irq_xics; + +int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp); +void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); +qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq); + + +/* + * XICS legacy routines + */ +int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **= errp); +#define spapr_irq_findone(spapr, errp) spapr_irq_find(spapr, 1, false, err= p) + + #endif diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 5a55b4f45e02..ec21df432380 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -116,33 +116,6 @@ static bool spapr_is_thread0_in_vcore(sPAPRMachineStat= e *spapr, return spapr_get_vcpu_id(cpu) % spapr->vsmt =3D=3D 0; } =20 -static ICSState *spapr_ics_create(sPAPRMachineState *spapr, - const char *type_ics, - int nr_irqs, Error **errp) -{ - Error *local_err =3D NULL; - Object *obj; - - obj =3D object_new(type_ics); - object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); - object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), - &error_abort); - object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err); - if (local_err) { - goto error; - } - object_property_set_bool(obj, true, "realized", &local_err); - if (local_err) { - goto error; - } - - return ICS_SIMPLE(obj); - -error: - error_propagate(errp, local_err); - return NULL; -} - static bool pre_2_10_vmstate_dummy_icp_needed(void *opaque) { /* Dummy entries correspond to unused ICPState objects in older QEMUs, @@ -183,43 +156,6 @@ static int xics_max_server_number(sPAPRMachineState *s= papr) return DIV_ROUND_UP(max_cpus * spapr->vsmt, smp_threads); } =20 -static void xics_system_init(MachineState *machine, int nr_irqs, Error **e= rrp) -{ - sPAPRMachineState *spapr =3D SPAPR_MACHINE(machine); - Error *local_err =3D NULL; - - /* Initialize the MSI IRQ allocator. */ - if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { - spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI); - } - - if (kvm_enabled()) { - if (machine_kernel_irqchip_allowed(machine) && - !xics_kvm_init(spapr, &local_err)) { - spapr->icp_type =3D TYPE_KVM_ICP; - spapr->ics =3D spapr_ics_create(spapr, TYPE_ICS_KVM, nr_irqs, - &local_err); - } - if (machine_kernel_irqchip_required(machine) && !spapr->ics) { - error_prepend(&local_err, - "kernel_irqchip requested but unavailable: "); - goto error; - } - error_free(local_err); - local_err =3D NULL; - } - - if (!spapr->ics) { - xics_spapr_init(spapr); - spapr->icp_type =3D TYPE_ICP; - spapr->ics =3D spapr_ics_create(spapr, TYPE_ICS_SIMPLE, nr_irqs, - &local_err); - } - -error: - error_propagate(errp, local_err); -} - static int spapr_fixup_cpu_smt_dt(void *fdt, int offset, PowerPCCPU *cpu, int smt_threads) { @@ -2617,7 +2553,7 @@ static void spapr_machine_init(MachineState *machine) load_limit =3D MIN(spapr->rma_size, RTAS_MAX_ADDR) - FW_OVERHEAD; =20 /* Set up Interrupt Controller before we create the VCPUs */ - xics_system_init(machine, XICS_IRQS_SPAPR, &error_fatal); + smc->irq->init(spapr, &error_fatal); =20 /* Set up containers for ibm,client-architecture-support negotiated op= tions */ @@ -3820,121 +3756,13 @@ static ICPState *spapr_icp_get(XICSFabric *xi, int= vcpu_id) return cpu ? ICP(cpu->intc) : NULL; } =20 -#define ICS_IRQ_FREE(ics, srcno) \ - (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) - -static int ics_find_free_block(ICSState *ics, int num, int alignnum) -{ - int first, i; - - for (first =3D 0; first < ics->nr_irqs; first +=3D alignnum) { - if (num > (ics->nr_irqs - first)) { - return -1; - } - for (i =3D first; i < first + num; ++i) { - if (!ICS_IRQ_FREE(ics, i)) { - break; - } - } - if (i =3D=3D (first + num)) { - return first; - } - } - - return -1; -} - -int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **= errp) -{ - ICSState *ics =3D spapr->ics; - int first =3D -1; - - assert(ics); - - /* - * MSIMesage::data is used for storing VIRQ so - * it has to be aligned to num to support multiple - * MSI vectors. MSI-X is not affected by this. - * The hint is used for the first IRQ, the rest should - * be allocated continuously. - */ - if (align) { - assert((num =3D=3D 1) || (num =3D=3D 2) || (num =3D=3D 4) || - (num =3D=3D 8) || (num =3D=3D 16) || (num =3D=3D 32)); - first =3D ics_find_free_block(ics, num, num); - } else { - first =3D ics_find_free_block(ics, num, 1); - } - - if (first < 0) { - error_setg(errp, "can't find a free %d-IRQ block", num); - return -1; - } - - return first + ics->offset; -} - -int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp) -{ - ICSState *ics =3D spapr->ics; - - assert(ics); - - if (!ics_valid_irq(ics, irq)) { - error_setg(errp, "IRQ %d is invalid", irq); - return -1; - } - - if (!ICS_IRQ_FREE(ics, irq - ics->offset)) { - error_setg(errp, "IRQ %d is not free", irq); - return -1; - } - - ics_set_irq_type(ics, irq - ics->offset, lsi); - return 0; -} - -void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num) -{ - ICSState *ics =3D spapr->ics; - int srcno =3D irq - ics->offset; - int i; - - if (ics_valid_irq(ics, irq)) { - trace_spapr_irq_free(0, irq, num); - for (i =3D srcno; i < srcno + num; ++i) { - if (ICS_IRQ_FREE(ics, i)) { - trace_spapr_irq_free_warn(0, i + ics->offset); - } - memset(&ics->irqs[i], 0, sizeof(ICSIRQState)); - } - } -} - -qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq) -{ - ICSState *ics =3D spapr->ics; - - if (ics_valid_irq(ics, irq)) { - return ics->qirqs[irq - ics->offset]; - } - - return NULL; -} - static void spapr_pic_print_info(InterruptStatsProvider *obj, Monitor *mon) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - CPUState *cs; - - CPU_FOREACH(cs) { - PowerPCCPU *cpu =3D POWERPC_CPU(cs); - - icp_pic_print_info(ICP(cpu->intc), mon); - } + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); =20 - ics_pic_print_info(spapr->ics, mon); + smc->irq->print_info(spapr, mon); } =20 int spapr_get_vcpu_id(PowerPCCPU *cpu) @@ -4044,6 +3872,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->default_caps.caps[SPAPR_CAP_SBBC] =3D SPAPR_CAP_BROKEN; smc->default_caps.caps[SPAPR_CAP_IBS] =3D SPAPR_CAP_BROKEN; spapr_caps_add_properties(smc, &error_abort); + smc->irq =3D &spapr_irq_xics; } =20 static const TypeInfo spapr_machine_info =3D { diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index 24e9c1d4433c..e50a512a2d9c 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -13,6 +13,9 @@ #include "qapi/error.h" #include "hw/ppc/spapr.h" #include "hw/ppc/xics.h" +#include "sysemu/kvm.h" + +#include "trace.h" =20 void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis) { @@ -54,3 +57,231 @@ void spapr_irq_msi_reset(sPAPRMachineState *spapr) { bitmap_clear(spapr->irq_map, 0, spapr->irq_map_nr); } + + +/* + * XICS IRQ backend. + */ + +static ICSState *spapr_ics_create(sPAPRMachineState *spapr, + const char *type_ics, + int nr_irqs, Error **errp) +{ + Error *local_err =3D NULL; + Object *obj; + + obj =3D object_new(type_ics); + object_property_add_child(OBJECT(spapr), "ics", obj, &error_abort); + object_property_add_const_link(obj, ICS_PROP_XICS, OBJECT(spapr), + &error_abort); + object_property_set_int(obj, nr_irqs, "nr-irqs", &local_err); + if (local_err) { + goto error; + } + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + goto error; + } + + return ICS_SIMPLE(obj); + +error: + error_propagate(errp, local_err); + return NULL; +} + +static void spapr_irq_init_xics(sPAPRMachineState *spapr, Error **errp) +{ + MachineState *machine =3D MACHINE(spapr); + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + int nr_irqs =3D smc->irq->nr_irqs; + Error *local_err =3D NULL; + + /* Initialize the MSI IRQ allocator. */ + if (!SPAPR_MACHINE_GET_CLASS(spapr)->legacy_irq_allocation) { + spapr_irq_msi_init(spapr, XICS_IRQ_BASE + nr_irqs - SPAPR_IRQ_MSI); + } + + if (kvm_enabled()) { + if (machine_kernel_irqchip_allowed(machine) && + !xics_kvm_init(spapr, &local_err)) { + spapr->icp_type =3D TYPE_KVM_ICP; + spapr->ics =3D spapr_ics_create(spapr, TYPE_ICS_KVM, nr_irqs, + &local_err); + } + if (machine_kernel_irqchip_required(machine) && !spapr->ics) { + error_prepend(&local_err, + "kernel_irqchip requested but unavailable: "); + goto error; + } + error_free(local_err); + local_err =3D NULL; + } + + if (!spapr->ics) { + xics_spapr_init(spapr); + spapr->icp_type =3D TYPE_ICP; + spapr->ics =3D spapr_ics_create(spapr, TYPE_ICS_SIMPLE, nr_irqs, + &local_err); + } + +error: + error_propagate(errp, local_err); +} + +#define ICS_IRQ_FREE(ics, srcno) \ + (!((ics)->irqs[(srcno)].flags & (XICS_FLAGS_IRQ_MASK))) + +static int spapr_irq_claim_xics(sPAPRMachineState *spapr, int irq, bool ls= i, + Error **errp) +{ + ICSState *ics =3D spapr->ics; + + assert(ics); + + if (!ics_valid_irq(ics, irq)) { + error_setg(errp, "IRQ %d is invalid", irq); + return -1; + } + + if (!ICS_IRQ_FREE(ics, irq - ics->offset)) { + error_setg(errp, "IRQ %d is not free", irq); + return -1; + } + + ics_set_irq_type(ics, irq - ics->offset, lsi); + return 0; +} + +static void spapr_irq_free_xics(sPAPRMachineState *spapr, int irq, int num) +{ + ICSState *ics =3D spapr->ics; + uint32_t srcno =3D irq - ics->offset; + int i; + + if (ics_valid_irq(ics, irq)) { + trace_spapr_irq_free(0, irq, num); + for (i =3D srcno; i < srcno + num; ++i) { + if (ICS_IRQ_FREE(ics, i)) { + trace_spapr_irq_free_warn(0, i); + } + memset(&ics->irqs[i], 0, sizeof(ICSIRQState)); + } + } +} + +static qemu_irq spapr_qirq_xics(sPAPRMachineState *spapr, int irq) +{ + ICSState *ics =3D spapr->ics; + uint32_t srcno =3D irq - ics->offset; + + if (ics_valid_irq(ics, irq)) { + return ics->qirqs[srcno]; + } + + return NULL; +} + +static void spapr_irq_print_info_xics(sPAPRMachineState *spapr, + Monitor *mon) +{ + CPUState *cs; + + CPU_FOREACH(cs) { + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + + icp_pic_print_info(ICP(cpu->intc), mon); + } + + ics_pic_print_info(spapr->ics, mon); +} + +sPAPRIrq spapr_irq_xics =3D { + .nr_irqs =3D XICS_IRQS_SPAPR, + + .init =3D spapr_irq_init_xics, + .claim =3D spapr_irq_claim_xics, + .free =3D spapr_irq_free_xics, + .qirq =3D spapr_qirq_xics, + .print_info =3D spapr_irq_print_info_xics, +}; + +/* + * sPAPR IRQ frontend routines for devices + */ + +int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp) +{ + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + + return smc->irq->claim(spapr, irq, lsi, errp); +} + +void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num) +{ + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + + smc->irq->free(spapr, irq, num); +} + +qemu_irq spapr_qirq(sPAPRMachineState *spapr, int irq) +{ + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + + return smc->irq->qirq(spapr, irq); +} + +/* + * XICS legacy routines - to deprecate one day + */ + +static int ics_find_free_block(ICSState *ics, int num, int alignnum) +{ + int first, i; + + for (first =3D 0; first < ics->nr_irqs; first +=3D alignnum) { + if (num > (ics->nr_irqs - first)) { + return -1; + } + for (i =3D first; i < first + num; ++i) { + if (!ICS_IRQ_FREE(ics, i)) { + break; + } + } + if (i =3D=3D (first + num)) { + return first; + } + } + + return -1; +} + +int spapr_irq_find(sPAPRMachineState *spapr, int num, bool align, Error **= errp) +{ + ICSState *ics =3D spapr->ics; + int first =3D -1; + + assert(ics); + + /* + * MSIMesage::data is used for storing VIRQ so + * it has to be aligned to num to support multiple + * MSI vectors. MSI-X is not affected by this. + * The hint is used for the first IRQ, the rest should + * be allocated continuously. + */ + if (align) { + assert((num =3D=3D 1) || (num =3D=3D 2) || (num =3D=3D 4) || + (num =3D=3D 8) || (num =3D=3D 16) || (num =3D=3D 32)); + first =3D ics_find_free_block(ics, num, num); + } else { + first =3D ics_find_free_block(ics, num, 1); + } + + if (first < 0) { + error_setg(errp, "can't find a free %d-IRQ block", num); + return -1; + } + + return first + ics->offset; +} --=20 2.13.6 From nobody Sat Apr 27 23:35:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529417687213835.631912532929; Tue, 19 Jun 2018 07:14:47 -0700 (PDT) Received: from localhost ([::1]:42896 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVHPC-0004JS-Db for importer@patchew.org; Tue, 19 Jun 2018 10:14:46 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36565) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVHIi-0007da-8X for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:08:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fVHId-0002nz-5B for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:08:04 -0400 Received: from 19.mo7.mail-out.ovh.net ([178.33.251.118]:38006) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fVHIc-0002mL-Vg for qemu-devel@nongnu.org; Tue, 19 Jun 2018 10:07:59 -0400 Received: from player786.ha.ovh.net (unknown [10.109.120.22]) by mo7.mail-out.ovh.net (Postfix) with ESMTP id 7235CB49D7 for ; Tue, 19 Jun 2018 16:07:57 +0200 (CEST) Received: from zorba.kaod.org (LFbn-TOU-1-49-10.w86-201.abo.wanadoo.fr [86.201.141.10]) (Authenticated sender: clg@kaod.org) by player786.ha.ovh.net (Postfix) with ESMTPSA id 1FDAA380094; Tue, 19 Jun 2018 16:07:52 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Tue, 19 Jun 2018 16:07:29 +0200 Message-Id: <20180619140729.21949-4-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180619140729.21949-1-clg@kaod.org> References: <20180619140729.21949-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 1025976293782096870 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtiedrtddtgdehfecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 178.33.251.118 Subject: [Qemu-devel] [PATCH v3 3/3] spapr: increase the size of the IRQ number space X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The new layout using static IRQ number does not leave much space to the dynamic MSI range, only 0x100 IRQ numbers. Increase the total number of IRQS for newer machines and introduce a legacy XICS backend for pre-3.0 machines to maintain compatibility. Signed-off-by: C=C3=A9dric Le Goater --- include/hw/ppc/spapr_irq.h | 1 + hw/ppc/spapr.c | 1 + hw/ppc/spapr_irq.c | 12 +++++++++++- 3 files changed, 13 insertions(+), 1 deletion(-) diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index f2ae0ac0e6cb..f02544934c93 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -38,6 +38,7 @@ typedef struct sPAPRIrq { } sPAPRIrq; =20 extern sPAPRIrq spapr_irq_xics; +extern sPAPRIrq spapr_irq_xics_legacy; =20 int spapr_irq_claim(sPAPRMachineState *spapr, int irq, bool lsi, Error **e= rrp); void spapr_irq_free(sPAPRMachineState *spapr, int irq, int num); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index ec21df432380..fb3ba90eaefa 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3964,6 +3964,7 @@ static void spapr_machine_2_12_class_options(MachineC= lass *mc) =20 spapr_machine_3_0_class_options(mc); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_12); + smc->irq =3D &spapr_irq_xics_legacy; smc->legacy_irq_allocation =3D true; } =20 diff --git a/hw/ppc/spapr_irq.c b/hw/ppc/spapr_irq.c index e50a512a2d9c..603541f175bd 100644 --- a/hw/ppc/spapr_irq.c +++ b/hw/ppc/spapr_irq.c @@ -197,7 +197,7 @@ static void spapr_irq_print_info_xics(sPAPRMachineState= *spapr, } =20 sPAPRIrq spapr_irq_xics =3D { - .nr_irqs =3D XICS_IRQS_SPAPR, + .nr_irqs =3D 0x1000, =20 .init =3D spapr_irq_init_xics, .claim =3D spapr_irq_claim_xics, @@ -285,3 +285,13 @@ int spapr_irq_find(sPAPRMachineState *spapr, int num, = bool align, Error **errp) =20 return first + ics->offset; } + +sPAPRIrq spapr_irq_xics_legacy =3D { + .nr_irqs =3D XICS_IRQS_SPAPR, + + .init =3D spapr_irq_init_xics, + .claim =3D spapr_irq_claim_xics, + .free =3D spapr_irq_free_xics, + .qirq =3D spapr_qirq_xics, + .print_info =3D spapr_irq_print_info_xics, +}; --=20 2.13.6 From nobody Sat Apr 27 23:35:45 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152942150430025.80513266254411; Tue, 19 Jun 2018 08:18:24 -0700 (PDT) Received: from localhost ([::1]:43208 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVIOl-0007x9-0X for importer@patchew.org; Tue, 19 Jun 2018 11:18:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fVIMp-0006xZ-CZ for qemu-devel@nongnu.org; Tue, 19 Jun 2018 11:16:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fVIMl-0000S3-9t for qemu-devel@nongnu.org; Tue, 19 Jun 2018 11:16:23 -0400 Received: from 3.mo3.mail-out.ovh.net ([46.105.44.175]:56560) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fVIMl-0000RU-2Y for qemu-devel@nongnu.org; Tue, 19 Jun 2018 11:16:19 -0400 Received: from player714.ha.ovh.net (unknown [10.109.108.117]) by mo3.mail-out.ovh.net (Postfix) with ESMTP id 38ACC1BE40A for ; Tue, 19 Jun 2018 17:16:17 +0200 (CEST) Received: from zorba.kaod.org (LFbn-TOU-1-49-10.w86-201.abo.wanadoo.fr [86.201.141.10]) (Authenticated sender: clg@kaod.org) by player714.ha.ovh.net (Postfix) with ESMTPSA id 784653C00B6; Tue, 19 Jun 2018 17:16:07 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Tue, 19 Jun 2018 17:16:00 +0200 Message-Id: <20180619151600.22985-1-clg@kaod.org> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20180619140729.21949-1-clg@kaod.org> References: <20180619140729.21949-1-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 2179742223371373542 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrgedtiedrtddtgdeikecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.44.175 Subject: [Qemu-devel] [PATCH v3 3/3 bonus] spapr: remove the XICS header from the machine and device models X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= , qemu-ppc@nongnu.org, qemu-devel@nongnu.org, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The XICS routines are now completely hidden behind the sPAPR IRQ interface. There is no need to include the header files anymore. The only remaining direct use of XICS is done by the sPAPR cores which need to create the IRQ presenter. This part will be removed when the XIVE backend is introduced. Signed-off-by: C=C3=A9dric Le Goater --- include/hw/ppc/spapr.h | 2 +- include/hw/ppc/spapr_irq.h | 2 ++ hw/ppc/spapr.c | 1 - hw/ppc/spapr_cpu_core.c | 1 + hw/ppc/spapr_vio.c | 1 - 5 files changed, 4 insertions(+), 3 deletions(-) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index acc2c01e1123..190d7f04d8d0 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -3,7 +3,6 @@ =20 #include "sysemu/dma.h" #include "hw/boards.h" -#include "hw/ppc/xics.h" #include "hw/ppc/spapr_drc.h" #include "hw/mem/pc-dimm.h" #include "hw/ppc/spapr_ovec.h" @@ -15,6 +14,7 @@ struct sPAPRNVRAM; typedef struct sPAPREventLogEntry sPAPREventLogEntry; typedef struct sPAPREventSource sPAPREventSource; typedef struct sPAPRPendingHPT sPAPRPendingHPT; +typedef struct ICSState ICSState; =20 #define HPTE64_V_HPTE_DIRTY 0x0000000000000040ULL #define SPAPR_ENTRY_POINT 0x100 diff --git a/include/hw/ppc/spapr_irq.h b/include/hw/ppc/spapr_irq.h index f02544934c93..0c2ea54ba0a0 100644 --- a/include/hw/ppc/spapr_irq.h +++ b/include/hw/ppc/spapr_irq.h @@ -21,6 +21,8 @@ #define SPAPR_IRQ_MSI 0x1300 /* Offset of the dynamic range covered * by the bitmap allocator */ =20 +typedef struct sPAPRMachineState sPAPRMachineState; + void spapr_irq_msi_init(sPAPRMachineState *spapr, uint32_t nr_msis); int spapr_irq_msi_alloc(sPAPRMachineState *spapr, uint32_t num, bool align, Error **errp); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index fb3ba90eaefa..73f7342edb82 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -54,7 +54,6 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/pci-host/spapr.h" -#include "hw/ppc/xics.h" #include "hw/pci/msi.h" =20 #include "hw/pci/pci.h" diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 56fe403fc540..aedb15dd2083 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -11,6 +11,7 @@ #include "hw/ppc/spapr_cpu_core.h" #include "target/ppc/cpu.h" #include "hw/ppc/spapr.h" +#include "hw/ppc/xics.h" /* for icp_create() - to be removed */ #include "hw/boards.h" #include "qapi/error.h" #include "sysemu/cpus.h" diff --git a/hw/ppc/spapr_vio.c b/hw/ppc/spapr_vio.c index 2ecee3e8d0ed..b8a80bcc91ca 100644 --- a/hw/ppc/spapr_vio.c +++ b/hw/ppc/spapr_vio.c @@ -37,7 +37,6 @@ =20 #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" -#include "hw/ppc/xics.h" #include "hw/ppc/fdt.h" #include "trace.h" =20 --=20 2.13.6