This is almost a grab-bag of little improvements to the port.

patches 1-3:
  Fix singlestepping for gdbstub.  This has apparently never
  worked, as the first commit has the same bug of not advancing
  the pc when stepping.

patches 4:
  Link more TBs.

patches 5-6:
  Exit the TB after l.mtspr insns.  In particular, storing to
  SR changes exception state so we want to return to the main
  loop to recognize any pending interrupts immediately.

patches 8-18:
  Reorganize TLB handling.  There is a fundamental bug that is
  fixed in patch 13.  However the bug has been hidden by extra
  TLB flushing elsewhere in the port.  I remove some unnecessary
  indirection that the port inherited from somewhere -- probably
  the MIPS port.  Finally, I present the QEMU TLB a unified view
  of the OpenRISC split I/D TLB.

patch 19:
  Split out disassembly from translation.

patch 20:
  Add qemu-or1k to qemu-binfmt-conf.sh.

patches 21-22:
  Implement signal handling for linux-user.

Richard Henderson (22):
  target/openrisc: Remove DISAS_JUMP & DISAS_TB_JUMP
  target/openrisc: Use exit_tb instead of CPU_INTERRUPT_EXITTB
  target/openrisc: Fix singlestep_enabled
  target/openrisc: Link more translation blocks
  target/openrisc: Split out is_user
  target/openrisc: Exit the TB after l.mtspr
  target/openrisc: Form the spr index from tcg
  target/openrisc: Merge tlb allocation into CPUOpenRISCState
  target/openrisc: Remove indirect function calls for mmu
  target/openrisc: Merge mmu_helper.c into mmu.c
  target/openrisc: Reduce tlb to a single dimension
  target/openrisc: Fix tlb flushing in mtspr
  target/openrisc: Fix cpu_mmu_index
  target/openrisc: Use identical sizes for ITLB and DTLB
  target/openrisc: Stub out handle_mmu_fault for softmmu
  target/openrisc: Log interrupts
  target/openrisc: Increase the TLB size
  target/openrisc: Reorg tlb lookup
  target/openrisc: Add print_insn_or1k
  target/openrisc: Add support in scripts/qemu-binfmt-conf.sh
  linux-user: Implement signals for openrisc
  linux-user: Fix struct sigaltstack for openrisc

 linux-user/openrisc/target_signal.h  |   2 +-
 linux-user/openrisc/target_syscall.h |  28 +--
 target/openrisc/cpu.h                |  61 +++---
 target/openrisc/helper.h             |   4 +-
 linux-user/openrisc/signal.c         | 212 ++++++++-----------
 linux-user/signal.c                  |   2 +-
 target/openrisc/cpu.c                |  17 +-
 target/openrisc/disas.c              | 170 +++++++++++++++
 target/openrisc/interrupt.c          |  36 +++-
 target/openrisc/interrupt_helper.c   |  35 +---
 target/openrisc/machine.c            |  44 +---
 target/openrisc/mmu.c                | 275 +++++++++---------------
 target/openrisc/mmu_helper.c         |  40 ----
 target/openrisc/sys_helper.c         |  85 ++++----
 target/openrisc/translate.c          | 298 ++++++++++-----------------
 scripts/qemu-binfmt-conf.sh          |  10 +-
 target/openrisc/Makefile.objs        |   5 +-
 17 files changed, 589 insertions(+), 735 deletions(-)
 create mode 100644 target/openrisc/disas.c
 delete mode 100644 target/openrisc/mmu_helper.c

-- 
2.17.1

Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20180618184046.6270-1-richard.henderson@linaro.org
Subject: [Qemu-devel] [PATCH v2 00/22] target/openrisc improvements

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
 * [new tag]               patchew/20180618184046.6270-1-richard.henderson@linaro.org -> patchew/20180618184046.6270-1-richard.henderson@linaro.org
Switched to a new branch 'test'
f9574c9bba linux-user: Fix struct sigaltstack for openrisc
91ab86225f linux-user: Implement signals for openrisc
4139e74dc2 target/openrisc: Add support in scripts/qemu-binfmt-conf.sh
dffec46c36 target/openrisc: Add print_insn_or1k
d9dbd91a5d target/openrisc: Reorg tlb lookup
0ff65e9bc4 target/openrisc: Increase the TLB size
5567f0d2ea target/openrisc: Log interrupts
39f84d361e target/openrisc: Stub out handle_mmu_fault for softmmu
37112b6a94 target/openrisc: Use identical sizes for ITLB and DTLB
1a90f52464 target/openrisc: Fix cpu_mmu_index
54c6a8bcc5 target/openrisc: Fix tlb flushing in mtspr
9227f6d3ec target/openrisc: Reduce tlb to a single dimension
ea72737e47 target/openrisc: Merge mmu_helper.c into mmu.c
36d2c19dd0 target/openrisc: Remove indirect function calls for mmu
ee17b32c4a target/openrisc: Merge tlb allocation into CPUOpenRISCState
1030584e57 target/openrisc: Form the spr index from tcg
7676d26926 target/openrisc: Exit the TB after l.mtspr
b69e1bc347 target/openrisc: Split out is_user
9a6db89505 target/openrisc: Link more translation blocks
ea9e529068 target/openrisc: Fix singlestep_enabled
0d545edd65 target/openrisc: Use exit_tb instead of CPU_INTERRUPT_EXITTB
19714e6653 target/openrisc: Remove DISAS_JUMP & DISAS_TB_JUMP

=== OUTPUT BEGIN ===
Checking PATCH 1/22: target/openrisc: Remove DISAS_JUMP & DISAS_TB_JUMP...
Checking PATCH 2/22: target/openrisc: Use exit_tb instead of CPU_INTERRUPT_EXITTB...
Checking PATCH 3/22: target/openrisc: Fix singlestep_enabled...
Checking PATCH 4/22: target/openrisc: Link more translation blocks...
Checking PATCH 5/22: target/openrisc: Split out is_user...
Checking PATCH 6/22: target/openrisc: Exit the TB after l.mtspr...
Checking PATCH 7/22: target/openrisc: Form the spr index from tcg...
Checking PATCH 8/22: target/openrisc: Merge tlb allocation into CPUOpenRISCState...
Checking PATCH 9/22: target/openrisc: Remove indirect function calls for mmu...
Checking PATCH 10/22: target/openrisc: Merge mmu_helper.c into mmu.c...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#49: 
deleted file mode 100644

total: 0 errors, 1 warnings, 23 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
Checking PATCH 11/22: target/openrisc: Reduce tlb to a single dimension...
Checking PATCH 12/22: target/openrisc: Fix tlb flushing in mtspr...
Checking PATCH 13/22: target/openrisc: Fix cpu_mmu_index...
Checking PATCH 14/22: target/openrisc: Use identical sizes for ITLB and DTLB...
Checking PATCH 15/22: target/openrisc: Stub out handle_mmu_fault for softmmu...
Checking PATCH 16/22: target/openrisc: Log interrupts...
Checking PATCH 17/22: target/openrisc: Increase the TLB size...
Checking PATCH 18/22: target/openrisc: Reorg tlb lookup...
Checking PATCH 19/22: target/openrisc: Add print_insn_or1k...
WARNING: added, moved or deleted file(s), does MAINTAINERS need updating?
#65: 
new file mode 100644

ERROR: Macros with complex values should be enclosed in parenthesis
#100: FILE: target/openrisc/disas.c:31:
+#define output(mnemonic, format, ...) \
+    info->fprintf_func(info->stream, "%-9s " format, \
+                       mnemonic, ##__VA_ARGS__)

ERROR: spaces required around that '*' (ctx:WxV)
#125: FILE: target/openrisc/disas.c:56:
+    arg_l_##opcode *a, uint32_t insn)                   \
                    ^

ERROR: spaces required around that '*' (ctx:WxV)
#220: FILE: target/openrisc/disas.c:151:
+    arg_lf_##opcode##_##suffix *a, uint32_t insn)                \
                                ^

total: 3 errors, 1 warnings, 923 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 20/22: target/openrisc: Add support in scripts/qemu-binfmt-conf.sh...
WARNING: line over 80 characters
#31: FILE: scripts/qemu-binfmt-conf.sh:127:
+or1k_magic='\x7fELF\x01\x02\x01\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x02\x00\x5c'

ERROR: line over 90 characters
#32: FILE: scripts/qemu-binfmt-conf.sh:128:
+or1k_mask='\xff\xff\xff\xff\xff\xff\xff\x00\xff\xff\xff\xff\xff\xff\xff\xff\xff\xfe\xff\xff'

total: 1 errors, 1 warnings, 23 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 21/22: linux-user: Implement signals for openrisc...
Checking PATCH 22/22: linux-user: Fix struct sigaltstack for openrisc...
=== OUTPUT END ===

Test command exited with code: 1


---
Email generated automatically by Patchew [http://patchew.org/].
Please send your feedback to patchew-devel@redhat.com

On Mon, Jun 18, 2018 at 08:40:24AM -1000, Richard Henderson wrote:
> This is almost a grab-bag of little improvements to the port.
> 
> patches 1-3:
>   Fix singlestepping for gdbstub.  This has apparently never
>   worked, as the first commit has the same bug of not advancing
>   the pc when stepping.
> 
> patches 4:
>   Link more TBs.
> 
> patches 5-6:
>   Exit the TB after l.mtspr insns.  In particular, storing to
>   SR changes exception state so we want to return to the main
>   loop to recognize any pending interrupts immediately.
> 
> patches 8-18:
>   Reorganize TLB handling.  There is a fundamental bug that is
>   fixed in patch 13.  However the bug has been hidden by extra
>   TLB flushing elsewhere in the port.  I remove some unnecessary
>   indirection that the port inherited from somewhere -- probably
>   the MIPS port.  Finally, I present the QEMU TLB a unified view
>   of the OpenRISC split I/D TLB.
> 
> patch 19:
>   Split out disassembly from translation.
> 
> patch 20:
>   Add qemu-or1k to qemu-binfmt-conf.sh.
> 
> patches 21-22:
>   Implement signal handling for linux-user.

Hi Richard,

Thanks for these, I think there are a few white space issues throughout.  Do you
mind if I take these and clean them up (indent with space) and work on the DSX
and Interrupt issue I mentioned earlier?

I can submit all during the next merge window.

Let me know if you have other plans or you think they can go right away.

-Stafford

On 06/21/2018 01:00 AM, Stafford Horne wrote:
> Thanks for these, I think there are a few white space issues throughout.  Do you
> mind if I take these and clean them up (indent with space) and work on the DSX
> and Interrupt issue I mentioned earlier?
> 
> I can submit all during the next merge window.

That's fine with me.


r~