From nobody Tue Apr 30 02:16:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528999433525788.7121689363889; Thu, 14 Jun 2018 11:03:53 -0700 (PDT) Received: from localhost ([::1]:41959 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTWbA-00087Y-Ro for importer@patchew.org; Thu, 14 Jun 2018 14:03:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55135) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTWYt-0006zA-24 for qemu-devel@nongnu.org; Thu, 14 Jun 2018 14:01:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fTWYr-0000PE-JP for qemu-devel@nongnu.org; Thu, 14 Jun 2018 14:01:31 -0400 Received: from mail-qk0-x242.google.com ([2607:f8b0:400d:c09::242]:44433) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fTWYr-0000PA-Eu for qemu-devel@nongnu.org; Thu, 14 Jun 2018 14:01:29 -0400 Received: by mail-qk0-x242.google.com with SMTP id 185-v6so4134963qkk.11 for ; Thu, 14 Jun 2018 11:01:29 -0700 (PDT) Received: from x1.local ([138.117.48.222]) by smtp.gmail.com with ESMTPSA id j16-v6sm3477401qtn.29.2018.06.14.11.01.26 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 14 Jun 2018 11:01:28 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=DAdwvswRHy36J1+IhGfwHInJ9jf5PW+4kIKmgofMiDM=; b=Qeqc5UEDyptUHCy4/HBv7lDpq2f91flL/iccgb96xjZ1fkaEuR+9d0ryw5Lfaqf2fe w4bu7+onlLXN8VTXwfkISJhHazdzB7NYarVpAlsCYf47OuXa8hNeSdYD1nFlkTOZT3Mx hP3Pi/qaCyE/wycdehPIhteKzR7qXth5Pm2qTL2EYXnrTRR0N80jXfvs9qtIUoRquJWV klC1Ztgx8xFB6F9g5TI3MVML8H7EzlKS/EIifbSMCTucSp+cIxFEGLoQ3+BOtCPtSsa5 Xmvr52lLMJNTHee95d7b/yv4axAxbRmrifM5B4+QiH/9/viPRdrmA+epcmaqR6pvLSfY ioSA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=DAdwvswRHy36J1+IhGfwHInJ9jf5PW+4kIKmgofMiDM=; b=bO0CqBmqMVa1eTYU3Lx9BE5FLPlhQ8ctZj2lLoIXvKJY14mVSbwoTnsiP4In5OnnUB epeCq6bxairaikuF0G7ZVIdpR/oFoT8TLAgYR8JljwZksg2B0CrTzOyPGlIEs3IuLD04 7bZyrT+lsww3txHoBac+qK/jFZgSWtgs3l0dQjRX8/iUip9fn/7BVRPrR9hgmhciU5ZV /9FNJacpM9duon0LLWW3HqMFoSE5+0EVbxc1S2wREkKuHN0qSARB1Rld37XStqMvsEKP WPv2xWc+Pg+US+s/LgtYeUNpr8sBWEmkGp56yQ0jPP61hn2vZ+B71w/rXAYlIjFwa51v rmnQ== X-Gm-Message-State: APt69E19LxQqgOgGKBgmsf1Gc4gkQBMfQ+MtpYoQb8odZZlsz0OIcfcA CsoUWZhQQA3CUE4bzi+TCCE= X-Google-Smtp-Source: ADUXVKKcHti5iCEEFoB9CVZnTXcTTiBrtvWa+2+iy24R8j4Cyt3P32WtO0q/7iuFbbfbUYsQavK2/w== X-Received: by 2002:a37:bc05:: with SMTP id m5-v6mr3178645qkf.87.1528999288769; Thu, 14 Jun 2018 11:01:28 -0700 (PDT) From: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= To: "Emilio G . Cota" , Richard Henderson , Paolo Bonzini , Mark Cave-Ayland , =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Thu, 14 Jun 2018 15:01:18 -0300 Message-Id: <20180614180119.1704-2-f4bug@amsat.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180614180119.1704-1-f4bug@amsat.org> References: <20180614180119.1704-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::242 Subject: [Qemu-devel] [RFC PATCH 1/2] hw/isa/smc37c669-superio: Basic 'Config Registers' implementation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The Config Register 0..3 are used by the BIOS to enable functionalities. The FDC37C669 incorporates Software Configurable Logic (SCL) for ease of use. Use of the SCL feature allows programmable system configuration of key functions such as the FDC, parallel port, and UARTs. Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/isa/smc37c669-superio.c | 73 +++++++++++++++++++++++++++++++++----- 1 file changed, 65 insertions(+), 8 deletions(-) diff --git a/hw/isa/smc37c669-superio.c b/hw/isa/smc37c669-superio.c index aa233c6967..49d0984ad9 100644 --- a/hw/isa/smc37c669-superio.c +++ b/hw/isa/smc37c669-superio.c @@ -6,16 +6,37 @@ * This code is licensed under the GNU GPLv2 and later. * See the COPYING file in the top-level directory. * SPDX-License-Identifier: GPL-2.0-or-later + * + * Data Sheet (Rev. 06/29/2007): + * http://ww1.microchip.com/downloads/en/DeviceDoc/37c669.pdf */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/log.h" #include "hw/isa/superio.h" +#include "trace.h" + +#define SMC37C669(obj) \ + OBJECT_CHECK(SMC37C669State, (obj), TYPE_SMC37C669_SUPERIO) + +typedef struct SMC37C669State { + /*< private >*/ + ISASuperIODevice parent_dev; + /*< public >*/ + + uint32_t config; /* initial configuration */ + + uint8_t cr[4]; +} SMC37C669State; =20 -/* UARTs (compatible with NS16450 or PC16550) */ +/* UARTs (NS16C550 compatible) */ =20 static bool is_serial_enabled(ISASuperIODevice *sio, uint8_t index) { - return index < 2; + SMC37C669State *s =3D SMC37C669(sio); + + return extract32(s->cr[2], 3 + index * 4, 1); } =20 static uint16_t get_serial_iobase(ISASuperIODevice *sio, uint8_t index) @@ -28,11 +49,13 @@ static unsigned int get_serial_irq(ISASuperIODevice *si= o, uint8_t index) return index ? 3 : 4; } =20 -/* Parallel port */ +/* Parallel port (EPP and ECP support) */ =20 static bool is_parallel_enabled(ISASuperIODevice *sio, uint8_t index) { - return index < 1; + SMC37C669State *s =3D SMC37C669(sio); + + return extract32(s->cr[1], 2, 1); } =20 static uint16_t get_parallel_iobase(ISASuperIODevice *sio, uint8_t index) @@ -50,11 +73,13 @@ static unsigned int get_parallel_dma(ISASuperIODevice *= sio, uint8_t index) return 3; } =20 -/* Diskette controller (Software compatible with the Intel PC8477) */ +/* Diskette controller (Intel 82077 compatible) */ =20 static bool is_fdc_enabled(ISASuperIODevice *sio, uint8_t index) { - return index < 1; + SMC37C669State *s =3D SMC37C669(sio); + + return extract32(s->cr[0], 3, 1); } =20 static uint16_t get_fdc_iobase(ISASuperIODevice *sio, uint8_t index) @@ -72,10 +97,43 @@ static unsigned int get_fdc_dma(ISASuperIODevice *sio, = uint8_t index) return 2; } =20 +static void smc37c669_reset(DeviceState *d) +{ + SMC37C669State *s =3D SMC37C669(d); + + stl_he_p(s->cr, s->config); +} + +static void smc37c669_realize(DeviceState *dev, Error **errp) +{ + ISASuperIOClass *sc =3D ISA_SUPERIO_GET_CLASS(dev); + Error *local_err =3D NULL; + + smc37c669_reset(dev); + + sc->parent_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } +} + +static Property smc37c669_properties[] =3D { + DEFINE_PROP_UINT32("config", SMC37C669State, config, 0x78889c28), + DEFINE_PROP_BIT("parallel", SMC37C669State, config, 8 + 2, true), + DEFINE_PROP_END_OF_LIST() +}; + static void smc37c669_class_init(ObjectClass *klass, void *data) { + DeviceClass *dc =3D DEVICE_CLASS(klass); ISASuperIOClass *sc =3D ISA_SUPERIO_CLASS(klass); =20 + sc->parent_realize =3D dc->realize; + dc->realize =3D smc37c669_realize; + dc->reset =3D smc37c669_reset; + dc->props =3D smc37c669_properties; + sc->parallel =3D (ISASuperIOFuncs){ .count =3D 1, .is_enabled =3D is_parallel_enabled, @@ -96,13 +154,12 @@ static void smc37c669_class_init(ObjectClass *klass, v= oid *data) .get_irq =3D get_fdc_irq, .get_dma =3D get_fdc_dma, }; - sc->ide.count =3D 0; } =20 static const TypeInfo smc37c669_type_info =3D { .name =3D TYPE_SMC37C669_SUPERIO, .parent =3D TYPE_ISA_SUPERIO, - .instance_size =3D sizeof(ISASuperIODevice), + .instance_size =3D sizeof(SMC37C669State), .class_size =3D sizeof(ISASuperIOClass), .class_init =3D smc37c669_class_init, }; --=20 2.17.1 From nobody Tue Apr 30 02:16:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Cota" , Richard Henderson , Paolo Bonzini , Mark Cave-Ayland , =?UTF-8?q?Herv=C3=A9=20Poussineau?= Date: Thu, 14 Jun 2018 15:01:19 -0300 Message-Id: <20180614180119.1704-3-f4bug@amsat.org> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20180614180119.1704-1-f4bug@amsat.org> References: <20180614180119.1704-1-f4bug@amsat.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::244 Subject: [Qemu-devel] [RFC PATCH 2/2] hw/alpha/dp264: Disable the Super I/O parallel port X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 The 3BCh I/O address was used by "Parallel Ports which were incorporated on to Video Cards" and "has now reappeared as an option for Parallel Ports integrated onto motherboards, upon which their configuration can be changed using BIOS." The real PALcode is expected to configure the Super I/O and disable the parallel port, to allow the 3c0-3cf range to be assigned to the Cirrus VGA. This fixes an issue introduced in a4cb773928e where the SIO bind the parallel port in the address range used by the VGA device, resulting in overlap: (qemu) info mtree address-space: memory 0000000000000000-ffffffffffffffff (prio 0, i/o): system 00000801fc000000-00000801fdffffff (prio 0, i/o): pci0-io ... 00000801fc0003b4-00000801fc0003b5 (prio 0, i/o): vga 00000801fc0003ba-00000801fc0003ba (prio 0, i/o): vga 00000801fc0003bc-00000801fc0003c3 (prio 0, i/o): parallel ^^^ ^^^^^^^^ 00000801fc0003c0-00000801fc0003cf (prio 0, i/o): vga ^^^ 00000801fc0003d4-00000801fc0003d5 (prio 0, i/o): vga 00000801fc0003da-00000801fc0003da (prio 0, i/o): vga ... Reported-by: Emilio G. Cota Signed-off-by: Philippe Mathieu-Daud=C3=A9 --- hw/alpha/dp264.c | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 80b987f7fb..87504add8e 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -58,6 +58,7 @@ static void clipper_init(MachineState *machine) AlphaCPU *cpus[4]; PCIBus *pci_bus; ISABus *isa_bus; + DeviceState *superio; qemu_irq rtc_irq; long size, i; char *palcode_filename; @@ -95,7 +96,10 @@ static void clipper_init(MachineState *machine) isa_create_simple(isa_bus, "i82374"); =20 /* Super I/O */ - isa_create_simple(isa_bus, TYPE_SMC37C669_SUPERIO); + superio =3D DEVICE(isa_create(isa_bus, TYPE_SMC37C669_SUPERIO)); + /* Real PALcode configures the Super I/O and disable the parallel port= */ + qdev_prop_set_bit(superio, "parallel", false); + qdev_init_nofail(superio); =20 /* IDE disk setup. */ { --=20 2.17.1