From nobody Fri May 3 04:15:54 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528973766621178.28356068058497; Thu, 14 Jun 2018 03:56:06 -0700 (PDT) Received: from localhost ([::1]:39760 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTPvB-0007BM-Ta for importer@patchew.org; Thu, 14 Jun 2018 06:56:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39975) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fTPsv-0005wK-LB for qemu-devel@nongnu.org; Thu, 14 Jun 2018 06:53:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fTPst-00086J-2j for qemu-devel@nongnu.org; Thu, 14 Jun 2018 06:53:45 -0400 Received: from chuckie.co.uk ([82.165.15.123]:34366 helo=s16892447.onlinehome-server.info) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fTPss-000800-Oh for qemu-devel@nongnu.org; Thu, 14 Jun 2018 06:53:43 -0400 Received: from host86-191-128-6.range86-191.btcentralplus.com ([86.191.128.6] helo=kentang.home) by s16892447.onlinehome-server.info with esmtpsa (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.76) (envelope-from ) id 1fTPsx-0000MT-Gh; Thu, 14 Jun 2018 11:53:49 +0100 From: Mark Cave-Ayland To: qemu-devel@nongnu.org, atar4qemu@gmail.com, cota@braap.org, richard.henderson@linaro.org Date: Thu, 14 Jun 2018 11:53:23 +0100 Message-Id: <20180614105323.22524-2-mark.cave-ayland@ilande.co.uk> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180614105323.22524-1-mark.cave-ayland@ilande.co.uk> References: <20180614105323.22524-1-mark.cave-ayland@ilande.co.uk> X-SA-Exim-Connect-IP: 86.191.128.6 X-SA-Exim-Mail-From: mark.cave-ayland@ilande.co.uk X-SA-Exim-Version: 4.2.1 (built Sun, 08 Jan 2012 02:45:44 +0000) X-SA-Exim-Scanned: Yes (on s16892447.onlinehome-server.info) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 82.165.15.123 Subject: [Qemu-devel] [RFCv2 PATCH 1/1] SPARC64: add icount support X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch adds gen_io_start()/gen_io_end() to various instructions as requ= ired in order to boot my OpenBIOS test images on qemu-system-sparc64 with icount enabled. Signed-off-by: Mark Cave-Ayland --- target/sparc/translate.c | 97 ++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 97 insertions(+) diff --git a/target/sparc/translate.c b/target/sparc/translate.c index f3d430c1b2..56101387a8 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -3400,11 +3400,17 @@ static void disas_sparc_insn(DisasContext * dc, uns= igned int insn) r_const =3D tcg_const_i32(dc->mem_idx); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, tick)); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_tick_get_count(cpu_dst, cpu_env, r_tick= ptr, r_const); tcg_temp_free_ptr(r_tickptr); tcg_temp_free_i32(r_const); gen_store_gpr(dc, rd, cpu_dst); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } } break; case 0x5: /* V9 rdpc */ @@ -3447,11 +3453,17 @@ static void disas_sparc_insn(DisasContext * dc, uns= igned int insn) r_const =3D tcg_const_i32(dc->mem_idx); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, stick)); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_tick_get_count(cpu_dst, cpu_env, r_tick= ptr, r_const); tcg_temp_free_ptr(r_tickptr); tcg_temp_free_i32(r_const); gen_store_gpr(dc, rd, cpu_dst); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } } break; case 0x19: /* System tick compare */ @@ -3576,10 +3588,16 @@ static void disas_sparc_insn(DisasContext * dc, uns= igned int insn) r_const =3D tcg_const_i32(dc->mem_idx); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState, tick)); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_tick_get_count(cpu_tmp0, cpu_env, r_tickptr, r_const); tcg_temp_free_ptr(r_tickptr); tcg_temp_free_i32(r_const); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } } break; case 5: // tba @@ -4385,9 +4403,20 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) r_tickptr =3D tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState,= tick)); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_start(); + } gen_helper_tick_set_limit(r_tickptr, cpu_tick_cmp= r); tcg_temp_free_ptr(r_tickptr); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_end(); + /* End TB to handle timer interrup= t */ + save_state(dc); + gen_op_next_insn(); + tcg_gen_exit_tb(NULL, 0); + dc->base.is_jmp =3D DISAS_NORETURN; + } } break; case 0x18: /* System tick */ @@ -4403,9 +4432,20 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) r_tickptr =3D tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState,= stick)); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_start(); + } gen_helper_tick_set_count(r_tickptr, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_end(); + /* End TB to handle timer interrup= t */ + save_state(dc); + gen_op_next_insn(); + tcg_gen_exit_tb(NULL, 0); + dc->base.is_jmp =3D DISAS_NORETURN; + } } break; case 0x19: /* System tick compare */ @@ -4421,9 +4461,20 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) r_tickptr =3D tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState,= stick)); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_start(); + } gen_helper_tick_set_limit(r_tickptr, cpu_stick_cm= pr); tcg_temp_free_ptr(r_tickptr); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_end(); + /* End TB to handle timer interrup= t */ + save_state(dc); + gen_op_next_insn(); + tcg_gen_exit_tb(NULL, 0); + dc->base.is_jmp =3D DISAS_NORETURN; + } } break; =20 @@ -4531,9 +4582,20 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) r_tickptr =3D tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState,= tick)); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_start(); + } gen_helper_tick_set_count(r_tickptr, cpu_tmp0); tcg_temp_free_ptr(r_tickptr); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_end(); + /* End TB to handle timer interrup= t */ + save_state(dc); + gen_op_next_insn(); + tcg_gen_exit_tb(NULL, 0); + dc->base.is_jmp =3D DISAS_NORETURN; + } } break; case 5: // tba @@ -4541,7 +4603,13 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) break; case 6: // pstate save_state(dc); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_wrpstate(cpu_env, cpu_tmp0); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } dc->npc =3D DYNAMIC_PC; break; case 7: // tl @@ -4551,7 +4619,13 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) dc->npc =3D DYNAMIC_PC; break; case 8: // pil + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_wrpil(cpu_env, cpu_tmp0); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } break; case 9: // cwp gen_helper_wrcwp(cpu_env, cpu_tmp0); @@ -4642,9 +4716,20 @@ static void disas_sparc_insn(DisasContext * dc, unsi= gned int insn) r_tickptr =3D tcg_temp_new_ptr(); tcg_gen_ld_ptr(r_tickptr, cpu_env, offsetof(CPUSPARCState,= hstick)); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_start(); + } gen_helper_tick_set_limit(r_tickptr, cpu_hstick_c= mpr); tcg_temp_free_ptr(r_tickptr); + if (dc->base.tb->cflags & CF_USE_ICOUN= T) { + gen_io_end(); + /* End TB to handle timer interrup= t */ + save_state(dc); + gen_op_next_insn(); + tcg_gen_exit_tb(NULL, 0); + dc->base.is_jmp =3D DISAS_NORETURN; + } } break; case 6: // hver readonly @@ -5265,14 +5350,26 @@ static void disas_sparc_insn(DisasContext * dc, uns= igned int insn) goto priv_insn; dc->npc =3D DYNAMIC_PC; dc->pc =3D DYNAMIC_PC; + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_done(cpu_env); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } goto jmp_insn; case 1: if (!supervisor(dc)) goto priv_insn; dc->npc =3D DYNAMIC_PC; dc->pc =3D DYNAMIC_PC; + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_start(); + } gen_helper_retry(cpu_env); + if (dc->base.tb->cflags & CF_USE_ICOUNT) { + gen_io_end(); + } goto jmp_insn; default: goto illegal_insn; --=20 2.11.0