From nobody Mon May 6 19:40:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528204951765347.8292570670418; Tue, 5 Jun 2018 06:22:31 -0700 (PDT) Received: from localhost ([::1]:46678 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQBup-0001aO-VF for importer@patchew.org; Tue, 05 Jun 2018 09:22:24 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53657) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQBsc-0000H2-A1 for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fQBsZ-0006Me-Nc for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:06 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:49526 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fQBsZ-0006M4-C7 for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:03 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4E00D7A7F6; Tue, 5 Jun 2018 13:20:02 +0000 (UTC) Received: from xz-mi.nay.redhat.com (dhcp-14-151.nay.redhat.com [10.66.14.151]) by smtp.corp.redhat.com (Postfix) with ESMTP id BFD2710EE6C0; Tue, 5 Jun 2018 13:19:58 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 5 Jun 2018 21:19:42 +0800 Message-Id: <20180605131944.14649-2-peterx@redhat.com> In-Reply-To: <20180605131944.14649-1-peterx@redhat.com> References: <20180605131944.14649-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Tue, 05 Jun 2018 13:20:02 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.2]); Tue, 05 Jun 2018 13:20:02 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'peterx@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [RFC 1/3] memory: add MemTxAttrs to translate function X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , peterx@redhat.com, Eric Auger , Alex Williamson , Paolo Bonzini , David Gibson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add a new MemTxAttrs parameter to the IOMMUMemoryRegionClass.translate() function, which takes some extra context of the translation request. Signed-off-by: Peter Xu --- include/exec/memory.h | 5 ++++- exec.c | 2 +- hw/alpha/typhoon.c | 3 ++- hw/arm/smmuv3.c | 2 +- hw/dma/rc4030.c | 6 ++++-- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 6 ++++-- hw/ppc/spapr_iommu.c | 3 ++- hw/s390x/s390-pci-bus.c | 6 ++++-- hw/sparc/sun4m_iommu.c | 3 ++- hw/sparc64/sun4u_iommu.c | 3 ++- memory.c | 3 ++- 12 files changed, 29 insertions(+), 15 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index eb2ba06519..6b0ced554d 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -234,9 +234,12 @@ typedef struct IOMMUMemoryRegionClass { * @iommu: the IOMMUMemoryRegion * @hwaddr: address to be translated within the memory region * @flag: requested access permissions + * @attrs: MemTxAttrs that was bound to the translation + * operation. If flag=3D=3DIOMMU_NONE, this field is + * meaningless */ IOMMUTLBEntry (*translate)(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag); + IOMMUAccessFlags flag, MemTxAttrs attrs); /* Returns minimum supported page size in bytes. * If this method is not provided then the minimum is assumed to * be TARGET_PAGE_SIZE. diff --git a/exec.c b/exec.c index f6645ede0c..a0808ce9bd 100644 --- a/exec.c +++ b/exec.c @@ -502,7 +502,7 @@ static MemoryRegionSection address_space_translate_iomm= u(IOMMUMemoryRegion *iomm hwaddr addr =3D *xlat; IOMMUMemoryRegionClass *imrc =3D memory_region_get_iommu_class_noc= heck(iommu_mr); IOMMUTLBEntry iotlb =3D imrc->translate(iommu_mr, addr, is_write ? - IOMMU_WO : IOMMU_RO); + IOMMU_WO : IOMMU_RO, attrs); =20 if (!(iotlb.perm & (1 << is_write))) { goto unassigned; diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index 6a40869488..49192ab24d 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -666,7 +666,8 @@ static bool window_translate(TyphoonWindow *win, hwaddr= addr, Pchip and generate a machine check interrupt. */ static IOMMUTLBEntry typhoon_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { TyphoonPchip *pchip =3D container_of(iommu, TyphoonPchip, iommu); IOMMUTLBEntry ret; diff --git a/hw/arm/smmuv3.c b/hw/arm/smmuv3.c index 42dc521c13..f50d31c9d1 100644 --- a/hw/arm/smmuv3.c +++ b/hw/arm/smmuv3.c @@ -538,7 +538,7 @@ static int smmuv3_decode_config(IOMMUMemoryRegion *mr, = SMMUTransCfg *cfg, } =20 static IOMMUTLBEntry smmuv3_translate(IOMMUMemoryRegion *mr, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, MemTxAttrs at= trs) { SMMUDevice *sdev =3D container_of(mr, SMMUDevice, iommu); SMMUv3State *s =3D sdev->smmu; diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 5d4833eeca..1989bea771 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -490,8 +490,10 @@ static const MemoryRegionOps jazzio_ops =3D { .endianness =3D DEVICE_NATIVE_ENDIAN, }; =20 -static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, hwaddr= addr, - IOMMUAccessFlags flag) +static IOMMUTLBEntry rc4030_dma_translate(IOMMUMemoryRegion *iommu, + hwaddr addr, + IOMMUAccessFlags flag, + MemTxAttrs attrs) { rc4030State *s =3D container_of(iommu, rc4030State, dma_mr); IOMMUTLBEntry ret =3D { diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index 63d46ff6ee..084bfb7024 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -991,7 +991,7 @@ static inline bool amdvi_is_interrupt_addr(hwaddr addr) } =20 static IOMMUTLBEntry amdvi_translate(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, MemTxAttrs att= rs) { AMDVIAddressSpace *as =3D container_of(iommu, AMDVIAddressSpace, iommu= ); AMDVIState *s =3D as->iommu_state; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index b5a09b7908..ffbf19e257 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2470,8 +2470,10 @@ static void vtd_mem_write(void *opaque, hwaddr addr, } } =20 -static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, hwaddr = addr, - IOMMUAccessFlags flag) +static IOMMUTLBEntry vtd_iommu_translate(IOMMUMemoryRegion *iommu, + hwaddr addr, + IOMMUAccessFlags flag, + MemTxAttrs attrs) { VTDAddressSpace *vtd_as =3D container_of(iommu, VTDAddressSpace, iommu= ); IntelIOMMUState *s =3D vtd_as->iommu_state; diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index aaa6010d5c..199612095a 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -112,7 +112,8 @@ static void spapr_tce_free_table(uint64_t *table, int f= d, uint32_t nb_table) /* Called from RCU critical section */ static IOMMUTLBEntry spapr_tce_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { sPAPRTCETable *tcet =3D container_of(iommu, sPAPRTCETable, iommu); uint64_t tce; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 10da87458e..df321ae102 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -483,8 +483,10 @@ uint16_t s390_guest_io_table_walk(uint64_t g_iota, hwa= ddr addr, return error; } =20 -static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, hwaddr ad= dr, - IOMMUAccessFlags flag) +static IOMMUTLBEntry s390_translate_iommu(IOMMUMemoryRegion *mr, + hwaddr addr, + IOMMUAccessFlags flag, + MemTxAttrs attrs) { S390PCIIOMMU *iommu =3D container_of(mr, S390PCIIOMMU, iommu_mr); S390IOTLBEntry *entry; diff --git a/hw/sparc/sun4m_iommu.c b/hw/sparc/sun4m_iommu.c index b677601fc6..f68bcade3c 100644 --- a/hw/sparc/sun4m_iommu.c +++ b/hw/sparc/sun4m_iommu.c @@ -282,7 +282,8 @@ static void iommu_bad_addr(IOMMUState *s, hwaddr addr, /* Called from RCU critical section */ static IOMMUTLBEntry sun4m_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flags) + IOMMUAccessFlags flags, + MemTxAttrs attrs) { IOMMUState *is =3D container_of(iommu, IOMMUState, iommu); hwaddr page, pa; diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c index eb3aaa87e6..7a5a588aed 100644 --- a/hw/sparc64/sun4u_iommu.c +++ b/hw/sparc64/sun4u_iommu.c @@ -73,7 +73,8 @@ /* Called from RCU critical section */ static IOMMUTLBEntry sun4u_translate_iommu(IOMMUMemoryRegion *iommu, hwaddr addr, - IOMMUAccessFlags flag) + IOMMUAccessFlags flag, + MemTxAttrs attrs) { IOMMUState *is =3D container_of(iommu, IOMMUState, iommu); hwaddr baseaddr, offset; diff --git a/memory.c b/memory.c index 3212acc7f4..376f72b19c 100644 --- a/memory.c +++ b/memory.c @@ -1819,6 +1819,7 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *io= mmu_mr, IOMMUNotifier *n) IOMMUMemoryRegionClass *imrc =3D IOMMU_MEMORY_REGION_GET_CLASS(iommu_m= r); hwaddr addr, granularity; IOMMUTLBEntry iotlb; + MemTxAttrs attrs =3D { 0 }; =20 /* If the IOMMU has its own replay callback, override */ if (imrc->replay) { @@ -1829,7 +1830,7 @@ void memory_region_iommu_replay(IOMMUMemoryRegion *io= mmu_mr, IOMMUNotifier *n) granularity =3D memory_region_iommu_get_min_page_size(iommu_mr); =20 for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { - iotlb =3D imrc->translate(iommu_mr, addr, IOMMU_NONE); + iotlb =3D imrc->translate(iommu_mr, addr, IOMMU_NONE, attrs); if (iotlb.perm !=3D IOMMU_NONE) { n->notify(n, &iotlb); } --=20 2.17.0 From nobody Mon May 6 19:40:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528205083494143.470376292139; Tue, 5 Jun 2018 06:24:43 -0700 (PDT) Received: from localhost ([::1]:46701 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQBwz-0003QZ-Ln for importer@patchew.org; Tue, 05 Jun 2018 09:24:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53780) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQBst-0000SG-HM for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fQBsn-0006VZ-U5 for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:23 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:45920 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fQBsn-0006Uy-J9 for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:17 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 24CF081A8EA2; Tue, 5 Jun 2018 13:20:17 +0000 (UTC) Received: from xz-mi.nay.redhat.com (dhcp-14-151.nay.redhat.com [10.66.14.151]) by smtp.corp.redhat.com (Postfix) with ESMTP id E290610EE6C0; Tue, 5 Jun 2018 13:20:02 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 5 Jun 2018 21:19:43 +0800 Message-Id: <20180605131944.14649-3-peterx@redhat.com> In-Reply-To: <20180605131944.14649-1-peterx@redhat.com> References: <20180605131944.14649-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 05 Jun 2018 13:20:17 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.8]); Tue, 05 Jun 2018 13:20:17 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'peterx@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [RFC 2/3] memory: add MemTxAttrs to IOMMUTLBEntry X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , peterx@redhat.com, Eric Auger , Alex Williamson , Paolo Bonzini , David Gibson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" It should never be used for translate() calls since the caller should be the one who passes in the MemTxAttrs. However it could be used when we want to generate an IOMMU translation notification with specific translation attributes. Signed-off-by: Peter Xu --- include/exec/memory.h | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/include/exec/memory.h b/include/exec/memory.h index 6b0ced554d..12865a4890 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -72,6 +72,13 @@ struct IOMMUTLBEntry { hwaddr translated_addr; hwaddr addr_mask; /* 0xfff =3D 4k translation */ IOMMUAccessFlags perm; + /* + * Attributes that were bound to the DMA translation. Note that + * this field is meaningless when the IOMMUTLBENtry is generated + * by a translate() call. It can be used as a hint when we want + * to send IOMMU notifications with specific permission flags. + */ + MemTxAttrs attrs; }; =20 /* --=20 2.17.0 From nobody Mon May 6 19:40:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=redhat.com Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1528204960617712.0820553123984; Tue, 5 Jun 2018 06:22:40 -0700 (PDT) Received: from localhost ([::1]:46680 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQBv1-0001jq-Os for importer@patchew.org; Tue, 05 Jun 2018 09:22:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53778) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fQBst-0000S3-8l for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fQBsr-0006Yd-To for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:23 -0400 Received: from mx3-rdu2.redhat.com ([66.187.233.73]:39134 helo=mx1.redhat.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fQBsr-0006YI-NR for qemu-devel@nongnu.org; Tue, 05 Jun 2018 09:20:21 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.rdu2.redhat.com [10.11.54.3]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 47CD640BC076; Tue, 5 Jun 2018 13:20:21 +0000 (UTC) Received: from xz-mi.nay.redhat.com (dhcp-14-151.nay.redhat.com [10.66.14.151]) by smtp.corp.redhat.com (Postfix) with ESMTP id BB36B10EE6C0; Tue, 5 Jun 2018 13:20:17 +0000 (UTC) From: Peter Xu To: qemu-devel@nongnu.org Date: Tue, 5 Jun 2018 21:19:44 +0800 Message-Id: <20180605131944.14649-4-peterx@redhat.com> In-Reply-To: <20180605131944.14649-1-peterx@redhat.com> References: <20180605131944.14649-1-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.78 on 10.11.54.3 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Tue, 05 Jun 2018 13:20:21 +0000 (UTC) X-Greylist: inspected by milter-greylist-4.5.16 (mx1.redhat.com [10.11.55.7]); Tue, 05 Jun 2018 13:20:21 +0000 (UTC) for IP:'10.11.54.3' DOMAIN:'int-mx03.intmail.prod.int.rdu2.redhat.com' HELO:'smtp.corp.redhat.com' FROM:'peterx@redhat.com' RCPT:'' X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.187.233.73 Subject: [Qemu-devel] [RFC 3/3] memory: introduce IOMMU_NOTIFIER_USER_[UN]SET X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , peterx@redhat.com, Eric Auger , Alex Williamson , Paolo Bonzini , David Gibson , =?UTF-8?q?Alex=20Benn=C3=A9e?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Add two more IOMMU notifier flags to selectively choose whether the notifier would like to listen to an event that with USER bit set/unset. Note that all existing notifiers should always been registered with both of the flags set to make sure they'll receive the notification no matter whether the USER bit is set or unset in the attributes. To simplify this procedure, some new macros are defined. The old UNMAP-only notifiers should now be registered with IOMMU_NOTIFIER_UNMAP_ALL flags (rather than the old IOMMU_NOTIFIER_UNMAP flag), while the old MAP+UNMAP case can keep to use the IOMMU_NOTIFIER_ALL flag. Now if a new notifier would like to register to only UNMAP notifications with USER bit set, it should register with below flag: IOMMU_NOTIFIER_UNMAP | IOMMU_NOTIFIER_USER_SET Then when we want to notify a DMA invalidation (we call it IOMMUTLBEntry in QEMU), we should do this: IOMMUTLBEntry entry; ... (set up the fields) entry.perm =3D IOMMU_NONE; entry.attrs.user =3D 1; memory_region_notify_iommu(mr, &entry); Then only the notifiers registered with IOMMU_NOTIFIER_USER_SET will receive this notification. Signed-off-by: Peter Xu --- include/exec/memory.h | 48 ++++++++++++++++++++++++++++++++++++++----- hw/virtio/vhost.c | 2 +- memory.c | 10 +++++++++ 3 files changed, 54 insertions(+), 6 deletions(-) diff --git a/include/exec/memory.h b/include/exec/memory.h index 12865a4890..fb9a7059c6 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -82,18 +82,56 @@ struct IOMMUTLBEntry { }; =20 /* - * Bitmap for different IOMMUNotifier capabilities. Each notifier can - * register with one or multiple IOMMU Notifier capability bit(s). + * Bitmap for different IOMMUNotifier capabilities. Please refer to + * comments for each notifier capability to know its usage. Note that, + * a notifier registered with (UNMAP | USER_SET) does not mean that + * it'll notify both MAP notifies and USER_SET notifies, instead it + * means it'll only be notified for the events that are UNMAP + * meanwhile with USER attribute set. */ typedef enum { IOMMU_NOTIFIER_NONE =3D 0, - /* Notify cache invalidations */ + /* + * When set, will notify deleted entries (cache invalidations). + * When unset, will not notify deleted entries. + */ IOMMU_NOTIFIER_UNMAP =3D 0x1, - /* Notify entry changes (newly created entries) */ + /* + * When set, will notify newly created entries. When unset, will + * not notify newly created entries. + */ IOMMU_NOTIFIER_MAP =3D 0x2, + /* + * When set, will notify when the USER bit is set in + * IOMMUTLBEntry.attrs. When unset, will not notify when the USER + * bit is set. + */ + IOMMU_NOTIFIER_USER_SET =3D 0x4, + /* + * When set, will notify when the USER bit is cleared in + * IOMMUTLBEntry.attrs. When unset, will not notify when the USER + * bit is cleared. + */ + IOMMU_NOTIFIER_USER_UNSET =3D 0x8, } IOMMUNotifierFlag; =20 -#define IOMMU_NOTIFIER_ALL (IOMMU_NOTIFIER_MAP | IOMMU_NOTIFIER_UNMAP) +/* Use this when the notifier does not care about USER bit */ +#define IOMMU_NOTIFIER_USER_ALL \ + (IOMMU_NOTIFIER_USER_SET | IOMMU_NOTIFIER_USER_UNSET) + +/* Use this when the notifier does not care about any attribute */ +#define IOMMU_NOTIFIER_ATTRS_ALL \ + (IOMMU_NOTIFIER_USER_ALL) + +/* Use this to notify all UNMAP notifications */ +#define IOMMU_NOTIFIER_UNMAP_ALL \ + (IOMMU_NOTIFIER_UNMAP | IOMMU_NOTIFIER_ATTRS_ALL) + +/* Use this to notify all notifications */ +#define IOMMU_NOTIFIER_ALL ( \ + IOMMU_NOTIFIER_MAP | \ + IOMMU_NOTIFIER_UNMAP | \ + IOMMU_NOTIFIER_ATTRS_ALL) =20 struct IOMMUNotifier; typedef void (*IOMMUNotify)(struct IOMMUNotifier *notifier, diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 96175b214d..da6efeadad 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -672,7 +672,7 @@ static void vhost_iommu_region_add(MemoryListener *list= ener, section->size); end =3D int128_sub(end, int128_one()); iommu_notifier_init(&iommu->n, vhost_iommu_unmap_notify, - IOMMU_NOTIFIER_UNMAP, + IOMMU_NOTIFIER_UNMAP_ALL, section->offset_within_region, int128_get64(end)); iommu->mr =3D section->mr; diff --git a/memory.c b/memory.c index 376f72b19c..9e4617df5a 100644 --- a/memory.c +++ b/memory.c @@ -1880,6 +1880,16 @@ void memory_region_notify_one(IOMMUNotifier *notifie= r, return; } =20 + if (!(notifier->notifier_flags & IOMMU_NOTIFIER_USER_SET) && + entry->attrs.user) { + return; + } + + if (!(notifier->notifier_flags & IOMMU_NOTIFIER_USER_UNSET) && + !entry->attrs.user) { + return; + } + if (entry->perm & IOMMU_RW) { request_flags =3D IOMMU_NOTIFIER_MAP; } else { --=20 2.17.0