From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393728638160.5547979466212; Tue, 15 May 2018 07:15:28 -0700 (PDT) Received: from localhost ([::1]:40015 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIajf-0001tL-AG for importer@patchew.org; Tue, 15 May 2018 10:15:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39605) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabm-0003py-Hz for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabg-0002oW-Ok for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:18 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41678) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabg-0002nB-HO for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:12 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabd-0001N9-EX for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:09 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:52 +0100 Message-Id: <20180515140707.15957-2-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 01/16] fpu/softfloat: int_to_float ensure r fully initialised X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e Reported by Coverity (CID1390635). We ensure this for uint_to_float later on so we might as well mirror that. Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- fpu/softfloat.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index 8401b37bd4..b39c0c6fbb 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1525,7 +1525,7 @@ FLOAT_TO_UINT(64, 64) =20 static FloatParts int_to_float(int64_t a, float_status *status) { - FloatParts r; + FloatParts r =3D {}; if (a =3D=3D 0) { r.cls =3D float_class_zero; r.sign =3D false; --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526394118254339.3858594964304; Tue, 15 May 2018 07:21:58 -0700 (PDT) Received: from localhost ([::1]:40159 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIapn-00075X-LD for importer@patchew.org; Tue, 15 May 2018 10:21:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39566) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabl-0003pd-Cj for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabf-0002na-L4 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:17 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41676) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabf-0002mA-Dx for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:11 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabe-0001Nh-39 for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:10 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:53 +0100 Message-Id: <20180515140707.15957-3-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 02/16] fpu/softfloat: Don't set Invalid for float-to-int(MAXINT) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In float-to-integer conversion, if the floating point input converts exactly to the largest or smallest integer that fits in to the result type, this is not an overflow. In this situation we were producing the correct result value, but were incorrectly setting the Invalid flag. For example for Arm A64, "FCVTAS w0, d0" on an input of 0x41dfffffffc00000 should produce 0x7fffffff and set no flags. Fix the boundary case to take the right half of the if() statements. This fixes a regression from 2.11 introduced by the softfloat refactoring. Cc: qemu-stable@nongnu.org Fixes: ab52f973a50 Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20180510140141.12120-1-peter.maydell@linaro.org --- fpu/softfloat.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/fpu/softfloat.c b/fpu/softfloat.c index b39c0c6fbb..bc0f52fa54 100644 --- a/fpu/softfloat.c +++ b/fpu/softfloat.c @@ -1368,14 +1368,14 @@ static int64_t round_to_int_and_pack(FloatParts in,= int rmode, r =3D UINT64_MAX; } if (p.sign) { - if (r < -(uint64_t) min) { + if (r <=3D -(uint64_t) min) { return -r; } else { s->float_exception_flags =3D orig_flags | float_flag_inval= id; return min; } } else { - if (r < max) { + if (r <=3D max) { return r; } else { s->float_exception_flags =3D orig_flags | float_flag_inval= id; --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 152639372836497.86705152407364; Tue, 15 May 2018 07:15:28 -0700 (PDT) Received: from localhost ([::1]:40014 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIajW-0001ko-Se for importer@patchew.org; Tue, 15 May 2018 10:15:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39573) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabl-0003pe-Gw for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:21 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabf-0002nk-Rh for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:17 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41678) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabf-0002nB-Kv for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:11 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabe-0001OC-Ny for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:10 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:54 +0100 Message-Id: <20180515140707.15957-4-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/16] target/arm: Fix fp_status_f16 tininess before rounding X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 In commit d81ce0ef2c4f105 we added an extra float_status field fp_status_fp16 for Arm, but forgot to initialize it correctly by setting it to float_tininess_before_rounding. This currently will only cause problems for the new V8_FP16 feature, since the float-to-float conversion code doesn't use it yet. The effect would be that we failed to set the Underflow IEEE exception flag in all the cases where we should. Add the missing initialization. Fixes: d81ce0ef2c4f105 Cc: qemu-stable@nongnu.org Reviewed-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Peter Maydell Message-id: 20180512004311.9299-16-richard.henderson@linaro.org --- target/arm/cpu.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/target/arm/cpu.c b/target/arm/cpu.c index d175c5e94f..7939c6b8ae 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -324,6 +324,8 @@ static void arm_cpu_reset(CPUState *s) &env->vfp.fp_status); set_float_detect_tininess(float_tininess_before_rounding, &env->vfp.standard_fp_status); + set_float_detect_tininess(float_tininess_before_rounding, + &env->vfp.fp_status_f16); #ifndef CONFIG_USER_ONLY if (kvm_enabled()) { kvm_arm_reset_vcpu(cpu); --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393376707212.22940102263385; Tue, 15 May 2018 07:09:36 -0700 (PDT) Received: from localhost ([::1]:39965 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIadq-000510-8w for importer@patchew.org; Tue, 15 May 2018 10:09:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39547) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabk-0003pZ-HS for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabg-0002oI-GR for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:16 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41676) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabg-0002mA-A8 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:12 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabf-0001OT-CR for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:11 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:55 +0100 Message-Id: <20180515140707.15957-5-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 04/16] target/arm: Implement FMOV (general) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson Adding the fp16 moves to/from general registers. Cc: qemu-stable@nongnu.org Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-2-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 21 +++++++++++++++++++++ 1 file changed, 21 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 4d1b220cc6..5b8cf75e9f 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5700,6 +5700,15 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) tcg_gen_st_i64(tcg_rn, cpu_env, fp_reg_hi_offset(s, rd)); clear_vec_high(s, true, rd); break; + case 3: + /* 16 bit */ + tmp =3D tcg_temp_new_i64(); + tcg_gen_ext16u_i64(tmp, tcg_rn); + write_fp_dreg(s, rd, tmp); + tcg_temp_free_i64(tmp); + break; + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_rd =3D cpu_reg(s, rd); @@ -5717,6 +5726,12 @@ static void handle_fmov(DisasContext *s, int rd, int= rn, int type, bool itof) /* 64 bits from top half */ tcg_gen_ld_i64(tcg_rd, cpu_env, fp_reg_hi_offset(s, rn)); break; + case 3: + /* 16 bit */ + tcg_gen_ld16u_i64(tcg_rd, cpu_env, fp_reg_offset(s, rn, MO_16)= ); + break; + default: + g_assert_not_reached(); } } } @@ -5756,6 +5771,12 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) case 0xa: /* 64 bit */ case 0xd: /* 64 bit to top half of quad */ break; + case 0x6: /* 16-bit float, 32-bit int */ + case 0xe: /* 16-bit float, 64-bit int */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 152639356150352.54343676255394; Tue, 15 May 2018 07:12:41 -0700 (PDT) Received: from localhost ([::1]:39987 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIagy-0007oS-H8 for importer@patchew.org; Tue, 15 May 2018 10:12:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39610) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabm-0003q4-O1 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabh-0002ou-50 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:18 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41680) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabg-0002o7-Tu for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:13 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabg-0001Ox-0z for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:12 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:56 +0100 Message-Id: <20180515140707.15957-6-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 05/16] target/arm: Early exit after unallocated_encoding in disas_fp_int_conv X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson No sense in emitting code after the exception. Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-3-richard.henderson@linaro.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 5b8cf75e9f..11d8c07943 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5780,7 +5780,7 @@ static void disas_fp_int_conv(DisasContext *s, uint32= _t insn) default: /* all other sf/type/rmode combinations are invalid */ unallocated_encoding(s); - break; + return; } =20 if (!fp_access_check(s)) { --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393377513941.3227061683915; Tue, 15 May 2018 07:09:37 -0700 (PDT) Received: from localhost ([::1]:39966 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIadw-00056a-Ov for importer@patchew.org; Tue, 15 May 2018 10:09:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39608) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabm-0003q3-Na for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabi-0002po-3F for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:18 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41680) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabh-0002o7-PG for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:14 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabg-0001PS-N7 for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:12 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:57 +0100 Message-Id: <20180515140707.15957-7-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 06/16] target/arm: Implement FCVT (scalar, integer) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-4-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/helper.h | 6 +++ target/arm/helper.c | 38 ++++++++++++++- target/arm/translate-a64.c | 96 +++++++++++++++++++++++++++++++------- 3 files changed, 122 insertions(+), 18 deletions(-) diff --git a/target/arm/helper.h b/target/arm/helper.h index 1969b37f2d..ce89968b2d 100644 --- a/target/arm/helper.h +++ b/target/arm/helper.h @@ -151,6 +151,10 @@ DEF_HELPER_3(vfp_touhd_round_to_zero, i64, f64, i32, p= tr) DEF_HELPER_3(vfp_tould_round_to_zero, i64, f64, i32, ptr) DEF_HELPER_3(vfp_touhh, i32, f16, i32, ptr) DEF_HELPER_3(vfp_toshh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toulh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_toslh, i32, f16, i32, ptr) +DEF_HELPER_3(vfp_touqh, i64, f16, i32, ptr) +DEF_HELPER_3(vfp_tosqh, i64, f16, i32, ptr) DEF_HELPER_3(vfp_toshs, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosls, i32, f32, i32, ptr) DEF_HELPER_3(vfp_tosqs, i64, f32, i32, ptr) @@ -177,6 +181,8 @@ DEF_HELPER_3(vfp_ultod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_uqtod, f64, i64, i32, ptr) DEF_HELPER_3(vfp_sltoh, f16, i32, i32, ptr) DEF_HELPER_3(vfp_ultoh, f16, i32, i32, ptr) +DEF_HELPER_3(vfp_sqtoh, f16, i64, i32, ptr) +DEF_HELPER_3(vfp_uqtoh, f16, i64, i32, ptr) =20 DEF_HELPER_FLAGS_2(set_rmode, TCG_CALL_NO_RWG, i32, i32, ptr) DEF_HELPER_FLAGS_2(set_neon_rmode, TCG_CALL_NO_RWG, i32, i32, env) diff --git a/target/arm/helper.c b/target/arm/helper.c index 817f9d81a0..c6fd7f9479 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -11427,8 +11427,12 @@ VFP_CONV_FIX_A64(uq, s, 32, 64, uint64) #undef VFP_CONV_FIX_A64 =20 /* Conversion to/from f16 can overflow to infinity before/after scaling. - * Therefore we convert to f64 (which does not round), scale, - * and then convert f64 to f16 (which may round). + * Therefore we convert to f64, scale, and then convert f64 to f16; or + * vice versa for conversion to integer. + * + * For 16- and 32-bit integers, the conversion to f64 never rounds. + * For 64-bit integers, any integer that would cause rounding will also + * overflow to f16 infinity, so there is no double rounding problem. */ =20 static float16 do_postscale_fp16(float64 f, int shift, float_status *fpst) @@ -11446,6 +11450,16 @@ float16 HELPER(vfp_ultoh)(uint32_t x, uint32_t shi= ft, void *fpst) return do_postscale_fp16(uint32_to_float64(x, fpst), shift, fpst); } =20 +float16 HELPER(vfp_sqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(int64_to_float64(x, fpst), shift, fpst); +} + +float16 HELPER(vfp_uqtoh)(uint64_t x, uint32_t shift, void *fpst) +{ + return do_postscale_fp16(uint64_to_float64(x, fpst), shift, fpst); +} + static float64 do_prescale_fp16(float16 f, int shift, float_status *fpst) { if (unlikely(float16_is_any_nan(f))) { @@ -11475,6 +11489,26 @@ uint32_t HELPER(vfp_touhh)(float16 x, uint32_t shi= ft, void *fpst) return float64_to_uint16(do_prescale_fp16(x, shift, fpst), fpst); } =20 +uint32_t HELPER(vfp_toslh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint32_t HELPER(vfp_toulh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint32(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_tosqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_int64(do_prescale_fp16(x, shift, fpst), fpst); +} + +uint64_t HELPER(vfp_touqh)(float16 x, uint32_t shift, void *fpst) +{ + return float64_to_uint64(do_prescale_fp16(x, shift, fpst), fpst); +} + /* Set the current fp rounding mode and return the old one. * The argument is a softfloat float_round_ value. */ diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 11d8c07943..93fb15d185 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5511,11 +5511,11 @@ static void handle_fpfpcvt(DisasContext *s, int rd,= int rn, int opcode, bool itof, int rmode, int scale, int sf, int ty= pe) { bool is_signed =3D !(opcode & 1); - bool is_double =3D type; TCGv_ptr tcg_fpstatus; - TCGv_i32 tcg_shift; + TCGv_i32 tcg_shift, tcg_single; + TCGv_i64 tcg_double; =20 - tcg_fpstatus =3D get_fpstatus_ptr(false); + tcg_fpstatus =3D get_fpstatus_ptr(type =3D=3D 3); =20 tcg_shift =3D tcg_const_i32(64 - scale); =20 @@ -5533,8 +5533,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, i= nt rn, int opcode, tcg_int =3D tcg_extend; } =20 - if (is_double) { - TCGv_i64 tcg_double =3D tcg_temp_new_i64(); + switch (type) { + case 1: /* float64 */ + tcg_double =3D tcg_temp_new_i64(); if (is_signed) { gen_helper_vfp_sqtod(tcg_double, tcg_int, tcg_shift, tcg_fpstatus); @@ -5544,8 +5545,10 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, } write_fp_dreg(s, rd, tcg_double); tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single =3D tcg_temp_new_i32(); + break; + + case 0: /* float32 */ + tcg_single =3D tcg_temp_new_i32(); if (is_signed) { gen_helper_vfp_sqtos(tcg_single, tcg_int, tcg_shift, tcg_fpstatus); @@ -5555,6 +5558,23 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, } write_fp_sreg(s, rd, tcg_single); tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single =3D tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_sqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_uqtoh(tcg_single, tcg_int, + tcg_shift, tcg_fpstatus); + } + write_fp_sreg(s, rd, tcg_single); + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } } else { TCGv_i64 tcg_int =3D cpu_reg(s, rd); @@ -5571,8 +5591,9 @@ static void handle_fpfpcvt(DisasContext *s, int rd, i= nt rn, int opcode, =20 gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); =20 - if (is_double) { - TCGv_i64 tcg_double =3D read_fp_dreg(s, rn); + switch (type) { + case 1: /* float64 */ + tcg_double =3D read_fp_dreg(s, rn); if (is_signed) { if (!sf) { gen_helper_vfp_tosld(tcg_int, tcg_double, @@ -5590,9 +5611,14 @@ static void handle_fpfpcvt(DisasContext *s, int rd, = int rn, int opcode, tcg_shift, tcg_fpstatus); } } + if (!sf) { + tcg_gen_ext32u_i64(tcg_int, tcg_int); + } tcg_temp_free_i64(tcg_double); - } else { - TCGv_i32 tcg_single =3D read_fp_sreg(s, rn); + break; + + case 0: /* float32 */ + tcg_single =3D read_fp_sreg(s, rn); if (sf) { if (is_signed) { gen_helper_vfp_tosqs(tcg_int, tcg_single, @@ -5614,14 +5640,39 @@ static void handle_fpfpcvt(DisasContext *s, int rd,= int rn, int opcode, tcg_temp_free_i32(tcg_dest); } tcg_temp_free_i32(tcg_single); + break; + + case 3: /* float16 */ + tcg_single =3D read_fp_sreg(s, rn); + if (sf) { + if (is_signed) { + gen_helper_vfp_tosqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_touqh(tcg_int, tcg_single, + tcg_shift, tcg_fpstatus); + } + } else { + TCGv_i32 tcg_dest =3D tcg_temp_new_i32(); + if (is_signed) { + gen_helper_vfp_toslh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } else { + gen_helper_vfp_toulh(tcg_dest, tcg_single, + tcg_shift, tcg_fpstatus); + } + tcg_gen_extu_i32_i64(tcg_int, tcg_dest); + tcg_temp_free_i32(tcg_dest); + } + tcg_temp_free_i32(tcg_single); + break; + + default: + g_assert_not_reached(); } =20 gen_helper_set_rmode(tcg_rmode, tcg_rmode, tcg_fpstatus); tcg_temp_free_i32(tcg_rmode); - - if (!sf) { - tcg_gen_ext32u_i64(tcg_int, tcg_int); - } } =20 tcg_temp_free_ptr(tcg_fpstatus); @@ -5791,7 +5842,20 @@ static void disas_fp_int_conv(DisasContext *s, uint3= 2_t insn) /* actual FP conversions */ bool itof =3D extract32(opcode, 1, 1); =20 - if (type > 1 || (rmode !=3D 0 && opcode > 1)) { + if (rmode !=3D 0 && opcode > 1) { + unallocated_encoding(s); + return; + } + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393547811409.3891654665989; Tue, 15 May 2018 07:12:27 -0700 (PDT) Received: from localhost ([::1]:39984 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIagl-0007bx-0a for importer@patchew.org; Tue, 15 May 2018 10:12:27 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39597) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabm-0003pt-Bl for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabi-0002qA-En for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:18 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41682) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabi-0002pO-8b for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:14 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabh-0001Q9-Bp for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:13 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:58 +0100 Message-Id: <20180515140707.15957-8-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 07/16] target/arm: Implement FCVT (scalar, fixed-point) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-5-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 17 +++++++++++++++-- 1 file changed, 15 insertions(+), 2 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 93fb15d185..d0ed125442 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5697,8 +5697,21 @@ static void disas_fp_fixed_conv(DisasContext *s, uin= t32_t insn) bool sf =3D extract32(insn, 31, 1); bool itof; =20 - if (sbit || (type > 1) - || (!sf && scale < 32)) { + if (sbit || (!sf && scale < 32)) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: /* float32 */ + case 1: /* float64 */ + break; + case 3: /* float16 */ + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393731104868.421825732718; Tue, 15 May 2018 07:15:31 -0700 (PDT) Received: from localhost ([::1]:40016 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIaji-0001v5-7B for importer@patchew.org; Tue, 15 May 2018 10:15:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39653) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabp-0003sG-OK for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabj-0002qu-CG for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:21 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41682) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabj-0002pO-3l for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:15 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabi-0001QO-4j for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:14 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:06:59 +0100 Message-Id: <20180515140707.15957-9-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 08/16] target/arm: Introduce and use read_fp_hreg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-6-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 30 ++++++++++++++---------------- 1 file changed, 14 insertions(+), 16 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index d0ed125442..78f12daaf6 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -615,6 +615,14 @@ static TCGv_i32 read_fp_sreg(DisasContext *s, int reg) return v; } =20 +static TCGv_i32 read_fp_hreg(DisasContext *s, int reg) +{ + TCGv_i32 v =3D tcg_temp_new_i32(); + + tcg_gen_ld16u_i32(v, cpu_env, fp_reg_offset(s, reg, MO_16)); + return v; +} + /* Clear the bits above an N-bit vector, for N =3D (is_q ? 128 : 64). * If SVE is not enabled, then there are only 128 bits in the vector. */ @@ -4881,11 +4889,9 @@ static void disas_fp_csel(DisasContext *s, uint32_t = insn) static void handle_fp_1src_half(DisasContext *s, int opcode, int rd, int r= n) { TCGv_ptr fpst =3D NULL; - TCGv_i32 tcg_op =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op =3D read_fp_hreg(s, rn); TCGv_i32 tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (opcode) { case 0x0: /* FMOV */ tcg_gen_mov_i32(tcg_res, tcg_op); @@ -7784,13 +7790,10 @@ static void disas_simd_scalar_three_reg_diff(DisasC= ontext *s, uint32_t insn) tcg_temp_free_i64(tcg_op2); tcg_temp_free_i64(tcg_res); } else { - TCGv_i32 tcg_op1 =3D tcg_temp_new_i32(); - TCGv_i32 tcg_op2 =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op1 =3D read_fp_hreg(s, rn); + TCGv_i32 tcg_op2 =3D read_fp_hreg(s, rm); TCGv_i64 tcg_res =3D tcg_temp_new_i64(); =20 - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - gen_helper_neon_mull_s16(tcg_res, tcg_op1, tcg_op2); gen_helper_neon_addl_saturate_s32(tcg_res, cpu_env, tcg_res, tcg_r= es); =20 @@ -8331,13 +8334,10 @@ static void disas_simd_scalar_three_reg_same_fp16(D= isasContext *s, =20 fpst =3D get_fpstatus_ptr(true); =20 - tcg_op1 =3D tcg_temp_new_i32(); - tcg_op2 =3D tcg_temp_new_i32(); + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op1, rn, 0, MO_16); - read_vec_element_i32(s, tcg_op2, rm, 0, MO_16); - switch (fpopcode) { case 0x03: /* FMULX */ gen_helper_advsimd_mulxh(tcg_res, tcg_op1, tcg_op2, fpst); @@ -12235,11 +12235,9 @@ static void disas_simd_two_reg_misc_fp16(DisasCont= ext *s, uint32_t insn) } =20 if (is_scalar) { - TCGv_i32 tcg_op =3D tcg_temp_new_i32(); + TCGv_i32 tcg_op =3D read_fp_hreg(s, rn); TCGv_i32 tcg_res =3D tcg_temp_new_i32(); =20 - read_vec_element_i32(s, tcg_op, rn, 0, MO_16); - switch (fpop) { case 0x1a: /* FCVTNS */ case 0x1b: /* FCVTMS */ --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393922403437.0935160730007; Tue, 15 May 2018 07:18:42 -0700 (PDT) Received: from localhost ([::1]:40075 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIamn-0004NR-Cc for importer@patchew.org; Tue, 15 May 2018 10:18:41 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39552) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabl-0003pb-06 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabj-0002rK-T9 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:16 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41684) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabj-0002qc-LX for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:15 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabi-0001R2-Ou for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:14 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:00 +0100 Message-Id: <20180515140707.15957-10-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 09/16] target/arm: Implement FP data-processing (2 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson We missed all of the scalar fp16 binary operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-7-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 65 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 65 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 78f12daaf6..66607668ce 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5299,6 +5299,61 @@ static void handle_fp_2src_double(DisasContext *s, i= nt opcode, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (2 source) - half precision */ +static void handle_fp_2src_half(DisasContext *s, int opcode, + int rd, int rn, int rm) +{ + TCGv_i32 tcg_op1; + TCGv_i32 tcg_op2; + TCGv_i32 tcg_res; + TCGv_ptr fpst; + + tcg_res =3D tcg_temp_new_i32(); + fpst =3D get_fpstatus_ptr(true); + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + + switch (opcode) { + case 0x0: /* FMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x1: /* FDIV */ + gen_helper_advsimd_divh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x2: /* FADD */ + gen_helper_advsimd_addh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x3: /* FSUB */ + gen_helper_advsimd_subh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x4: /* FMAX */ + gen_helper_advsimd_maxh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x5: /* FMIN */ + gen_helper_advsimd_minh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x6: /* FMAXNM */ + gen_helper_advsimd_maxnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x7: /* FMINNM */ + gen_helper_advsimd_minnumh(tcg_res, tcg_op1, tcg_op2, fpst); + break; + case 0x8: /* FNMUL */ + gen_helper_advsimd_mulh(tcg_res, tcg_op1, tcg_op2, fpst); + tcg_gen_xori_i32(tcg_res, tcg_res, 0x8000); + break; + default: + g_assert_not_reached(); + } + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (2 source) * 31 30 29 28 24 23 22 21 20 16 15 12 11 10 9 5 4 0 * +---+---+---+-----------+------+---+------+--------+-----+------+------+ @@ -5331,6 +5386,16 @@ static void disas_fp_2src(DisasContext *s, uint32_t = insn) } handle_fp_2src_double(s, opcode, rd, rn, rm); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_2src_half(s, opcode, rd, rn, rm); + break; default: unallocated_encoding(s); } --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393379989389.2762189766747; Tue, 15 May 2018 07:09:39 -0700 (PDT) Received: from localhost ([::1]:39968 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIae0-0005A7-Tq for importer@patchew.org; Tue, 15 May 2018 10:09:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39642) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabo-0003rh-VW for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabk-0002sR-Ru for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:20 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41684) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabk-0002qc-Ju for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:16 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabj-0001RH-EA for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:15 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:01 +0100 Message-Id: <20180515140707.15957-11-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 10/16] target/arm: Implement FP data-processing (3 source) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Richard Henderson We missed all of the scalar fp16 fma operations. Cc: qemu-stable@nongnu.org Reviewed-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-8-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 48 ++++++++++++++++++++++++++++++++++++++ 1 file changed, 48 insertions(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 66607668ce..a79c09eda2 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5477,6 +5477,44 @@ static void handle_fp_3src_double(DisasContext *s, b= ool o0, bool o1, tcg_temp_free_i64(tcg_res); } =20 +/* Floating-point data-processing (3 source) - half precision */ +static void handle_fp_3src_half(DisasContext *s, bool o0, bool o1, + int rd, int rn, int rm, int ra) +{ + TCGv_i32 tcg_op1, tcg_op2, tcg_op3; + TCGv_i32 tcg_res =3D tcg_temp_new_i32(); + TCGv_ptr fpst =3D get_fpstatus_ptr(true); + + tcg_op1 =3D read_fp_hreg(s, rn); + tcg_op2 =3D read_fp_hreg(s, rm); + tcg_op3 =3D read_fp_hreg(s, ra); + + /* These are fused multiply-add, and must be done as one + * floating point operation with no rounding between the + * multiplication and addition steps. + * NB that doing the negations here as separate steps is + * correct : an input NaN should come out with its sign bit + * flipped if it is a negated-input. + */ + if (o1 =3D=3D true) { + tcg_gen_xori_i32(tcg_op3, tcg_op3, 0x8000); + } + + if (o0 !=3D o1) { + tcg_gen_xori_i32(tcg_op1, tcg_op1, 0x8000); + } + + gen_helper_advsimd_muladdh(tcg_res, tcg_op1, tcg_op2, tcg_op3, fpst); + + write_fp_sreg(s, rd, tcg_res); + + tcg_temp_free_ptr(fpst); + tcg_temp_free_i32(tcg_op1); + tcg_temp_free_i32(tcg_op2); + tcg_temp_free_i32(tcg_op3); + tcg_temp_free_i32(tcg_res); +} + /* Floating point data-processing (3 source) * 31 30 29 28 24 23 22 21 20 16 15 14 10 9 5 4 0 * +---+---+---+-----------+------+----+------+----+------+------+------+ @@ -5506,6 +5544,16 @@ static void disas_fp_3src(DisasContext *s, uint32_t = insn) } handle_fp_3src_double(s, o0, o1, rd, rn, rm, ra); break; + case 3: + if (!arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + unallocated_encoding(s); + return; + } + if (!fp_access_check(s)) { + return; + } + handle_fp_3src_half(s, o0, o1, rd, rn, rm, ra); + break; default: unallocated_encoding(s); } --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393910866353.78207189402747; Tue, 15 May 2018 07:18:30 -0700 (PDT) Received: from localhost ([::1]:40074 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIamb-0004Ht-Uu for importer@patchew.org; Tue, 15 May 2018 10:18:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39674) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabr-0003t2-Rj for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabl-0002t6-BR for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:23 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41686) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabl-0002rr-1S for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:17 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabk-0001Rv-4X for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:16 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:02 +0100 Message-Id: <20180515140707.15957-12-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 11/16] target/arm: Implement FCMP for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e These where missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Message-id: 20180512003217.9105-9-richard.henderson@linaro.org [rth: Diagnose lack of FP16 before fp_access_check] Signed-off-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/helper-a64.h | 2 + target/arm/helper-a64.c | 10 +++++ target/arm/translate-a64.c | 88 ++++++++++++++++++++++++++++++-------- 3 files changed, 83 insertions(+), 17 deletions(-) diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h index b8028ac98c..9d3a907049 100644 --- a/target/arm/helper-a64.h +++ b/target/arm/helper-a64.h @@ -19,6 +19,8 @@ DEF_HELPER_FLAGS_2(udiv64, TCG_CALL_NO_RWG_SE, i64, i64, i64) DEF_HELPER_FLAGS_2(sdiv64, TCG_CALL_NO_RWG_SE, s64, s64, s64) DEF_HELPER_FLAGS_1(rbit64, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_3(vfp_cmph_a64, i64, f16, f16, ptr) +DEF_HELPER_3(vfp_cmpeh_a64, i64, f16, f16, ptr) DEF_HELPER_3(vfp_cmps_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpes_a64, i64, f32, f32, ptr) DEF_HELPER_3(vfp_cmpd_a64, i64, f64, f64, ptr) diff --git a/target/arm/helper-a64.c b/target/arm/helper-a64.c index 549ed3513e..4f8034c513 100644 --- a/target/arm/helper-a64.c +++ b/target/arm/helper-a64.c @@ -85,6 +85,16 @@ static inline uint32_t float_rel_to_flags(int res) return flags; } =20 +uint64_t HELPER(vfp_cmph_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare_quiet(x, y, fp_status)); +} + +uint64_t HELPER(vfp_cmpeh_a64)(float16 x, float16 y, void *fp_status) +{ + return float_rel_to_flags(float16_compare(x, y, fp_status)); +} + uint64_t HELPER(vfp_cmps_a64)(float32 x, float32 y, void *fp_status) { return float_rel_to_flags(float32_compare_quiet(x, y, fp_status)); diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index a79c09eda2..c078a54fa5 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4712,14 +4712,14 @@ static void disas_data_proc_reg(DisasContext *s, ui= nt32_t insn) } } =20 -static void handle_fp_compare(DisasContext *s, bool is_double, +static void handle_fp_compare(DisasContext *s, int size, unsigned int rn, unsigned int rm, bool cmp_with_zero, bool signal_all_nans) { TCGv_i64 tcg_flags =3D tcg_temp_new_i64(); - TCGv_ptr fpst =3D get_fpstatus_ptr(false); + TCGv_ptr fpst =3D get_fpstatus_ptr(size =3D=3D MO_16); =20 - if (is_double) { + if (size =3D=3D MO_64) { TCGv_i64 tcg_vn, tcg_vm; =20 tcg_vn =3D read_fp_dreg(s, rn); @@ -4736,19 +4736,35 @@ static void handle_fp_compare(DisasContext *s, bool= is_double, tcg_temp_free_i64(tcg_vn); tcg_temp_free_i64(tcg_vm); } else { - TCGv_i32 tcg_vn, tcg_vm; + TCGv_i32 tcg_vn =3D tcg_temp_new_i32(); + TCGv_i32 tcg_vm =3D tcg_temp_new_i32(); =20 - tcg_vn =3D read_fp_sreg(s, rn); + read_vec_element_i32(s, tcg_vn, rn, 0, size); if (cmp_with_zero) { - tcg_vm =3D tcg_const_i32(0); + tcg_gen_movi_i32(tcg_vm, 0); } else { - tcg_vm =3D read_fp_sreg(s, rm); + read_vec_element_i32(s, tcg_vm, rm, 0, size); } - if (signal_all_nans) { - gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); - } else { - gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + + switch (size) { + case MO_32: + if (signal_all_nans) { + gen_helper_vfp_cmpes_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmps_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + case MO_16: + if (signal_all_nans) { + gen_helper_vfp_cmpeh_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } else { + gen_helper_vfp_cmph_a64(tcg_flags, tcg_vn, tcg_vm, fpst); + } + break; + default: + g_assert_not_reached(); } + tcg_temp_free_i32(tcg_vn); tcg_temp_free_i32(tcg_vm); } @@ -4769,16 +4785,35 @@ static void handle_fp_compare(DisasContext *s, bool= is_double, static void disas_fp_compare(DisasContext *s, uint32_t insn) { unsigned int mos, type, rm, op, rn, opc, op2r; + int size; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); op =3D extract32(insn, 14, 2); rn =3D extract32(insn, 5, 5); opc =3D extract32(insn, 3, 2); op2r =3D extract32(insn, 0, 3); =20 - if (mos || op || op2r || type > 1) { + if (mos || op || op2r) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size =3D MO_32; + break; + case 1: + size =3D MO_64; + break; + case 3: + size =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4787,7 +4822,7 @@ static void disas_fp_compare(DisasContext *s, uint32_= t insn) return; } =20 - handle_fp_compare(s, type, rn, rm, opc & 1, opc & 2); + handle_fp_compare(s, size, rn, rm, opc & 1, opc & 2); } =20 /* Floating point conditional compare @@ -4801,16 +4836,35 @@ static void disas_fp_ccomp(DisasContext *s, uint32_= t insn) unsigned int mos, type, rm, cond, rn, op, nzcv; TCGv_i64 tcg_flags; TCGLabel *label_continue =3D NULL; + int size; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); cond =3D extract32(insn, 12, 4); rn =3D extract32(insn, 5, 5); op =3D extract32(insn, 4, 1); nzcv =3D extract32(insn, 0, 4); =20 - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + size =3D MO_32; + break; + case 1: + size =3D MO_64; + break; + case 3: + size =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4831,7 +4885,7 @@ static void disas_fp_ccomp(DisasContext *s, uint32_t = insn) gen_set_label(label_match); } =20 - handle_fp_compare(s, type, rn, rm, false, op); + handle_fp_compare(s, size, rn, rm, false, op); =20 if (cond < 0x0e) { gen_set_label(label_continue); --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393557272319.68212109083186; Tue, 15 May 2018 07:12:37 -0700 (PDT) Received: from localhost ([::1]:39985 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIagu-0007jf-AB for importer@patchew.org; Tue, 15 May 2018 10:12:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39665) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabr-0003sz-4J for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabm-0002ub-9L for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:23 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41686) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabm-0002rr-2T for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:18 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabk-0001SC-Pf for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:16 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:03 +0100 Message-Id: <20180515140707.15957-13-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 12/16] target/arm: Implement FCSEL for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e These were missed out from the rest of the half-precision work. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Message-id: 20180512003217.9105-10-richard.henderson@linaro.org [rth: Fix erroneous check vs type] Signed-off-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 31 +++++++++++++++++++++++++------ 1 file changed, 25 insertions(+), 6 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index c078a54fa5..9dacb583ae 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4903,15 +4903,34 @@ static void disas_fp_csel(DisasContext *s, uint32_t= insn) unsigned int mos, type, rm, cond, rn, rd; TCGv_i64 t_true, t_false, t_zero; DisasCompare64 c; + TCGMemOp sz; =20 mos =3D extract32(insn, 29, 3); - type =3D extract32(insn, 22, 2); /* 0 =3D single, 1 =3D double */ + type =3D extract32(insn, 22, 2); rm =3D extract32(insn, 16, 5); cond =3D extract32(insn, 12, 4); rn =3D extract32(insn, 5, 5); rd =3D extract32(insn, 0, 5); =20 - if (mos || type > 1) { + if (mos) { + unallocated_encoding(s); + return; + } + + switch (type) { + case 0: + sz =3D MO_32; + break; + case 1: + sz =3D MO_64; + break; + case 3: + sz =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -4920,11 +4939,11 @@ static void disas_fp_csel(DisasContext *s, uint32_t= insn) return; } =20 - /* Zero extend sreg inputs to 64 bits now. */ + /* Zero extend sreg & hreg inputs to 64 bits now. */ t_true =3D tcg_temp_new_i64(); t_false =3D tcg_temp_new_i64(); - read_vec_element(s, t_true, rn, 0, type ? MO_64 : MO_32); - read_vec_element(s, t_false, rm, 0, type ? MO_64 : MO_32); + read_vec_element(s, t_true, rn, 0, sz); + read_vec_element(s, t_false, rm, 0, sz); =20 a64_test_cc(&c, cond); t_zero =3D tcg_const_i64(0); @@ -4933,7 +4952,7 @@ static void disas_fp_csel(DisasContext *s, uint32_t i= nsn) tcg_temp_free_i64(t_false); a64_free_cc(&c); =20 - /* Note that sregs write back zeros to the high bits, + /* Note that sregs & hregs write back zeros to the high bits, and we've already done the zero-extension. */ write_fp_dreg(s, rd, t_true); tcg_temp_free_i64(t_true); --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526394188006504.78930378557163; Tue, 15 May 2018 07:23:08 -0700 (PDT) Received: from localhost ([::1]:40162 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIar5-00086Z-3S for importer@patchew.org; Tue, 15 May 2018 10:23:07 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39679) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabs-0003t3-Jj for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabm-0002vo-J3 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:24 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41688) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabm-0002tn-Cc for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:18 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabl-0001So-HV for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:17 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:04 +0100 Message-Id: <20180515140707.15957-14-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 13/16] target/arm: Implement FMOV (immediate) for fp16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e All the hard work is already done by vfp_expand_imm, we just need to make sure we pick up the correct size. Cc: qemu-stable@nongnu.org Reviewed-by: Peter Maydell Signed-off-by: Alex Benn=C3=A9e Tested-by: Alex Benn=C3=A9e Signed-off-by: Richard Henderson Message-id: 20180512003217.9105-11-richard.henderson@linaro.org [rth: Merge unallocated_encoding check with TCGMemOp conversion.] Signed-off-by: Richard Henderson Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 20 +++++++++++++++++--- 1 file changed, 17 insertions(+), 3 deletions(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 9dacb583ae..35997969b4 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -5674,11 +5674,25 @@ static void disas_fp_imm(DisasContext *s, uint32_t = insn) { int rd =3D extract32(insn, 0, 5); int imm8 =3D extract32(insn, 13, 8); - int is_double =3D extract32(insn, 22, 2); + int type =3D extract32(insn, 22, 2); uint64_t imm; TCGv_i64 tcg_res; + TCGMemOp sz; =20 - if (is_double > 1) { + switch (type) { + case 0: + sz =3D MO_32; + break; + case 1: + sz =3D MO_64; + break; + case 3: + sz =3D MO_16; + if (arm_dc_feature(s, ARM_FEATURE_V8_FP16)) { + break; + } + /* fallthru */ + default: unallocated_encoding(s); return; } @@ -5687,7 +5701,7 @@ static void disas_fp_imm(DisasContext *s, uint32_t in= sn) return; } =20 - imm =3D vfp_expand_imm(MO_32 + is_double, imm8); + imm =3D vfp_expand_imm(sz, imm8); =20 tcg_res =3D tcg_const_i64(imm); write_fp_dreg(s, rd, tcg_res); --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526394120014324.7372828555481; Tue, 15 May 2018 07:22:00 -0700 (PDT) Received: from localhost ([::1]:40160 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIapy-0007Fl-Tt for importer@patchew.org; Tue, 15 May 2018 10:21:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39690) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabt-0003tv-Ba for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabn-0002x4-DW for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:25 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41688) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabn-0002tn-6y for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:19 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabm-0001T5-6i for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:18 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:05 +0100 Message-Id: <20180515140707.15957-15-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 14/16] target/arm: Fix sqrt_f16 exception raising X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Alex Benn=C3=A9e We are meant to explicitly pass fpst, not cpu_env. Cc: qemu-stable@nongnu.org Signed-off-by: Alex Benn=C3=A9e Reviewed-by: Richard Henderson Signed-off-by: Richard Henderson Tested-by: Alex Benn=C3=A9e Message-id: 20180512003217.9105-12-richard.henderson@linaro.org Signed-off-by: Peter Maydell --- target/arm/translate-a64.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 35997969b4..a0b0c43d12 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4976,7 +4976,8 @@ static void handle_fp_1src_half(DisasContext *s, int = opcode, int rd, int rn) tcg_gen_xori_i32(tcg_res, tcg_op, 0x8000); break; case 0x3: /* FSQRT */ - gen_helper_sqrt_f16(tcg_res, tcg_op, cpu_env); + fpst =3D get_fpstatus_ptr(true); + gen_helper_sqrt_f16(tcg_res, tcg_op, fpst); break; case 0x8: /* FRINTN */ case 0x9: /* FRINTP */ --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393557553784.6662705174278; Tue, 15 May 2018 07:12:37 -0700 (PDT) Received: from localhost ([::1]:39986 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIagu-0007lw-J2 for importer@patchew.org; Tue, 15 May 2018 10:12:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39698) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabt-0003uW-Tb for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabn-0002y4-VI for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:25 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41690) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabn-0002wj-Ow for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:19 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabm-0001Tk-St for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:18 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:06 +0100 Message-Id: <20180515140707.15957-16-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 15/16] sdcard: Correct CRC16 offset in sd_function_switch() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: Philippe Mathieu-Daud=C3=A9 Per the Physical Layer Simplified Spec. "4.3.10.4 Switch Function Status": The block length is predefined to 512 bits and "4.10.2 SD Status": The SD Status contains status bits that are related to the SD Memory Card proprietary features and may be used for future application-specific usag= e. The size of the SD Status is one data block of 512 bit. The content of th= is register is transmitted to the Host over the DAT bus along with a 16-bit = CRC. Thus the 16-bit CRC goes at offset 64. Signed-off-by: Philippe Mathieu-Daud=C3=A9 Message-id: 20180509060104.4458-3-f4bug@amsat.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/sd/sd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/sd/sd.c b/hw/sd/sd.c index 235e0518d6..7af19fa06c 100644 --- a/hw/sd/sd.c +++ b/hw/sd/sd.c @@ -787,7 +787,7 @@ static void sd_function_switch(SDState *sd, uint32_t ar= g) sd->data[14 + (i >> 1)] =3D new_func << ((i * 4) & 4); } memset(&sd->data[17], 0, 47); - stw_be_p(sd->data + 65, sd_crc16(sd->data, 64)); + stw_be_p(sd->data + 64, sd_crc16(sd->data, 64)); } =20 static inline bool sd_wp_addr(SDState *sd, uint64_t addr) --=20 2.17.0 From nobody Tue Apr 23 19:08:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; dmarc=fail(p=none dis=none) header.from=linaro.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1526393928897677.0638295506841; Tue, 15 May 2018 07:18:48 -0700 (PDT) Received: from localhost ([::1]:40076 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIamu-0004Vg-1S for importer@patchew.org; Tue, 15 May 2018 10:18:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39683) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fIabs-0003tB-TN for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:30 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fIabo-0002zl-Rg for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:24 -0400 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:41690) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fIabo-0002wj-L2 for qemu-devel@nongnu.org; Tue, 15 May 2018 10:07:20 -0400 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1fIabn-0001UC-Jy for qemu-devel@nongnu.org; Tue, 15 May 2018 15:07:19 +0100 From: Peter Maydell To: qemu-devel@nongnu.org Date: Tue, 15 May 2018 15:07:07 +0100 Message-Id: <20180515140707.15957-17-peter.maydell@linaro.org> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180515140707.15957-1-peter.maydell@linaro.org> References: <20180515140707.15957-1-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 16/16] tcg: Optionally log FPU state in TCG -d cpu logging X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Usually the logging of the CPU state produced by -d cpu is sufficient to diagnose problems, but sometimes you want to see the state of the floating point registers as well. We don't want to enable that by default as it adds a lot of extra data to the log; instead, allow it to be optionally enabled via -d fpu. Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson Message-id: 20180510130024.31678-1-peter.maydell@linaro.org --- include/qemu/log.h | 1 + accel/tcg/cpu-exec.c | 9 ++++++--- util/log.c | 2 ++ 3 files changed, 9 insertions(+), 3 deletions(-) diff --git a/include/qemu/log.h b/include/qemu/log.h index ff92a8b86a..b097a6cae1 100644 --- a/include/qemu/log.h +++ b/include/qemu/log.h @@ -44,6 +44,7 @@ static inline bool qemu_log_separate(void) #define CPU_LOG_PAGE (1 << 14) /* LOG_TRACE (1 << 15) is defined in log-for-trace.h */ #define CPU_LOG_TB_OP_IND (1 << 16) +#define CPU_LOG_TB_FPU (1 << 17) =20 /* Lock output for a series of related logs. Since this is not needed * for a single qemu_log / qemu_log_mask / qemu_log_mask_and_addr, we diff --git a/accel/tcg/cpu-exec.c b/accel/tcg/cpu-exec.c index 81153e7a13..0b154cc678 100644 --- a/accel/tcg/cpu-exec.c +++ b/accel/tcg/cpu-exec.c @@ -156,11 +156,14 @@ static inline tcg_target_ulong cpu_tb_exec(CPUState *= cpu, TranslationBlock *itb) if (qemu_loglevel_mask(CPU_LOG_TB_CPU) && qemu_log_in_addr_range(itb->pc)) { qemu_log_lock(); + int flags =3D 0; + if (qemu_loglevel_mask(CPU_LOG_TB_FPU)) { + flags |=3D CPU_DUMP_FPU; + } #if defined(TARGET_I386) - log_cpu_state(cpu, CPU_DUMP_CCOP); -#else - log_cpu_state(cpu, 0); + flags |=3D CPU_DUMP_CCOP; #endif + log_cpu_state(cpu, flags); qemu_log_unlock(); } #endif /* DEBUG_DISAS */ diff --git a/util/log.c b/util/log.c index 96f30dd21a..c0dbbd4700 100644 --- a/util/log.c +++ b/util/log.c @@ -256,6 +256,8 @@ const QEMULogItem qemu_log_items[] =3D { "show trace before each executed TB (lots of logs)" }, { CPU_LOG_TB_CPU, "cpu", "show CPU registers before entering a TB (lots of logs)" }, + { CPU_LOG_TB_FPU, "fpu", + "include FPU registers in the 'cpu' logging" }, { CPU_LOG_MMU, "mmu", "log MMU-related activities" }, { CPU_LOG_PCALL, "pcall", --=20 2.17.0