From nobody Sun Apr 28 04:59:42 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525338452003787.9486793998576; Thu, 3 May 2018 02:07:32 -0700 (PDT) Received: from localhost ([::1]:54770 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fEACz-0002w9-Uf for importer@patchew.org; Thu, 03 May 2018 05:07:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51646) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fEABV-0002BY-7o for qemu-devel@nongnu.org; Thu, 03 May 2018 05:05:55 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fEABT-0008QJ-Q6 for qemu-devel@nongnu.org; Thu, 03 May 2018 05:05:53 -0400 Received: from mail-pg0-x243.google.com ([2607:f8b0:400e:c05::243]:42330) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fEABT-0008Q0-Ha; Thu, 03 May 2018 05:05:51 -0400 Received: by mail-pg0-x243.google.com with SMTP id p9-v6so9759591pgc.9; Thu, 03 May 2018 02:05:51 -0700 (PDT) Received: from aurora.jms.id.au ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id u4sm23749464pfh.120.2018.05.03.02.05.46 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 May 2018 02:05:49 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 03 May 2018 18:35:43 +0930 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=QfcGtYvdh1LP6fHXF5WhI0n8ih4lHWIN75xGGwPHdjg=; b=LUJAE5mZ2rBO2mzV4nJLSJ2SQD9+bvZx28s4lovl/19SALkPJiL91zyWlIStEy5eNX ZSVSAzyvyz2JeptekHj2WPjk7mCbfr/kWdC71IYZ5KZPaTqW2nuR/kGdYiwXDNR8TLhb nHo8n/x7eKRiwsuXR3ruR8LpgAzez9Q48gdSvv7hMo/dzlRk9fft2BJjpPWHRkDozMCh PA4GASJLIeeOrcy1I3kW1jVv6ZPUwseaNQPhTyfvgcN+5k1vkOUaKyBeAyKv/dIe9PYk 0KoHJ0nKxhrCBGW5KjwdmW5zSXNojNKyCJ27s0SYxzItoQCzakn+Ty1j2TL8h6LDtUuj IhvQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=QfcGtYvdh1LP6fHXF5WhI0n8ih4lHWIN75xGGwPHdjg=; b=rbbbkmfi/IIx/etOZQIs2uGyTAFbQ0OrD/WKsjvc8z8y3uQYeRhU9GngFVZQuYcyyY 52ggblFKmYkVOH3SqSoS5JOlKv+ZouSFQxLdrQYcG9gT2jUTMSkC5Ud4x9f4fipscxL5 XGbB7ORmLxp7JepFA7upCBB6AIE8b/huLgddCr29fz1860jl0pXwH4kJ0ZPcnhZcW89s nc4q7P209dKKUrLSL5uS25/FhAi+1ViY+74Oa0HCH6KFuAUs2iS0/JCOsTHzyalI7gaY HazQNn+PFntZ0EsD4eDxdgkLSq05Hz9j3PwjElSq9b7mOKbbzazcCjZHrFWxtGQO7ktV LybA== X-Gm-Message-State: ALQs6tDemm0b5Ih/nhIPvNMOJGg+29/EDCvwDkOuRyKb8cA/YO9WYJdu j7z8AEITU/cfQNcOZF3GmHc= X-Google-Smtp-Source: AB8JxZqN+Kd9Ya8gsJX/i3y+p1UrA8bTa87bQdOfeTiUGOKH2MHQdOoxA/kUy3zo2CEDN+LNTJAdgg== X-Received: by 10.167.134.20 with SMTP id p20mr22348503pfn.159.1525338350504; Thu, 03 May 2018 02:05:50 -0700 (PDT) From: Joel Stanley To: Peter Maydell Date: Thu, 3 May 2018 18:35:31 +0930 Message-Id: <20180503090532.3113-2-joel@jms.id.au> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180503090532.3113-1-joel@jms.id.au> References: <20180503090532.3113-1-joel@jms.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::243 Subject: [Qemu-devel] [PATCH 1/2] arm: Add Nordic Semiconductor nRF51 SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , Stefan Hajnoczi , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Jim Mussared Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The nRF51 is a Cortex-M0 microcontroller with an on-board radio module, plus other common ARM SoC peripherals. http://infocenter.nordicsemi.com/pdf/nRF51_RM_v3.0.pdf This defines a basic model of the CPU and memory, with no peripherals implemented at this stage. Signed-off-by: Joel Stanley --- default-configs/arm-softmmu.mak | 1 + hw/arm/Makefile.objs | 1 + hw/arm/nrf51_soc.c | 101 ++++++++++++++++++++++++++++++++ include/hw/arm/nrf51_soc.h | 31 ++++++++++ 4 files changed, 134 insertions(+) create mode 100644 hw/arm/nrf51_soc.c create mode 100644 include/hw/arm/nrf51_soc.h diff --git a/default-configs/arm-softmmu.mak b/default-configs/arm-softmmu.= mak index dd29e741c221..543ea965dae0 100644 --- a/default-configs/arm-softmmu.mak +++ b/default-configs/arm-softmmu.mak @@ -99,6 +99,7 @@ CONFIG_STM32F2XX_SYSCFG=3Dy CONFIG_STM32F2XX_ADC=3Dy CONFIG_STM32F2XX_SPI=3Dy CONFIG_STM32F205_SOC=3Dy +CONFIG_NRF51_SOC=3Dy =20 CONFIG_CMSDK_APB_TIMER=3Dy CONFIG_CMSDK_APB_UART=3Dy diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 2885e3e2340b..1d7211850454 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -35,3 +35,4 @@ obj-$(CONFIG_MPS2) +=3D mps2-tz.o obj-$(CONFIG_MSF2) +=3D msf2-soc.o msf2-som.o obj-$(CONFIG_IOTKIT) +=3D iotkit.o obj-$(CONFIG_FSL_IMX7) +=3D fsl-imx7.o mcimx7d-sabre.o +obj-$(CONFIG_NRF51_SOC) +=3D nrf51_soc.o diff --git a/hw/arm/nrf51_soc.c b/hw/arm/nrf51_soc.c new file mode 100644 index 000000000000..a2e3d6f013f0 --- /dev/null +++ b/hw/arm/nrf51_soc.c @@ -0,0 +1,101 @@ +/* + * Nordic Semiconductor nRF51 SoC + * + * Copyright 2018 Joel Stanley + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu-common.h" +#include "hw/arm/arm.h" +#include "hw/sysbus.h" +#include "hw/boards.h" +#include "hw/devices.h" +#include "hw/misc/unimp.h" +#include "exec/address-spaces.h" +#include "sysemu/sysemu.h" +#include "qemu/log.h" +#include "cpu.h" + +#include "hw/arm/nrf51_soc.h" + +#define IOMEM_BASE 0x40000000 +#define IOMEM_SIZE 0x20000000 + +#define FLASH_BASE 0x00000000 +#define FLASH_SIZE (144 * 1024) + +#define SRAM_BASE 0x20000000 +#define SRAM_SIZE (6 * 1024) + +static void nrf51_soc_realize(DeviceState *dev_soc, Error **errp) +{ + NRF51State *s =3D NRF51_SOC(dev_soc); + DeviceState *nvic; + Error *err =3D NULL; + + /* IO space */ + create_unimplemented_device("nrf51_soc.io", IOMEM_BASE, IOMEM_SIZE); + + /* FICR */ + create_unimplemented_device("nrf51_soc.ficr", FICR_BASE, FICR_SIZE); + + MemoryRegion *system_memory =3D get_system_memory(); + MemoryRegion *sram =3D g_new(MemoryRegion, 1); + MemoryRegion *flash =3D g_new(MemoryRegion, 1); + + memory_region_init_ram_nomigrate(flash, NULL, "nrf51.flash", FLASH_SIZ= E, + &err); + if (err) { + error_propagate(errp, err); + return; + } + + vmstate_register_ram_global(flash); + memory_region_set_readonly(flash, true); + + memory_region_add_subregion(system_memory, FLASH_BASE, flash); + + memory_region_init_ram_nomigrate(sram, NULL, "nrf51.sram", SRAM_SIZE, + &err); + if (err) { + error_propagate(errp, err); + return; + } + vmstate_register_ram_global(sram); + memory_region_add_subregion(system_memory, SRAM_BASE, sram); + + /* TODO: implement a cortex m0 and update this */ + nvic =3D armv7m_init(get_system_memory(), FLASH_SIZE, 96, + s->kernel_filename, ARM_CPU_TYPE_NAME("cortex-m3")); +} + +static Property nrf51_soc_properties[] =3D { + DEFINE_PROP_STRING("kernel-filename", NRF51State, kernel_filename), + DEFINE_PROP_END_OF_LIST(), +}; + +static void nrf51_soc_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + + dc->realize =3D nrf51_soc_realize; + dc->props =3D nrf51_soc_properties; +} + +static const TypeInfo nrf51_soc_info =3D { + .name =3D TYPE_NRF51_SOC, + .parent =3D TYPE_SYS_BUS_DEVICE, + .instance_size =3D sizeof(NRF51State), + .class_init =3D nrf51_soc_class_init, +}; + +static void nrf51_soc_types(void) +{ + type_register_static(&nrf51_soc_info); +} +type_init(nrf51_soc_types) + diff --git a/include/hw/arm/nrf51_soc.h b/include/hw/arm/nrf51_soc.h new file mode 100644 index 000000000000..422224bf1b0a --- /dev/null +++ b/include/hw/arm/nrf51_soc.h @@ -0,0 +1,31 @@ +/* + * Nordic Semiconductor nRF51 SoC + * + * Copyright 2018 Joel Stanley + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#ifndef NRF51_SOC_H +#define NRF51_SOC_H + +#include "qemu/osdep.h" +#include "hw/sysbus.h" + +#define TYPE_NRF51_SOC "nrf51-soc" +#define NRF51_SOC(obj) \ + OBJECT_CHECK(NRF51State, (obj), TYPE_NRF51_SOC) + +typedef struct NRF51State { + /*< private >*/ + SysBusDevice parent_obj; + + /*< public >*/ + char *kernel_filename; + + MemoryRegion iomem; +} NRF51State; + +#endif + --=20 2.17.0 From nobody Sun Apr 28 04:59:42 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1525338532924827.9388111378614; Thu, 3 May 2018 02:08:52 -0700 (PDT) Received: from localhost ([::1]:54778 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fEAEO-0003st-5e for importer@patchew.org; Thu, 03 May 2018 05:08:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51680) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fEABc-0002Gt-P0 for qemu-devel@nongnu.org; Thu, 03 May 2018 05:06:03 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fEABb-0008Rp-N6 for qemu-devel@nongnu.org; Thu, 03 May 2018 05:06:00 -0400 Received: from mail-pg0-x241.google.com ([2607:f8b0:400e:c05::241]:39184) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1fEABb-0008Rf-Gq; Thu, 03 May 2018 05:05:59 -0400 Received: by mail-pg0-x241.google.com with SMTP id e1-v6so1320678pga.6; Thu, 03 May 2018 02:05:59 -0700 (PDT) Received: from aurora.jms.id.au ([45.124.203.19]) by smtp.gmail.com with ESMTPSA id b3sm25504874pff.11.2018.05.03.02.05.54 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 03 May 2018 02:05:57 -0700 (PDT) Received: by aurora.jms.id.au (sSMTP sendmail emulation); Thu, 03 May 2018 18:35:51 +0930 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=sYa76pQcrvBDR660MIUVnEbn3J1tHKaClZMtIOYr9E8=; b=Xj/ss6ByLFb/qYWnaw3MtMUnWveEih6UdiMTb3IMQnQUqr+QAkU9vYN7vSEGILN36a 7C0/GSPCOhIPyU5JSFXI9+/jakADayTuSZ3ozgPaHgKNwCQXhnAf0jKBseAWJ249q8NB al0r0HOTAYbtucF0ZpLOOh0mxQshR86nAHdp7ylu2tch6zpyQ0b5Any9kUU6Rt8Yhebr rCZPN5XNeM0DEBm/k07nxfP6nKz9V6Hu+u3MVJ9vza5MAws74cNbuzhbvY3bOOs26Ksg AKPdrWytBqCsqtxBuM+Vm5qelxv9HDihlH8o5CM26i0cXeuD4D8jOiMBO68A8w5EDQDR viuQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=sYa76pQcrvBDR660MIUVnEbn3J1tHKaClZMtIOYr9E8=; b=KTce/HZbH1oYwGtxiJ0KkSYUAopnKenwkKX4s7SQqmBmtvsYmXBsQV/j39vMNcFsH4 uMQWouElVXRd178Wq3mT6aGJcjuWyu/7EXPcw/ffCdfZ7MQEpDJpJDYj4ghnjtq3TFYM 377a2SsJCzf5aTRJSBgye8pZ8ZjkoJG75g0k2sX4ufucMbrwy9+TfTW3lwe2LbtO4w1A I8NGonF+nGl20oeNL6kf5L8MCK+OiaK7ohEaPVBi3+lad0Z5eRdpSN5dzC9I8w2LTowH 3NVE7YIAcERgibp7+cgULbeNg+VVWzLfw3SQrZnsIDMYxnTTiCeQdeBOM7tFDPK4Qf7t /9ZQ== X-Gm-Message-State: ALQs6tC6N2UfiZoMXbNfozN3usAFn/ks1PsuFczNFlHmKTiB2htdxbK8 WHZlBH3Zf6SRcFF3vjGGvBE= X-Google-Smtp-Source: AB8JxZqbFG4T1B61+ZD8PMts9qjTDZ9jcB7j9lvjnY7sHokskAmiDQYdVroFVVCqZoXfYEhKAVqN+w== X-Received: by 10.98.170.24 with SMTP id e24mr22158936pff.107.1525338358477; Thu, 03 May 2018 02:05:58 -0700 (PDT) From: Joel Stanley To: Peter Maydell Date: Thu, 3 May 2018 18:35:32 +0930 Message-Id: <20180503090532.3113-3-joel@jms.id.au> X-Mailer: git-send-email 2.17.0 In-Reply-To: <20180503090532.3113-1-joel@jms.id.au> References: <20180503090532.3113-1-joel@jms.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::241 Subject: [Qemu-devel] [PATCH 2/2] arm: Add BBC micro:bit machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Andrew Jeffery , Stefan Hajnoczi , qemu-arm@nongnu.org, qemu-devel@nongnu.org, Jim Mussared Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This adds the base for a machine model of the BBC micro:bit: https://en.wikipedia.org/wiki/Micro_Bit This is a system with a nRF51 SoC containing the main processor, with various peripherals on board. Signed-off-by: Joel Stanley --- hw/arm/Makefile.objs | 2 +- hw/arm/microbit.c | 33 +++++++++++++++++++++++++++++++++ 2 files changed, 34 insertions(+), 1 deletion(-) create mode 100644 hw/arm/microbit.c diff --git a/hw/arm/Makefile.objs b/hw/arm/Makefile.objs index 1d7211850454..c01e7a1e39fb 100644 --- a/hw/arm/Makefile.objs +++ b/hw/arm/Makefile.objs @@ -35,4 +35,4 @@ obj-$(CONFIG_MPS2) +=3D mps2-tz.o obj-$(CONFIG_MSF2) +=3D msf2-soc.o msf2-som.o obj-$(CONFIG_IOTKIT) +=3D iotkit.o obj-$(CONFIG_FSL_IMX7) +=3D fsl-imx7.o mcimx7d-sabre.o -obj-$(CONFIG_NRF51_SOC) +=3D nrf51_soc.o +obj-$(CONFIG_NRF51_SOC) +=3D nrf51_soc.o microbit.o diff --git a/hw/arm/microbit.c b/hw/arm/microbit.c new file mode 100644 index 000000000000..b61d0747fe56 --- /dev/null +++ b/hw/arm/microbit.c @@ -0,0 +1,33 @@ +/* + * BBC micro:bit machine + * + * Copyright 2018 Joel Stanley + * + * This code is licensed under the GPL version 2 or later. See + * the COPYING file in the top-level directory. + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "hw/boards.h" + +#include "hw/arm/nrf51_soc.h" + +static void microbit_init(MachineState *machine) +{ + DeviceState *dev; + + dev =3D qdev_create(NULL, TYPE_NRF51_SOC); + if (machine->kernel_filename) { + qdev_prop_set_string(dev, "kernel-filename", machine->kernel_filen= ame); + } + object_property_set_bool(OBJECT(dev), true, "realized", &error_fatal); +} + +static void microbit_machine_init(MachineClass *mc) +{ + mc->desc =3D "BBC micro:bit"; + mc->init =3D microbit_init; + mc->ignore_memory_transaction_failures =3D true; +} +DEFINE_MACHINE("microbit", microbit_machine_init); --=20 2.17.0