From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949602985573.9952391983954; Tue, 17 Apr 2018 00:20:02 -0700 (PDT) Received: from localhost ([::1]:47848 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8KuH-0004q9-QZ for importer@patchew.org; Tue, 17 Apr 2018 03:20:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57914) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Krr-0003QE-S7 for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:32 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krq-0008SY-7Z for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:31 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:42715) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krp-0008OK-LV; Tue, 17 Apr 2018 03:17:30 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm56cKTz9s1P; Tue, 17 Apr 2018 17:17:25 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949445; bh=7ZEj5zwgqTns2fVQaRyF0FPur7OoyCpQd/tP2zQ6Lc8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Lvjk2clz4inkk5bSwPIw24vgKCVvRxc5LsAn2DwSasV/7JRH8qeJ06MqrsCz17eFV x2LjHXdkabH0iDZw+HEoKJ7UrI23jPyttv+HW/4J/9ubTC44HCpZQGTRcugdiqP0u2 x1nPJUa3CwU5hHDEw5zryhh6HhE7UcrgwFEl1zRg= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:13 +1000 Message-Id: <20180417071722.9399-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH for-2.13 01/10] spapr: Avoid redundant calls to spapr_cpu_reset() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" af81cf323c1 "spapr: CPU hotplug support" added a direct call to spapr_cpu_reset() in spapr_cpu_init(), as well as registering it as a reset callback. That was in order to make sure that the reset function got called for a newly hotplugged cpu, which would miss the global machine reset. However, this change means that spapr_cpu_reset() gets called twice for normal cold-plugged cpus: once from spapr_cpu_init(), then again during the system reset. As well as being ugly in its redundancy, the first call happens before the machine reset calls have happened, which will cause problems for some things we're going to want to add. So, we remove the reset call from spapr_cpu_init(). We instead put an explicit reset call in the hotplug specific path. Signed-off-by: David Gibson --- hw/ppc/spapr.c | 6 ++++-- hw/ppc/spapr_cpu_core.c | 13 ++++++++++++- include/hw/ppc/spapr_cpu_core.h | 2 ++ 3 files changed, 18 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 7b2bc4e25d..81b50af3b5 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3370,9 +3370,11 @@ static void spapr_core_plug(HotplugHandler *hotplug_= dev, DeviceState *dev, =20 if (hotplugged) { /* - * Send hotplug notification interrupt to the guest only - * in case of hotplugged CPUs. + * For hotplugged CPUs, we need to reset them (they missed + * out on the system reset), and send the guest a + * notification */ + spapr_cpu_core_reset(core); spapr_hotplug_req_add_by_index(drc); } else { spapr_drc_reset(drc); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 94afeb399e..aa17626cda 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -70,7 +70,6 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, Powe= rPCCPU *cpu, cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr)); =20 qemu_register_reset(spapr_cpu_reset, cpu); - spapr_cpu_reset(cpu); } =20 /* @@ -208,6 +207,18 @@ err: error_propagate(errp, local_err); } =20 +void spapr_cpu_core_reset(sPAPRCPUCore *sc) +{ + CPUCore *cc =3D CPU_CORE(sc); + int i; + + for (i =3D 0; i < cc->nr_threads; i++) { + PowerPCCPU *cpu =3D sc->threads[i]; + + spapr_cpu_reset(cpu); + } +} + static Property spapr_cpu_core_properties[] =3D { DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NOD= E_ID), DEFINE_PROP_END_OF_LIST() diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 1129f344aa..1a38544706 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -38,4 +38,6 @@ typedef struct sPAPRCPUCoreClass { } sPAPRCPUCoreClass; =20 const char *spapr_get_cpu_core_type(const char *cpu_type); +void spapr_cpu_core_reset(sPAPRCPUCore *sc); + #endif --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949708321585.6148063071369; Tue, 17 Apr 2018 00:21:48 -0700 (PDT) Received: from localhost ([::1]:47862 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kvz-0006P5-Cr for importer@patchew.org; Tue, 17 Apr 2018 03:21:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57931) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Krt-0003RZ-Cs for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:35 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krq-0008Se-8a for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:33 -0400 Received: from ozlabs.org ([203.11.71.1]:54217) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krp-0008OM-DA; Tue, 17 Apr 2018 03:17:30 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm60sdCz9s1j; Tue, 17 Apr 2018 17:17:25 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949446; bh=lFCEwm8U3BYGnoJxqA3rKvynDxDJbqZ1ZsOeW6dB66E=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=FBvQoKL66o6bJu+EAVm7w3/lpWp3PQjPeNZgx1nUd0PpfmLTJ5r5Ks20b2+PQPlbF LOlvwzj+GKB6pVeeG3dFRbpF7rXxvdullSs5cZyHKybrzuFlh6sz3fv+dov1fBL4oq L22hqfR7JIihD99pHHPN5NO8qW9yJBV80VjedryA= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:14 +1000 Message-Id: <20180417071722.9399-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH for-2.13 02/10] spapr: Remove support for PowerPC 970 with pseries machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Current POWER cpus allow for a VRMA, a special mapping which describes a guest's view of memory when in real mode (MMU off, from the guest's point of view). Older cpus didn't have that which meant that to support a guest a special host-contiguous region of memory was needed to give the guest its Real Mode Area (RMA). This was useful in the early days of KVM on Power to allow it to be tested on PowerPC 970 chips as used in Macintosh G5 machines. Now, however, those machines are so old as to be irrelevant, and the host kernel has long since dropped support for this mode. It hasn't been tested in ages either. So, to simplify the code, drop the support from qemu as well. As well as the code for handling contiguous RMAs, we can remove some code to set the HIOR register, which existed on 970 but not on the current and supported CPUs. Signed-off-by: David Gibson --- hw/ppc/spapr.c | 61 +++++++++++++++------------------------------= ---- hw/ppc/spapr_cpu_core.c | 2 -- target/ppc/kvm.c | 36 ----------------------------- target/ppc/kvm_ppc.h | 6 ----- 4 files changed, 19 insertions(+), 86 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 81b50af3b5..fbb2c6752c 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -2376,9 +2376,6 @@ static void spapr_machine_init(MachineState *machine) int i; MemoryRegion *sysmem =3D get_system_memory(); MemoryRegion *ram =3D g_new(MemoryRegion, 1); - MemoryRegion *rma_region; - void *rma =3D NULL; - hwaddr rma_alloc_size; hwaddr node0_size =3D spapr_node0_size(machine); long load_limit, fw_size; char *filename; @@ -2417,40 +2414,28 @@ static void spapr_machine_init(MachineState *machin= e) exit(1); } =20 - /* Allocate RMA if necessary */ - rma_alloc_size =3D kvmppc_alloc_rma(&rma); + spapr->rma_size =3D node0_size; =20 - if (rma_alloc_size =3D=3D -1) { - error_report("Unable to create RMA"); - exit(1); + /* With KVM, we don't actually know whether KVM supports an + * unbounded RMA (PR KVM) or is limited by the hash table size (HV + * KVM using VRMA), so we always assume the latter + * + * In that case, we also limit the initial allocations for RTAS + * etc... to 256M since we have no way to know what the VRMA size + * is going to be as it depends on the size of the hash table + * isn't determined yet. + */ + if (kvm_enabled()) { + spapr->vrma_adjust =3D 1; + spapr->rma_size =3D MIN(spapr->rma_size, 0x10000000); } =20 - if (rma_alloc_size && (rma_alloc_size < node0_size)) { - spapr->rma_size =3D rma_alloc_size; - } else { - spapr->rma_size =3D node0_size; - - /* With KVM, we don't actually know whether KVM supports an - * unbounded RMA (PR KVM) or is limited by the hash table size - * (HV KVM using VRMA), so we always assume the latter - * - * In that case, we also limit the initial allocations for RTAS - * etc... to 256M since we have no way to know what the VRMA size - * is going to be as it depends on the size of the hash table - * isn't determined yet. - */ - if (kvm_enabled()) { - spapr->vrma_adjust =3D 1; - spapr->rma_size =3D MIN(spapr->rma_size, 0x10000000); - } - - /* Actually we don't support unbounded RMA anymore since we - * added proper emulation of HV mode. The max we can get is - * 16G which also happens to be what we configure for PAPR - * mode so make sure we don't do anything bigger than that - */ - spapr->rma_size =3D MIN(spapr->rma_size, 0x400000000ull); - } + /* Actually we don't support unbounded RMA anymore since we + * added proper emulation of HV mode. The max we can get is + * 16G which also happens to be what we configure for PAPR + * mode so make sure we don't do anything bigger than that + */ + spapr->rma_size =3D MIN(spapr->rma_size, 0x400000000ull); =20 if (spapr->rma_size > node0_size) { error_report("Numa node 0 has to span the RMA (%#08"HWADDR_PRIx")", @@ -2508,14 +2493,6 @@ static void spapr_machine_init(MachineState *machine) machine->ram_size); memory_region_add_subregion(sysmem, 0, ram); =20 - if (rma_alloc_size && rma) { - rma_region =3D g_new(MemoryRegion, 1); - memory_region_init_ram_ptr(rma_region, NULL, "ppc_spapr.rma", - rma_alloc_size, rma); - vmstate_register_ram_global(rma_region); - memory_region_add_subregion(sysmem, 0, rma_region); - } - /* initialize hotplug memory address space */ if (machine->ram_size < machine->maxram_size) { ram_addr_t hotplug_mem_size =3D machine->maxram_size - machine->ra= m_size; diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index aa17626cda..f39d99a8da 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -36,8 +36,6 @@ static void spapr_cpu_reset(void *opaque) * using an RTAS call */ cs->halted =3D 1; =20 - env->spr[SPR_HIOR] =3D 0; - /* Disable Power-saving mode Exit Cause exceptions for the CPU. * This can cause issues when rebooting the guest if a secondary * is awaken */ diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 6de59c5b21..51177a8e00 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2159,42 +2159,6 @@ void kvmppc_hint_smt_possible(Error **errp) =20 =20 #ifdef TARGET_PPC64 -off_t kvmppc_alloc_rma(void **rma) -{ - off_t size; - int fd; - struct kvm_allocate_rma ret; - - /* If cap_ppc_rma =3D=3D 0, contiguous RMA allocation is not supported - * if cap_ppc_rma =3D=3D 1, contiguous RMA allocation is supported, but - * not necessary on this hardware - * if cap_ppc_rma =3D=3D 2, contiguous RMA allocation is needed on thi= s hardware - * - * FIXME: We should allow the user to force contiguous RMA - * allocation in the cap_ppc_rma=3D=3D1 case. - */ - if (cap_ppc_rma < 2) { - return 0; - } - - fd =3D kvm_vm_ioctl(kvm_state, KVM_ALLOCATE_RMA, &ret); - if (fd < 0) { - fprintf(stderr, "KVM: Error on KVM_ALLOCATE_RMA: %s\n", - strerror(errno)); - return -1; - } - - size =3D MIN(ret.rma_size, 256ul << 20); - - *rma =3D mmap(NULL, size, PROT_READ|PROT_WRITE, MAP_SHARED, fd, 0); - if (*rma =3D=3D MAP_FAILED) { - fprintf(stderr, "KVM: Error mapping RMA: %s\n", strerror(errno)); - return -1; - }; - - return size; -} - uint64_t kvmppc_rma_size(uint64_t current_size, unsigned int hash_shift) { struct kvm_ppc_smmu_info info; diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index 4d2789eef6..e2840e1d33 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -37,7 +37,6 @@ target_ulong kvmppc_configure_v3_mmu(PowerPCCPU *cpu, bool radix, bool gtse, uint64_t proc_tbl); #ifndef CONFIG_USER_ONLY -off_t kvmppc_alloc_rma(void **rma); bool kvmppc_spapr_use_multitce(void); int kvmppc_spapr_enable_inkernel_multitce(void); void *kvmppc_create_spapr_tce(uint32_t liobn, uint32_t page_shift, @@ -188,11 +187,6 @@ static inline target_ulong kvmppc_configure_v3_mmu(Pow= erPCCPU *cpu, } =20 #ifndef CONFIG_USER_ONLY -static inline off_t kvmppc_alloc_rma(void **rma) -{ - return 0; -} - static inline bool kvmppc_spapr_use_multitce(void) { return false; --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949806594588.3687794527912; Tue, 17 Apr 2018 00:23:26 -0700 (PDT) Received: from localhost ([::1]:47928 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8KxP-0007dR-KL for importer@patchew.org; Tue, 17 Apr 2018 03:23:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57933) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Krt-0003Ra-Cd for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krq-0008SM-6y for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:33 -0400 Received: from ozlabs.org ([203.11.71.1]:36491) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krp-0008ON-HS; Tue, 17 Apr 2018 03:17:30 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm621Hgz9s1l; Tue, 17 Apr 2018 17:17:25 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949446; bh=DYSLvxHc7rzsQkP9c+1bQKuuMODZZZr/8BGf7pA4ghk=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=TBt392zS152IbfLELG0+uU6GBO7cT9a7AatupefZYNXTbUu23o/6x36ifEV692hNC pfizxTXGoUKkc5thXg6DIf/QYjhmJkOZbRVCNtcoQzR/FB/DXqun7hIzYGseNYhg8B naQ1x1hKsyRt9vUmAaWsz8YHlTRLI/+UZj9cJ+ZI= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:15 +1000 Message-Id: <20180417071722.9399-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH for-2.13 03/10] target/ppc: Remove unnecessary initialization of LPCR_UPRT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" In cpu_ppc_set_papr() the UPRT and GTSE bits of the LPCR are initialized based on on ppc64_radix_guest(). Which seems reasonable, except that ppc64_radix_guest() is based on spapr->patb_entry which is only set up in spapr_machine_reset, called much later than cpu_ppc_set_papr(). So the initialization here is pointless. The base cpu initialization already sets a value that's good enough until the guest uses an hcall to configure it's preferred MMU mode. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- target/ppc/translate_init.c | 16 ---------------- 1 file changed, 16 deletions(-) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index bb79d23b50..14f346f441 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8897,22 +8897,6 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHyp= ervisor *vhyp) lpcr->default_value &=3D ~LPCR_RMLS; lpcr->default_value |=3D 1ull << LPCR_RMLS_SHIFT; =20 - if (env->mmu_model =3D=3D POWERPC_MMU_3_00) { - /* By default we choose legacy mode and switch to new hash or radix - * when a register process table hcall is made. So disable process - * tables and guest translation shootdown by default - * - * Hot-plugged CPUs inherit from the guest radix setting under - * KVM but not under TCG. Update the default LPCR to keep new - * CPUs in sync when radix is enabled. - */ - if (ppc64_radix_guest(cpu)) { - lpcr->default_value |=3D LPCR_UPRT | LPCR_GTSE; - } else { - lpcr->default_value &=3D ~(LPCR_UPRT | LPCR_GTSE); - } - } - /* Only enable Power-saving mode Exit Cause exceptions on the boot * CPU. The RTAS command start-cpu will enable them on secondaries. */ --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949949791993.2386769821575; Tue, 17 Apr 2018 00:25:49 -0700 (PDT) Received: from localhost ([::1]:47983 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kzs-0001LV-4d for importer@patchew.org; Tue, 17 Apr 2018 03:25:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57974) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kru-0003Sl-J1 for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krt-0008Uo-8r for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:34 -0400 Received: from ozlabs.org ([203.11.71.1]:57231) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krs-0008TZ-SQ; Tue, 17 Apr 2018 03:17:33 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm6569sz9s1w; Tue, 17 Apr 2018 17:17:26 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949446; bh=G6cJgnxxun5CnnUha1jthjaPvxxm1uj569K9BgjM7T8=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oHOt4WNKO1nCJBNqxJVNreyrEAd9xqXhFmUsaidLchjc8kW8AA00GcsWHROBPqCcb gE/07yvgdFi7PIu2mYdAI+FF8GjQ218/Biibx/NFUpgV9Lue22u594LyKbKqpZvqRk Po/xC8zuR/ankVd3bgkAXUP1t45jKKzbUXx2R9Aw= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:16 +1000 Message-Id: <20180417071722.9399-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH for-2.13 04/10] spapr: Set compatibility mode before the rest of spapr_cpu_reset() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Although the order doesn't really matter at the moment, it's possible other initializastions could depend on the compatiblity mode, so make sure we set it first in spapr_cpu_reset(). While we're at it drop the test against first_cpu. Setting the compat mode to the value it already has is redundant, but harmless, so we might as well make a small simplification to the code. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr_cpu_core.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index f39d99a8da..2aab6ccd15 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -31,6 +31,11 @@ static void spapr_cpu_reset(void *opaque) =20 cpu_reset(cs); =20 + /* Set compatibility mode to match the boot CPU, which was either set + * by the machine reset code or by CAS. This should never fail. + */ + ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abort); + /* All CPUs start halted. CPU0 is unhalted from the machine level * reset code and the rest are explicitly started up by the guest * using an RTAS call */ @@ -43,12 +48,6 @@ static void spapr_cpu_reset(void *opaque) env->spr[SPR_LPCR] &=3D ~pcc->lpcr_pm; } =20 - /* Set compatibility mode to match the boot CPU, which was either set - * by the machine reset code or by CAS. This should never fail. - */ - if (cs !=3D first_cpu) { - ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abo= rt); - } } =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949641564685.3383700979853; Tue, 17 Apr 2018 00:20:41 -0700 (PDT) Received: from localhost ([::1]:47851 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kuu-0005NW-Kr for importer@patchew.org; Tue, 17 Apr 2018 03:20:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57934) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Krt-0003Rc-DH for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krq-0008Sk-8q for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:33 -0400 Received: from ozlabs.org ([203.11.71.1]:33081) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krp-0008OO-Ki; Tue, 17 Apr 2018 03:17:30 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm63M9vz9s1p; Tue, 17 Apr 2018 17:17:26 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949446; bh=hYhCgNx3xUu4shxn3G6S16YVvev3rZHRn1A6Vhx37cw=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Z0bH3vkoIZM9sJWjosbWVyoHazt8ZgYVNbzcLhgMgPeLdHl4GL3U4GxNW4XDamVfL cJPIPQgmG6Ya2kuBEOegPHbPqowdkOHv0Ho0Pg19jGLc11Pqe7q1emx0BHlMy2i8Pp uUlrDXmfaT4OiFivsxGCPRYEtrwM2mvee0/LE0no= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:17 +1000 Message-Id: <20180417071722.9399-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH for-2.13 05/10] spapr: Move PAPR mode register initialization to spapr code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_ppc_set_papr() has code to make sure the LPCR and AMOR (hypervisor privileged registers) have values which will make TCG behave correctly for paravirtualized guests, where we don't emulate the cpu when in hypervisor mode. It does this by mangling the default values of the SPRs, so that they will be set correctly at reset time. Manipulating usually-static parameters of the cpu model like this is kind of ugly, especially since the values used really have more to do with the platform than the cpu. The spapr code already has places for PAPR specific initializations of register state, so move the handling of LPCR and AMOR to there. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr_cpu_core.c | 36 +++++++++++++++++++++++++++++++++++- target/ppc/translate_init.c | 39 --------------------------------------- 2 files changed, 35 insertions(+), 40 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 2aab6ccd15..9080664ec1 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -28,6 +28,7 @@ static void spapr_cpu_reset(void *opaque) CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); + target_ulong lpcr; =20 cpu_reset(cs); =20 @@ -41,13 +42,46 @@ static void spapr_cpu_reset(void *opaque) * using an RTAS call */ cs->halted =3D 1; =20 + lpcr =3D env->spr[SPR_LPCR]; + + /* Set emulated LPCR to not send interrupts to hypervisor. Note that + * under KVM, the actual HW LPCR will be set differently by KVM itself, + * the settings below ensure proper operations with TCG in absence of + * a real hypervisor. + * + * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for + * real mode accesses, which thankfully defaults to 0 and isn't + * accessible in guest mode. + */ + lpcr &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV); + lpcr |=3D LPCR_LPES0 | LPCR_LPES1; + + /* Set RMLS to the max (ie, 16G) */ + lpcr &=3D ~LPCR_RMLS; + lpcr |=3D 1ull << LPCR_RMLS_SHIFT; + + /* Only enable Power-saving mode Exit Cause exceptions on the boot + * CPU. The RTAS command start-cpu will enable them on secondaries. + */ + if (cs =3D=3D first_cpu) { + lpcr |=3D pcc->lpcr_pm; + } + /* Disable Power-saving mode Exit Cause exceptions for the CPU. * This can cause issues when rebooting the guest if a secondary * is awaken */ if (cs !=3D first_cpu) { - env->spr[SPR_LPCR] &=3D ~pcc->lpcr_pm; + lpcr &=3D ~pcc->lpcr_pm; } =20 + env->spr[SPR_LPCR] =3D lpcr; + + /* Set a full AMOR so guest can use the AMR as it sees fit */ + env->spr[SPR_AMOR] =3D 0xffffffffffffffffull; + + /* Update some env bits based on new LPCR value */ + ppc_hash64_update_rmls(cpu); + ppc_hash64_update_vrma(cpu); } =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 14f346f441..5e89901149 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8866,11 +8866,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) #if !defined(CONFIG_USER_ONLY) void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp) { - PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env =3D &cpu->env; - ppc_spr_t *lpcr =3D &env->spr_cb[SPR_LPCR]; - ppc_spr_t *amor =3D &env->spr_cb[SPR_AMOR]; - CPUState *cs =3D CPU(cpu); =20 cpu->vhyp =3D vhyp; =20 @@ -8881,41 +8877,6 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHyp= ervisor *vhyp) */ env->msr_mask &=3D ~((1ull << MSR_EP) | MSR_HVB); =20 - /* Set emulated LPCR to not send interrupts to hypervisor. Note that - * under KVM, the actual HW LPCR will be set differently by KVM itself, - * the settings below ensure proper operations with TCG in absence of - * a real hypervisor. - * - * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for - * real mode accesses, which thankfully defaults to 0 and isn't - * accessible in guest mode. - */ - lpcr->default_value &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV= ); - lpcr->default_value |=3D LPCR_LPES0 | LPCR_LPES1; - - /* Set RMLS to the max (ie, 16G) */ - lpcr->default_value &=3D ~LPCR_RMLS; - lpcr->default_value |=3D 1ull << LPCR_RMLS_SHIFT; - - /* Only enable Power-saving mode Exit Cause exceptions on the boot - * CPU. The RTAS command start-cpu will enable them on secondaries. - */ - if (cs =3D=3D first_cpu) { - lpcr->default_value |=3D pcc->lpcr_pm; - } - - /* We should be followed by a CPU reset but update the active value - * just in case... - */ - env->spr[SPR_LPCR] =3D lpcr->default_value; - - /* Set a full AMOR so guest can use the AMR as it sees fit */ - env->spr[SPR_AMOR] =3D amor->default_value =3D 0xffffffffffffffffull; - - /* Update some env bits based on new LPCR value */ - ppc_hash64_update_rmls(cpu); - ppc_hash64_update_vrma(cpu); - /* Tell KVM that we're in PAPR mode */ if (kvm_enabled()) { kvmppc_set_papr(cpu); --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523950249622298.32827708554646; Tue, 17 Apr 2018 00:30:49 -0700 (PDT) Received: from localhost ([::1]:48359 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8L4i-0005Fl-QK for importer@patchew.org; Tue, 17 Apr 2018 03:30:48 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57988) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kru-0003Sz-PX for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krt-0008VF-FI for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:34 -0400 Received: from ozlabs.org ([203.11.71.1]:40003) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krs-0008Ta-P1; Tue, 17 Apr 2018 03:17:33 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm72NNqz9s2L; Tue, 17 Apr 2018 17:17:26 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949447; bh=Z+dXbnVADIPfJB+rnZ3d1y/S63SWD0JQ8zy2ClGROTo=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=oBXbsHrIBkHcn7pg65GsV5ZorggIoDXupOKefWft4eTAKFfdLwFPMxhyGhBZUpD3a 7ZncCVtyoCBd0Z4yDsRn9y6q8X7grLaxchs9OfI9VHuevPg/JHMy7ZIa+acJE/DIEn IRES0drS/16VfCv9vyjfTxkJ2bGJPvYzUkRxvsCw= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:18 +1000 Message-Id: <20180417071722.9399-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH for-2.13 06/10] target/ppc: Add ppc_store_lpcr() helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There are some fields in the cpu state which need to be updated when the LPCR register is changed, which is done by ppc_hash64_update_rmls() and ppc_hash64_update_vrma(). Code which alters env->spr[SPR_LPCR] needs to call them afterwards to make sure the state is up to date. That's easy to get wrong. The normal way of dealing with sitautions like that is to use a helper which both updates the basic register value and the derived state. So, do that. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr_cpu_core.c | 6 +----- target/ppc/mmu-hash64.c | 15 +++++++++++---- target/ppc/mmu-hash64.h | 3 +-- 3 files changed, 13 insertions(+), 11 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 9080664ec1..b1c3cf11f0 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -74,14 +74,10 @@ static void spapr_cpu_reset(void *opaque) lpcr &=3D ~pcc->lpcr_pm; } =20 - env->spr[SPR_LPCR] =3D lpcr; + ppc_store_lpcr(cpu, lpcr); =20 /* Set a full AMOR so guest can use the AMR as it sees fit */ env->spr[SPR_AMOR] =3D 0xffffffffffffffffull; - - /* Update some env bits based on new LPCR value */ - ppc_hash64_update_rmls(cpu); - ppc_hash64_update_vrma(cpu); } =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c index 7e0adecfd9..a1db20e3a8 100644 --- a/target/ppc/mmu-hash64.c +++ b/target/ppc/mmu-hash64.c @@ -942,7 +942,7 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_= ulong ptex, cpu->env.tlb_need_flush =3D TLB_NEED_GLOBAL_FLUSH | TLB_NEED_LOCAL_FLU= SH; } =20 -void ppc_hash64_update_rmls(PowerPCCPU *cpu) +static void ppc_hash64_update_rmls(PowerPCCPU *cpu) { CPUPPCState *env =3D &cpu->env; uint64_t lpcr =3D env->spr[SPR_LPCR]; @@ -977,7 +977,7 @@ void ppc_hash64_update_rmls(PowerPCCPU *cpu) } } =20 -void ppc_hash64_update_vrma(PowerPCCPU *cpu) +static void ppc_hash64_update_vrma(PowerPCCPU *cpu) { CPUPPCState *env =3D &cpu->env; const PPCHash64SegmentPageSizes *sps =3D NULL; @@ -1028,9 +1028,9 @@ void ppc_hash64_update_vrma(PowerPCCPU *cpu) slb->sps =3D sps; } =20 -void helper_store_lpcr(CPUPPCState *env, target_ulong val) +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val) { - PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + CPUPPCState *env =3D &cpu->env; uint64_t lpcr =3D 0; =20 /* Filter out bits */ @@ -1096,6 +1096,13 @@ void helper_store_lpcr(CPUPPCState *env, target_ulon= g val) ppc_hash64_update_vrma(cpu); } =20 +void helper_store_lpcr(CPUPPCState *env, target_ulong val) +{ + PowerPCCPU *cpu =3D ppc_env_get_cpu(env); + + ppc_store_lpcr(cpu, val); +} + void ppc_hash64_init(PowerPCCPU *cpu) { CPUPPCState *env =3D &cpu->env; diff --git a/target/ppc/mmu-hash64.h b/target/ppc/mmu-hash64.h index d5fc03441d..f23b78d787 100644 --- a/target/ppc/mmu-hash64.h +++ b/target/ppc/mmu-hash64.h @@ -17,8 +17,7 @@ void ppc_hash64_tlb_flush_hpte(PowerPCCPU *cpu, target_ulong pte0, target_ulong pte1); unsigned ppc_hash64_hpte_page_shift_noslb(PowerPCCPU *cpu, uint64_t pte0, uint64_t pte1); -void ppc_hash64_update_vrma(PowerPCCPU *cpu); -void ppc_hash64_update_rmls(PowerPCCPU *cpu); +void ppc_store_lpcr(PowerPCCPU *cpu, target_ulong val); void ppc_hash64_init(PowerPCCPU *cpu); void ppc_hash64_finalize(PowerPCCPU *cpu); #endif --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; 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Tue, 17 Apr 2018 03:17:33 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm70ycnz9s02; Tue, 17 Apr 2018 17:17:26 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949447; bh=kDPA2h9jL9nhIP9haLnPb2sMnFRV9qKROj1/jfvW72M=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=h679im/JZkxmz0w6GLqOxkOFp1QbE3uLCaltJ1l/7TLd7h85JMWqXsgw24bKtsZjl qJgAL2TbRIuS3i4MV/garUQwZsd/+spfEG0fFGT42sM8DD5eAUYIl3NIUCzH91nBlz qfgwTk0A9g4QfVCusVNbpKyvqy8qXedzDwV/p/nM= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:19 +1000 Message-Id: <20180417071722.9399-8-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH for-2.13 07/10] spapr: Make a helper to set up cpu entry point state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Under PAPR, only the boot CPU is active when the system starts. Other cpus must be explicitly activated using an RTAS call. The entry state for the boot and secondary cpus isn't identical, but it has some things in common. We're going to add a bit more common setup later, too, so to simplify make a helper which sets up the common entry state for both boot and secondary cpu threads. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr.c | 4 +--- hw/ppc/spapr_cpu_core.c | 9 +++++++++ hw/ppc/spapr_rtas.c | 6 +++--- include/hw/ppc/spapr_cpu_core.h | 3 +++ 4 files changed, 16 insertions(+), 6 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index fbb2c6752c..e0cabfa6ee 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1536,10 +1536,8 @@ static void spapr_machine_reset(void) g_free(fdt); =20 /* Set up the entry state */ - first_ppc_cpu->env.gpr[3] =3D fdt_addr; + spapr_cpu_set_entry_state(first_ppc_cpu, SPAPR_ENTRY_POINT, fdt_addr); first_ppc_cpu->env.gpr[5] =3D 0; - first_cpu->halted =3D 0; - first_ppc_cpu->env.nip =3D SPAPR_ENTRY_POINT; =20 spapr->cas_reboot =3D false; } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index b1c3cf11f0..ecd40dbf03 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -80,6 +80,15 @@ static void spapr_cpu_reset(void *opaque) env->spr[SPR_AMOR] =3D 0xffffffffffffffffull; } =20 +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3) +{ + CPUPPCState *env =3D &cpu->env; + + env->nip =3D SPAPR_ENTRY_POINT; + env->gpr[3] =3D r3; + CPU(cpu)->halted =3D 0; +} + static void spapr_cpu_destroy(PowerPCCPU *cpu) { qemu_unregister_reset(spapr_cpu_reset, cpu); diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index 0ec5fa4cfe..d79aa44467 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -37,6 +37,7 @@ #include "hw/ppc/spapr.h" #include "hw/ppc/spapr_vio.h" #include "hw/ppc/spapr_rtas.h" +#include "hw/ppc/spapr_cpu_core.h" #include "hw/ppc/ppc.h" #include "hw/boards.h" =20 @@ -173,14 +174,13 @@ static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMac= hineState *spapr, * new cpu enters */ kvm_cpu_synchronize_state(cs); =20 + spapr_cpu_set_entry_state(cpu, start, r3); + env->msr =3D (1ULL << MSR_SF) | (1ULL << MSR_ME); =20 /* Enable Power-saving mode Exit Cause exceptions for the new CPU = */ env->spr[SPR_LPCR] |=3D pcc->lpcr_pm; =20 - env->nip =3D start; - env->gpr[3] =3D r3; - cs->halted =3D 0; spapr_cpu_set_endianness(cpu); spapr_cpu_update_tb_offset(cpu); =20 diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 1a38544706..11cab30838 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -12,6 +12,7 @@ #include "hw/qdev.h" #include "hw/cpu/core.h" #include "target/ppc/cpu-qom.h" +#include "target/ppc/cpu.h" =20 #define TYPE_SPAPR_CPU_CORE "spapr-cpu-core" #define SPAPR_CPU_CORE(obj) \ @@ -40,4 +41,6 @@ typedef struct sPAPRCPUCoreClass { const char *spapr_get_cpu_core_type(const char *cpu_type); void spapr_cpu_core_reset(sPAPRCPUCore *sc); =20 +void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3); + #endif --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949876198878.8526955256222; Tue, 17 Apr 2018 00:24:36 -0700 (PDT) Received: from localhost ([::1]:47962 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kyh-0000Ij-AX for importer@patchew.org; Tue, 17 Apr 2018 03:24:35 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58006) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Krv-0003TG-94 for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krt-0008Vh-LH for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:35 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:60639) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krs-0008TV-Vm; Tue, 17 Apr 2018 03:17:33 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm73QB0z9s2B; Tue, 17 Apr 2018 17:17:27 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949447; bh=iNW3B4D/ZxUrGOvpYyZGRduYs64IcJDzDdTVwGThRkI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HhIMb/+kMeT+Wy3fNZ3d0vfP5mUHFCtKFbQ1eoY+Wm5hGsY/GhmSn7adhuFPyvMOa /MWuQSyIqesF26qgwKVBck5yjhRZB82uWmb2cHeBpZFQxU11F4HGgLcqSHxfBMHz+Q PSZ/LHB0Q8MhTO9tESejwnPLOFvM4bS9pR23+QoY= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:20 +1000 Message-Id: <20180417071722.9399-9-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH for-2.13 08/10] spapr: Clean up handling of LPCR power-saving exit bits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" To prevent spurious wakeups on cpus that are supposed to be disabled, we need to clear the LPCR bits which control certain wakeup events. spapr_cpu_reset() has separate cases here for boot and non-boot (initially inactive) cpus. rtas_start_cpu() then turns the LPCR bits on when the non-boot cpus are activated. But explicit checks against first_cpu are not how we usually do things: instead spapr_cpu_reset() generally sets things up for non-boot (inactive) cpus, then spapr_machine_reset() and/or rtas_start_cpu() override as necessary. So, do that instead. Because the LPCR activation is identical for boot cpus and non-boot cpus just activated with rtas_start_cpu() we can put the code common in spapr_cpu_set_entry_state(). Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr_cpu_core.c | 22 +++++++--------------- hw/ppc/spapr_rtas.c | 4 ---- 2 files changed, 7 insertions(+), 19 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index ecd40dbf03..8be0265d04 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -52,28 +52,17 @@ static void spapr_cpu_reset(void *opaque) * Clearing VPM0 will also cause us to use RMOR in mmu-hash64.c for * real mode accesses, which thankfully defaults to 0 and isn't * accessible in guest mode. + * + * Disable Power-saving mode Exit Cause exceptions for the CPU, so + * we don't get spurious wakups before an RTAS start-cpu call. */ - lpcr &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV); + lpcr &=3D ~(LPCR_VPM0 | LPCR_VPM1 | LPCR_ISL | LPCR_KBV | pcc->lpcr_pm= ); lpcr |=3D LPCR_LPES0 | LPCR_LPES1; =20 /* Set RMLS to the max (ie, 16G) */ lpcr &=3D ~LPCR_RMLS; lpcr |=3D 1ull << LPCR_RMLS_SHIFT; =20 - /* Only enable Power-saving mode Exit Cause exceptions on the boot - * CPU. The RTAS command start-cpu will enable them on secondaries. - */ - if (cs =3D=3D first_cpu) { - lpcr |=3D pcc->lpcr_pm; - } - - /* Disable Power-saving mode Exit Cause exceptions for the CPU. - * This can cause issues when rebooting the guest if a secondary - * is awaken */ - if (cs !=3D first_cpu) { - lpcr &=3D ~pcc->lpcr_pm; - } - ppc_store_lpcr(cpu, lpcr); =20 /* Set a full AMOR so guest can use the AMR as it sees fit */ @@ -82,11 +71,14 @@ static void spapr_cpu_reset(void *opaque) =20 void spapr_cpu_set_entry_state(PowerPCCPU *cpu, target_ulong nip, target_u= long r3) { + PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); CPUPPCState *env =3D &cpu->env; =20 env->nip =3D SPAPR_ENTRY_POINT; env->gpr[3] =3D r3; CPU(cpu)->halted =3D 0; + /* Enable Power-saving mode Exit Cause exceptions */ + ppc_store_lpcr(cpu, env->spr[SPR_LPCR] | pcc->lpcr_pm); } =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) diff --git a/hw/ppc/spapr_rtas.c b/hw/ppc/spapr_rtas.c index d79aa44467..e720d54eb5 100644 --- a/hw/ppc/spapr_rtas.c +++ b/hw/ppc/spapr_rtas.c @@ -162,7 +162,6 @@ static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachi= neState *spapr, if (cpu !=3D NULL) { CPUState *cs =3D CPU(cpu); CPUPPCState *env =3D &cpu->env; - PowerPCCPUClass *pcc =3D POWERPC_CPU_GET_CLASS(cpu); =20 if (!cs->halted) { rtas_st(rets, 0, RTAS_OUT_HW_ERROR); @@ -178,9 +177,6 @@ static void rtas_start_cpu(PowerPCCPU *cpu_, sPAPRMachi= neState *spapr, =20 env->msr =3D (1ULL << MSR_SF) | (1ULL << MSR_ME); =20 - /* Enable Power-saving mode Exit Cause exceptions for the new CPU = */ - env->spr[SPR_LPCR] |=3D pcc->lpcr_pm; - spapr_cpu_set_endianness(cpu); spapr_cpu_update_tb_offset(cpu); =20 --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523950064134579.5934113599811; Tue, 17 Apr 2018 00:27:44 -0700 (PDT) Received: from localhost ([::1]:48164 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8L1j-0002zO-8N for importer@patchew.org; Tue, 17 Apr 2018 03:27:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57980) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Kru-0003So-M9 for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krt-0008V4-DT for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:34 -0400 Received: from ozlabs.org ([2401:3900:2:1::2]:44899) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krt-0008TW-0w; Tue, 17 Apr 2018 03:17:33 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm74mpsz9s27; Tue, 17 Apr 2018 17:17:27 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949447; bh=RXhP+9AgHqKp2nGS+NAuehPIZHYfOH6M80F7SRISD18=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=EHVd0xJbYczgQNCiJDa0xXaQjfUqnjnk+jxPvwhJP2ez4SUwFQY+8Ml8hVs5iZp2Q uS7sfERPGS2k2sdto++eSwoVMXi2o/JkGnVXap1EfhP6RPRgGrybOmaw4pXb93tUql GuahRO+cjf0+U4+4pynVPLaysNoNs0x2e9ipaNm8= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:21 +1000 Message-Id: <20180417071722.9399-10-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [PATCH for-2.13 09/10] target/ppc: Don't bother with MSR_EP in cpu_ppc_set_papr() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_ppc_set_papr() removes the EP and HV bits from the MSR mask. While removing the HV bit makes sense (a cpu in PAPR mode should never be emulated in hypervisor mode), the EP bit is just bizarre. Although it's true that a papr mode guest shouldn't be able to change the exception prefix, the MSR[EP] bit doesn't even exist on the cpus supported for PAPR mode, so it's pointless to do anything with it here. Signed-off-by: David Gibson Reviewed-by: Thomas Huth --- target/ppc/translate_init.c | 9 ++++----- 1 file changed, 4 insertions(+), 5 deletions(-) diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 5e89901149..bb5559d799 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8870,12 +8870,11 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHy= pervisor *vhyp) =20 cpu->vhyp =3D vhyp; =20 - /* PAPR always has exception vectors in RAM not ROM. To ensure this, - * MSR[IP] should never be set. - * - * We also disallow setting of MSR_HV + /* + * With a virtual hypervisor mode we never allow the CPU to go + * hypervisor mode itself */ - env->msr_mask &=3D ~((1ull << MSR_EP) | MSR_HVB); + env->msr_mask &=3D ~MSR_HVB; =20 /* Tell KVM that we're in PAPR mode */ if (kvm_enabled()) { --=20 2.14.3 From nobody Thu May 2 16:55:14 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1523949806655289.8865011135498; Tue, 17 Apr 2018 00:23:26 -0700 (PDT) Received: from localhost ([::1]:47930 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8KxP-0007dh-Ak for importer@patchew.org; Tue, 17 Apr 2018 03:23:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58016) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1f8Krv-0003TI-EY for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:38 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1f8Krt-0008Vc-Kf for qemu-devel@nongnu.org; Tue, 17 Apr 2018 03:17:35 -0400 Received: from ozlabs.org ([203.11.71.1]:34081) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1f8Krs-0008Td-U4; Tue, 17 Apr 2018 03:17:33 -0400 Received: by ozlabs.org (Postfix, from userid 1007) id 40QGm74Dwcz9s1t; Tue, 17 Apr 2018 17:17:27 +1000 (AEST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1523949447; bh=yHG4TY5EWQtcG/hbsOcMl2sNwUET9QG1KJgEQDcsTCA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=BOZ7XGI+XDTQmB4rz3Xvgvoyj+7B9ZV20VupDArXFXmGS6kiJlg5d8/Ng2YobiuuJ KvtxVa1UZ7Duoxpz4K4UQsxgctiIYSQK/wdQ96GZm5ir3wqFwc2poRmbVGonjYnyhY WTi6UmUtXTjcOHb/gvnMEsI0n5K+Mtpicrroqs0M= From: David Gibson To: groug@kaod.org Date: Tue, 17 Apr 2018 17:17:22 +1000 Message-Id: <20180417071722.9399-11-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20180417071722.9399-1-david@gibson.dropbear.id.au> References: <20180417071722.9399-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 Subject: [Qemu-devel] [PATCH for-2.13 10/10] spapr: Move PAPR specific cpu logic to pseries machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_ppc_set_papr() does three things: 1) it sets up the virtual hypervisor interface, 2) it prevents the cpu from ever entering hypervisor mode and 3) it tells KVM that we're emulating a cpu in PAPR mode. (1) & (2) make sense for any virtual hypervisor (if one ever exists). (3) belongs more properly in the machine type specific to a PAPR guest. While we're at it, remove an unnecessary test on kvm_enabled() by making kvmppc_set_papr() a safe no-op on non-KVM. Signed-off-by: David Gibson Reviewed-by: Greg Kurz --- hw/ppc/spapr_cpu_core.c | 4 ++-- target/ppc/cpu.h | 2 +- target/ppc/kvm.c | 4 ++++ target/ppc/translate_init.c | 7 +------ 4 files changed, 8 insertions(+), 9 deletions(-) diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 8be0265d04..0a668b8954 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -94,8 +94,8 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, Powe= rPCCPU *cpu, /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ); =20 - /* Enable PAPR mode in TCG or KVM */ - cpu_ppc_set_papr(cpu, PPC_VIRTUAL_HYPERVISOR(spapr)); + cpu_ppc_set_vhyp(cpu, PPC_VIRTUAL_HYPERVISOR(spapr)); + kvmppc_set_papr(cpu); =20 qemu_register_reset(spapr_cpu_reset, cpu); } diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 8c9e03f54d..740939a085 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1331,7 +1331,7 @@ void store_booke_tcr (CPUPPCState *env, target_ulong = val); void store_booke_tsr (CPUPPCState *env, target_ulong val); void ppc_tlb_invalidate_all (CPUPPCState *env); void ppc_tlb_invalidate_one (CPUPPCState *env, target_ulong addr); -void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp); +void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp); #endif #endif =20 diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 51177a8e00..e4341d6ff7 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2090,6 +2090,10 @@ void kvmppc_set_papr(PowerPCCPU *cpu) CPUState *cs =3D CPU(cpu); int ret; =20 + if (!kvm_enabled()) { + return; + } + ret =3D kvm_vcpu_enable_cap(cs, KVM_CAP_PPC_PAPR, 0); if (ret) { error_report("This vCPU type or KVM version does not support PAPR"= ); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index bb5559d799..95e8dba97a 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -8864,7 +8864,7 @@ POWERPC_FAMILY(POWER9)(ObjectClass *oc, void *data) } =20 #if !defined(CONFIG_USER_ONLY) -void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp) +void cpu_ppc_set_vhyp(PowerPCCPU *cpu, PPCVirtualHypervisor *vhyp) { CPUPPCState *env =3D &cpu->env; =20 @@ -8875,11 +8875,6 @@ void cpu_ppc_set_papr(PowerPCCPU *cpu, PPCVirtualHyp= ervisor *vhyp) * hypervisor mode itself */ env->msr_mask &=3D ~MSR_HVB; - - /* Tell KVM that we're in PAPR mode */ - if (kvm_enabled()) { - kvmppc_set_papr(cpu); - } } =20 #endif /* !defined(CONFIG_USER_ONLY) */ --=20 2.14.3