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[2001:470:27:1fa::2]) by smtp.gmail.com with ESMTPSA id n2sm698482lji.75.2018.03.28.09.39.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 28 Mar 2018 09:40:01 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=n8y8Ot2g0qWhlP/G6JcPHg5mO4aeLBxQcQIBGMLbAKc=; b=robPGcOLAWJ9g/Ua1g8/FcwJVx5qO1KYG5sOfJDqkPSed3A94BnM7caomjbJQ/ufHU rmVEwbSR7t2yof3dYogpuepZVSnhmMZB+8OJuBn+o8q4OyjykXI/Hh23HI+LrASJ6RUB SkULZ5e1b6EJoYY0MK9LJkC0ltmGJuiW3I4Y7gHseeLLEFXOZ4k3wIZq+/ymMy0ok1AQ PWqsqkIquwQHQbpBdVlzJl7dpDPCp3A9F18xnDhL3uWpocNPuO/aqkqQPUFdZ18w0B8/ aj5ZuwZ+grxstN72nBolnfVkXG0ctHjlbHLinnPsfjD5nhVPKb/YP0yyQprmnie/kouo 4ErQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=n8y8Ot2g0qWhlP/G6JcPHg5mO4aeLBxQcQIBGMLbAKc=; b=RifGcVKdXSPwalVMGSGW0RFfRL2zj0A6XkmRCJyvfWeBCefu82aRVLnkABICrxAEcm 8TATcaEnF/P2rnSaDb0zYig6GkDXEg/7SnVCO2alIxHl+WFz3t2PDzsimBnel112pp+n BAEZ8/JcjujXML6qHv1biIRE/vgK06zo0qfIeNt3ATptKTGomUe+jEWl3E/tqpu09Dy4 sUp8td26zP5inhNqVhhdm8F1c+xWU1j3r3yCYFe+O+DAb8KiF6gHrefbydHHNrElC+vz SALO3TKE5LE2UwnOKMSQpXwK8EuaQw7TgQq7cF+7rJs/psBarcelAiP3qTm/pJo0BPnG XzWg== X-Gm-Message-State: AElRT7HRNrVXRwJujlh+SnckhleyW24yKaQMtgtTVmueb0qJsXlKz+O2 2EFH/CcYwhYQeQ8fdYK8darCbQ== X-Google-Smtp-Source: AIpwx48WvkTAUXwYnpJ3ZB0Wjh1IF+JwjJpJZlwb8/A6l81KuK0m8DdNb/Qiale3c6HfNfSbvWwDtg== X-Received: by 10.46.77.80 with SMTP id a77mr2888651ljb.91.1522255201909; Wed, 28 Mar 2018 09:40:01 -0700 (PDT) From: Max Filippov To: qemu-devel@nongnu.org Date: Wed, 28 Mar 2018 09:39:43 -0700 Message-Id: <20180328163943.23783-1-jcmvbkbc@gmail.com> X-Mailer: git-send-email 2.11.0 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:4010:c07::241 Subject: [Qemu-devel] [PATCH] target/xtensa: fix flush_window_regs X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" flush_window_regs uses wrong stack frame to save overflow registers in call8 and call12 frames, which results in wrong register values in callers of a function that received a signal. Reimplement flush_window_regs closely following window overflow sequence. Signed-off-by: Max Filippov --- linux-user/signal.c | 55 +++++++++++++++++++++++--------------------------= ---- 1 file changed, 24 insertions(+), 31 deletions(-) diff --git a/linux-user/signal.c b/linux-user/signal.c index 2ea3e0321f4d..33d5ced30c98 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -7094,52 +7094,45 @@ static abi_ulong get_sigframe(struct target_sigacti= on *sa, =20 static int flush_window_regs(CPUXtensaState *env) { - const uint32_t nareg_mask =3D env->config->nareg - 1; uint32_t wb =3D env->sregs[WINDOW_BASE]; - uint32_t ws =3D (xtensa_replicate_windowstart(env) >> (wb + 1)) & - ((1 << env->config->nareg / 4) - 1); - uint32_t d =3D ctz32(ws) + 1; - uint32_t sp; - abi_long ret =3D 0; - - wb +=3D d; - ws >>=3D d; + uint32_t ws =3D xtensa_replicate_windowstart(env) >> (wb + 1); + unsigned d =3D ctz32(ws) + 1; + unsigned i; + int ret =3D 0; =20 - xtensa_sync_phys_from_window(env); - sp =3D env->phys_regs[(wb * 4 + 1) & nareg_mask]; + for (i =3D d; i < env->config->nareg / 4; i +=3D d) { + uint32_t ssp, osp; + unsigned j; =20 - while (ws && ret =3D=3D 0) { - int d; - int i; - int idx; + ws >>=3D d; + xtensa_rotate_window(env, d); =20 if (ws & 0x1) { - ws >>=3D 1; + ssp =3D env->regs[5]; d =3D 1; } else if (ws & 0x2) { - ws >>=3D 2; + ssp =3D env->regs[9]; + ret |=3D get_user_ual(osp, env->regs[1] - 12); + osp -=3D 32; d =3D 2; - for (i =3D 0; i < 4; ++i) { - idx =3D (wb * 4 + 4 + i) & nareg_mask; - ret |=3D put_user_ual(env->phys_regs[idx], sp + (i - 12) *= 4); - } } else if (ws & 0x4) { - ws >>=3D 3; + ssp =3D env->regs[13]; + ret |=3D get_user_ual(osp, env->regs[1] - 12); + osp -=3D 48; d =3D 3; - for (i =3D 0; i < 8; ++i) { - idx =3D (wb * 4 + 4 + i) & nareg_mask; - ret |=3D put_user_ual(env->phys_regs[idx], sp + (i - 16) *= 4); - } } else { g_assert_not_reached(); } - sp =3D env->phys_regs[((wb + d) * 4 + 1) & nareg_mask]; - for (i =3D 0; i < 4; ++i) { - idx =3D (wb * 4 + i) & nareg_mask; - ret |=3D put_user_ual(env->phys_regs[idx], sp + (i - 4) * 4); + + for (j =3D 0; j < 4; ++j) { + ret |=3D put_user_ual(env->regs[j], ssp - 16 + j * 4); + } + for (j =3D 4; j < d * 4; ++j) { + ret |=3D put_user_ual(env->regs[j], osp - 16 + j * 4); } - wb +=3D d; } + xtensa_rotate_window(env, d); + g_assert(env->sregs[WINDOW_BASE] =3D=3D wb); return ret =3D=3D 0; } =20 --=20 2.11.0