From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945036553187.12398813847665; Tue, 6 Feb 2018 11:23:56 -0800 (PST) Received: from localhost ([::1]:53371 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8qO-0003vt-Ck for importer@patchew.org; Tue, 06 Feb 2018 14:23:52 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ii-0005Ed-8E for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8id-0007vB-5x for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:36746 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8id-0007uw-0V for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:51 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEKR6131195 for ; Tue, 6 Feb 2018 14:15:50 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyfvm6ywx-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:50 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:45 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFjKP47054904; Tue, 6 Feb 2018 19:15:45 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id DDC98AC03A; Tue, 6 Feb 2018 14:17:05 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id AEA07AC04A; Tue, 6 Feb 2018 14:17:05 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:22 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7D97 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500281; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:47 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B419 Message-Id: <20180206191515.25830-2-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 01/54] target/i386: Fix handling of VEX prefixes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Paolo Bonzini Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell In commit e3af7c788b73a6495eb9d94992ef11f6ad6f3c56 we replaced direct calls to to cpu_ld*_code() with calls to the x86_ld*_code() wrappers which incorporate an advance of s->pc. Unfortunately we didn't notice that in one place the old code was deliberately not incrementing s->pc: @@ -4501,7 +4528,7 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) static const int pp_prefix[4] =3D { 0, PREFIX_DATA, PREFIX_REPZ, PREFIX_REPNZ }; - int vex3, vex2 =3D cpu_ldub_code(env, s->pc); + int vex3, vex2 =3D x86_ldub_code(env, s); if (!CODE64(s) && (vex2 & 0xc0) !=3D 0xc0) { /* 4.1.4.6: In 32-bit mode, bits [7:6] must be 11b, This meant we were mishandling this set of instructions. Remove the manual advance of s->pc for the "is VEX" case (which is now done by x86_ldub_code()) and instead rewind PC in the case where we decide that this isn't really VEX. Signed-off-by: Peter Maydell Cc: qemu-stable@nongnu.org Reported-by: Alexandro Sanchez Bach Message-Id: <1513163959-17545-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Paolo Bonzini (cherry picked from commit cfcca361d77142f25fb1128755084cf91faa4db7) Signed-off-by: Michael Roth --- target/i386/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/i386/translate.c b/target/i386/translate.c index 088a9d9766..ed5b69d6af 100644 --- a/target/i386/translate.c +++ b/target/i386/translate.c @@ -4547,9 +4547,9 @@ static target_ulong disas_insn(DisasContext *s, CPUSt= ate *cpu) if (!CODE64(s) && (vex2 & 0xc0) !=3D 0xc0) { /* 4.1.4.6: In 32-bit mode, bits [7:6] must be 11b, otherwise the instruction is LES or LDS. */ + s->pc--; /* rewind the advance_pc() x86_ldub_code() did */ break; } - s->pc++; =20 /* 4.1.1-4.1.3: No preceding lock, 66, f2, f3, or rex prefixes= . */ if (prefixes & (PREFIX_REPZ | PREFIX_REPNZ --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151794625653313.023457148011971; Tue, 6 Feb 2018 11:44:16 -0800 (PST) Received: from localhost ([::1]:53525 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9A7-0004wg-IL for importer@patchew.org; Tue, 06 Feb 2018 14:44:15 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44170) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ir-0005Qq-CZ for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8im-00082k-3O for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:05 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:43400) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8il-00081p-Qs for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:00 -0500 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEKFP112135 for ; Tue, 6 Feb 2018 14:15:59 -0500 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fygkucwfb-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:58 -0500 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:53 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFqFG47054926; Tue, 6 Feb 2018 19:15:52 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3206FAC043; Tue, 6 Feb 2018 14:17:13 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id ECB82AC040; Tue, 6 Feb 2018 14:17:12 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:23 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0040-0000-0000-000003EF734C X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:55 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0041-0000-0000-000007E4E590 Message-Id: <20180206191515.25830-3-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 02/54] block/iscsi: dont leave allocmap in an invalid state on UNMAP failure X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Peter Lieven , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Lieven we forgot to set the allocmap to invalid if an UNMAP call fails. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Lieven Message-Id: <1512733868-9009-2-git-send-email-pl@kamp.de> Reviewed-by: Eric Blake Signed-off-by: Paolo Bonzini (cherry picked from commit aef172ffdc2f9c41d9cc043a55f1259e7c07e587) Signed-off-by: Michael Roth --- block/iscsi.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) diff --git a/block/iscsi.c b/block/iscsi.c index 4683f3b244..c532ec79d1 100644 --- a/block/iscsi.c +++ b/block/iscsi.c @@ -2,7 +2,7 @@ * QEMU Block driver for iSCSI images * * Copyright (c) 2010-2011 Ronnie Sahlberg - * Copyright (c) 2012-2016 Peter Lieven + * Copyright (c) 2012-2017 Peter Lieven * * Permission is hereby granted, free of charge, to any person obtaining a= copy * of this software and associated documentation files (the "Software"), t= o deal @@ -1128,6 +1128,9 @@ retry: goto retry; } =20 + iscsi_allocmap_set_invalid(iscsilun, offset >> BDRV_SECTOR_BITS, + bytes >> BDRV_SECTOR_BITS); + if (iTask.status =3D=3D SCSI_STATUS_CHECK_CONDITION) { /* the target might fail with a check condition if it is not happy with the alignment of the UNMAP request @@ -1140,9 +1143,6 @@ retry: goto out_unlock; } =20 - iscsi_allocmap_set_invalid(iscsilun, offset >> BDRV_SECTOR_BITS, - bytes >> BDRV_SECTOR_BITS); - out_unlock: qemu_mutex_unlock(&iscsilun->mutex); return r; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947044308451.72656236291016; Tue, 6 Feb 2018 11:57:24 -0800 (PST) Received: from localhost ([::1]:53668 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9Mk-0008Pe-H3 for importer@patchew.org; Tue, 06 Feb 2018 14:57:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44514) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j3-0005ec-84 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iv-0008Bk-6u for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:17 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:41636 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iu-0008Az-Ut for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:09 -0500 Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JERMB020846 for ; Tue, 6 Feb 2018 14:16:08 -0500 Received: from e13.ny.us.ibm.com (e13.ny.us.ibm.com [129.33.205.203]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyf6usgf0-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:04 -0500 Received: from localhost by e13.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:00 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFxlp48693342; Tue, 6 Feb 2018 19:15:59 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 649AEAC046; Tue, 6 Feb 2018 14:17:20 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 2B5CEAC03F; Tue, 6 Feb 2018 14:17:20 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:24 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0008-0000-0000-000002CD7B68 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:02 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0009-0000-0000-0000382B9EE0 Message-Id: <20180206191515.25830-4-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id w16JERMB020846 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 03/54] target/sh4: fix TCG leak during gusa sequence X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno , =?UTF-8?q?Alex=20Benn=C3=A9e?= , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Alex Benn=C3=A9e This fixes bug #1735384 while running java under qemu-sh4. When debug was enabled it showed a problem with TCG temps. Once fixed I was able to run java -version normally. Cc: qemu-stable@nongnu.org Reported-by: John Paul Adrian Glaubitz Suggested-by: Richard Henderson Signed-off-by: Alex Benn=C3=A9e Message-Id: <20171206093050.25308-1-alex.bennee@linaro.org> Reviewed-by: Richard Henderson Reviewed-by: Aurelien Jarno Signed-off-by: Aurelien Jarno (cherry picked from commit 6d56fc6cc372284a4571f09b361a9ccd99318103) Signed-off-by: Michael Roth --- target/sh4/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/sh4/translate.c b/target/sh4/translate.c index 703020fe87..b4b5c822d0 100644 --- a/target/sh4/translate.c +++ b/target/sh4/translate.c @@ -2189,7 +2189,7 @@ static int decode_gusa(DisasContext *ctx, CPUSH4State= *env, int *pmax_insns) } =20 /* If op_src is not a valid register, then op_arg was a constant. */ - if (op_src < 0) { + if (op_src < 0 && !TCGV_IS_UNUSED(op_arg)) { tcg_temp_free_i32(op_arg); } =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947920241858.4955728179143; Tue, 6 Feb 2018 12:12:00 -0800 (PST) Received: from localhost ([::1]:55385 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9as-0005m6-3b for importer@patchew.org; Tue, 06 Feb 2018 15:11:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44652) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j9-0005l5-Hc for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:33 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iy-0008FC-3V for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:21 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:34340 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ix-0008Eb-QS for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:11 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEKpv126689 for ; Tue, 6 Feb 2018 14:16:11 -0500 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhwn1fmj-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:10 -0500 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:07 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG7up43188374; Tue, 6 Feb 2018 19:16:07 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8DE90AC03A; Tue, 6 Feb 2018 14:17:27 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 5DF5DAC041; Tue, 6 Feb 2018 14:17:27 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:25 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0040-0000-0000-000003EF7358 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:09 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0041-0000-0000-000007E4E59E Message-Id: <20180206191515.25830-5-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id w16JEKpv126689 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 04/54] qemu-options: Remove stray colons from output of --help X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Markus Armbruster Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Markus Armbruster Commit 43f187a broke --help: it put colons into blank lines. It removed the colon from DEFHEADING(TITLE:) and added it back in the macro expansion of DEFHEADING(TITLE), so hxtool can emit "@subsection TITLE" more easily. Trouble is it's added back even for the blank lines made with DEFHEADING(). Put the colons back where they were before commit 43f187a, and strip them in hxtool instead. Cc: Paolo Bonzini CC: qemu-stable@nongnu.org Signed-off-by: Markus Armbruster Message-Id: <20171002140307.5292-2-armbru@redhat.com> Reviewed-by: Marc-Andr=C3=A9 Lureau (cherry picked from commit de6b4f908c300c7e7e0dc057310f5cbdcf1aed78) Signed-off-by: Michael Roth --- qemu-options-wrapper.h | 2 +- qemu-options.hx | 27 ++++++++++++++------------- scripts/hxtool | 3 ++- 3 files changed, 17 insertions(+), 15 deletions(-) diff --git a/qemu-options-wrapper.h b/qemu-options-wrapper.h index 4d7aeb1352..13bfea0294 100644 --- a/qemu-options-wrapper.h +++ b/qemu-options-wrapper.h @@ -14,7 +14,7 @@ =20 #define ARCHHEADING(text, arch_mask) \ if ((arch_mask) & arch_type) \ - puts(stringify(text) ":"); + puts(stringify(text)); =20 #define DEFHEADING(text) ARCHHEADING(text, QEMU_ARCH_ALL) =20 diff --git a/qemu-options.hx b/qemu-options.hx index f11c4ac960..57f2c6a75f 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -6,7 +6,7 @@ HXCOMM construct option structures, enums and help message = for specified HXCOMM architectures. HXCOMM HXCOMM can be used for comments, discarded from both texi and C =20 -DEFHEADING(Standard options) +DEFHEADING(Standard options:) STEXI @table @option ETEXI @@ -578,7 +578,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(Block device options) +DEFHEADING(Block device options:) STEXI @table @option ETEXI @@ -1181,7 +1181,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(USB options) +DEFHEADING(USB options:) STEXI @table @option ETEXI @@ -1246,7 +1246,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(Display options) +DEFHEADING(Display options:) STEXI @table @option ETEXI @@ -1783,7 +1783,7 @@ STEXI ETEXI ARCHHEADING(, QEMU_ARCH_I386) =20 -ARCHHEADING(i386 target only, QEMU_ARCH_I386) +ARCHHEADING(i386 target only:, QEMU_ARCH_I386) STEXI @table @option ETEXI @@ -1899,7 +1899,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(Network options) +DEFHEADING(Network options:) STEXI @table @option ETEXI @@ -2480,7 +2480,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(Character device options) +DEFHEADING(Character device options:) STEXI =20 The general form of a character device option is: @@ -2813,7 +2813,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(Device URL Syntax) +DEFHEADING(Device URL Syntax:) STEXI =20 In addition to using normal file images for the emulated storage devices, @@ -3043,7 +3043,7 @@ STEXI @end table ETEXI =20 -DEFHEADING(Bluetooth(R) options) +DEFHEADING(Bluetooth(R) options:) STEXI @table @option ETEXI @@ -3119,7 +3119,7 @@ ETEXI DEFHEADING() =20 #ifdef CONFIG_TPM -DEFHEADING(TPM device options) +DEFHEADING(TPM device options:) =20 DEF("tpmdev", HAS_ARG, QEMU_OPTION_tpmdev, \ "-tpmdev passthrough,id=3Did[,path=3Dpath][,cancel-path=3Dpath]\n" @@ -3209,7 +3209,7 @@ DEFHEADING() =20 #endif =20 -DEFHEADING(Linux/Multiboot boot specific) +DEFHEADING(Linux/Multiboot boot specific:) STEXI =20 When using these options, you can use a given Linux or Multiboot @@ -3265,7 +3265,7 @@ STEXI ETEXI DEFHEADING() =20 -DEFHEADING(Debug/Expert options) +DEFHEADING(Debug/Expert options:) STEXI @table @option ETEXI @@ -4171,7 +4171,8 @@ STEXI @end table ETEXI DEFHEADING() -DEFHEADING(Generic object creation) + +DEFHEADING(Generic object creation:) STEXI @table @option ETEXI diff --git a/scripts/hxtool b/scripts/hxtool index 1e2c97c5e6..7d7c4289e3 100644 --- a/scripts/hxtool +++ b/scripts/hxtool @@ -19,7 +19,8 @@ hxtoh() print_texi_heading() { if test "$*" !=3D ""; then - printf "@subsection %s\n" "$*" + title=3D"$*" + printf "@subsection %s\n" "${title%:}" fi } =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517948371233226.44342895745535; Tue, 6 Feb 2018 12:19:31 -0800 (PST) Received: from localhost ([::1]:56136 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9iE-0004Uq-80 for importer@patchew.org; Tue, 06 Feb 2018 15:19:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44818) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8jF-0005qP-GH for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8j3-0008KE-NE for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:27 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:34868 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8j3-0008JO-De for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:17 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEL3s126830 for ; Tue, 6 Feb 2018 14:16:17 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhwn1fqm-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:15 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:10 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JGA5N41943172; Tue, 6 Feb 2018 19:16:10 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E3821AC03F; Tue, 6 Feb 2018 14:17:30 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id A9F14AC046; Tue, 6 Feb 2018 14:17:30 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:26 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F63 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:12 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E7B1 Message-Id: <20180206191515.25830-6-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 05/54] qemu-pr-helper: miscellaneous fixes X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini 1) Return a generic sense if TEST UNIT READY does not provide one; 2) Fix two mistakes in copying from the spec. Cc: qemu-stable@nongnu.org Reported-by: Dr. David Alan Gilbert Signed-off-by: Paolo Bonzini (cherry picked from commit a4a9b6eaf35dbe4bf0e069854945bf5e45fc7eab) Signed-off-by: Michael Roth --- include/scsi/utils.h | 6 +++++- scsi/qemu-pr-helper.c | 30 ++++++++++++++++++++++++++---- scsi/utils.c | 10 ++++++++++ 3 files changed, 41 insertions(+), 5 deletions(-) diff --git a/include/scsi/utils.h b/include/scsi/utils.h index 00a4bdb080..eb07e474ee 100644 --- a/include/scsi/utils.h +++ b/include/scsi/utils.h @@ -76,7 +76,11 @@ extern const struct SCSISense sense_code_LUN_FAILURE; extern const struct SCSISense sense_code_LUN_COMM_FAILURE; /* Command aborted, Overlapped Commands Attempted */ extern const struct SCSISense sense_code_OVERLAPPED_COMMANDS; -/* LUN not ready, Capacity data has changed */ +/* Medium error, Unrecovered read error */ +extern const struct SCSISense sense_code_READ_ERROR; +/* LUN not ready, Cause not reportable */ +extern const struct SCSISense sense_code_NOT_READY; +/* Unit attention, Capacity data has changed */ extern const struct SCSISense sense_code_CAPACITY_CHANGED; /* Unit attention, SCSI bus reset */ extern const struct SCSISense sense_code_SCSI_BUS_RESET; diff --git a/scsi/qemu-pr-helper.c b/scsi/qemu-pr-helper.c index dd9785143b..9fe615c73c 100644 --- a/scsi/qemu-pr-helper.c +++ b/scsi/qemu-pr-helper.c @@ -314,6 +314,22 @@ static int is_mpath(int fd) return !strncmp(tgt->target_type, "multipath", DM_MAX_TYPE_NAME); } =20 +static SCSISense mpath_generic_sense(int r) +{ + switch (r) { + case MPATH_PR_SENSE_NOT_READY: + return SENSE_CODE(NOT_READY); + case MPATH_PR_SENSE_MEDIUM_ERROR: + return SENSE_CODE(READ_ERROR); + case MPATH_PR_SENSE_HARDWARE_ERROR: + return SENSE_CODE(TARGET_FAILURE); + case MPATH_PR_SENSE_ABORTED_COMMAND: + return SENSE_CODE(IO_ERROR); + default: + abort(); + } +} + static int mpath_reconstruct_sense(int fd, int r, uint8_t *sense) { switch (r) { @@ -329,7 +345,13 @@ static int mpath_reconstruct_sense(int fd, int r, uint= 8_t *sense) */ uint8_t cdb[6] =3D { TEST_UNIT_READY }; int sz =3D 0; - return do_sgio(fd, cdb, sense, NULL, &sz, SG_DXFER_NONE); + int r =3D do_sgio(fd, cdb, sense, NULL, &sz, SG_DXFER_NONE); + + if (r !=3D GOOD) { + return r; + } + scsi_build_sense(sense, mpath_generic_sense(r)); + return CHECK_CONDITION; } =20 case MPATH_PR_SENSE_UNIT_ATTENTION: @@ -449,7 +471,7 @@ static int multipath_pr_out(int fd, const uint8_t *cdb,= uint8_t *sense, memset(¶mp, 0, sizeof(paramp)); memcpy(¶mp.key, ¶m[0], 8); memcpy(¶mp.sa_key, ¶m[8], 8); - paramp.sa_flags =3D param[10]; + paramp.sa_flags =3D param[20]; if (sz > PR_OUT_FIXED_PARAM_SIZE) { size_t transportid_len; int i, j; @@ -478,8 +500,8 @@ static int multipath_pr_out(int fd, const uint8_t *cdb,= uint8_t *sense, j +=3D offsetof(struct transportid, n_port_name[8]); i +=3D 24; break; - case 3: - case 0x43: + case 5: + case 0x45: /* iSCSI transport. */ len =3D lduw_be_p(¶m[i + 2]); if (len > 252 || (len & 3) || i + len + 4 > transportid_le= n) { diff --git a/scsi/utils.c b/scsi/utils.c index 5684951b12..e4182a9b09 100644 --- a/scsi/utils.c +++ b/scsi/utils.c @@ -211,6 +211,16 @@ const struct SCSISense sense_code_LUN_COMM_FAILURE =3D= { .key =3D ABORTED_COMMAND, .asc =3D 0x08, .ascq =3D 0x00 }; =20 +/* Medium Error, Unrecovered read error */ +const struct SCSISense sense_code_READ_ERROR =3D { + .key =3D MEDIUM_ERROR, .asc =3D 0x11, .ascq =3D 0x00 +}; + +/* Not ready, Cause not reportable */ +const struct SCSISense sense_code_NOT_READY =3D { + .key =3D NOT_READY, .asc =3D 0x04, .ascq =3D 0x00 +}; + /* Unit attention, Capacity data has changed */ const struct SCSISense sense_code_CAPACITY_CHANGED =3D { .key =3D UNIT_ATTENTION, .asc =3D 0x2a, .ascq =3D 0x09 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15179481273861017.2961933886834; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:11 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JGBwf49742006; Tue, 6 Feb 2018 19:16:11 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 8E8F1AC041; Tue, 6 Feb 2018 14:17:31 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 54918AC040; Tue, 6 Feb 2018 14:17:31 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:27 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0044-0000-0000-000003DC6DD4 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:13 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0045-0000-0000-0000080BDD5C Message-Id: <20180206191515.25830-7-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 06/54] block/nbd: fix segmentation fault when .desc is not null-terminated X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Murilo Opsfelder Araujo Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Murilo Opsfelder Araujo The find_desc_by_name() from util/qemu-option.c relies on the .name not bei= ng NULL to call strcmp(). This check becomes unsafe when the list is not NULL-terminated, which is the case of nbd_runtime_opts in block/nbd.c, and = can result in segmentation fault when strcmp() tries to access an invalid memor= y: #0 0x00007fff8c75f7d4 in __strcmp_power9 () from /lib64/libc.so.6 #1 0x00000000102d3ec8 in find_desc_by_name (desc=3D0x1036d6f0, name=3D0= x28e46670 "server.path") at util/qemu-option.c:166 #2 0x00000000102d93e0 in qemu_opts_absorb_qdict (opts=3D0x28e47a80, qdi= ct=3D0x28e469a0, errp=3D0x7fffec247c98) at util/qemu-option.c:1026 #3 0x000000001012a2e4 in nbd_open (bs=3D0x28e42290, options=3D0x28e469a= 0, flags=3D24578, errp=3D0x7fffec247d80) at block/nbd.c:406 #4 0x00000000100144e8 in bdrv_open_driver (bs=3D0x28e42290, drv=3D0x103= 6e070 , node_name=3D0x0, options=3D0x28e469a0, open_flags=3D= 24578, errp=3D0x7fffec247f50) at block.c:1135 #5 0x0000000010015b04 in bdrv_open_common (bs=3D0x28e42290, file=3D0x0,= options=3D0x28e469a0, errp=3D0x7fffec247f50) at block.c:1395 >From gdb, the desc[i].name was not NULL and resulted in strcmp() accessing= an invalid memory: >>> p desc[5] $8 =3D { name =3D 0x1037f098 "R27A", type =3D 1561964883, help =3D 0xc0bbb23e , def_value_str =3D 0x2 } >>> p desc[6] $9 =3D { name =3D 0x103dac78 <__gcov0.do_qemu_init_bdrv_nbd_init> "\001", type =3D 272101528, help =3D 0x29ec0b754403e31f , def_value_str =3D 0x81f343b9 } This patch fixes the segmentation fault in strcmp() by adding a NULL elemen= t at the end of nbd_runtime_opts.desc list, which is the common practice to most= of other structs like runtime_opts in block/null.c. Thus, the desc[i].name != =3D NULL check becomes safe because it will not evaluate to true when .desc list rea= ched its end. Reported-by: R. Nageswara Sastry Buglink: https://bugs.launchpad.net/qemu/+bug/1727259 Signed-off-by: Murilo Opsfelder Araujo Message-Id: <20180105133241.14141-2-muriloo@linux.vnet.ibm.com> CC: qemu-stable@nongnu.org Fixes: 7ccc44fd7d1dfa62c4d6f3a680df809d6e7068ce Signed-off-by: Eric Blake (cherry picked from commit c4365735a7d38f4355c6f77e6670d3972315f7c2) Signed-off-by: Michael Roth --- block/nbd.c | 1 + 1 file changed, 1 insertion(+) diff --git a/block/nbd.c b/block/nbd.c index a50d24b50a..8b8ba56cdd 100644 --- a/block/nbd.c +++ b/block/nbd.c @@ -388,6 +388,7 @@ static QemuOptsList nbd_runtime_opts =3D { .type =3D QEMU_OPT_STRING, .help =3D "ID of the TLS credentials to use", }, + { /* end of list */ } }, }; =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947699483469.79952244067533; Tue, 6 Feb 2018 12:08:19 -0800 (PST) Received: from localhost ([::1]:54644 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9XO-0001hO-Gn for importer@patchew.org; Tue, 06 Feb 2018 15:08:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44755) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8jA-0005mR-T9 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8j1-0008IW-Qr for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:24 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:47320 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8j1-0008ID-LN for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:15 -0500 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEQo7019569 for ; Tue, 6 Feb 2018 14:16:15 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhccjugd-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:14 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:12 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JGBiv36503590; Tue, 6 Feb 2018 19:16:11 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 3575CAC048; Tue, 6 Feb 2018 14:17:32 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id EFD40AC043; Tue, 6 Feb 2018 14:17:31 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:28 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F65 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:13 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E7B5 Message-Id: <20180206191515.25830-8-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=15 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 07/54] block: Make bdrv_drain_invoke() recursive X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kevin Wolf This change separates bdrv_drain_invoke(), which calls the BlockDriver drain callbacks, from bdrv_drain_recurse(). Instead, the function performs its own recursion now. One reason for this is that bdrv_drain_recurse() can be called multiple times by bdrv_drain_all_begin(), but the callbacks may only be called once. The separation is necessary to fix this bug. The other reason is that we intend to go to a model where we call all driver callbacks first, and only then start polling. This is not fully achieved yet with this patch, as bdrv_drain_invoke() contains a BDRV_POLL_WHILE() loop for the block driver callbacks, which can still call callbacks for any unrelated event. It's a step in this direction anyway. Cc: qemu-stable@nongnu.org Signed-off-by: Kevin Wolf Reviewed-by: Stefan Hajnoczi (cherry picked from commit db0289b9b26cb653d5662f5d6a2a52d70243cd56) Signed-off-by: Michael Roth --- block/io.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-) diff --git a/block/io.c b/block/io.c index 6773926fc1..096468b761 100644 --- a/block/io.c +++ b/block/io.c @@ -175,8 +175,10 @@ static void coroutine_fn bdrv_drain_invoke_entry(void = *opaque) bdrv_wakeup(bs); } =20 +/* Recursively call BlockDriver.bdrv_co_drain_begin/end callbacks */ static void bdrv_drain_invoke(BlockDriverState *bs, bool begin) { + BdrvChild *child, *tmp; BdrvCoDrainData data =3D { .bs =3D bs, .done =3D false, .begin =3D beg= in}; =20 if (!bs->drv || (begin && !bs->drv->bdrv_co_drain_begin) || @@ -187,6 +189,10 @@ static void bdrv_drain_invoke(BlockDriverState *bs, bo= ol begin) data.co =3D qemu_coroutine_create(bdrv_drain_invoke_entry, &data); bdrv_coroutine_enter(bs, data.co); BDRV_POLL_WHILE(bs, !data.done); + + QLIST_FOREACH_SAFE(child, &bs->children, next, tmp) { + bdrv_drain_invoke(child->bs, begin); + } } =20 static bool bdrv_drain_recurse(BlockDriverState *bs, bool begin) @@ -194,9 +200,6 @@ static bool bdrv_drain_recurse(BlockDriverState *bs, bo= ol begin) BdrvChild *child, *tmp; bool waited; =20 - /* Ensure any pending metadata writes are submitted to bs->file. */ - bdrv_drain_invoke(bs, begin); - /* Wait for drained requests to finish */ waited =3D BDRV_POLL_WHILE(bs, atomic_read(&bs->in_flight) > 0); =20 @@ -279,6 +282,7 @@ void bdrv_drained_begin(BlockDriverState *bs) bdrv_parent_drained_begin(bs); } =20 + bdrv_drain_invoke(bs, true); bdrv_drain_recurse(bs, true); } =20 @@ -294,6 +298,7 @@ void bdrv_drained_end(BlockDriverState *bs) } =20 bdrv_parent_drained_end(bs); + bdrv_drain_invoke(bs, false); bdrv_drain_recurse(bs, false); aio_enable_external(bdrv_get_aio_context(bs)); } @@ -372,6 +377,8 @@ void bdrv_drain_all_begin(void) aio_context_acquire(aio_context); for (bs =3D bdrv_first(&it); bs; bs =3D bdrv_next(&it)) { if (aio_context =3D=3D bdrv_get_aio_context(bs)) { + /* FIXME Calling this multiple times is wrong */ + bdrv_drain_invoke(bs, true); waited |=3D bdrv_drain_recurse(bs, true); } } @@ -393,6 +400,7 @@ void bdrv_drain_all_end(void) aio_context_acquire(aio_context); aio_enable_external(aio_context); bdrv_parent_drained_end(bs); + bdrv_drain_invoke(bs, false); bdrv_drain_recurse(bs, false); aio_context_release(aio_context); } --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947060898718.6857716693586; Tue, 6 Feb 2018 11:57:40 -0800 (PST) Received: from localhost ([::1]:53670 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9N6-0000GR-4J for importer@patchew.org; Tue, 06 Feb 2018 14:57:40 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44872) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8jF-0005qS-GH for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:39 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8j4-0008Kf-1e for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:29 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:47622 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8j3-0008K6-No for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:17 -0500 Received: from pps.filterd (m0098413.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JERwv019606 for ; Tue, 6 Feb 2018 14:16:17 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhccjuj0-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:16 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:12 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JGCGY5242982; Tue, 6 Feb 2018 19:16:12 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D3A31AC041; Tue, 6 Feb 2018 14:17:32 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 99B6CAC03A; Tue, 6 Feb 2018 14:17:32 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:29 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F66 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:14 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E7B7 Message-Id: <20180206191515.25830-9-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 08/54] block: Call .drain_begin only once in bdrv_drain_all_begin() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Kevin Wolf bdrv_drain_all_begin() used to call the .bdrv_co_drain_begin() driver callback inside its polling loop. This means that how many times it got called for each node depended on long it had to poll the event loop. This is obviously not right and results in nodes that stay drained even after bdrv_drain_all_end(), which calls .bdrv_co_drain_begin() once per node. Fix bdrv_drain_all_begin() to call the callback only once, too. Cc: qemu-stable@nongnu.org Signed-off-by: Kevin Wolf Reviewed-by: Stefan Hajnoczi (cherry picked from commit 2da9b7d456278bccc6ce889ae350f2867155d7e8) Signed-off-by: Michael Roth --- block/io.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/block/io.c b/block/io.c index 096468b761..603f5b059e 100644 --- a/block/io.c +++ b/block/io.c @@ -355,6 +355,7 @@ void bdrv_drain_all_begin(void) aio_context_acquire(aio_context); bdrv_parent_drained_begin(bs); aio_disable_external(aio_context); + bdrv_drain_invoke(bs, true); aio_context_release(aio_context); =20 if (!g_slist_find(aio_ctxs, aio_context)) { @@ -377,8 +378,6 @@ void bdrv_drain_all_begin(void) aio_context_acquire(aio_context); for (bs =3D bdrv_first(&it); bs; bs =3D bdrv_next(&it)) { if (aio_context =3D=3D bdrv_get_aio_context(bs)) { - /* FIXME Calling this multiple times is wrong */ - bdrv_drain_invoke(bs, true); waited |=3D bdrv_drain_recurse(bs, true); } } --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517944727869311.5714277256334; Tue, 6 Feb 2018 11:18:47 -0800 (PST) Received: from localhost ([::1]:53340 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8lJ-0007UP-6g for importer@patchew.org; Tue, 06 Feb 2018 14:18:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43598) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iX-00056a-Pw for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iS-0007oI-Mv for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:45 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:57424 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iS-0007nj-Hp for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:40 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JELu6126857 for ; Tue, 6 Feb 2018 14:15:38 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhwn1eqj-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:38 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:36 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFZBQ49938674; Tue, 6 Feb 2018 19:15:35 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5AE8BAC041; Tue, 6 Feb 2018 14:16:56 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 21EE3AC03A; Tue, 6 Feb 2018 14:16:56 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:30 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F38 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:37 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E73F Message-Id: <20180206191515.25830-10-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 09/54] block: Open backing image in force share mode for size probe X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Fam Zheng , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fam Zheng Management tools create overlays of running guests with qemu-img: $ qemu-img create -b /image/in/use.qcow2 -f qcow2 /overlay/image.qcow2 but this doesn't work anymore due to image locking: qemu-img: /overlay/image.qcow2: Failed to get shared "write" lock Is another process using the image? Could not open backing image to determine size. Use the force share option to allow this use case again. Cc: qemu-stable@nongnu.org Signed-off-by: Fam Zheng Reviewed-by: Eric Blake Signed-off-by: Kevin Wolf (cherry picked from commit cc954f01e3c004aad081aa36736a17e842b80211) Signed-off-by: Michael Roth --- block.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/block.c b/block.c index 9a1a0d1e73..f236431da1 100644 --- a/block.c +++ b/block.c @@ -4593,10 +4593,11 @@ void bdrv_img_create(const char *filename, const ch= ar *fmt, back_flags =3D flags; back_flags &=3D ~(BDRV_O_RDWR | BDRV_O_SNAPSHOT | BDRV_O_NO_BACKIN= G); =20 + backing_options =3D qdict_new(); if (backing_fmt) { - backing_options =3D qdict_new(); qdict_put_str(backing_options, "driver", backing_fmt); } + qdict_put_bool(backing_options, BDRV_OPT_FORCE_SHARE, true); =20 bs =3D bdrv_open(full_backing, NULL, backing_options, back_flags, &local_err); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1518139661950710.0494045390715; Thu, 8 Feb 2018 17:27:41 -0800 (PST) Received: from localhost ([::1]:45556 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejxTV-0007zI-SQ for importer@patchew.org; Thu, 08 Feb 2018 20:27:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:50430) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ejxSJ-0007Ng-Hm for qemu-devel@nongnu.org; Thu, 08 Feb 2018 20:26:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ejxSG-0006MH-6C for qemu-devel@nongnu.org; Thu, 08 Feb 2018 20:26:23 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:37992 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ejxSG-0006LT-1D for qemu-devel@nongnu.org; Thu, 08 Feb 2018 20:26:20 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w191NnVg140159 for ; Thu, 8 Feb 2018 20:26:18 -0500 Received: from e31.co.us.ibm.com (e31.co.us.ibm.com [32.97.110.149]) by mx0b-001b2d01.pphosted.com with ESMTP id 2g11ju0u4u-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Thu, 08 Feb 2018 20:26:18 -0500 Received: from localhost by e31.co.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Thu, 8 Feb 2018 18:26:13 -0700 Received: from b03ledav006.gho.boulder.ibm.com (b03ledav006.gho.boulder.ibm.com [9.17.130.237]) by b03cxnp08025.gho.boulder.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w191QDHi10617166; Thu, 8 Feb 2018 18:26:13 -0700 Received: from b03ledav006.gho.boulder.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 227CEC6037; Thu, 8 Feb 2018 18:26:13 -0700 (MST) Received: from localhost (unknown [9.53.92.235]) by b03ledav006.gho.boulder.ibm.com (Postfix) with ESMTP id 03243C603E; Thu, 8 Feb 2018 18:26:13 -0700 (MST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:31 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020901-8235-0000-0000-00000CFD14AA X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008499; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000250; SDB=6.00986969; UDB=6.00500930; IPR=6.00766328; BA=6.00005820; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019449; XFM=3.00000015; UTC=2018-02-09 01:26:15 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020901-8236-0000-0000-00003F991982 Message-Id: <20180206191515.25830-11-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-08_13:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=29 phishscore=0 bulkscore=0 spamscore=0 clxscore=1011 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802090015 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 10/54] vfio: Fix vfio-kvm group registration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Alex Williamson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alex Williamson Commit 8c37faa475f3 ("vfio-pci, ppc64/spapr: Reorder group-to-container attaching") moved registration of groups with the vfio-kvm device from vfio_get_group() to vfio_connect_container(), but it missed the case where a group is attached to an existing container and takes an early exit. Perhaps this is a less common case on ppc64/spapr, but on x86 (without viommu) all groups are connected to the same container and thus only the first group gets registered with the vfio-kvm device. This becomes a problem if we then hot-unplug the devices associated with that first group and we end up with KVM being misinformed about any vfio connections that might remain. Fix by including the call to vfio_kvm_device_add_group() in this early exit path. Fixes: 8c37faa475f3 ("vfio-pci, ppc64/spapr: Reorder group-to-container att= aching") Cc: qemu-stable@nongnu.org # qemu-2.10+ Reviewed-by: Alexey Kardashevskiy Reviewed-by: Peter Xu Tested-by: Peter Xu Reviewed-by: Eric Auger Tested-by: Eric Auger Signed-off-by: Alex Williamson (cherry picked from commit 2016986aedb6ea2839662eb5f60630f3e231bd1a) Signed-off-by: Michael Roth --- hw/vfio/common.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index 7b2924c0ef..7007878e34 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -968,6 +968,7 @@ static int vfio_connect_container(VFIOGroup *group, Add= ressSpace *as, if (!ioctl(group->fd, VFIO_GROUP_SET_CONTAINER, &container->fd)) { group->container =3D container; QLIST_INSERT_HEAD(&container->group_list, group, container_nex= t); + vfio_kvm_device_add_group(group); return 0; } } --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945140097176.02640392653495; Tue, 6 Feb 2018 11:25:40 -0800 (PST) Received: from localhost ([::1]:53383 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8s2-0005Nd-21 for importer@patchew.org; Tue, 06 Feb 2018 14:25:34 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43631) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iZ-000578-Ox for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iW-0007py-7N for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:47 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:38568) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iV-0007pN-SQ for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:44 -0500 Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEJHs092819 for ; Tue, 6 Feb 2018 14:15:42 -0500 Received: from e19.ny.us.ibm.com (e19.ny.us.ibm.com [129.33.205.209]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyf63hetk-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:42 -0500 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:38 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFbKW50659336; Tue, 6 Feb 2018 19:15:37 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1BBD7AC040; Tue, 6 Feb 2018 14:16:58 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id DCF0AAC03A; Tue, 6 Feb 2018 14:16:57 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:32 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0056-0000-0000-0000041670A1 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:39 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0057-0000-0000-0000084DDF97 Message-Id: <20180206191515.25830-12-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 11/54] hw/intc/arm_gicv3: Make reserved register addresses RAZ/WI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell The GICv3 specification says that reserved register addresses should RAZ/WI. This means we need to return MEMTX_OK, not MEMTX_ERROR, because now that we support generating external aborts the latter will cause an abort on new board models. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Message-id: 1513183941-24300-2-git-send-email-peter.maydell@linaro.org Reviewed-by: Alistair Francis (cherry picked from commit f1945632b43e36bd9f3e0c2feb0e5b152be7ed91) Signed-off-by: Michael Roth --- hw/intc/arm_gicv3_dist.c | 13 +++++++++++++ hw/intc/arm_gicv3_its_common.c | 8 +++----- hw/intc/arm_gicv3_redist.c | 13 +++++++++++++ 3 files changed, 29 insertions(+), 5 deletions(-) diff --git a/hw/intc/arm_gicv3_dist.c b/hw/intc/arm_gicv3_dist.c index 3ea3dd0d40..93fe936862 100644 --- a/hw/intc/arm_gicv3_dist.c +++ b/hw/intc/arm_gicv3_dist.c @@ -817,6 +817,13 @@ MemTxResult gicv3_dist_read(void *opaque, hwaddr offse= t, uint64_t *data, "%s: invalid guest read at offset " TARGET_FMT_plx "size %u\n", __func__, offset, size); trace_gicv3_dist_badread(offset, size, attrs.secure); + /* The spec requires that reserved registers are RAZ/WI; + * so use MEMTX_ERROR returns from leaf functions as a way to + * trigger the guest-error logging but don't return it to + * the caller, or we'll cause a spurious guest data abort. + */ + r =3D MEMTX_OK; + *data =3D 0; } else { trace_gicv3_dist_read(offset, *data, size, attrs.secure); } @@ -852,6 +859,12 @@ MemTxResult gicv3_dist_write(void *opaque, hwaddr offs= et, uint64_t data, "%s: invalid guest write at offset " TARGET_FMT_plx "size %u\n", __func__, offset, size); trace_gicv3_dist_badwrite(offset, data, size, attrs.secure); + /* The spec requires that reserved registers are RAZ/WI; + * so use MEMTX_ERROR returns from leaf functions as a way to + * trigger the guest-error logging but don't return it to + * the caller, or we'll cause a spurious guest data abort. + */ + r =3D MEMTX_OK; } else { trace_gicv3_dist_write(offset, data, size, attrs.secure); } diff --git a/hw/intc/arm_gicv3_its_common.c b/hw/intc/arm_gicv3_its_common.c index f2cce597a9..48a85524b7 100644 --- a/hw/intc/arm_gicv3_its_common.c +++ b/hw/intc/arm_gicv3_its_common.c @@ -67,7 +67,8 @@ static MemTxResult gicv3_its_trans_read(void *opaque, hwa= ddr offset, MemTxAttrs attrs) { qemu_log_mask(LOG_GUEST_ERROR, "ITS read at offset 0x%"PRIx64"\n", off= set); - return MEMTX_ERROR; + *data =3D 0; + return MEMTX_OK; } =20 static MemTxResult gicv3_its_trans_write(void *opaque, hwaddr offset, @@ -82,15 +83,12 @@ static MemTxResult gicv3_its_trans_write(void *opaque, = hwaddr offset, if (ret <=3D 0) { qemu_log_mask(LOG_GUEST_ERROR, "ITS: Error sending MSI: %s\n", strerror(-ret)); - return MEMTX_DECODE_ERROR; } - - return MEMTX_OK; } else { qemu_log_mask(LOG_GUEST_ERROR, "ITS write at bad offset 0x%"PRIx64"\n", offset); - return MEMTX_DECODE_ERROR; } + return MEMTX_OK; } =20 static const MemoryRegionOps gicv3_its_trans_ops =3D { diff --git a/hw/intc/arm_gicv3_redist.c b/hw/intc/arm_gicv3_redist.c index 77e5cfa327..8a8684d76e 100644 --- a/hw/intc/arm_gicv3_redist.c +++ b/hw/intc/arm_gicv3_redist.c @@ -455,6 +455,13 @@ MemTxResult gicv3_redist_read(void *opaque, hwaddr off= set, uint64_t *data, "size %u\n", __func__, offset, size); trace_gicv3_redist_badread(gicv3_redist_affid(cs), offset, size, attrs.secure); + /* The spec requires that reserved registers are RAZ/WI; + * so use MEMTX_ERROR returns from leaf functions as a way to + * trigger the guest-error logging but don't return it to + * the caller, or we'll cause a spurious guest data abort. + */ + r =3D MEMTX_OK; + *data =3D 0; } else { trace_gicv3_redist_read(gicv3_redist_affid(cs), offset, *data, size, attrs.secure); @@ -505,6 +512,12 @@ MemTxResult gicv3_redist_write(void *opaque, hwaddr of= fset, uint64_t data, "size %u\n", __func__, offset, size); trace_gicv3_redist_badwrite(gicv3_redist_affid(cs), offset, data, size, attrs.secure); + /* The spec requires that reserved registers are RAZ/WI; + * so use MEMTX_ERROR returns from leaf functions as a way to + * trigger the guest-error logging but don't return it to + * the caller, or we'll cause a spurious guest data abort. + */ + r =3D MEMTX_OK; } else { trace_gicv3_redist_write(gicv3_redist_affid(cs), offset, data, size, attrs.secure); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:38 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFcev42270772; Tue, 6 Feb 2018 19:15:38 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C6369AC046; Tue, 6 Feb 2018 14:16:58 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 8C6EDAC041; Tue, 6 Feb 2018 14:16:58 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:33 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0052-0000-0000-000002B0F8D2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:40 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0053-0000-0000-0000537EEE68 Message-Id: <20180206191515.25830-13-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 12/54] hw/intc/arm_gic: reserved register addresses are RAZ/WI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell The GICv2 specification says that reserved register addresses must RAZ/WI; now that we implement external abort handling for Arm CPUs this means we must return MEMTX_OK rather than MEMTX_ERROR, to avoid generating a spurious guest data abort. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Message-id: 1513183941-24300-3-git-send-email-peter.maydell@linaro.org Reviewed-by: Alistair Francis (cherry picked from commit 0cf09852015e47a5fbb974ff7ac320366afd21ee) Signed-off-by: Michael Roth --- hw/intc/arm_gic.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c index 5a0e2a3c1a..d701e49ff9 100644 --- a/hw/intc/arm_gic.c +++ b/hw/intc/arm_gic.c @@ -1261,7 +1261,8 @@ static MemTxResult gic_cpu_read(GICState *s, int cpu,= int offset, default: qemu_log_mask(LOG_GUEST_ERROR, "gic_cpu_read: Bad offset %x\n", (int)offset); - return MEMTX_ERROR; + *data =3D 0; + break; } return MEMTX_OK; } @@ -1329,7 +1330,7 @@ static MemTxResult gic_cpu_write(GICState *s, int cpu= , int offset, default: qemu_log_mask(LOG_GUEST_ERROR, "gic_cpu_write: Bad offset %x\n", (int)offset); - return MEMTX_ERROR; + return MEMTX_OK; } gic_update(s); return MEMTX_OK; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517944941226727.5703379238621; Tue, 6 Feb 2018 11:22:21 -0800 (PST) Received: from localhost ([::1]:53367 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ou-0002hb-6y for importer@patchew.org; Tue, 06 Feb 2018 14:22:20 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43661) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ia-00057e-NW for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:50 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iX-0007qb-11 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:48 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:47356) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iW-0007pv-Pb for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:44 -0500 Received: from pps.filterd (m0098404.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEYSJ043437 for ; Tue, 6 Feb 2018 14:15:44 -0500 Received: from e19.ny.us.ibm.com (e19.ny.us.ibm.com [129.33.205.209]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyea63uu0-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:43 -0500 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:39 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFcnF42270788; Tue, 6 Feb 2018 19:15:38 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 73F21AC041; Tue, 6 Feb 2018 14:16:59 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 39DA1AC040; Tue, 6 Feb 2018 14:16:59 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:34 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0056-0000-0000-0000041670A2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:40 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0057-0000-0000-0000084DDF98 Message-Id: <20180206191515.25830-14-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 13/54] virtio_error: don't invoke status callbacks X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, "Michael S. Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: "Michael S. Tsirkin" Backends don't need to know what frontend requested a reset, and notifying then from virtio_error is messy because virtio_error itself might be invoked from backend. Let's just set the status directly. Cc: qemu-stable@nongnu.org Reported-by: Ilya Maximets Signed-off-by: Michael S. Tsirkin (cherry picked from commit 8fc47c876de638353bb635872f2c25bb7f4a3d6e) Signed-off-by: Michael Roth --- hw/virtio/virtio.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index ad564b0132..d6002ee550 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -2469,7 +2469,7 @@ void GCC_FMT_ATTR(2, 3) virtio_error(VirtIODevice *vd= ev, const char *fmt, ...) va_end(ap); =20 if (virtio_vdev_has_feature(vdev, VIRTIO_F_VERSION_1)) { - virtio_set_status(vdev, vdev->status | VIRTIO_CONFIG_S_NEEDS_RESET= ); + vdev->status =3D vdev->status | VIRTIO_CONFIG_S_NEEDS_RESET; virtio_notify_config(vdev); } =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945323924674.6758810252743; Tue, 6 Feb 2018 11:28:43 -0800 (PST) Received: from localhost ([::1]:53405 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8v5-0008A6-1F for importer@patchew.org; Tue, 06 Feb 2018 14:28:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43713) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ib-00058i-SX for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:52 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iX-0007qt-O6 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:49 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:40994) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iX-0007qQ-Fy for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:45 -0500 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JF246115366 for ; Tue, 6 Feb 2018 14:15:44 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fygkucw23-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:44 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:39 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFc0m40960128; Tue, 6 Feb 2018 19:15:39 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 150AEAC046; Tue, 6 Feb 2018 14:17:00 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id CF9FCAC041; Tue, 6 Feb 2018 14:16:59 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:35 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7D8F X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500281; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:41 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B409 Message-Id: <20180206191515.25830-15-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 14/54] vhost: remove assertion to prevent crash X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Igor Mammedov , "Michael S . Tsirkin" , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Jay Zhou Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jay Zhou QEMU will assert on vhost-user backed virtio device hotplug if QEMU is using more RAM regions than VHOST_MEMORY_MAX_NREGIONS (for example if it were started with a lot of DIMM devices). Fix it by returning error instead of asserting and let callers of vhost_set_mem_table() handle error condition gracefully. Cc: qemu-stable@nongnu.org Signed-off-by: Igor Mammedov Signed-off-by: Jay Zhou Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin (cherry picked from commit f4bf56fb78ed0e9f60fa1ed656c14ff4c494da5a) Signed-off-by: Michael Roth --- hw/virtio/vhost-user.c | 5 ++++- 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c index 093675ed98..850056298d 100644 --- a/hw/virtio/vhost-user.c +++ b/hw/virtio/vhost-user.c @@ -317,11 +317,14 @@ static int vhost_user_set_mem_table(struct vhost_dev = *dev, &offset); fd =3D memory_region_get_fd(mr); if (fd > 0) { + if (fd_num =3D=3D VHOST_MEMORY_MAX_NREGIONS) { + error_report("Failed preparing vhost-user memory table msg= "); + return -1; + } msg.payload.memory.regions[fd_num].userspace_addr =3D reg->use= rspace_addr; msg.payload.memory.regions[fd_num].memory_size =3D reg->memor= y_size; msg.payload.memory.regions[fd_num].guest_phys_addr =3D reg->gu= est_phys_addr; msg.payload.memory.regions[fd_num].mmap_offset =3D offset; - assert(fd_num < VHOST_MEMORY_MAX_NREGIONS); fds[fd_num++] =3D fd; } } --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945002655161.3823905388423; Tue, 6 Feb 2018 11:23:22 -0800 (PST) Received: from localhost ([::1]:53369 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8pt-0003Uh-Q2 for importer@patchew.org; Tue, 06 Feb 2018 14:23:21 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43762) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8id-00059v-PB for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ia-0007sn-0o for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:51 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:43790 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iZ-0007s9-R3 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:47 -0500 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEKow078915 for ; Tue, 6 Feb 2018 14:15:45 -0500 Received: from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyj92099x-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:44 -0500 Received: from localhost by e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:40 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFeFa43188452; Tue, 6 Feb 2018 19:15:40 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B3690AC03A; Tue, 6 Feb 2018 14:17:00 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 75343AC03F; Tue, 6 Feb 2018 14:17:00 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:36 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0036-0000-0000-000002BA0ABF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:42 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0037-0000-0000-0000433F8132 Message-Id: <20180206191515.25830-16-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id w16JEKow078915 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 15/54] hw/sd/pl181: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell Since pl181 is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but meant that migration failed because it's only in sd_reset() that we set up the wpgrps_size field. Cc: qemu-stable@nongnu.org Fixes: https://bugs.launchpad.net/qemu/+bug/1739378 Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-2-git-send-email-peter.maydell@linaro.org (cherry picked from commit 0cb57cc701839e7358918d5f2922ccbc04d28d17) Signed-off-by: Michael Roth --- hw/sd/pl181.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/sd/pl181.c b/hw/sd/pl181.c index 55c8098ecd..3ba1f7dd23 100644 --- a/hw/sd/pl181.c +++ b/hw/sd/pl181.c @@ -480,6 +480,10 @@ static void pl181_reset(DeviceState *d) =20 /* We can assume our GPIO outputs have been wired up now */ sd_set_cb(s->card, s->cardstatus[0], s->cardstatus[1]); + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. + */ + device_reset(DEVICE(s->card)); } =20 static void pl181_init(Object *obj) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945143078982.9639236197693; Tue, 6 Feb 2018 11:25:43 -0800 (PST) Received: from localhost ([::1]:53384 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8s6-0005Sn-2M for importer@patchew.org; Tue, 06 Feb 2018 14:25:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43784) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ie-0005Aa-I9 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:58 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ia-0007t8-Jy for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:52 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:56208) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iZ-0007ro-Uj for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:48 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFBeN064873 for ; Tue, 6 Feb 2018 14:15:47 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyhx2hbav-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:45 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:41 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFeTh47579376; Tue, 6 Feb 2018 19:15:40 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5C06DAC041; Tue, 6 Feb 2018 14:17:01 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 21771AC040; Tue, 6 Feb 2018 14:17:01 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:37 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F3D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:42 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E74E Message-Id: <20180206191515.25830-17-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0a-001b2d01.pphosted.com id w16JFBeN064873 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 16/54] hw/sd/milkymist-memcard: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell Since milkymist-memcard is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but meant that migration failed because it's only in sd_reset() that we set up the wpgrps_size field. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-3-git-send-email-peter.maydell@linaro.org (cherry picked from commit 16bf0e0e7aaa8efc0b8ee7e2aecb2fa235f82d38) Signed-off-by: Michael Roth --- hw/sd/milkymist-memcard.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/hw/sd/milkymist-memcard.c b/hw/sd/milkymist-memcard.c index 4008c81002..341da88552 100644 --- a/hw/sd/milkymist-memcard.c +++ b/hw/sd/milkymist-memcard.c @@ -248,6 +248,10 @@ static void milkymist_memcard_reset(DeviceState *d) for (i =3D 0; i < R_MAX; i++) { s->regs[i] =3D 0; } + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. + */ + device_reset(DEVICE(s->card)); } =20 static int milkymist_memcard_init(SysBusDevice *dev) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517944945145561.744359329196; Tue, 6 Feb 2018 11:22:25 -0800 (PST) Received: from localhost ([::1]:53368 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8oy-0002ll-AW for importer@patchew.org; Tue, 06 Feb 2018 14:22:24 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43771) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ie-0005A1-2S for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iZ-0007sK-PM for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:52 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:59874 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iZ-0007rq-Kj for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:47 -0500 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEMcP056550 for ; Tue, 6 Feb 2018 14:15:46 -0500 Received: from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fygjbwcdn-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:45 -0500 Received: from localhost by e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:41 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFfoJ47448292; Tue, 6 Feb 2018 19:15:41 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0AC8DAC03F; Tue, 6 Feb 2018 14:17:02 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id C47D8AC03A; Tue, 6 Feb 2018 14:17:01 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:38 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0052-0000-0000-000002B0F8D5 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:43 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0053-0000-0000-0000537EEE71 Message-Id: <20180206191515.25830-18-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id w16JEMcP056550 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 17/54] hw/sd/ssi-sd: Reset SD card on controller reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell Since ssi-sd is still using the legacy SD card API, the SD card created by sd_init() is not plugged into any bus. This means that the controller has to reset it manually. Failing to do this mostly didn't affect the guest since the guest typically does a programmed SD card reset as part of its SD controller driver initialization, but meant that migration failed because it's only in sd_reset() that we set up the wpgrps_size field. In the case of sd-ssi, we have to implement an entire reset function since there wasn't one previously, and that requires a QOM cast macro that got omitted when this device was QOMified. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Reviewed-by: Philippe Mathieu-Daud=C3=A9 Tested-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1515506513-31961-4-git-send-email-peter.maydell@linaro.org (cherry picked from commit 8046d44f3c9f67828d3368797d4d314433ee75e9) Signed-off-by: Michael Roth --- hw/sd/ssi-sd.c | 25 +++++++++++++++++++++++-- 1 file changed, 23 insertions(+), 2 deletions(-) diff --git a/hw/sd/ssi-sd.c b/hw/sd/ssi-sd.c index 24001dc3e6..f88f509e0a 100644 --- a/hw/sd/ssi-sd.c +++ b/hw/sd/ssi-sd.c @@ -50,6 +50,9 @@ typedef struct { SDState *sd; } ssi_sd_state; =20 +#define TYPE_SSI_SD "ssi-sd" +#define SSI_SD(obj) OBJECT_CHECK(ssi_sd_state, (obj), TYPE_SSI_SD) + /* State word bits. */ #define SSI_SDR_LOCKED 0x0001 #define SSI_SDR_WP_ERASE 0x0002 @@ -241,7 +244,6 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) ssi_sd_state *s =3D FROM_SSI_SLAVE(ssi_sd_state, d); DriveInfo *dinfo; =20 - s->mode =3D SSI_SD_CMD; /* FIXME use a qdev drive property instead of drive_get_next() */ dinfo =3D drive_get_next(IF_SD); s->sd =3D sd_init(dinfo ? blk_by_legacy_dinfo(dinfo) : NULL, true); @@ -251,6 +253,24 @@ static void ssi_sd_realize(SSISlave *d, Error **errp) } } =20 +static void ssi_sd_reset(DeviceState *dev) +{ + ssi_sd_state *s =3D SSI_SD(dev); + + s->mode =3D SSI_SD_CMD; + s->cmd =3D 0; + memset(s->cmdarg, 0, sizeof(s->cmdarg)); + memset(s->response, 0, sizeof(s->response)); + s->arglen =3D 0; + s->response_pos =3D 0; + s->stopping =3D 0; + + /* Since we're still using the legacy SD API the card is not plugged + * into any bus, and we must reset it manually. + */ + device_reset(DEVICE(s->sd)); +} + static void ssi_sd_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); @@ -260,10 +280,11 @@ static void ssi_sd_class_init(ObjectClass *klass, voi= d *data) k->transfer =3D ssi_sd_transfer; k->cs_polarity =3D SSI_CS_LOW; dc->vmsd =3D &vmstate_ssi_sd; + dc->reset =3D ssi_sd_reset; } =20 static const TypeInfo ssi_sd_info =3D { - .name =3D "ssi-sd", + .name =3D TYPE_SSI_SD, .parent =3D TYPE_SSI_SLAVE, .instance_size =3D sizeof(ssi_sd_state), .class_init =3D ssi_sd_class_init, --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945218589619.9683980659046; Tue, 6 Feb 2018 11:26:58 -0800 (PST) Received: from localhost ([::1]:53392 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8tN-0006eT-M0 for importer@patchew.org; Tue, 06 Feb 2018 14:26:57 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43787) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ie-0005Ac-J6 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ia-0007tv-UR for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:52 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:44606) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ia-0007se-Ja for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:48 -0500 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JELoa053111 for ; Tue, 6 Feb 2018 14:15:47 -0500 Received: from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyg4xpguh-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:47 -0500 Received: from localhost by e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:42 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFg1746006444; Tue, 6 Feb 2018 19:15:42 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AD196AC040; Tue, 6 Feb 2018 14:17:02 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 73EC7AC03A; Tue, 6 Feb 2018 14:17:02 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:39 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0044-0000-0000-000003DC6DA7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:44 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0045-0000-0000-0000080BDD2F Message-Id: <20180206191515.25830-19-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 18/54] scsi-disk: release AioContext in unaligned WRITE SAME case X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Stefan Hajnoczi , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Stefan Hajnoczi scsi_write_same_complete() can retry the write if the request was unaligned. Make sure to release the AioContext when that code path is taken! This patch fixes a hang when QEMU terminates after an unaligned WRITE SAME request has been processed with dataplane. The hang occurs because iothread_stop_all() cannot acquire the AioContext lock that was leaked by the IOThread in scsi_write_same_complete(). Fixes: b9e413dd37 ("block: explicitly acquire aiocontext in aio callbacks t= hat need it"). Cc: Paolo Bonzini Cc: qemu-stable@nongnu.org Reported-by: Cong Li Signed-off-by: Stefan Hajnoczi Message-Id: <20180104142502.15175-1-stefanha@redhat.com> Signed-off-by: Paolo Bonzini (cherry picked from commit 24355b79bdaf6ab12f7c610b032fc35ec045cd55) Signed-off-by: Michael Roth --- hw/scsi/scsi-disk.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/scsi/scsi-disk.c b/hw/scsi/scsi-disk.c index 12431177a7..5e4d2c38f0 100644 --- a/hw/scsi/scsi-disk.c +++ b/hw/scsi/scsi-disk.c @@ -1755,6 +1755,7 @@ static void scsi_write_same_complete(void *opaque, in= t ret) data->sector << BDRV_SECTOR_BITS, &data->qiov, 0, scsi_write_same_complete, data); + aio_context_release(blk_get_aio_context(s->qdev.conf.blk)); return; } =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945529511429.00212996131324; Tue, 6 Feb 2018 11:32:09 -0800 (PST) Received: from localhost ([::1]:53427 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8yO-0002jQ-LY for importer@patchew.org; Tue, 06 Feb 2018 14:32:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43823) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8if-0005Ai-EF for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ia-0007tW-Nw for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:53 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:36246 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ia-0007sj-8b for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:48 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEIDk131010 for ; Tue, 6 Feb 2018 14:15:47 -0500 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyfvm6yt8-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:46 -0500 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:43 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFhZH43057238; Tue, 6 Feb 2018 19:15:43 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id CB42DAC041; Tue, 6 Feb 2018 14:17:03 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 6FC02AC040; Tue, 6 Feb 2018 14:17:03 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:40 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0040-0000-0000-000003EF7343 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:45 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0041-0000-0000-000007E4E588 Message-Id: <20180206191515.25830-20-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 19/54] hw/pci-bridge: fix QEMU crash because of pcie-root-port X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marcel Apfelbaum , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, "Michael S . Tsirkin" Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Marcel Apfelbaum If we try to use more pcie_root_ports then available slots and an IO hint is passed to the port, QEMU crashes because we try to init the "IO hint" capability even if the device is not created. Fix it by checking for error before adding the capability, so QEMU can fail gracefully. Signed-off-by: Marcel Apfelbaum Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin (cherry picked from commit fced4d00e68e7559c73746d963265f7fd0b6abf9) Signed-off-by: Michael Roth --- hw/pci-bridge/gen_pcie_root_port.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/pci-bridge/gen_pcie_root_port.c b/hw/pci-bridge/gen_pcie_ro= ot_port.c index ad4e6aa7ff..0e2f2e8bf1 100644 --- a/hw/pci-bridge/gen_pcie_root_port.c +++ b/hw/pci-bridge/gen_pcie_root_port.c @@ -74,8 +74,13 @@ static void gen_rp_realize(DeviceState *dev, Error **err= p) PCIDevice *d =3D PCI_DEVICE(dev); GenPCIERootPort *grp =3D GEN_PCIE_ROOT_PORT(d); PCIERootPortClass *rpc =3D PCIE_ROOT_PORT_GET_CLASS(d); + Error *local_err =3D NULL; =20 - rpc->parent_realize(dev, errp); + rpc->parent_realize(dev, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 int rc =3D pci_bridge_qemu_reserve_cap_init(d, 0, grp->bus_reserve, grp->io_reserve, grp->mem_reserve, grp->pref32_reserve, --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151794575651278.07517373252017; Tue, 6 Feb 2018 11:35:56 -0800 (PST) Received: from localhost ([::1]:53457 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej923-00060p-Kc for importer@patchew.org; Tue, 06 Feb 2018 14:35:55 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43857) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ig-0005Ba-3t for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ic-0007us-Mx for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:54 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:57382) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ic-0007uL-F8 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:50 -0500 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFBDU139261 for ; Tue, 6 Feb 2018 14:15:49 -0500 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyha5u360-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:48 -0500 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:44 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFijj50593944; Tue, 6 Feb 2018 19:15:44 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E355EAC040; Tue, 6 Feb 2018 14:17:04 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 7E4D8AC03F; Tue, 6 Feb 2018 14:17:04 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:41 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0040-0000-0000-000003EF7345 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:46 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0041-0000-0000-000007E4E58A Message-Id: <20180206191515.25830-21-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 20/54] i386: Change X86CPUDefinition::model_id to const char* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eduardo Habkost It is valid to have a 48-character model ID on CPUID, however the definition of X86CPUDefinition::model_id is char[48], which can make the compiler drop the null terminator from the string. If a CPU model happens to have 48 bytes on model_id, "-cpu help" will print garbage and the object_property_set_str() call at x86_cpu_load_def() will read data outside the model_id array. We could increase the array size to 49, but this would mean the compiler would not issue a warning if a 49-char string is used by mistake for model_id. To make things simpler, simply change model_id to be const char*, and validate the string length using an assert() on x86_register_cpudef_type(). Reported-by: "Dr. David Alan Gilbert" Signed-off-by: Eduardo Habkost Message-Id: <20180109154519.25634-2-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit 807e9869b8c4119b81df902625af818519e01759) Signed-off-by: Michael Roth --- target/i386/cpu.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 045d66191f..63279526a1 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -748,7 +748,7 @@ struct X86CPUDefinition { int model; int stepping; FeatureWordArray features; - char model_id[48]; + const char *model_id; }; =20 static X86CPUDefinition builtin_x86_defs[] =3D { @@ -917,6 +917,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_1_EDX] =3D I486_FEATURES, .xlevel =3D 0, + .model_id =3D "", }, { .name =3D "pentium", @@ -928,6 +929,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_1_EDX] =3D PENTIUM_FEATURES, .xlevel =3D 0, + .model_id =3D "", }, { .name =3D "pentium2", @@ -939,6 +941,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_1_EDX] =3D PENTIUM2_FEATURES, .xlevel =3D 0, + .model_id =3D "", }, { .name =3D "pentium3", @@ -950,6 +953,7 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .features[FEAT_1_EDX] =3D PENTIUM3_FEATURES, .xlevel =3D 0, + .model_id =3D "", }, { .name =3D "athlon", @@ -2708,6 +2712,9 @@ static void x86_register_cpudef_type(X86CPUDefinition= *def) * they shouldn't be set on the CPU model table. */ assert(!(def->features[FEAT_8000_0001_EDX] & CPUID_EXT2_AMD_ALIASES)); + /* catch mistakes instead of silently truncating model_id when too lon= g */ + assert(def->model_id && strlen(def->model_id) <=3D 48); + =20 type_register(&ti); g_free(typename); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945646161886.8347954314246; Tue, 6 Feb 2018 11:34:06 -0800 (PST) Received: from localhost ([::1]:53438 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej90C-0004HK-5J for importer@patchew.org; Tue, 06 Feb 2018 14:34:00 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43886) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ii-0005Ep-B3 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8if-0007ws-2D for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:37162 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ie-0007wL-QR for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:52 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEIvj131038 for ; Tue, 6 Feb 2018 14:15:52 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyfvm6yxg-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:51 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:46 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFkVq47579384; Tue, 6 Feb 2018 19:15:46 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 92D0DAC03F; Tue, 6 Feb 2018 14:17:06 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 58460AC03A; Tue, 6 Feb 2018 14:17:06 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:42 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7D9A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500281; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:48 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B41D Message-Id: <20180206191515.25830-22-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 21/54] i386: Add support for SPEC_CTRL MSR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Paolo Bonzini Signed-off-by: Eduardo Habkost Message-Id: <20180109154519.25634-3-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit a33a2cfe2f771b360b3422f6cdf566a560860bfc) Signed-off-by: Michael Roth --- target/i386/cpu.h | 3 +++ target/i386/kvm.c | 14 ++++++++++++++ target/i386/machine.c | 20 ++++++++++++++++++++ 3 files changed, 37 insertions(+) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index b086b1528b..03de74a8d3 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -335,6 +335,7 @@ #define MSR_IA32_APICBASE_BASE (0xfffffU<<12) #define MSR_IA32_FEATURE_CONTROL 0x0000003a #define MSR_TSC_ADJUST 0x0000003b +#define MSR_IA32_SPEC_CTRL 0x48 #define MSR_IA32_TSCDEADLINE 0x6e0 =20 #define FEATURE_CONTROL_LOCKED (1<<0) @@ -1082,6 +1083,8 @@ typedef struct CPUX86State { =20 uint32_t pkru; =20 + uint64_t spec_ctrl; + /* End of state preserved by INIT (dummy marker). */ struct {} end_init_save; =20 diff --git a/target/i386/kvm.c b/target/i386/kvm.c index b1e32e95d3..3ac5302bc5 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -91,6 +91,7 @@ static bool has_msr_hv_synic; static bool has_msr_hv_stimer; static bool has_msr_hv_frequencies; static bool has_msr_xss; +static bool has_msr_spec_ctrl; =20 static bool has_msr_architectural_pmu; static uint32_t num_architectural_pmu_counters; @@ -1144,6 +1145,9 @@ static int kvm_get_supported_msrs(KVMState *s) case HV_X64_MSR_TSC_FREQUENCY: has_msr_hv_frequencies =3D true; break; + case MSR_IA32_SPEC_CTRL: + has_msr_spec_ctrl =3D true; + break; } } } @@ -1626,6 +1630,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level) if (has_msr_xss) { kvm_msr_entry_add(cpu, MSR_IA32_XSS, env->xss); } + if (has_msr_spec_ctrl) { + kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, env->spec_ctrl); + } #ifdef TARGET_X86_64 if (lm_capable_kernel) { kvm_msr_entry_add(cpu, MSR_CSTAR, env->cstar); @@ -1634,6 +1641,7 @@ static int kvm_put_msrs(X86CPU *cpu, int level) kvm_msr_entry_add(cpu, MSR_LSTAR, env->lstar); } #endif + /* * The following MSRs have side effects on the guest or are too heavy * for normal writeback. Limit them to reset or full state updates. @@ -1998,6 +2006,9 @@ static int kvm_get_msrs(X86CPU *cpu) if (has_msr_xss) { kvm_msr_entry_add(cpu, MSR_IA32_XSS, 0); } + if (has_msr_spec_ctrl) { + kvm_msr_entry_add(cpu, MSR_IA32_SPEC_CTRL, 0); + } =20 =20 if (!env->tsc_valid) { @@ -2347,6 +2358,9 @@ static int kvm_get_msrs(X86CPU *cpu) env->mtrr_var[MSR_MTRRphysIndex(index)].base =3D msrs[i].d= ata; } break; + case MSR_IA32_SPEC_CTRL: + env->spec_ctrl =3D msrs[i].data; + break; } } =20 diff --git a/target/i386/machine.c b/target/i386/machine.c index df5ec359eb..361c05aedf 100644 --- a/target/i386/machine.c +++ b/target/i386/machine.c @@ -818,6 +818,25 @@ static const VMStateDescription vmstate_mcg_ext_ctl = =3D { } }; =20 +static bool spec_ctrl_needed(void *opaque) +{ + X86CPU *cpu =3D opaque; + CPUX86State *env =3D &cpu->env; + + return env->spec_ctrl !=3D 0; +} + +static const VMStateDescription vmstate_spec_ctrl =3D { + .name =3D "cpu/spec_ctrl", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spec_ctrl_needed, + .fields =3D (VMStateField[]){ + VMSTATE_UINT64(env.spec_ctrl, X86CPU), + VMSTATE_END_OF_LIST() + } +}; + VMStateDescription vmstate_x86_cpu =3D { .name =3D "cpu", .version_id =3D 12, @@ -936,6 +955,7 @@ VMStateDescription vmstate_x86_cpu =3D { #ifdef TARGET_X86_64 &vmstate_pkru, #endif + &vmstate_spec_ctrl, &vmstate_mcg_ext_ctl, NULL } --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151794540500639.682014888391336; Tue, 6 Feb 2018 11:30:05 -0800 (PST) Received: from localhost ([::1]:53409 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8wO-0000w1-3O for importer@patchew.org; Tue, 06 Feb 2018 14:30:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43919) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ij-0005Fo-HZ for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:03 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8if-0007xC-8E for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:57 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:56836) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ie-0007wA-Ul for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:53 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JF521064216 for ; Tue, 6 Feb 2018 14:15:52 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyhx2hbf8-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:51 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:47 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFk5i46137524; Tue, 6 Feb 2018 19:15:46 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2EED4AC03A; Tue, 6 Feb 2018 14:17:07 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id F2CCCAC041; Tue, 6 Feb 2018 14:17:06 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:43 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7D99 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500281; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:48 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B41E Message-Id: <20180206191515.25830-23-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=1 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 22/54] i386: Add spec-ctrl CPUID bit X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eduardo Habkost Add the feature name and a CPUID_7_0_EDX_SPEC_CTRL macro. Signed-off-by: Eduardo Habkost Message-Id: <20180109154519.25634-4-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit a2381f0934432ef2cd47a335348ba8839632164c) Signed-off-by: Michael Roth --- target/i386/cpu.c | 2 +- target/i386/cpu.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 63279526a1..dddd62207c 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -458,7 +458,7 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS]= =3D { NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, - NULL, NULL, NULL, NULL, + NULL, NULL, "spec-ctrl", NULL, NULL, NULL, NULL, NULL, }, .cpuid_eax =3D 7, diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 03de74a8d3..8bf9879f3e 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -642,6 +642,7 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; =20 #define CPUID_7_0_EDX_AVX512_4VNNIW (1U << 2) /* AVX512 Neural Network Ins= tructions */ #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulat= ion Single Precision */ +#define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ =20 #define CPUID_XSAVE_XSAVEOPT (1U << 0) #define CPUID_XSAVE_XSAVEC (1U << 1) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517944840596658.2118669531811; Tue, 6 Feb 2018 11:20:40 -0800 (PST) Received: from localhost ([::1]:53346 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8nH-0001D1-Pt for importer@patchew.org; Tue, 06 Feb 2018 14:20:39 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ij-0005Fp-DN for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:59 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ie-0007w1-5f for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:57 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:57628) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8id-0007vG-TC for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:52 -0500 Received: from pps.filterd (m0098393.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFXRn141351 for ; Tue, 6 Feb 2018 14:15:51 -0500 Received: from e17.ny.us.ibm.com (e17.ny.us.ibm.com [129.33.205.207]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyha5u38e-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:50 -0500 Received: from localhost by e17.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:47 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFl5p50528508; Tue, 6 Feb 2018 19:15:47 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D8618AC03F; Tue, 6 Feb 2018 14:17:07 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 9E366AC03A; Tue, 6 Feb 2018 14:17:07 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:44 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0040-0000-0000-000003EF7347 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:49 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0041-0000-0000-000007E4E58D Message-Id: <20180206191515.25830-24-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 23/54] i386: Add FEAT_8000_0008_EBX CPUID feature word X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eduardo Habkost Add the new feature word and the "ibpb" feature flag. Based on a patch by Paolo Bonzini. Signed-off-by: Eduardo Habkost Message-Id: <20180109154519.25634-5-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit 1b3420e1c4d523c49866cca4e7544753201cd43d) Signed-off-by: Michael Roth --- target/i386/cpu.c | 19 ++++++++++++++++++- target/i386/cpu.h | 3 +++ 2 files changed, 21 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index dddd62207c..36edc875fc 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -482,6 +482,22 @@ static FeatureWordInfo feature_word_info[FEATURE_WORDS= ] =3D { .tcg_features =3D TCG_APM_FEATURES, .unmigratable_flags =3D CPUID_APM_INVTSC, }, + [FEAT_8000_0008_EBX] =3D { + .feat_names =3D { + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + "ibpb", NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + NULL, NULL, NULL, NULL, + }, + .cpuid_eax =3D 0x80000008, + .cpuid_reg =3D R_EBX, + .tcg_features =3D 0, + .unmigratable_flags =3D 0, + }, [FEAT_XSAVE] =3D { .feat_names =3D { "xsaveopt", "xsavec", "xgetbv1", "xsaves", @@ -3097,7 +3113,7 @@ void cpu_x86_cpuid(CPUX86State *env, uint32_t index, = uint32_t count, } else { *eax =3D cpu->phys_bits; } - *ebx =3D 0; + *ebx =3D env->features[FEAT_8000_0008_EBX]; *ecx =3D 0; *edx =3D 0; if (cs->nr_cores * cs->nr_threads > 1) { @@ -3553,6 +3569,7 @@ static void x86_cpu_expand_features(X86CPU *cpu, Erro= r **errp) x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_EDX); x86_cpu_adjust_feat_level(cpu, FEAT_8000_0001_ECX); x86_cpu_adjust_feat_level(cpu, FEAT_8000_0007_EDX); + x86_cpu_adjust_feat_level(cpu, FEAT_8000_0008_EBX); x86_cpu_adjust_feat_level(cpu, FEAT_C000_0001_EDX); x86_cpu_adjust_feat_level(cpu, FEAT_SVM); x86_cpu_adjust_feat_level(cpu, FEAT_XSAVE); diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 8bf9879f3e..f3d0ebb673 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -454,6 +454,7 @@ typedef enum FeatureWord { FEAT_8000_0001_EDX, /* CPUID[8000_0001].EDX */ FEAT_8000_0001_ECX, /* CPUID[8000_0001].ECX */ FEAT_8000_0007_EDX, /* CPUID[8000_0007].EDX */ + FEAT_8000_0008_EBX, /* CPUID[8000_0008].EBX */ FEAT_C000_0001_EDX, /* CPUID[C000_0001].EDX */ FEAT_KVM, /* CPUID[4000_0001].EAX (KVM_CPUID_FEATURES) */ FEAT_HYPERV_EAX, /* CPUID[4000_0003].EAX */ @@ -644,6 +645,8 @@ typedef uint32_t FeatureWordArray[FEATURE_WORDS]; #define CPUID_7_0_EDX_AVX512_4FMAPS (1U << 3) /* AVX512 Multiply Accumulat= ion Single Precision */ #define CPUID_7_0_EDX_SPEC_CTRL (1U << 26) /* Speculation Control */ =20 +#define CPUID_8000_0008_EBX_IBPB (1U << 12) /* Indirect Branch Predicti= on Barrier */ + #define CPUID_XSAVE_XSAVEOPT (1U << 0) #define CPUID_XSAVE_XSAVEC (1U << 1) #define CPUID_XSAVE_XGETBV1 (1U << 2) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945281854448.5171491817132; Tue, 6 Feb 2018 11:28:01 -0800 (PST) Received: from localhost ([::1]:53400 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8uO-0007W7-WE for importer@patchew.org; Tue, 06 Feb 2018 14:28:01 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44020) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8in-0005Mk-4I for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:07 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ig-0007yP-Br for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:01 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:59852 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ig-0007xq-4W for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:54 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEKia126721 for ; Tue, 6 Feb 2018 14:15:53 -0500 Received: from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhwn1f4w-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:52 -0500 Received: from localhost by e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:48 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFmdn64225396; Tue, 6 Feb 2018 19:15:48 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 91CBAAC040; Tue, 6 Feb 2018 14:17:08 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 4E9F7AC03A; Tue, 6 Feb 2018 14:17:08 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:45 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0044-0000-0000-000003DC6DAF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:50 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0045-0000-0000-0000080BDD37 Message-Id: <20180206191515.25830-25-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 24/54] i386: Add new -IBRS versions of Intel CPU models X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jiri Denemark , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eduardo Habkost The new MSR IA32_SPEC_CTRL MSR was introduced by a recent Intel microcode updated and can be used by OSes to mitigate CVE-2017-5715. Unfortunately we can't change the existing CPU models without breaking existing setups, so users need to explicitly update their VM configuration to use the new *-IBRS CPU model if they want to expose IBRS to guests. The new CPU models are simple copies of the existing CPU models, with just CPUID_7_0_EDX_SPEC_CTRL added and model_id updated. Cc: Jiri Denemark Signed-off-by: Eduardo Habkost Message-Id: <20180109154519.25634-6-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit ac96c41354b7e4c70b756342d9b686e31ab87458) Signed-off-by: Michael Roth --- target/i386/cpu.c | 379 ++++++++++++++++++++++++++++++++++++++++++++++++++= +++- 1 file changed, 378 insertions(+), 1 deletion(-) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 36edc875fc..e7957c25e5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1080,6 +1080,31 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Core i7 9xx (Nehalem Class Core i7)", }, { + .name =3D "Nehalem-IBRS", + .level =3D 11, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 26, + .stepping =3D 3, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_SSE3, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_LAHF_LM, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Core i7 9xx (Nehalem Core i7, IBRS update)", + }, + { .name =3D "Westmere", .level =3D 11, .vendor =3D CPUID_VENDOR_INTEL, @@ -1106,6 +1131,34 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Westmere E56xx/L56xx/X56xx (Nehalem-C)", }, { + .name =3D "Westmere-IBRS", + .level =3D 11, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 44, + .stepping =3D 1, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AES | CPUID_EXT_POPCNT | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_SYSCALL | CPUID_EXT2_NX, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_LAHF_LM, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Westmere E56xx/L56xx/X56xx (IBRS update)", + }, + { .name =3D "SandyBridge", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1137,6 +1190,39 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Xeon E312xx (Sandy Bridge)", }, { + .name =3D "SandyBridge-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 42, + .stepping =3D 1, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT | + CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | + CPUID_EXT_SSE3, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_LAHF_LM, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Xeon E312xx (Sandy Bridge, IBRS update)", + }, + { .name =3D "IvyBridge", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1171,6 +1257,42 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Xeon E3-12xx v2 (Ivy Bridge)", }, { + .name =3D "IvyBridge-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 58, + .stepping =3D 9, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_POPCNT | + CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | + CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | CPUID_EXT_PCLMULQDQ | + CPUID_EXT_SSE3 | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_ERMS, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_LAHF_LM, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Xeon E3-12xx v2 (Ivy Bridge, IBRS)", + }, + { .name =3D "Haswell-noTSX", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1205,7 +1327,46 @@ static X86CPUDefinition builtin_x86_defs[] =3D { CPUID_6_EAX_ARAT, .xlevel =3D 0x80000008, .model_id =3D "Intel Core Processor (Haswell, no TSX)", - }, { + }, + { + .name =3D "Haswell-noTSX-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 60, + .stepping =3D 1, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE= | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D, + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Core Processor (Haswell, no TSX, IBRS)", + }, + { .name =3D "Haswell", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1243,6 +1404,45 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Core Processor (Haswell)", }, { + .name =3D "Haswell-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 60, + .stepping =3D 4, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE= | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D | + CPUID_7_0_EBX_RTM, + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Core Processor (Haswell, IBRS)", + }, + { .name =3D "Broadwell-noTSX", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1281,6 +1481,46 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Core Processor (Broadwell, no TSX)", }, { + .name =3D "Broadwell-noTSX-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 61, + .stepping =3D 2, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE= | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D | + CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | + CPUID_7_0_EBX_SMAP, + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Core Processor (Broadwell, no TSX, IBRS)", + }, + { .name =3D "Broadwell", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1319,6 +1559,46 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Core Processor (Broadwell)", }, { + .name =3D "Broadwell-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 61, + .stepping =3D 2, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE= | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | + CPUID_7_0_EBX_SMAP, + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Core Processor (Broadwell, IBRS)", + }, + { .name =3D "Skylake-Client", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1364,6 +1644,53 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Core Processor (Skylake)", }, { + .name =3D "Skylake-Client-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 94, + .stepping =3D 3, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE= | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component, + * and the only one defined in Skylake (processor tracing) + * probably will block migration anyway. + */ + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Core Processor (Skylake, IBRS)", + }, + { .name =3D "Skylake-Server", .level =3D 0xd, .vendor =3D CPUID_VENDOR_INTEL, @@ -1412,6 +1739,56 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .model_id =3D "Intel Xeon Processor (Skylake)", }, { + .name =3D "Skylake-Server-IBRS", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_INTEL, + .family =3D 6, + .model =3D 85, + .stepping =3D 4, + .features[FEAT_1_EDX] =3D + CPUID_VME | CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | + CPUID_CLFLUSH | CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_M= CA | + CPUID_PGE | CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | + CPUID_MCE | CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | + CPUID_DE | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_AVX | CPUID_EXT_XSAVE | CPUID_EXT_AES | + CPUID_EXT_POPCNT | CPUID_EXT_X2APIC | CPUID_EXT_SSE42 | + CPUID_EXT_SSE41 | CPUID_EXT_CX16 | CPUID_EXT_SSSE3 | + CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3 | + CPUID_EXT_TSC_DEADLINE_TIMER | CPUID_EXT_FMA | CPUID_EXT_MOVBE= | + CPUID_EXT_PCID | CPUID_EXT_F16C | CPUID_EXT_RDRAND, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_PDPE1GB | CPUID_EXT2_RDTSCP | + CPUID_EXT2_NX | CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_ABM | CPUID_EXT3_LAHF_LM | CPUID_EXT3_3DNOWPREFETCH, + .features[FEAT_7_0_EDX] =3D + CPUID_7_0_EDX_SPEC_CTRL, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | + CPUID_7_0_EBX_HLE | CPUID_7_0_EBX_AVX2 | CPUID_7_0_EBX_SMEP | + CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_ERMS | CPUID_7_0_EBX_INVPCI= D | + CPUID_7_0_EBX_RTM | CPUID_7_0_EBX_RDSEED | CPUID_7_0_EBX_ADX | + CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_MPX | CPUID_7_0_EBX_CLWB | + CPUID_7_0_EBX_AVX512F | CPUID_7_0_EBX_AVX512DQ | + CPUID_7_0_EBX_AVX512BW | CPUID_7_0_EBX_AVX512CD | + CPUID_7_0_EBX_AVX512VL, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component, + * and the only one defined in Skylake (processor tracing) + * probably will block migration anyway. + */ + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x80000008, + .model_id =3D "Intel Xeon Processor (Skylake, IBRS)", + }, + { .name =3D "Opteron_G1", .level =3D 5, .vendor =3D CPUID_VENDOR_AMD, --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:49 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFmkW49086526; Tue, 6 Feb 2018 19:15:48 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 2FDF6AC043; Tue, 6 Feb 2018 14:17:09 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id EA26BAC03A; Tue, 6 Feb 2018 14:17:08 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:46 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F43 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:51 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E765 Message-Id: <20180206191515.25830-26-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 25/54] i386: Add EPYC-IBPB CPU model X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Tom Lendacky , Brijesh Singh , Eduardo Habkost , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Jiri Denemark Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eduardo Habkost EPYC-IBPB is a copy of the EPYC CPU model with just CPUID_8000_0008_EBX_IBPB added. Cc: Jiri Denemark Cc: Tom Lendacky Cc: Brijesh Singh Signed-off-by: Eduardo Habkost Message-Id: <20180109154519.25634-7-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost (cherry picked from commit 6cfbc54e8903a9bcc0346119949162d040c144c1) Signed-off-by: Michael Roth --- target/i386/cpu.c | 46 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 46 insertions(+) diff --git a/target/i386/cpu.c b/target/i386/cpu.c index e7957c25e5..70c8ae82d5 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -1962,6 +1962,52 @@ static X86CPUDefinition builtin_x86_defs[] =3D { .xlevel =3D 0x8000000A, .model_id =3D "AMD EPYC Processor", }, + { + .name =3D "EPYC-IBPB", + .level =3D 0xd, + .vendor =3D CPUID_VENDOR_AMD, + .family =3D 23, + .model =3D 1, + .stepping =3D 2, + .features[FEAT_1_EDX] =3D + CPUID_SSE2 | CPUID_SSE | CPUID_FXSR | CPUID_MMX | CPUID_CLFLUS= H | + CPUID_PSE36 | CPUID_PAT | CPUID_CMOV | CPUID_MCA | CPUID_PGE | + CPUID_MTRR | CPUID_SEP | CPUID_APIC | CPUID_CX8 | CPUID_MCE | + CPUID_PAE | CPUID_MSR | CPUID_TSC | CPUID_PSE | CPUID_DE | + CPUID_VME | CPUID_FP87, + .features[FEAT_1_ECX] =3D + CPUID_EXT_RDRAND | CPUID_EXT_F16C | CPUID_EXT_AVX | + CPUID_EXT_XSAVE | CPUID_EXT_AES | CPUID_EXT_POPCNT | + CPUID_EXT_MOVBE | CPUID_EXT_SSE42 | CPUID_EXT_SSE41 | + CPUID_EXT_CX16 | CPUID_EXT_FMA | CPUID_EXT_SSSE3 | + CPUID_EXT_MONITOR | CPUID_EXT_PCLMULQDQ | CPUID_EXT_SSE3, + .features[FEAT_8000_0001_EDX] =3D + CPUID_EXT2_LM | CPUID_EXT2_RDTSCP | CPUID_EXT2_PDPE1GB | + CPUID_EXT2_FFXSR | CPUID_EXT2_MMXEXT | CPUID_EXT2_NX | + CPUID_EXT2_SYSCALL, + .features[FEAT_8000_0001_ECX] =3D + CPUID_EXT3_OSVW | CPUID_EXT3_3DNOWPREFETCH | + CPUID_EXT3_MISALIGNSSE | CPUID_EXT3_SSE4A | CPUID_EXT3_ABM | + CPUID_EXT3_CR8LEG | CPUID_EXT3_SVM | CPUID_EXT3_LAHF_LM, + .features[FEAT_8000_0008_EBX] =3D + CPUID_8000_0008_EBX_IBPB, + .features[FEAT_7_0_EBX] =3D + CPUID_7_0_EBX_FSGSBASE | CPUID_7_0_EBX_BMI1 | CPUID_7_0_EBX_AV= X2 | + CPUID_7_0_EBX_SMEP | CPUID_7_0_EBX_BMI2 | CPUID_7_0_EBX_RDSEED= | + CPUID_7_0_EBX_ADX | CPUID_7_0_EBX_SMAP | CPUID_7_0_EBX_CLFLUSH= OPT | + CPUID_7_0_EBX_SHA_NI, + /* Missing: XSAVES (not supported by some Linux versions, + * including v4.1 to v4.12). + * KVM doesn't yet expose any XSAVES state save component. + */ + .features[FEAT_XSAVE] =3D + CPUID_XSAVE_XSAVEOPT | CPUID_XSAVE_XSAVEC | + CPUID_XSAVE_XGETBV1, + .features[FEAT_6_EAX] =3D + CPUID_6_EAX_ARAT, + .xlevel =3D 0x8000000A, + .model_id =3D "AMD EPYC Processor (with IBPB)", + }, }; =20 typedef struct PropValue { --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151794535955216.693362443026786; Tue, 6 Feb 2018 11:29:19 -0800 (PST) Received: from localhost ([::1]:53406 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ve-0000FZ-Nv for importer@patchew.org; Tue, 06 Feb 2018 14:29:18 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43885) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ii-0005Eo-AP for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:00 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8if-0007xb-Ks for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:56 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:60746 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8if-0007x0-F6 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:53 -0500 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEJcV056297 for ; Tue, 6 Feb 2018 14:15:53 -0500 Received: from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fygjbwcmx-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:52 -0500 Received: from localhost by e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:49 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFnGC40960148; Tue, 6 Feb 2018 19:15:49 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D9027AC041; Tue, 6 Feb 2018 14:17:09 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 98880AC03F; Tue, 6 Feb 2018 14:17:09 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:47 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0036-0000-0000-000002BA0AC7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:51 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0037-0000-0000-0000433F814A Message-Id: <20180206191515.25830-27-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id w16JEJcV056297 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 26/54] linux-user: Fix locking order in fork_start() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Laurent Vivier Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell Our locking order is that the tb lock should be taken inside the mmap_lock, but fork_start() grabs locks the other way around. This means that if a heavily multithreaded guest process (such as Java) calls fork() it can deadlock, with the thread that called fork() stuck in fork_start() with the tb lock and waiting for the mmap lock, but some other thread in tb_find() with the mmap lock and waiting for the tb lock. The cpu_list_lock() should also always be taken last, not first. Fix this by making fork_start() grab the locks in the right order. The order in which we drop locks doesn't matter, so we leave fork_end() the way it is. Signed-off-by: Peter Maydell Cc: qemu-stable@nongnu.org Reviewed-by: Paolo Bonzini Reviewed-by: Alex Benn=C3=A9e Message-Id: <1512397331-15238-1-git-send-email-peter.maydell@linaro.org> Signed-off-by: Laurent Vivier (cherry picked from commit 024949caf32805f4cc3e7d363a80084b47aac1f6) Signed-off-by: Michael Roth --- linux-user/main.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/linux-user/main.c b/linux-user/main.c index 6286661bd3..146ee3e4ba 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -128,9 +128,9 @@ int cpu_get_pic_interrupt(CPUX86State *env) /* Make sure everything is in a consistent state for calling fork(). */ void fork_start(void) { - cpu_list_lock(); - qemu_mutex_lock(&tb_ctx.tb_lock); mmap_fork_start(); + qemu_mutex_lock(&tb_ctx.tb_lock); + cpu_list_lock(); } =20 void fork_end(int child) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945565239518.6909627898607; Tue, 6 Feb 2018 11:32:45 -0800 (PST) Received: from localhost ([::1]:53429 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8yy-0003Ey-Fg for importer@patchew.org; Tue, 06 Feb 2018 14:32:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44015) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8im-0005ML-RM for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:06 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ig-0007yX-Gt for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:00 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:59916 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ig-0007y3-Bj for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:54 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEJjQ126670 for ; Tue, 6 Feb 2018 14:15:54 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhwn1f4h-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:52 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:50 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFngC39714966; Tue, 6 Feb 2018 19:15:49 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 7BB7CAC041; Tue, 6 Feb 2018 14:17:10 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 3FF7BAC03F; Tue, 6 Feb 2018 14:17:10 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:48 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F44 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:51 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E769 Message-Id: <20180206191515.25830-28-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 27/54] s390x: fix storage attributes migration for non-small guests X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cornelia Huck , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Claudio Imbrenda Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Claudio Imbrenda Fix storage attribute migration so that it does not fail for guests with more than a few GB of RAM. With such guests, the index in the buffer would go out of bounds, usually by large amounts, thus receiving -EFAULT from the kernel. Migration itself would be successful, but storage attributes would then not be migrated completely. This patch fixes the out of bounds access, and thus migration of all storage attributes when the guest have large amounts of memory. Cc: qemu-stable@nongnu.org Signed-off-by: Claudio Imbrenda Fixes: 903fd80b03243476 ("s390x/migration: Storage attributes device") Message-Id: <1516297904-18188-1-git-send-email-imbrenda@linux.vnet.ibm.com> Reviewed-by: Christian Borntraeger Signed-off-by: Cornelia Huck (cherry picked from commit 46fa893355e0bd88f3c59b886f0d75cbd5f0bbbe) Signed-off-by: Michael Roth --- hw/s390x/s390-stattrib-kvm.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/s390x/s390-stattrib-kvm.c b/hw/s390x/s390-stattrib-kvm.c index 41770a7dec..480551c3db 100644 --- a/hw/s390x/s390-stattrib-kvm.c +++ b/hw/s390x/s390-stattrib-kvm.c @@ -116,7 +116,7 @@ static void kvm_s390_stattrib_synchronize(S390StAttribS= tate *sa) for (cx =3D 0; cx + len <=3D max; cx +=3D len) { clog.start_gfn =3D cx; clog.count =3D len; - clog.values =3D (uint64_t)(sas->incoming_buffer + cx * len); + clog.values =3D (uint64_t)(sas->incoming_buffer + cx); r =3D kvm_vm_ioctl(kvm_state, KVM_S390_SET_CMMA_BITS, &clog); if (r) { error_report("KVM_S390_SET_CMMA_BITS failed: %s", strerror= (-r)); @@ -126,7 +126,7 @@ static void kvm_s390_stattrib_synchronize(S390StAttribS= tate *sa) if (cx < max) { clog.start_gfn =3D cx; clog.count =3D max - cx; - clog.values =3D (uint64_t)(sas->incoming_buffer + cx * len); + clog.values =3D (uint64_t)(sas->incoming_buffer + cx); r =3D kvm_vm_ioctl(kvm_state, KVM_S390_SET_CMMA_BITS, &clog); if (r) { error_report("KVM_S390_SET_CMMA_BITS failed: %s", strerror= (-r)); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945827937936.7610188688916; Tue, 6 Feb 2018 11:37:07 -0800 (PST) Received: from localhost ([::1]:53460 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej93C-0006xO-SJ for importer@patchew.org; Tue, 06 Feb 2018 14:37:06 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44106) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ip-0005N3-8p for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ij-00080m-T5 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:03 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:57540) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ij-0007zx-B7 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:57 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFEmd064990 for ; Tue, 6 Feb 2018 14:15:56 -0500 Received: from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyhx2hbke-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:56 -0500 Received: from localhost by e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:51 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFoOM46202944; Tue, 6 Feb 2018 19:15:50 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 30107AC03A; Tue, 6 Feb 2018 14:17:11 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id E04A0AC040; Tue, 6 Feb 2018 14:17:10 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:49 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-2213-0000-0000-0000026884E3 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:52 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-2214-0000-0000-00005905BD2F Message-Id: <20180206191515.25830-29-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 28/54] linux-headers: update to 4.15-rc1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eric Auger , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Peter Maydell Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eric Auger Update headers against v4.15-rc1. Signed-off-by: Eric Auger Message-id: 1511883692-11511-4-git-send-email-eric.auger@redhat.com Signed-off-by: Peter Maydell (cherry picked from commit dd8739669f95b30653a3a05cb2e21da3f52894fa) Signed-off-by: Michael Roth --- include/standard-headers/asm-s390/virtio-ccw.h | 1 + include/standard-headers/asm-x86/hyperv.h | 394 +----------------= ---- include/standard-headers/linux/input-event-codes.h | 2 + include/standard-headers/linux/input.h | 1 + include/standard-headers/linux/pci_regs.h | 45 ++- linux-headers/asm-arm/kvm.h | 8 + linux-headers/asm-arm/kvm_para.h | 1 + linux-headers/asm-arm/unistd.h | 2 + linux-headers/asm-arm64/kvm.h | 8 + linux-headers/asm-arm64/unistd.h | 1 + linux-headers/asm-powerpc/epapr_hcalls.h | 1 + linux-headers/asm-powerpc/kvm.h | 1 + linux-headers/asm-powerpc/kvm_para.h | 1 + linux-headers/asm-powerpc/unistd.h | 1 + linux-headers/asm-s390/kvm.h | 1 + linux-headers/asm-s390/kvm_para.h | 1 + linux-headers/asm-s390/unistd.h | 4 +- linux-headers/asm-x86/kvm.h | 1 + linux-headers/asm-x86/kvm_para.h | 2 +- linux-headers/asm-x86/unistd.h | 1 + linux-headers/linux/kvm.h | 2 + linux-headers/linux/kvm_para.h | 1 + linux-headers/linux/psci.h | 1 + linux-headers/linux/userfaultfd.h | 1 + linux-headers/linux/vfio.h | 1 + linux-headers/linux/vfio_ccw.h | 1 + linux-headers/linux/vhost.h | 1 + 27 files changed, 74 insertions(+), 411 deletions(-) diff --git a/include/standard-headers/asm-s390/virtio-ccw.h b/include/stand= ard-headers/asm-s390/virtio-ccw.h index a9a4ebf79f..967aad3901 100644 --- a/include/standard-headers/asm-s390/virtio-ccw.h +++ b/include/standard-headers/asm-s390/virtio-ccw.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Definitions for virtio-ccw devices. * diff --git a/include/standard-headers/asm-x86/hyperv.h b/include/standard-h= eaders/asm-x86/hyperv.h index 5f95d5ed02..ce87d0c344 100644 --- a/include/standard-headers/asm-x86/hyperv.h +++ b/include/standard-headers/asm-x86/hyperv.h @@ -1,393 +1 @@ -#ifndef _ASM_X86_HYPERV_H -#define _ASM_X86_HYPERV_H - -#include "standard-headers/linux/types.h" - -/* - * The below CPUID leaves are present if VersionAndFeatures.HypervisorPres= ent - * is set by CPUID(HvCpuIdFunctionVersionAndFeatures). - */ -#define HYPERV_CPUID_VENDOR_AND_MAX_FUNCTIONS 0x40000000 -#define HYPERV_CPUID_INTERFACE 0x40000001 -#define HYPERV_CPUID_VERSION 0x40000002 -#define HYPERV_CPUID_FEATURES 0x40000003 -#define HYPERV_CPUID_ENLIGHTMENT_INFO 0x40000004 -#define HYPERV_CPUID_IMPLEMENT_LIMITS 0x40000005 - -#define HYPERV_HYPERVISOR_PRESENT_BIT 0x80000000 -#define HYPERV_CPUID_MIN 0x40000005 -#define HYPERV_CPUID_MAX 0x4000ffff - -/* - * Feature identification. EAX indicates which features are available - * to the partition based upon the current partition privileges. - */ - -/* VP Runtime (HV_X64_MSR_VP_RUNTIME) available */ -#define HV_X64_MSR_VP_RUNTIME_AVAILABLE (1 << 0) -/* Partition Reference Counter (HV_X64_MSR_TIME_REF_COUNT) available*/ -#define HV_X64_MSR_TIME_REF_COUNT_AVAILABLE (1 << 1) -/* Partition reference TSC MSR is available */ -#define HV_X64_MSR_REFERENCE_TSC_AVAILABLE (1 << 9) - -/* A partition's reference time stamp counter (TSC) page */ -#define HV_X64_MSR_REFERENCE_TSC 0x40000021 - -/* - * There is a single feature flag that signifies if the partition has acce= ss - * to MSRs with local APIC and TSC frequencies. - */ -#define HV_X64_ACCESS_FREQUENCY_MSRS (1 << 11) - -/* - * Basic SynIC MSRs (HV_X64_MSR_SCONTROL through HV_X64_MSR_EOM - * and HV_X64_MSR_SINT0 through HV_X64_MSR_SINT15) available - */ -#define HV_X64_MSR_SYNIC_AVAILABLE (1 << 2) -/* - * Synthetic Timer MSRs (HV_X64_MSR_STIMER0_CONFIG through - * HV_X64_MSR_STIMER3_COUNT) available - */ -#define HV_X64_MSR_SYNTIMER_AVAILABLE (1 << 3) -/* - * APIC access MSRs (HV_X64_MSR_EOI, HV_X64_MSR_ICR and HV_X64_MSR_TPR) - * are available - */ -#define HV_X64_MSR_APIC_ACCESS_AVAILABLE (1 << 4) -/* Hypercall MSRs (HV_X64_MSR_GUEST_OS_ID and HV_X64_MSR_HYPERCALL) availa= ble*/ -#define HV_X64_MSR_HYPERCALL_AVAILABLE (1 << 5) -/* Access virtual processor index MSR (HV_X64_MSR_VP_INDEX) available*/ -#define HV_X64_MSR_VP_INDEX_AVAILABLE (1 << 6) -/* Virtual system reset MSR (HV_X64_MSR_RESET) is available*/ -#define HV_X64_MSR_RESET_AVAILABLE (1 << 7) - /* - * Access statistics pages MSRs (HV_X64_MSR_STATS_PARTITION_RETAIL_PAGE, - * HV_X64_MSR_STATS_PARTITION_INTERNAL_PAGE, HV_X64_MSR_STATS_VP_RETAIL_P= AGE, - * HV_X64_MSR_STATS_VP_INTERNAL_PAGE) available - */ -#define HV_X64_MSR_STAT_PAGES_AVAILABLE (1 << 8) - -/* Frequency MSRs available */ -#define HV_FEATURE_FREQUENCY_MSRS_AVAILABLE (1 << 8) - -/* Crash MSR available */ -#define HV_FEATURE_GUEST_CRASH_MSR_AVAILABLE (1 << 10) - -/* - * Feature identification: EBX indicates which flags were specified at - * partition creation. The format is the same as the partition creation - * flag structure defined in section Partition Creation Flags. - */ -#define HV_X64_CREATE_PARTITIONS (1 << 0) -#define HV_X64_ACCESS_PARTITION_ID (1 << 1) -#define HV_X64_ACCESS_MEMORY_POOL (1 << 2) -#define HV_X64_ADJUST_MESSAGE_BUFFERS (1 << 3) -#define HV_X64_POST_MESSAGES (1 << 4) -#define HV_X64_SIGNAL_EVENTS (1 << 5) -#define HV_X64_CREATE_PORT (1 << 6) -#define HV_X64_CONNECT_PORT (1 << 7) -#define HV_X64_ACCESS_STATS (1 << 8) -#define HV_X64_DEBUGGING (1 << 11) -#define HV_X64_CPU_POWER_MANAGEMENT (1 << 12) -#define HV_X64_CONFIGURE_PROFILER (1 << 13) - -/* - * Feature identification. EDX indicates which miscellaneous features - * are available to the partition. - */ -/* The MWAIT instruction is available (per section MONITOR / MWAIT) */ -#define HV_X64_MWAIT_AVAILABLE (1 << 0) -/* Guest debugging support is available */ -#define HV_X64_GUEST_DEBUGGING_AVAILABLE (1 << 1) -/* Performance Monitor support is available*/ -#define HV_X64_PERF_MONITOR_AVAILABLE (1 << 2) -/* Support for physical CPU dynamic partitioning events is available*/ -#define HV_X64_CPU_DYNAMIC_PARTITIONING_AVAILABLE (1 << 3) -/* - * Support for passing hypercall input parameter block via XMM - * registers is available - */ -#define HV_X64_HYPERCALL_PARAMS_XMM_AVAILABLE (1 << 4) -/* Support for a virtual guest idle state is available */ -#define HV_X64_GUEST_IDLE_STATE_AVAILABLE (1 << 5) -/* Guest crash data handler available */ -#define HV_X64_GUEST_CRASH_MSR_AVAILABLE (1 << 10) - -/* - * Implementation recommendations. Indicates which behaviors the hypervisor - * recommends the OS implement for optimal performance. - */ - /* - * Recommend using hypercall for address space switches rather - * than MOV to CR3 instruction - */ -#define HV_X64_AS_SWITCH_RECOMMENDED (1 << 0) -/* Recommend using hypercall for local TLB flushes rather - * than INVLPG or MOV to CR3 instructions */ -#define HV_X64_LOCAL_TLB_FLUSH_RECOMMENDED (1 << 1) -/* - * Recommend using hypercall for remote TLB flushes rather - * than inter-processor interrupts - */ -#define HV_X64_REMOTE_TLB_FLUSH_RECOMMENDED (1 << 2) -/* - * Recommend using MSRs for accessing APIC registers - * EOI, ICR and TPR rather than their memory-mapped counterparts - */ -#define HV_X64_APIC_ACCESS_RECOMMENDED (1 << 3) -/* Recommend using the hypervisor-provided MSR to initiate a system RESET = */ -#define HV_X64_SYSTEM_RESET_RECOMMENDED (1 << 4) -/* - * Recommend using relaxed timing for this partition. If used, - * the VM should disable any watchdog timeouts that rely on the - * timely delivery of external interrupts - */ -#define HV_X64_RELAXED_TIMING_RECOMMENDED (1 << 5) - -/* - * Virtual APIC support - */ -#define HV_X64_DEPRECATING_AEOI_RECOMMENDED (1 << 9) - -/* Recommend using the newer ExProcessorMasks interface */ -#define HV_X64_EX_PROCESSOR_MASKS_RECOMMENDED (1 << 11) - -/* - * Crash notification flag. - */ -#define HV_CRASH_CTL_CRASH_NOTIFY (1ULL << 63) - -/* MSR used to identify the guest OS. */ -#define HV_X64_MSR_GUEST_OS_ID 0x40000000 - -/* MSR used to setup pages used to communicate with the hypervisor. */ -#define HV_X64_MSR_HYPERCALL 0x40000001 - -/* MSR used to provide vcpu index */ -#define HV_X64_MSR_VP_INDEX 0x40000002 - -/* MSR used to reset the guest OS. */ -#define HV_X64_MSR_RESET 0x40000003 - -/* MSR used to provide vcpu runtime in 100ns units */ -#define HV_X64_MSR_VP_RUNTIME 0x40000010 - -/* MSR used to read the per-partition time reference counter */ -#define HV_X64_MSR_TIME_REF_COUNT 0x40000020 - -/* MSR used to retrieve the TSC frequency */ -#define HV_X64_MSR_TSC_FREQUENCY 0x40000022 - -/* MSR used to retrieve the local APIC timer frequency */ -#define HV_X64_MSR_APIC_FREQUENCY 0x40000023 - -/* Define the virtual APIC registers */ -#define HV_X64_MSR_EOI 0x40000070 -#define HV_X64_MSR_ICR 0x40000071 -#define HV_X64_MSR_TPR 0x40000072 -#define HV_X64_MSR_APIC_ASSIST_PAGE 0x40000073 - -/* Define synthetic interrupt controller model specific registers. */ -#define HV_X64_MSR_SCONTROL 0x40000080 -#define HV_X64_MSR_SVERSION 0x40000081 -#define HV_X64_MSR_SIEFP 0x40000082 -#define HV_X64_MSR_SIMP 0x40000083 -#define HV_X64_MSR_EOM 0x40000084 -#define HV_X64_MSR_SINT0 0x40000090 -#define HV_X64_MSR_SINT1 0x40000091 -#define HV_X64_MSR_SINT2 0x40000092 -#define HV_X64_MSR_SINT3 0x40000093 -#define HV_X64_MSR_SINT4 0x40000094 -#define HV_X64_MSR_SINT5 0x40000095 -#define HV_X64_MSR_SINT6 0x40000096 -#define HV_X64_MSR_SINT7 0x40000097 -#define HV_X64_MSR_SINT8 0x40000098 -#define HV_X64_MSR_SINT9 0x40000099 -#define HV_X64_MSR_SINT10 0x4000009A -#define HV_X64_MSR_SINT11 0x4000009B -#define HV_X64_MSR_SINT12 0x4000009C -#define HV_X64_MSR_SINT13 0x4000009D -#define HV_X64_MSR_SINT14 0x4000009E -#define HV_X64_MSR_SINT15 0x4000009F - -/* - * Synthetic Timer MSRs. Four timers per vcpu. - */ -#define HV_X64_MSR_STIMER0_CONFIG 0x400000B0 -#define HV_X64_MSR_STIMER0_COUNT 0x400000B1 -#define HV_X64_MSR_STIMER1_CONFIG 0x400000B2 -#define HV_X64_MSR_STIMER1_COUNT 0x400000B3 -#define HV_X64_MSR_STIMER2_CONFIG 0x400000B4 -#define HV_X64_MSR_STIMER2_COUNT 0x400000B5 -#define HV_X64_MSR_STIMER3_CONFIG 0x400000B6 -#define HV_X64_MSR_STIMER3_COUNT 0x400000B7 - -/* Hyper-V guest crash notification MSR's */ -#define HV_X64_MSR_CRASH_P0 0x40000100 -#define HV_X64_MSR_CRASH_P1 0x40000101 -#define HV_X64_MSR_CRASH_P2 0x40000102 -#define HV_X64_MSR_CRASH_P3 0x40000103 -#define HV_X64_MSR_CRASH_P4 0x40000104 -#define HV_X64_MSR_CRASH_CTL 0x40000105 -#define HV_X64_MSR_CRASH_CTL_NOTIFY (1ULL << 63) -#define HV_X64_MSR_CRASH_PARAMS \ - (1 + (HV_X64_MSR_CRASH_P4 - HV_X64_MSR_CRASH_P0)) - -#define HV_X64_MSR_HYPERCALL_ENABLE 0x00000001 -#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT 12 -#define HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_MASK \ - (~((1ull << HV_X64_MSR_HYPERCALL_PAGE_ADDRESS_SHIFT) - 1)) - -/* Declare the various hypercall operations. */ -#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE 0x0002 -#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST 0x0003 -#define HVCALL_NOTIFY_LONG_SPIN_WAIT 0x0008 -#define HVCALL_FLUSH_VIRTUAL_ADDRESS_SPACE_EX 0x0013 -#define HVCALL_FLUSH_VIRTUAL_ADDRESS_LIST_EX 0x0014 -#define HVCALL_POST_MESSAGE 0x005c -#define HVCALL_SIGNAL_EVENT 0x005d - -#define HV_X64_MSR_APIC_ASSIST_PAGE_ENABLE 0x00000001 -#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT 12 -#define HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_MASK \ - (~((1ull << HV_X64_MSR_APIC_ASSIST_PAGE_ADDRESS_SHIFT) - 1)) - -#define HV_X64_MSR_TSC_REFERENCE_ENABLE 0x00000001 -#define HV_X64_MSR_TSC_REFERENCE_ADDRESS_SHIFT 12 - -#define HV_PROCESSOR_POWER_STATE_C0 0 -#define HV_PROCESSOR_POWER_STATE_C1 1 -#define HV_PROCESSOR_POWER_STATE_C2 2 -#define HV_PROCESSOR_POWER_STATE_C3 3 - -#define HV_FLUSH_ALL_PROCESSORS BIT(0) -#define HV_FLUSH_ALL_VIRTUAL_ADDRESS_SPACES BIT(1) -#define HV_FLUSH_NON_GLOBAL_MAPPINGS_ONLY BIT(2) -#define HV_FLUSH_USE_EXTENDED_RANGE_FORMAT BIT(3) - -enum HV_GENERIC_SET_FORMAT { - HV_GENERIC_SET_SPARCE_4K, - HV_GENERIC_SET_ALL, -}; - -/* hypercall status code */ -#define HV_STATUS_SUCCESS 0 -#define HV_STATUS_INVALID_HYPERCALL_CODE 2 -#define HV_STATUS_INVALID_HYPERCALL_INPUT 3 -#define HV_STATUS_INVALID_ALIGNMENT 4 -#define HV_STATUS_INSUFFICIENT_MEMORY 11 -#define HV_STATUS_INVALID_CONNECTION_ID 18 -#define HV_STATUS_INSUFFICIENT_BUFFERS 19 - -typedef struct _HV_REFERENCE_TSC_PAGE { - uint32_t tsc_sequence; - uint32_t res1; - uint64_t tsc_scale; - int64_t tsc_offset; -} HV_REFERENCE_TSC_PAGE, *PHV_REFERENCE_TSC_PAGE; - -/* Define the number of synthetic interrupt sources. */ -#define HV_SYNIC_SINT_COUNT (16) -/* Define the expected SynIC version. */ -#define HV_SYNIC_VERSION_1 (0x1) - -#define HV_SYNIC_CONTROL_ENABLE (1ULL << 0) -#define HV_SYNIC_SIMP_ENABLE (1ULL << 0) -#define HV_SYNIC_SIEFP_ENABLE (1ULL << 0) -#define HV_SYNIC_SINT_MASKED (1ULL << 16) -#define HV_SYNIC_SINT_AUTO_EOI (1ULL << 17) -#define HV_SYNIC_SINT_VECTOR_MASK (0xFF) - -#define HV_SYNIC_STIMER_COUNT (4) - -/* Define synthetic interrupt controller message constants. */ -#define HV_MESSAGE_SIZE (256) -#define HV_MESSAGE_PAYLOAD_BYTE_COUNT (240) -#define HV_MESSAGE_PAYLOAD_QWORD_COUNT (30) - -/* Define hypervisor message types. */ -enum hv_message_type { - HVMSG_NONE =3D 0x00000000, - - /* Memory access messages. */ - HVMSG_UNMAPPED_GPA =3D 0x80000000, - HVMSG_GPA_INTERCEPT =3D 0x80000001, - - /* Timer notification messages. */ - HVMSG_TIMER_EXPIRED =3D 0x80000010, - - /* Error messages. */ - HVMSG_INVALID_VP_REGISTER_VALUE =3D 0x80000020, - HVMSG_UNRECOVERABLE_EXCEPTION =3D 0x80000021, - HVMSG_UNSUPPORTED_FEATURE =3D 0x80000022, - - /* Trace buffer complete messages. */ - HVMSG_EVENTLOG_BUFFERCOMPLETE =3D 0x80000040, - - /* Platform-specific processor intercept messages. */ - HVMSG_X64_IOPORT_INTERCEPT =3D 0x80010000, - HVMSG_X64_MSR_INTERCEPT =3D 0x80010001, - HVMSG_X64_CPUID_INTERCEPT =3D 0x80010002, - HVMSG_X64_EXCEPTION_INTERCEPT =3D 0x80010003, - HVMSG_X64_APIC_EOI =3D 0x80010004, - HVMSG_X64_LEGACY_FP_ERROR =3D 0x80010005 -}; - -/* Define synthetic interrupt controller message flags. */ -union hv_message_flags { - uint8_t asu8; - struct { - uint8_t msg_pending:1; - uint8_t reserved:7; - }; -}; - -/* Define port identifier type. */ -union hv_port_id { - uint32_t asu32; - struct { - uint32_t id:24; - uint32_t reserved:8; - } u; -}; - -/* Define synthetic interrupt controller message header. */ -struct hv_message_header { - uint32_t message_type; - uint8_t payload_size; - union hv_message_flags message_flags; - uint8_t reserved[2]; - union { - uint64_t sender; - union hv_port_id port; - }; -}; - -/* Define synthetic interrupt controller message format. */ -struct hv_message { - struct hv_message_header header; - union { - uint64_t payload[HV_MESSAGE_PAYLOAD_QWORD_COUNT]; - } u; -}; - -/* Define the synthetic interrupt message page layout. */ -struct hv_message_page { - struct hv_message sint_message[HV_SYNIC_SINT_COUNT]; -}; - -/* Define timer message payload structure. */ -struct hv_timer_message_payload { - uint32_t timer_index; - uint32_t reserved; - uint64_t expiration_time; /* When the timer expired */ - uint64_t delivery_time; /* When the message was delivered */ -}; - -#define HV_STIMER_ENABLE (1ULL << 0) -#define HV_STIMER_PERIODIC (1ULL << 1) -#define HV_STIMER_LAZY (1ULL << 2) -#define HV_STIMER_AUTOENABLE (1ULL << 3) -#define HV_STIMER_SINT(config) (uint8_t)(((config) >> 16) & 0x0F) - -#endif + /* this is a temporary placeholder until kvm_para.h stops includin= g it */ diff --git a/include/standard-headers/linux/input-event-codes.h b/include/s= tandard-headers/linux/input-event-codes.h index 2fa0f4ea6b..79841b543f 100644 --- a/include/standard-headers/linux/input-event-codes.h +++ b/include/standard-headers/linux/input-event-codes.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Input event codes * @@ -406,6 +407,7 @@ #define BTN_TOOL_MOUSE 0x146 #define BTN_TOOL_LENS 0x147 #define BTN_TOOL_QUINTTAP 0x148 /* Five fingers on trackpad */ +#define BTN_STYLUS3 0x149 #define BTN_TOUCH 0x14a #define BTN_STYLUS 0x14b #define BTN_STYLUS2 0x14c diff --git a/include/standard-headers/linux/input.h b/include/standard-head= ers/linux/input.h index 666e201ddb..bc3e6d3d5b 100644 --- a/include/standard-headers/linux/input.h +++ b/include/standard-headers/linux/input.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (c) 1999-2002 Vojtech Pavlik * diff --git a/include/standard-headers/linux/pci_regs.h b/include/standard-h= eaders/linux/pci_regs.h index f8d5804592..70c2b2ade0 100644 --- a/include/standard-headers/linux/pci_regs.h +++ b/include/standard-headers/linux/pci_regs.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * pci_regs.h * @@ -746,6 +747,7 @@ #define PCI_ERR_ROOT_FIRST_FATAL 0x00000010 /* First UNC is Fatal */ #define PCI_ERR_ROOT_NONFATAL_RCV 0x00000020 /* Non-Fatal Received */ #define PCI_ERR_ROOT_FATAL_RCV 0x00000040 /* Fatal Received */ +#define PCI_ERR_ROOT_AER_IRQ 0xf8000000 /* Advanced Error Interrupt Messa= ge Number */ #define PCI_ERR_ROOT_ERR_SRC 52 /* Error Source Identification */ =20 /* Virtual Channel */ @@ -939,9 +941,13 @@ #define PCI_SATA_SIZEOF_LONG 16 =20 /* Resizable BARs */ +#define PCI_REBAR_CAP 4 /* capability register */ +#define PCI_REBAR_CAP_SIZES 0x00FFFFF0 /* supported BAR sizes */ #define PCI_REBAR_CTRL 8 /* control register */ -#define PCI_REBAR_CTRL_NBAR_MASK (7 << 5) /* mask for # bars */ -#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # bars */ +#define PCI_REBAR_CTRL_BAR_IDX 0x00000007 /* BAR index */ +#define PCI_REBAR_CTRL_NBAR_MASK 0x000000E0 /* # of resizable BARs */ +#define PCI_REBAR_CTRL_NBAR_SHIFT 5 /* shift for # of BARs */ +#define PCI_REBAR_CTRL_BAR_SIZE 0x00001F00 /* BAR size */ =20 /* Dynamic Power Allocation */ #define PCI_DPA_CAP 4 /* capability register */ @@ -960,6 +966,7 @@ =20 /* Downstream Port Containment */ #define PCI_EXP_DPC_CAP 4 /* DPC Capability */ +#define PCI_EXP_DPC_IRQ 0x1f /* DPC Interrupt Message Number */ #define PCI_EXP_DPC_CAP_RP_EXT 0x20 /* Root Port Extensions for DPC */ #define PCI_EXP_DPC_CAP_POISONED_TLP 0x40 /* Poisoned TLP Egress Blocking= Supported */ #define PCI_EXP_DPC_CAP_SW_TRIGGER 0x80 /* Software Triggering Supported = */ @@ -995,19 +1002,25 @@ #define PCI_PTM_CTRL_ENABLE 0x00000001 /* PTM enable */ #define PCI_PTM_CTRL_ROOT 0x00000002 /* Root select */ =20 -/* L1 PM Substates */ -#define PCI_L1SS_CAP 4 /* capability register */ -#define PCI_L1SS_CAP_PCIPM_L1_2 1 /* PCI PM L1.2 Support */ -#define PCI_L1SS_CAP_PCIPM_L1_1 2 /* PCI PM L1.1 Support */ -#define PCI_L1SS_CAP_ASPM_L1_2 4 /* ASPM L1.2 Support */ -#define PCI_L1SS_CAP_ASPM_L1_1 8 /* ASPM L1.1 Support */ -#define PCI_L1SS_CAP_L1_PM_SS 16 /* L1 PM Substates Support */ -#define PCI_L1SS_CTL1 8 /* Control Register 1 */ -#define PCI_L1SS_CTL1_PCIPM_L1_2 1 /* PCI PM L1.2 Enable */ -#define PCI_L1SS_CTL1_PCIPM_L1_1 2 /* PCI PM L1.1 Support */ -#define PCI_L1SS_CTL1_ASPM_L1_2 4 /* ASPM L1.2 Support */ -#define PCI_L1SS_CTL1_ASPM_L1_1 8 /* ASPM L1.1 Support */ -#define PCI_L1SS_CTL1_L1SS_MASK 0x0000000F -#define PCI_L1SS_CTL2 0xC /* Control Register 2 */ +/* ASPM L1 PM Substates */ +#define PCI_L1SS_CAP 0x04 /* Capabilities Register */ +#define PCI_L1SS_CAP_PCIPM_L1_2 0x00000001 /* PCI-PM L1.2 Supported */ +#define PCI_L1SS_CAP_PCIPM_L1_1 0x00000002 /* PCI-PM L1.1 Supported */ +#define PCI_L1SS_CAP_ASPM_L1_2 0x00000004 /* ASPM L1.2 Supported */ +#define PCI_L1SS_CAP_ASPM_L1_1 0x00000008 /* ASPM L1.1 Supported */ +#define PCI_L1SS_CAP_L1_PM_SS 0x00000010 /* L1 PM Substates Supported */ +#define PCI_L1SS_CAP_CM_RESTORE_TIME 0x0000ff00 /* Port Common_Mode_Rest= ore_Time */ +#define PCI_L1SS_CAP_P_PWR_ON_SCALE 0x00030000 /* Port T_POWER_ON scale = */ +#define PCI_L1SS_CAP_P_PWR_ON_VALUE 0x00f80000 /* Port T_POWER_ON value = */ +#define PCI_L1SS_CTL1 0x08 /* Control 1 Register */ +#define PCI_L1SS_CTL1_PCIPM_L1_2 0x00000001 /* PCI-PM L1.2 Enable */ +#define PCI_L1SS_CTL1_PCIPM_L1_1 0x00000002 /* PCI-PM L1.1 Enable */ +#define PCI_L1SS_CTL1_ASPM_L1_2 0x00000004 /* ASPM L1.2 Enable */ +#define PCI_L1SS_CTL1_ASPM_L1_1 0x00000008 /* ASPM L1.1 Enable */ +#define PCI_L1SS_CTL1_L1SS_MASK 0x0000000f +#define PCI_L1SS_CTL1_CM_RESTORE_TIME 0x0000ff00 /* Common_Mode_Restore_= Time */ +#define PCI_L1SS_CTL1_LTR_L12_TH_VALUE 0x03ff0000 /* LTR_L1.2_THRESHOLD_= Value */ +#define PCI_L1SS_CTL1_LTR_L12_TH_SCALE 0xe0000000 /* LTR_L1.2_THRESHOLD_= Scale */ +#define PCI_L1SS_CTL2 0x0c /* Control 2 Register */ =20 #endif /* LINUX_PCI_REGS_H */ diff --git a/linux-headers/asm-arm/kvm.h b/linux-headers/asm-arm/kvm.h index fa9fae8dc2..4392955081 100644 --- a/linux-headers/asm-arm/kvm.h +++ b/linux-headers/asm-arm/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012 - Virtual Open Systems and Columbia University * Author: Christoffer Dall @@ -151,6 +152,12 @@ struct kvm_arch_memory_slot { (__ARM_CP15_REG(op1, 0, crm, 0) | KVM_REG_SIZE_U64) #define ARM_CP15_REG64(...) __ARM_CP15_REG64(__VA_ARGS__) =20 +/* PL1 Physical Timer Registers */ +#define KVM_REG_ARM_PTIMER_CTL ARM_CP15_REG32(0, 14, 2, 1) +#define KVM_REG_ARM_PTIMER_CNT ARM_CP15_REG64(0, 14) +#define KVM_REG_ARM_PTIMER_CVAL ARM_CP15_REG64(2, 14) + +/* Virtual Timer Registers */ #define KVM_REG_ARM_TIMER_CTL ARM_CP15_REG32(0, 14, 3, 1) #define KVM_REG_ARM_TIMER_CNT ARM_CP15_REG64(1, 14) #define KVM_REG_ARM_TIMER_CVAL ARM_CP15_REG64(3, 14) @@ -215,6 +222,7 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_ITS_SAVE_TABLES 1 #define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 #define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 +#define KVM_DEV_ARM_ITS_CTRL_RESET 4 =20 /* KVM_IRQ_LINE irq field index values */ #define KVM_ARM_IRQ_TYPE_SHIFT 24 diff --git a/linux-headers/asm-arm/kvm_para.h b/linux-headers/asm-arm/kvm_p= ara.h index 14fab8f0b9..baacc4996d 100644 --- a/linux-headers/asm-arm/kvm_para.h +++ b/linux-headers/asm-arm/kvm_para.h @@ -1 +1,2 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #include diff --git a/linux-headers/asm-arm/unistd.h b/linux-headers/asm-arm/unistd.h index 155571b874..18b0825885 100644 --- a/linux-headers/asm-arm/unistd.h +++ b/linux-headers/asm-arm/unistd.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * arch/arm/include/asm/unistd.h * @@ -35,5 +36,6 @@ #define __ARM_NR_usr26 (__ARM_NR_BASE+3) #define __ARM_NR_usr32 (__ARM_NR_BASE+4) #define __ARM_NR_set_tls (__ARM_NR_BASE+5) +#define __ARM_NR_get_tls (__ARM_NR_BASE+6) =20 #endif /* __ASM_ARM_UNISTD_H */ diff --git a/linux-headers/asm-arm64/kvm.h b/linux-headers/asm-arm64/kvm.h index d254700b08..4e80651efe 100644 --- a/linux-headers/asm-arm64/kvm.h +++ b/linux-headers/asm-arm64/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012,2013 - ARM Ltd * Author: Marc Zyngier @@ -195,6 +196,12 @@ struct kvm_arch_memory_slot { =20 #define ARM64_SYS_REG(...) (__ARM64_SYS_REG(__VA_ARGS__) | KVM_REG_SIZE_U6= 4) =20 +/* Physical Timer EL0 Registers */ +#define KVM_REG_ARM_PTIMER_CTL ARM64_SYS_REG(3, 3, 14, 2, 1) +#define KVM_REG_ARM_PTIMER_CVAL ARM64_SYS_REG(3, 3, 14, 2, 2) +#define KVM_REG_ARM_PTIMER_CNT ARM64_SYS_REG(3, 3, 14, 0, 1) + +/* EL0 Virtual Timer Registers */ #define KVM_REG_ARM_TIMER_CTL ARM64_SYS_REG(3, 3, 14, 3, 1) #define KVM_REG_ARM_TIMER_CNT ARM64_SYS_REG(3, 3, 14, 3, 2) #define KVM_REG_ARM_TIMER_CVAL ARM64_SYS_REG(3, 3, 14, 0, 2) @@ -227,6 +234,7 @@ struct kvm_arch_memory_slot { #define KVM_DEV_ARM_ITS_SAVE_TABLES 1 #define KVM_DEV_ARM_ITS_RESTORE_TABLES 2 #define KVM_DEV_ARM_VGIC_SAVE_PENDING_TABLES 3 +#define KVM_DEV_ARM_ITS_CTRL_RESET 4 =20 /* Device Control API on vcpu fd */ #define KVM_ARM_VCPU_PMU_V3_CTRL 0 diff --git a/linux-headers/asm-arm64/unistd.h b/linux-headers/asm-arm64/uni= std.h index 043d17a213..5072cbd15c 100644 --- a/linux-headers/asm-arm64/unistd.h +++ b/linux-headers/asm-arm64/unistd.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Copyright (C) 2012 ARM Ltd. * diff --git a/linux-headers/asm-powerpc/epapr_hcalls.h b/linux-headers/asm-p= owerpc/epapr_hcalls.h index 33b3f89f55..6cca559993 100644 --- a/linux-headers/asm-powerpc/epapr_hcalls.h +++ b/linux-headers/asm-powerpc/epapr_hcalls.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: ((GPL-2.0+ WITH Linux-syscall-note) OR BSD-3-C= lause) */ /* * ePAPR hcall interface * diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kv= m.h index 8cf8f0c969..61d6049f4c 100644 --- a/linux-headers/asm-powerpc/kvm.h +++ b/linux-headers/asm-powerpc/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as diff --git a/linux-headers/asm-powerpc/kvm_para.h b/linux-headers/asm-power= pc/kvm_para.h index 2abcc46382..9beb49cc10 100644 --- a/linux-headers/asm-powerpc/kvm_para.h +++ b/linux-headers/asm-powerpc/kvm_para.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, version 2, as diff --git a/linux-headers/asm-powerpc/unistd.h b/linux-headers/asm-powerpc= /unistd.h index a1786340e9..36abf58582 100644 --- a/linux-headers/asm-powerpc/unistd.h +++ b/linux-headers/asm-powerpc/unistd.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0+ WITH Linux-syscall-note */ /* * This file contains the system call numbers. * diff --git a/linux-headers/asm-s390/kvm.h b/linux-headers/asm-s390/kvm.h index 7b750ef7ee..32d372e977 100644 --- a/linux-headers/asm-s390/kvm.h +++ b/linux-headers/asm-s390/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __LINUX_KVM_S390_H #define __LINUX_KVM_S390_H /* diff --git a/linux-headers/asm-s390/kvm_para.h b/linux-headers/asm-s390/kvm= _para.h index ff1f4e7b30..0dc86b3a7c 100644 --- a/linux-headers/asm-s390/kvm_para.h +++ b/linux-headers/asm-s390/kvm_para.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * User API definitions for paravirtual devices on s390 * diff --git a/linux-headers/asm-s390/unistd.h b/linux-headers/asm-s390/unist= d.h index 65e7e59dbb..99223b874a 100644 --- a/linux-headers/asm-s390/unistd.h +++ b/linux-headers/asm-s390/unistd.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * S390 version * @@ -315,7 +316,8 @@ #define __NR_pwritev2 377 #define __NR_s390_guarded_storage 378 #define __NR_statx 379 -#define NR_syscalls 380 +#define __NR_s390_sthyi 380 +#define NR_syscalls 381 =20 /*=20 * There are some system calls that are not present on 64 bit, some diff --git a/linux-headers/asm-x86/kvm.h b/linux-headers/asm-x86/kvm.h index c2824d02ba..f3a960488e 100644 --- a/linux-headers/asm-x86/kvm.h +++ b/linux-headers/asm-x86/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _ASM_X86_KVM_H #define _ASM_X86_KVM_H =20 diff --git a/linux-headers/asm-x86/kvm_para.h b/linux-headers/asm-x86/kvm_p= ara.h index cefa127d84..4c300f6aaa 100644 --- a/linux-headers/asm-x86/kvm_para.h +++ b/linux-headers/asm-x86/kvm_para.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _ASM_X86_KVM_PARA_H #define _ASM_X86_KVM_PARA_H =20 @@ -109,5 +110,4 @@ struct kvm_vcpu_pv_apf_data { #define KVM_PV_EOI_ENABLED KVM_PV_EOI_MASK #define KVM_PV_EOI_DISABLED 0x0 =20 - #endif /* _ASM_X86_KVM_PARA_H */ diff --git a/linux-headers/asm-x86/unistd.h b/linux-headers/asm-x86/unistd.h index 1f99b12843..c04f638154 100644 --- a/linux-headers/asm-x86/unistd.h +++ b/linux-headers/asm-x86/unistd.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _ASM_X86_UNISTD_H #define _ASM_X86_UNISTD_H =20 diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index dd8a91801e..ce6c2f11f4 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __LINUX_KVM_H #define __LINUX_KVM_H =20 @@ -930,6 +931,7 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_PPC_SMT_POSSIBLE 147 #define KVM_CAP_HYPERV_SYNIC2 148 #define KVM_CAP_HYPERV_VP_INDEX 149 +#define KVM_CAP_S390_AIS_MIGRATION 150 =20 #ifdef KVM_CAP_IRQ_ROUTING =20 diff --git a/linux-headers/linux/kvm_para.h b/linux-headers/linux/kvm_para.h index 15b24ff6cf..8bcd0aa853 100644 --- a/linux-headers/linux/kvm_para.h +++ b/linux-headers/linux/kvm_para.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef __LINUX_KVM_PARA_H #define __LINUX_KVM_PARA_H =20 diff --git a/linux-headers/linux/psci.h b/linux-headers/linux/psci.h index 08d443f7cf..ccd17731c6 100644 --- a/linux-headers/linux/psci.h +++ b/linux-headers/linux/psci.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * ARM Power State and Coordination Interface (PSCI) header * diff --git a/linux-headers/linux/userfaultfd.h b/linux-headers/linux/userfa= ultfd.h index b43cf0d415..ce78878d12 100644 --- a/linux-headers/linux/userfaultfd.h +++ b/linux-headers/linux/userfaultfd.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * include/linux/userfaultfd.h * diff --git a/linux-headers/linux/vfio.h b/linux-headers/linux/vfio.h index 4e7ab4c52a..4312e961ff 100644 --- a/linux-headers/linux/vfio.h +++ b/linux-headers/linux/vfio.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * VFIO API definition * diff --git a/linux-headers/linux/vfio_ccw.h b/linux-headers/linux/vfio_ccw.h index 3a565511ab..5bf96c3812 100644 --- a/linux-headers/linux/vfio_ccw.h +++ b/linux-headers/linux/vfio_ccw.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ /* * Interfaces for vfio-ccw * diff --git a/linux-headers/linux/vhost.h b/linux-headers/linux/vhost.h index 1e86a3dd0d..e336395d67 100644 --- a/linux-headers/linux/vhost.h +++ b/linux-headers/linux/vhost.h @@ -1,3 +1,4 @@ +/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ #ifndef _LINUX_VHOST_H #define _LINUX_VHOST_H /* Userspace interface for in-kernel virtio accelerators. */ --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946078702369.70098823252397; Tue, 6 Feb 2018 11:41:18 -0800 (PST) Received: from localhost ([::1]:53506 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej976-00028C-Nt for importer@patchew.org; Tue, 06 Feb 2018 14:41:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44161) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iq-0005Po-Uj for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ik-00081d-W1 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:04 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:57702) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ik-00080y-K0 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:58 -0500 Received: from pps.filterd (m0098410.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFAF4064833 for ; Tue, 6 Feb 2018 14:15:57 -0500 Received: from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyhx2hbm0-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:55 -0500 Received: from localhost by e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:51 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFpZS50200732; Tue, 6 Feb 2018 19:15:51 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id D3664AC03F; Tue, 6 Feb 2018 14:17:11 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 99473AC03A; Tue, 6 Feb 2018 14:17:11 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:50 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0044-0000-0000-000003DC6DB5 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:53 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0045-0000-0000-0000080BDD3D Message-Id: <20180206191515.25830-30-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 29/54] linux-headers: update X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Cornelia Huck , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Cornelia Huck Update headers against 4.15-rc9. Signed-off-by: Cornelia Huck (cherry picked from commit 9cbb636270b4df6f0a548e5c34b895330db5df8b) Signed-off-by: Michael Roth --- include/standard-headers/asm-s390/virtio-ccw.h | 6 +----- linux-headers/asm-powerpc/kvm.h | 25 ++++++++++++++++++++++= +++ linux-headers/asm-s390/kvm.h | 9 ++++----- linux-headers/asm-s390/kvm_para.h | 4 ---- linux-headers/linux/kvm.h | 8 ++++++-- 5 files changed, 36 insertions(+), 16 deletions(-) diff --git a/include/standard-headers/asm-s390/virtio-ccw.h b/include/stand= ard-headers/asm-s390/virtio-ccw.h index 967aad3901..2b605f7e84 100644 --- a/include/standard-headers/asm-s390/virtio-ccw.h +++ b/include/standard-headers/asm-s390/virtio-ccw.h @@ -1,13 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0 WITH Linux-syscall-note */ +/* SPDX-License-Identifier: ((GPL-2.0 WITH Linux-syscall-note) OR BSD-3-Cl= ause) */ /* * Definitions for virtio-ccw devices. * * Copyright IBM Corp. 2013 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * * Author(s): Cornelia Huck */ #ifndef __KVM_VIRTIO_CCW_H diff --git a/linux-headers/asm-powerpc/kvm.h b/linux-headers/asm-powerpc/kv= m.h index 61d6049f4c..637b7263cb 100644 --- a/linux-headers/asm-powerpc/kvm.h +++ b/linux-headers/asm-powerpc/kvm.h @@ -443,6 +443,31 @@ struct kvm_ppc_rmmu_info { __u32 ap_encodings[8]; }; =20 +/* For KVM_PPC_GET_CPU_CHAR */ +struct kvm_ppc_cpu_char { + __u64 character; /* characteristics of the CPU */ + __u64 behaviour; /* recommended software behaviour */ + __u64 character_mask; /* valid bits in character */ + __u64 behaviour_mask; /* valid bits in behaviour */ +}; + +/* + * Values for character and character_mask. + * These are identical to the values used by H_GET_CPU_CHARACTERISTICS. + */ +#define KVM_PPC_CPU_CHAR_SPEC_BAR_ORI31 (1ULL << 63) +#define KVM_PPC_CPU_CHAR_BCCTRL_SERIALISED (1ULL << 62) +#define KVM_PPC_CPU_CHAR_L1D_FLUSH_ORI30 (1ULL << 61) +#define KVM_PPC_CPU_CHAR_L1D_FLUSH_TRIG2 (1ULL << 60) +#define KVM_PPC_CPU_CHAR_L1D_THREAD_PRIV (1ULL << 59) +#define KVM_PPC_CPU_CHAR_BR_HINT_HONOURED (1ULL << 58) +#define KVM_PPC_CPU_CHAR_MTTRIG_THR_RECONF (1ULL << 57) +#define KVM_PPC_CPU_CHAR_COUNT_CACHE_DIS (1ULL << 56) + +#define KVM_PPC_CPU_BEHAV_FAVOUR_SECURITY (1ULL << 63) +#define KVM_PPC_CPU_BEHAV_L1D_FLUSH_PR (1ULL << 62) +#define KVM_PPC_CPU_BEHAV_BNDS_CHK_SPEC_BAR (1ULL << 61) + /* Per-vcpu XICS interrupt controller state */ #define KVM_REG_PPC_ICP_STATE (KVM_REG_PPC | KVM_REG_SIZE_U64 | 0x8c) =20 diff --git a/linux-headers/asm-s390/kvm.h b/linux-headers/asm-s390/kvm.h index 32d372e977..11def14301 100644 --- a/linux-headers/asm-s390/kvm.h +++ b/linux-headers/asm-s390/kvm.h @@ -6,10 +6,6 @@ * * Copyright IBM Corp. 2008 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * * Author(s): Carsten Otte * Christian Borntraeger */ @@ -228,6 +224,7 @@ struct kvm_guest_debug_arch { #define KVM_SYNC_RICCB (1UL << 7) #define KVM_SYNC_FPRS (1UL << 8) #define KVM_SYNC_GSCB (1UL << 9) +#define KVM_SYNC_BPBC (1UL << 10) /* length and alignment of the sdnx as a power of two */ #define SDNXC 8 #define SDNXL (1UL << SDNXC) @@ -251,7 +248,9 @@ struct kvm_sync_regs { }; __u8 reserved[512]; /* for future vector expansion */ __u32 fpc; /* valid on KVM_SYNC_VRS or KVM_SYNC_FPRS */ - __u8 padding1[52]; /* riccb needs to be 64byte aligned */ + __u8 bpbc : 1; /* bp mode */ + __u8 reserved2 : 7; + __u8 padding1[51]; /* riccb needs to be 64byte aligned */ __u8 riccb[64]; /* runtime instrumentation controls block */ __u8 padding2[192]; /* sdnx needs to be 256byte aligned */ union { diff --git a/linux-headers/asm-s390/kvm_para.h b/linux-headers/asm-s390/kvm= _para.h index 0dc86b3a7c..b9ab584adf 100644 --- a/linux-headers/asm-s390/kvm_para.h +++ b/linux-headers/asm-s390/kvm_para.h @@ -4,9 +4,5 @@ * * Copyright IBM Corp. 2008 * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License (version 2 only) - * as published by the Free Software Foundation. - * * Author(s): Christian Borntraeger */ diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h index ce6c2f11f4..d92c9b2f0e 100644 --- a/linux-headers/linux/kvm.h +++ b/linux-headers/linux/kvm.h @@ -630,9 +630,9 @@ struct kvm_s390_irq { =20 struct kvm_s390_irq_state { __u64 buf; - __u32 flags; + __u32 flags; /* will stay unused for compatibility reasons */ __u32 len; - __u32 reserved[4]; + __u32 reserved[4]; /* will stay unused for compatibility reasons */ }; =20 /* for KVM_SET_GUEST_DEBUG */ @@ -932,6 +932,8 @@ struct kvm_ppc_resize_hpt { #define KVM_CAP_HYPERV_SYNIC2 148 #define KVM_CAP_HYPERV_VP_INDEX 149 #define KVM_CAP_S390_AIS_MIGRATION 150 +#define KVM_CAP_PPC_GET_CPU_CHAR 151 +#define KVM_CAP_S390_BPB 152 =20 #ifdef KVM_CAP_IRQ_ROUTING =20 @@ -1261,6 +1263,8 @@ struct kvm_s390_ucas_mapping { #define KVM_PPC_CONFIGURE_V3_MMU _IOW(KVMIO, 0xaf, struct kvm_ppc_mmuv3_= cfg) /* Available with KVM_CAP_PPC_RADIX_MMU */ #define KVM_PPC_GET_RMMU_INFO _IOW(KVMIO, 0xb0, struct kvm_ppc_rmmu_inf= o) +/* Available with KVM_CAP_PPC_GET_CPU_CHAR */ +#define KVM_PPC_GET_CPU_CHAR _IOR(KVMIO, 0xb1, struct kvm_ppc_cpu_char) =20 /* ioctl for vm fd */ #define KVM_CREATE_DEVICE _IOWR(KVMIO, 0xe0, struct kvm_create_device) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:52 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFq8E50200746; Tue, 6 Feb 2018 19:15:52 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 85938AC040; Tue, 6 Feb 2018 14:17:12 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 4BC64AC03F; Tue, 6 Feb 2018 14:17:12 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:51 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0008-0000-0000-000002CD7B5F X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:54 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0009-0000-0000-0000382B9ECA Message-Id: <20180206191515.25830-31-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 30/54] s390x/kvm: Handle bpb feature X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Borntraeger , Cornelia Huck , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Christian Borntraeger We need to handle the bpb control on reset and migration. Normally stfle.82 is transparent (and the normal guest part works without hypervisor activity). To prevent any issues we require full host kernel support for this feature. Cc: qemu-stable@nongnu.org Signed-off-by: Christian Borntraeger Message-Id: <20180118085628.40798-3-borntraeger@de.ibm.com> Reviewed-by: Thomas Huth Reviewed-by: David Hildenbrand [CH: 'Branch Prediction Blocking' -> 'Branch prediction blocking'] Signed-off-by: Cornelia Huck (cherry picked from commit b073c87517d4d348c7bac0f0b35e8e83e6354d82) Signed-off-by: Michael Roth --- target/s390x/cpu.c | 1 + target/s390x/cpu.h | 1 + target/s390x/cpu_features.c | 1 + target/s390x/cpu_features_def.h | 1 + target/s390x/gen-features.c | 1 + target/s390x/kvm.c | 14 ++++++++++++++ target/s390x/machine.c | 17 +++++++++++++++++ 7 files changed, 36 insertions(+) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index ae3cee91a2..d2e6b9f5c7 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -89,6 +89,7 @@ static void s390_cpu_reset(CPUState *s) CPUS390XState *env =3D &cpu->env; =20 env->pfault_token =3D -1UL; + env->bpbc =3D false; scc->parent_reset(s); cpu->env.sigp_order =3D 0; s390_cpu_set_state(CPU_STATE_STOPPED, cpu); diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 4db8b5409e..23053e3b6a 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -93,6 +93,7 @@ struct CPUS390XState { =20 uint32_t fpc; /* floating-point control register */ uint32_t cc_op; + bool bpbc; /* branch prediction blocking */ =20 float_status fpu_status; /* passed to softfloat lib */ =20 diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c index 31a4676f05..b45ef09f93 100644 --- a/target/s390x/cpu_features.c +++ b/target/s390x/cpu_features.c @@ -89,6 +89,7 @@ static const S390FeatDef s390_features[] =3D { FEAT_INIT("msa4-base", S390_FEAT_TYPE_STFL, 77, "Message-security-assi= st-extension-4 facility (excluding subfunctions)"), FEAT_INIT("edat2", S390_FEAT_TYPE_STFL, 78, "Enhanced-DAT facility 2"), FEAT_INIT("dfppc", S390_FEAT_TYPE_STFL, 80, "Decimal-floating-point pa= cked-conversion facility"), + FEAT_INIT("bpb", S390_FEAT_TYPE_STFL, 82, "Branch prediction blocking"= ), FEAT_INIT("vx", S390_FEAT_TYPE_STFL, 129, "Vector facility"), FEAT_INIT("iep", S390_FEAT_TYPE_STFL, 130, "Instruction-execution-prot= ection facility"), FEAT_INIT("sea_esop2", S390_FEAT_TYPE_STFL, 131, "Side-effect-access f= acility and Enhanced-suppression-on-protection facility 2"), diff --git a/target/s390x/cpu_features_def.h b/target/s390x/cpu_features_de= f.h index 4b6d4e9cc0..4487cfd53b 100644 --- a/target/s390x/cpu_features_def.h +++ b/target/s390x/cpu_features_def.h @@ -80,6 +80,7 @@ typedef enum { S390_FEAT_MSA_EXT_4, S390_FEAT_EDAT_2, S390_FEAT_DFP_PACKED_CONVERSION, + S390_FEAT_BPB, S390_FEAT_VECTOR, S390_FEAT_INSTRUCTION_EXEC_PROT, S390_FEAT_SIDE_EFFECT_ACCESS_ESOP2, diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 68e6c31b4b..13a6291a3c 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -352,6 +352,7 @@ static uint16_t base_GEN14_GA1[] =3D { * support these features yet. */ static uint16_t full_GEN7_GA1[] =3D { + S390_FEAT_BPB, S390_FEAT_SIE_F2, S390_FEAT_SIE_SKEY, S390_FEAT_SIE_GPERE, diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index b03f583032..2abc4ade6c 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -490,6 +490,11 @@ int kvm_arch_put_registers(CPUState *cs, int level) cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_GSCB; } =20 + if (can_sync_regs(cs, KVM_SYNC_BPBC)) { + cs->kvm_run->s.regs.bpbc =3D env->bpbc; + cs->kvm_run->kvm_dirty_regs |=3D KVM_SYNC_BPBC; + } + /* Finally the prefix */ if (can_sync_regs(cs, KVM_SYNC_PREFIX)) { cs->kvm_run->s.regs.prefix =3D env->psa; @@ -600,6 +605,10 @@ int kvm_arch_get_registers(CPUState *cs) memcpy(env->gscb, cs->kvm_run->s.regs.gscb, 32); } =20 + if (can_sync_regs(cs, KVM_SYNC_BPBC)) { + env->bpbc =3D cs->kvm_run->s.regs.bpbc; + } + /* pfault parameters */ if (can_sync_regs(cs, KVM_SYNC_PFAULT)) { env->pfault_token =3D cs->kvm_run->s.regs.pft; @@ -2298,6 +2307,11 @@ void kvm_s390_get_host_cpu_model(S390CPUModel *model= , Error **errp) clear_bit(S390_FEAT_CMM_NT, model->features); } =20 + /* bpb needs kernel support for migration, VSIE and reset */ + if (!kvm_check_extension(kvm_state, KVM_CAP_S390_BPB)) { + clear_bit(S390_FEAT_BPB, model->features); + } + /* We emulate a zPCI bus and AEN, therefore we don't need HW support */ if (pci_available) { set_bit(S390_FEAT_ZPCI, model->features); diff --git a/target/s390x/machine.c b/target/s390x/machine.c index b78f326d3a..84b4928755 100644 --- a/target/s390x/machine.c +++ b/target/s390x/machine.c @@ -194,6 +194,22 @@ const VMStateDescription vmstate_gscb =3D { } }; =20 +static bool bpbc_needed(void *opaque) +{ + return s390_has_feat(S390_FEAT_BPB); +} + +const VMStateDescription vmstate_bpbc =3D { + .name =3D "cpu/bpbc", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D bpbc_needed, + .fields =3D (VMStateField[]) { + VMSTATE_BOOL(env.bpbc, S390CPU), + VMSTATE_END_OF_LIST() + } +}; + const VMStateDescription vmstate_s390_cpu =3D { .name =3D "cpu", .post_load =3D cpu_post_load, @@ -228,6 +244,7 @@ const VMStateDescription vmstate_s390_cpu =3D { &vmstate_riccb, &vmstate_exval, &vmstate_gscb, + &vmstate_bpbc, NULL }, }; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:53 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFr8F43516018; Tue, 6 Feb 2018 19:15:53 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id C86ACAC041; Tue, 6 Feb 2018 14:17:13 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 8DCDEAC03F; Tue, 6 Feb 2018 14:17:13 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:52 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0056-0000-0000-0000041670A8 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:55 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0057-0000-0000-0000084DDF9C Message-Id: <20180206191515.25830-32-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 31/54] s390x/kvm: provide stfle.81 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Christian Borntraeger , Cornelia Huck , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Christian Borntraeger stfle.81 (ppa15) is a transparent facility that can be passed to the guest without the need to implement hypervisor support. As this feature can be provided by firmware we add it to all full models. Cc: qemu-stable@nongnu.org Signed-off-by: Christian Borntraeger Message-Id: <20180118085628.40798-4-borntraeger@de.ibm.com> Reviewed-by: Halil Pasic Reviewed-by: David Hildenbrand Reviewed-by: Thomas Huth Signed-off-by: Cornelia Huck (cherry picked from commit 9f0d13f4f1de3cf9b70435cc4e87a301ee12471f) Signed-off-by: Michael Roth --- target/s390x/cpu_features.c | 1 + target/s390x/cpu_features_def.h | 1 + target/s390x/gen-features.c | 1 + 3 files changed, 3 insertions(+) diff --git a/target/s390x/cpu_features.c b/target/s390x/cpu_features.c index b45ef09f93..85d10b5710 100644 --- a/target/s390x/cpu_features.c +++ b/target/s390x/cpu_features.c @@ -89,6 +89,7 @@ static const S390FeatDef s390_features[] =3D { FEAT_INIT("msa4-base", S390_FEAT_TYPE_STFL, 77, "Message-security-assi= st-extension-4 facility (excluding subfunctions)"), FEAT_INIT("edat2", S390_FEAT_TYPE_STFL, 78, "Enhanced-DAT facility 2"), FEAT_INIT("dfppc", S390_FEAT_TYPE_STFL, 80, "Decimal-floating-point pa= cked-conversion facility"), + FEAT_INIT("ppa15", S390_FEAT_TYPE_STFL, 81, "PPA15 is installed"), FEAT_INIT("bpb", S390_FEAT_TYPE_STFL, 82, "Branch prediction blocking"= ), FEAT_INIT("vx", S390_FEAT_TYPE_STFL, 129, "Vector facility"), FEAT_INIT("iep", S390_FEAT_TYPE_STFL, 130, "Instruction-execution-prot= ection facility"), diff --git a/target/s390x/cpu_features_def.h b/target/s390x/cpu_features_de= f.h index 4487cfd53b..4d930871b4 100644 --- a/target/s390x/cpu_features_def.h +++ b/target/s390x/cpu_features_def.h @@ -80,6 +80,7 @@ typedef enum { S390_FEAT_MSA_EXT_4, S390_FEAT_EDAT_2, S390_FEAT_DFP_PACKED_CONVERSION, + S390_FEAT_PPA15, S390_FEAT_BPB, S390_FEAT_VECTOR, S390_FEAT_INSTRUCTION_EXEC_PROT, diff --git a/target/s390x/gen-features.c b/target/s390x/gen-features.c index 13a6291a3c..e6b41529b0 100644 --- a/target/s390x/gen-features.c +++ b/target/s390x/gen-features.c @@ -352,6 +352,7 @@ static uint16_t base_GEN14_GA1[] =3D { * support these features yet. */ static uint16_t full_GEN7_GA1[] =3D { + S390_FEAT_PPA15, S390_FEAT_BPB, S390_FEAT_SIE_F2, S390_FEAT_SIE_SKEY, --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946123121234.42103560877774; Tue, 6 Feb 2018 11:42:03 -0800 (PST) Received: from localhost ([::1]:53509 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej97y-0002w5-Aq for importer@patchew.org; Tue, 06 Feb 2018 14:42:02 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44239) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iu-0005Uv-Ei for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8io-00085L-Dj for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:08 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:46940) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8io-00084K-3r for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:02 -0500 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JELaR053130 for ; Tue, 6 Feb 2018 14:16:01 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyg4xph7g-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:59 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:54 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFrKo41877720; Tue, 6 Feb 2018 19:15:53 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 74380AC041; Tue, 6 Feb 2018 14:17:14 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 39E35AC03A; Tue, 6 Feb 2018 14:17:14 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:53 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7DA0 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:56 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B433 Message-Id: <20180206191515.25830-33-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 32/54] osdep: Retry SETLK upon EINTR X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Kevin Wolf , Fam Zheng , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fam Zheng We could hit lock failure if there is a signal that makes fcntl return -1 and errno set to EINTR. In this case we should retry. Cc: qemu-stable@nongnu.org Signed-off-by: Fam Zheng Reviewed-by: Eric Blake Signed-off-by: Kevin Wolf (cherry picked from commit f86428a1f4f91a460ed585682af70d3e8c31dc06) Signed-off-by: Michael Roth --- util/osdep.c | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/util/osdep.c b/util/osdep.c index 1231f9f876..a73de0e1ba 100644 --- a/util/osdep.c +++ b/util/osdep.c @@ -244,7 +244,9 @@ static int qemu_lock_fcntl(int fd, int64_t start, int64= _t len, int fl_type) .l_type =3D fl_type, }; qemu_probe_lock_ops(); - ret =3D fcntl(fd, fcntl_op_setlk, &fl); + do { + ret =3D fcntl(fd, fcntl_op_setlk, &fl); + } while (ret =3D=3D -1 && errno =3D=3D EINTR); return ret =3D=3D -1 ? -errno : 0; } =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945709720835.9900552285205; Tue, 6 Feb 2018 11:35:09 -0800 (PST) Received: from localhost ([::1]:53445 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej91I-0005JN-RK for importer@patchew.org; Tue, 06 Feb 2018 14:35:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44212) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8it-0005TZ-AX for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8in-00084G-Fw for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:07 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:40798 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8in-00083f-8K for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:01 -0500 Received: from pps.filterd (m0098417.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEOr0020504 for ; Tue, 6 Feb 2018 14:16:00 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyf6usgbb-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:59 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:55 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFsVU40960174; Tue, 6 Feb 2018 19:15:54 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1ECACAC040; Tue, 6 Feb 2018 14:17:15 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id D90E7AC03A; Tue, 6 Feb 2018 14:17:14 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:54 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F4A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:56 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E776 Message-Id: <20180206191515.25830-34-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 33/54] usb-storage: Fix share-rw option parsing X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Fam Zheng , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Gerd Hoffmann Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Fam Zheng Because usb-storage creates an internal scsi device, we should propagate options. We already do so for bootindex etc, but failed to take care of share-rw. Fix it in an apparent way: add a new parameter to scsi_bus_legacy_add_drive and pass in s->conf.share_rw. Cc: qemu-stable@nongnu.org Signed-off-by: Fam Zheng Reviewed-by: Darren Kenny Message-id: 20180117005222.4781-1-famz@redhat.com Signed-off-by: Gerd Hoffmann (cherry picked from commit 395b95395934785ca86baafd314d0c31b307d16d) Conflicts: hw/usb/dev-storage.c * dropped context dep on ceff3e1f01e Signed-off-by: Michael Roth --- hw/scsi/scsi-bus.c | 9 ++++++++- hw/usb/dev-storage.c | 3 ++- include/hw/scsi/scsi.h | 1 + 3 files changed, 11 insertions(+), 2 deletions(-) diff --git a/hw/scsi/scsi-bus.c b/hw/scsi/scsi-bus.c index 977f7bce1f..73ca842327 100644 --- a/hw/scsi/scsi-bus.c +++ b/hw/scsi/scsi-bus.c @@ -224,6 +224,7 @@ static void scsi_qdev_unrealize(DeviceState *qdev, Erro= r **errp) /* handle legacy '-drive if=3Dscsi,...' cmd line args */ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockBackend *blk, int unit, bool removable, int bootin= dex, + bool share_rw, const char *serial, Error **errp) { const char *driver; @@ -254,6 +255,12 @@ SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, Bl= ockBackend *blk, object_unparent(OBJECT(dev)); return NULL; } + object_property_set_bool(OBJECT(dev), share_rw, "share-rw", &err); + if (err !=3D NULL) { + error_propagate(errp, err); + object_unparent(OBJECT(dev)); + return NULL; + } object_property_set_bool(OBJECT(dev), true, "realized", &err); if (err !=3D NULL) { error_propagate(errp, err); @@ -288,7 +295,7 @@ void scsi_bus_legacy_handle_cmdline(SCSIBus *bus, bool = deprecated) } } scsi_bus_legacy_add_drive(bus, blk_by_legacy_dinfo(dinfo), - unit, false, -1, NULL, &error_fatal); + unit, false, -1, false, NULL, &error_fat= al); } loc_pop(&loc); } diff --git a/hw/usb/dev-storage.c b/hw/usb/dev-storage.c index 8a61ec94c8..ff18ad5324 100644 --- a/hw/usb/dev-storage.c +++ b/hw/usb/dev-storage.c @@ -635,7 +635,8 @@ static void usb_msd_realize_storage(USBDevice *dev, Err= or **errp) scsi_bus_new(&s->bus, sizeof(s->bus), DEVICE(dev), &usb_msd_scsi_info_storage, NULL); scsi_dev =3D scsi_bus_legacy_add_drive(&s->bus, blk, 0, !!s->removable, - s->conf.bootindex, dev->serial, + s->conf.bootindex, s->conf.share_= rw, + dev->serial, &err); blk_unref(blk); if (!scsi_dev) { diff --git a/include/hw/scsi/scsi.h b/include/hw/scsi/scsi.h index 23a8ee6a7d..802a647cdc 100644 --- a/include/hw/scsi/scsi.h +++ b/include/hw/scsi/scsi.h @@ -151,6 +151,7 @@ static inline SCSIBus *scsi_bus_from_device(SCSIDevice = *d) =20 SCSIDevice *scsi_bus_legacy_add_drive(SCSIBus *bus, BlockBackend *blk, int unit, bool removable, int bootin= dex, + bool share_rw, const char *serial, Error **errp); void scsi_bus_legacy_handle_cmdline(SCSIBus *bus, bool deprecated); void scsi_legacy_handle_cmdline(void); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946453200449.721974865712; Tue, 6 Feb 2018 11:47:33 -0800 (PST) Received: from localhost ([::1]:53554 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9DB-0007cf-Uk for importer@patchew.org; Tue, 06 Feb 2018 14:47:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44156) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iq-0005Pf-Q3 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8im-00082e-2N for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:04 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:38406 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8il-000824-RU for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:15:59 -0500 Received: from pps.filterd (m0098420.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEIZE131022 for ; Tue, 6 Feb 2018 14:15:59 -0500 Received: from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyfvm7066-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:59 -0500 Received: from localhost by e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:55 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFtUU52232364; Tue, 6 Feb 2018 19:15:55 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BEE54AC041; Tue, 6 Feb 2018 14:17:15 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 844CCAC040; Tue, 6 Feb 2018 14:17:15 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:55 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0044-0000-0000-000003DC6DB7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:57 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0045-0000-0000-0000080BDD40 Message-Id: <20180206191515.25830-35-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=29 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id w16JEIZE131022 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 34/54] spapr_pci: fix MSI/MSIX selection X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: Greg Kurz In various place we don't correctly check if the device supports MSI or MSI-X. This can cause devices to be advertised with MSI support, even if they only support MSI-X (like virtio-pci-* devices for example): ethernet@0 { ibm,req#msi =3D <0x1>; <--- wrong! . ibm,loc-code =3D "qemu_virtio-net-pci:0000:00:00.0"; . ibm,req#msi-x =3D <0x3>; }; Worse, this can also cause the "ibm,change-msi" RTAS call to corrupt the PCI status and cause migration to fail: qemu-system-ppc64: get_pci_config_device: Bad config data: i=3D0x6 read: 0 device: 10 cmask: 10 wmask: 0 w1cmask:0 ^^ PCI_STATUS_CAP_LIST bit which is assumed to be constant This patch changes spapr_populate_pci_child_dt() to properly check for MSI support using msi_present(): this ensures that PCIDevice::msi_cap was set by msi_init() and that msi_nr_vectors_allocated() will look at the right place in the config space. Checking PCIDevice::msix_entries_nr is enough for MSI-X but let's add a call to msix_present() there as well for consistency. It also changes rtas_ibm_change_msi() to select the appropriate MSI type in Function 1 instead of always selecting plain MSI. This new behaviour is compliant with LoPAPR 1.1, as described in "Table 71. ibm,change-msi Argument Call Buffer": Function 1: If Number Outputs is equal to 3, request to set to a new number of MSIs (including set to 0). If the =E2=80=9Cibm,change-msix-capable=E2=80=9D property exists= and Number Outputs is equal to 4, request is to set to a new number of MSI or MSI-X (platform choice) interrupts (including set to 0). Since MSI is the the platform default (LoPAPR 6.2.3 MSI Option), let's check for MSI support first. And finally, it checks the input parameters are valid, as described in LoPAPR 1.1 "R1=E2=80=937.3.10.5.1=E2=80=933": For the MSI option: The platform must return a Status of -3 (Parameter error) from ibm,change-msi, with no change in interrupt assignments if the PCI configuration address does not support MSI and Function 3 was requested (that is, the =E2=80=9Cibm,req#msi=E2=80=9D property must exist= for the PCI configuration address in order to use Function 3), or does not support MSI-X and Function 4 is requested (that is, the =E2=80=9Cibm,req#msi-x=E2= =80=9D property must exist for the PCI configuration address in order to use Function 4), or if neither MSIs nor MSI-Xs are supported and Function 1 is requested. This ensures that the ret_intr_type variable contains a valid MSI type for this device, and that spapr_msi_setmsg() won't corrupt the PCI status. Signed-off-by: Greg Kurz Reviewed-by: Alexey Kardashevskiy Signed-off-by: David Gibson (cherry picked from commit 9cbe305b60cc49cfcd134765b85c28be95b1b57d) Signed-off-by: Michael Roth --- hw/ppc/spapr_pci.c | 61 +++++++++++++++++++++++++++++++++++++-------------= ---- 1 file changed, 42 insertions(+), 19 deletions(-) diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 5a3122a9f9..a1929ab481 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -280,13 +280,42 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAP= RMachineState *spapr, int *config_addr_key; Error *err =3D NULL; =20 + /* Fins sPAPRPHBState */ + phb =3D spapr_pci_find_phb(spapr, buid); + if (phb) { + pdev =3D spapr_pci_find_dev(spapr, buid, config_addr); + } + if (!phb || !pdev) { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + switch (func) { - case RTAS_CHANGE_MSI_FN: case RTAS_CHANGE_FN: - ret_intr_type =3D RTAS_TYPE_MSI; + if (msi_present(pdev)) { + ret_intr_type =3D RTAS_TYPE_MSI; + } else if (msix_present(pdev)) { + ret_intr_type =3D RTAS_TYPE_MSIX; + } else { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } + break; + case RTAS_CHANGE_MSI_FN: + if (msi_present(pdev)) { + ret_intr_type =3D RTAS_TYPE_MSI; + } else { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } break; case RTAS_CHANGE_MSIX_FN: - ret_intr_type =3D RTAS_TYPE_MSIX; + if (msix_present(pdev)) { + ret_intr_type =3D RTAS_TYPE_MSIX; + } else { + rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); + return; + } break; default: error_report("rtas_ibm_change_msi(%u) is not implemented", func); @@ -294,16 +323,6 @@ static void rtas_ibm_change_msi(PowerPCCPU *cpu, sPAPR= MachineState *spapr, return; } =20 - /* Fins sPAPRPHBState */ - phb =3D spapr_pci_find_phb(spapr, buid); - if (phb) { - pdev =3D spapr_pci_find_dev(spapr, buid, config_addr); - } - if (!phb || !pdev) { - rtas_st(rets, 0, RTAS_OUT_PARAM_ERROR); - return; - } - msi =3D (spapr_pci_msi *) g_hash_table_lookup(phb->msi, &config_addr); =20 /* Releasing MSIs */ @@ -1286,13 +1305,17 @@ static void spapr_populate_pci_child_dt(PCIDevice *= dev, void *fdt, int offset, _FDT(fdt_setprop_cell(fdt, offset, "#size-cells", RESOURCE_CELLS_SIZE)); =20 - max_msi =3D msi_nr_vectors_allocated(dev); - if (max_msi) { - _FDT(fdt_setprop_cell(fdt, offset, "ibm,req#msi", max_msi)); + if (msi_present(dev)) { + max_msi =3D msi_nr_vectors_allocated(dev); + if (max_msi) { + _FDT(fdt_setprop_cell(fdt, offset, "ibm,req#msi", max_msi)); + } } - max_msix =3D dev->msix_entries_nr; - if (max_msix) { - _FDT(fdt_setprop_cell(fdt, offset, "ibm,req#msi-x", max_msix)); + if (msix_present(dev)) { + max_msix =3D dev->msix_entries_nr; + if (max_msix) { + _FDT(fdt_setprop_cell(fdt, offset, "ibm,req#msi-x", max_msix)); + } } =20 populate_resource_props(dev, &rp); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151794608833129.27389426289335; Tue, 6 Feb 2018 11:41:28 -0800 (PST) Received: from localhost ([::1]:53507 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej97L-0002Lx-Pe for importer@patchew.org; Tue, 06 Feb 2018 14:41:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44105) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ip-0005N2-8l for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8im-00082p-3l for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:03 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:45810 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8il-000826-VO for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:00 -0500 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEJTh078803 for ; Tue, 6 Feb 2018 14:15:59 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyj9209pt-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:15:58 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:56 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFtA448693330; Tue, 6 Feb 2018 19:15:55 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 77DB0AC041; Tue, 6 Feb 2018 14:17:16 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 3D22EAC03A; Tue, 6 Feb 2018 14:17:16 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:56 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F4B X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:57 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E779 Message-Id: <20180206191515.25830-36-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 35/54] linux-user/signal.c: Rename MC_* defines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Peter Maydell The SPARC code in linux-user/signal.c defines a set of MC_* constants. On some SPARC hosts these are also defined by sys/ucontext.h, resulting in build failures: linux-user/signal.c:2786:0: error: "MC_NGREG" redefined [-Werror] #define MC_NGREG 19 In file included from /usr/include/signal.h:302:0, from include/qemu/osdep.h:86, from linux-user/signal.c:19: /usr/include/sparc64-linux-gnu/sys/ucontext.h:59:0: note: this is the locat= ion of the previous definition # define MC_NGREG __MC_NGREG Rename all these constants to SPARC_MC_* to avoid the clash. Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell Message-id: 1517318239-15764-1-git-send-email-peter.maydell@linaro.org (cherry picked from commit 8ebb314b957403c1c9a3f1cf995f73c6ae9d5d10) Signed-off-by: Michael Roth --- linux-user/signal.c | 118 ++++++++++++++++++++++++++----------------------= ---- 1 file changed, 59 insertions(+), 59 deletions(-) diff --git a/linux-user/signal.c b/linux-user/signal.c index cf35473671..b858f1b0f1 100644 --- a/linux-user/signal.c +++ b/linux-user/signal.c @@ -2758,29 +2758,29 @@ long do_rt_sigreturn(CPUSPARCState *env) } =20 #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32) -#define MC_TSTATE 0 -#define MC_PC 1 -#define MC_NPC 2 -#define MC_Y 3 -#define MC_G1 4 -#define MC_G2 5 -#define MC_G3 6 -#define MC_G4 7 -#define MC_G5 8 -#define MC_G6 9 -#define MC_G7 10 -#define MC_O0 11 -#define MC_O1 12 -#define MC_O2 13 -#define MC_O3 14 -#define MC_O4 15 -#define MC_O5 16 -#define MC_O6 17 -#define MC_O7 18 -#define MC_NGREG 19 +#define SPARC_MC_TSTATE 0 +#define SPARC_MC_PC 1 +#define SPARC_MC_NPC 2 +#define SPARC_MC_Y 3 +#define SPARC_MC_G1 4 +#define SPARC_MC_G2 5 +#define SPARC_MC_G3 6 +#define SPARC_MC_G4 7 +#define SPARC_MC_G5 8 +#define SPARC_MC_G6 9 +#define SPARC_MC_G7 10 +#define SPARC_MC_O0 11 +#define SPARC_MC_O1 12 +#define SPARC_MC_O2 13 +#define SPARC_MC_O3 14 +#define SPARC_MC_O4 15 +#define SPARC_MC_O5 16 +#define SPARC_MC_O6 17 +#define SPARC_MC_O7 18 +#define SPARC_MC_NGREG 19 =20 typedef abi_ulong target_mc_greg_t; -typedef target_mc_greg_t target_mc_gregset_t[MC_NGREG]; +typedef target_mc_greg_t target_mc_gregset_t[SPARC_MC_NGREG]; =20 struct target_mc_fq { abi_ulong *mcfq_addr; @@ -2840,8 +2840,8 @@ void sparc64_set_context(CPUSPARCState *env) goto do_sigsegv; } grp =3D &ucp->tuc_mcontext.mc_gregs; - __get_user(pc, &((*grp)[MC_PC])); - __get_user(npc, &((*grp)[MC_NPC])); + __get_user(pc, &((*grp)[SPARC_MC_PC])); + __get_user(npc, &((*grp)[SPARC_MC_NPC])); if ((pc | npc) & 3) { goto do_sigsegv; } @@ -2864,26 +2864,26 @@ void sparc64_set_context(CPUSPARCState *env) } env->pc =3D pc; env->npc =3D npc; - __get_user(env->y, &((*grp)[MC_Y])); - __get_user(tstate, &((*grp)[MC_TSTATE])); + __get_user(env->y, &((*grp)[SPARC_MC_Y])); + __get_user(tstate, &((*grp)[SPARC_MC_TSTATE])); env->asi =3D (tstate >> 24) & 0xff; cpu_put_ccr(env, tstate >> 32); cpu_put_cwp64(env, tstate & 0x1f); - __get_user(env->gregs[1], (&(*grp)[MC_G1])); - __get_user(env->gregs[2], (&(*grp)[MC_G2])); - __get_user(env->gregs[3], (&(*grp)[MC_G3])); - __get_user(env->gregs[4], (&(*grp)[MC_G4])); - __get_user(env->gregs[5], (&(*grp)[MC_G5])); - __get_user(env->gregs[6], (&(*grp)[MC_G6])); - __get_user(env->gregs[7], (&(*grp)[MC_G7])); - __get_user(env->regwptr[UREG_I0], (&(*grp)[MC_O0])); - __get_user(env->regwptr[UREG_I1], (&(*grp)[MC_O1])); - __get_user(env->regwptr[UREG_I2], (&(*grp)[MC_O2])); - __get_user(env->regwptr[UREG_I3], (&(*grp)[MC_O3])); - __get_user(env->regwptr[UREG_I4], (&(*grp)[MC_O4])); - __get_user(env->regwptr[UREG_I5], (&(*grp)[MC_O5])); - __get_user(env->regwptr[UREG_I6], (&(*grp)[MC_O6])); - __get_user(env->regwptr[UREG_I7], (&(*grp)[MC_O7])); + __get_user(env->gregs[1], (&(*grp)[SPARC_MC_G1])); + __get_user(env->gregs[2], (&(*grp)[SPARC_MC_G2])); + __get_user(env->gregs[3], (&(*grp)[SPARC_MC_G3])); + __get_user(env->gregs[4], (&(*grp)[SPARC_MC_G4])); + __get_user(env->gregs[5], (&(*grp)[SPARC_MC_G5])); + __get_user(env->gregs[6], (&(*grp)[SPARC_MC_G6])); + __get_user(env->gregs[7], (&(*grp)[SPARC_MC_G7])); + __get_user(env->regwptr[UREG_I0], (&(*grp)[SPARC_MC_O0])); + __get_user(env->regwptr[UREG_I1], (&(*grp)[SPARC_MC_O1])); + __get_user(env->regwptr[UREG_I2], (&(*grp)[SPARC_MC_O2])); + __get_user(env->regwptr[UREG_I3], (&(*grp)[SPARC_MC_O3])); + __get_user(env->regwptr[UREG_I4], (&(*grp)[SPARC_MC_O4])); + __get_user(env->regwptr[UREG_I5], (&(*grp)[SPARC_MC_O5])); + __get_user(env->regwptr[UREG_I6], (&(*grp)[SPARC_MC_O6])); + __get_user(env->regwptr[UREG_I7], (&(*grp)[SPARC_MC_O7])); =20 __get_user(fp, &(ucp->tuc_mcontext.mc_fp)); __get_user(i7, &(ucp->tuc_mcontext.mc_i7)); @@ -2971,25 +2971,25 @@ void sparc64_get_context(CPUSPARCState *env) } =20 /* XXX: tstate must be saved properly */ - // __put_user(env->tstate, &((*grp)[MC_TSTATE])); - __put_user(env->pc, &((*grp)[MC_PC])); - __put_user(env->npc, &((*grp)[MC_NPC])); - __put_user(env->y, &((*grp)[MC_Y])); - __put_user(env->gregs[1], &((*grp)[MC_G1])); - __put_user(env->gregs[2], &((*grp)[MC_G2])); - __put_user(env->gregs[3], &((*grp)[MC_G3])); - __put_user(env->gregs[4], &((*grp)[MC_G4])); - __put_user(env->gregs[5], &((*grp)[MC_G5])); - __put_user(env->gregs[6], &((*grp)[MC_G6])); - __put_user(env->gregs[7], &((*grp)[MC_G7])); - __put_user(env->regwptr[UREG_I0], &((*grp)[MC_O0])); - __put_user(env->regwptr[UREG_I1], &((*grp)[MC_O1])); - __put_user(env->regwptr[UREG_I2], &((*grp)[MC_O2])); - __put_user(env->regwptr[UREG_I3], &((*grp)[MC_O3])); - __put_user(env->regwptr[UREG_I4], &((*grp)[MC_O4])); - __put_user(env->regwptr[UREG_I5], &((*grp)[MC_O5])); - __put_user(env->regwptr[UREG_I6], &((*grp)[MC_O6])); - __put_user(env->regwptr[UREG_I7], &((*grp)[MC_O7])); + // __put_user(env->tstate, &((*grp)[SPARC_MC_TSTATE])); + __put_user(env->pc, &((*grp)[SPARC_MC_PC])); + __put_user(env->npc, &((*grp)[SPARC_MC_NPC])); + __put_user(env->y, &((*grp)[SPARC_MC_Y])); + __put_user(env->gregs[1], &((*grp)[SPARC_MC_G1])); + __put_user(env->gregs[2], &((*grp)[SPARC_MC_G2])); + __put_user(env->gregs[3], &((*grp)[SPARC_MC_G3])); + __put_user(env->gregs[4], &((*grp)[SPARC_MC_G4])); + __put_user(env->gregs[5], &((*grp)[SPARC_MC_G5])); + __put_user(env->gregs[6], &((*grp)[SPARC_MC_G6])); + __put_user(env->gregs[7], &((*grp)[SPARC_MC_G7])); + __put_user(env->regwptr[UREG_I0], &((*grp)[SPARC_MC_O0])); + __put_user(env->regwptr[UREG_I1], &((*grp)[SPARC_MC_O1])); + __put_user(env->regwptr[UREG_I2], &((*grp)[SPARC_MC_O2])); + __put_user(env->regwptr[UREG_I3], &((*grp)[SPARC_MC_O3])); + __put_user(env->regwptr[UREG_I4], &((*grp)[SPARC_MC_O4])); + __put_user(env->regwptr[UREG_I5], &((*grp)[SPARC_MC_O5])); + __put_user(env->regwptr[UREG_I6], &((*grp)[SPARC_MC_O6])); + __put_user(env->regwptr[UREG_I7], &((*grp)[SPARC_MC_O7])); =20 w_addr =3D TARGET_STACK_BIAS+env->regwptr[UREG_I6]; fp =3D i7 =3D 0; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946585050178.59289640420184; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:57 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFuxl58261716; Tue, 6 Feb 2018 19:15:56 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 239EAAC03A; Tue, 6 Feb 2018 14:17:17 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id DE0FAAC03F; Tue, 6 Feb 2018 14:17:16 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:57 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0052-0000-0000-000002B0F8E0 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:58 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0053-0000-0000-0000537EEE95 Message-Id: <20180206191515.25830-37-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 36/54] spapr: don't initialize PATB entry if max-cpu-compat < power9 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Laurent Vivier , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Laurent Vivier if KVM is enabled and KVM capabilities MMU radix is available, the partition table entry (patb_entry) for the radix mode is initialized by default in ppc_spapr_reset(). It's a problem if we want to migrate the guest to a POWER8 host while the kernel is not started to set the value to the one expected for a POWER8 CPU. The "-machine max-cpu-compat=3Dpower8" should allow to migrate a POWER9 KVM host to a POWER8 KVM host, but because patb_entry is set, the destination QEMU tries to enable radix mode on the POWER8 host. This fails and cancels the migration: Process table config unsupported by the host error while loading state for instance 0x0 of device 'spapr' load of migration failed: Invalid argument This patch doesn't set the PATB entry if the user provides a CPU compatibility mode that doesn't support radix mode. Signed-off-by: Laurent Vivier Signed-off-by: David Gibson (cherry picked from commit 1481fe5fcfeb7fcf3c1ebb9d8c0432e3e0188ccf) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 1ac7eb0f8c..66d0ed5256 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1440,7 +1440,10 @@ static void ppc_spapr_reset(void) /* Check for unknown sysbus devices */ foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL); =20 - if (kvm_enabled() && kvmppc_has_cap_mmu_radix()) { + first_ppc_cpu =3D POWERPC_CPU(first_cpu); + if (kvm_enabled() && kvmppc_has_cap_mmu_radix() && + ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0, + spapr->max_compat_pvr)) { /* If using KVM with radix mode available, VCPUs can be started * without a HPT because KVM will start them in radix mode. * Set the GR bit in PATB so that we know there is no HPT. */ @@ -1499,7 +1502,6 @@ static void ppc_spapr_reset(void) g_free(fdt); =20 /* Set up the entry state */ - first_ppc_cpu =3D POWERPC_CPU(first_cpu); first_ppc_cpu->env.gpr[3] =3D fdt_addr; first_ppc_cpu->env.gpr[5] =3D 0; first_cpu->halted =3D 0; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946819122891.0543823812551; Tue, 6 Feb 2018 11:53:39 -0800 (PST) Received: from localhost ([::1]:53616 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9JC-0004qx-5A for importer@patchew.org; Tue, 06 Feb 2018 14:53:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44346) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8ix-0005YS-FM for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:21 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iq-00086y-Em for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:11 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:44114) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iq-00086G-4G for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:04 -0500 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFV1D117402 for ; Tue, 6 Feb 2018 14:16:03 -0500 Received: from e18.ny.us.ibm.com (e18.ny.us.ibm.com [129.33.205.208]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fygkucwk2-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:02 -0500 Received: from localhost by e18.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:57 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFvAM42532868; Tue, 6 Feb 2018 19:15:57 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id BE260AC03A; Tue, 6 Feb 2018 14:17:17 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 84A3FAC041; Tue, 6 Feb 2018 14:17:17 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:58 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0044-0000-0000-000003DC6DBA X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:59 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0045-0000-0000-0000080BDD42 Message-Id: <20180206191515.25830-38-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 37/54] spapr: Add pseries-2.12 machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson While we're at it fix a couple of small errors in the 2.11 and 2.10 models (they didn't have any real effect, but don't quite match the template). Signed-off-by: David Gibson (cherry picked from commit 2b6154120cbd7f5514cefd3c6084d39922d26d88) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 26 +++++++++++++++++++++++--- include/hw/compat.h | 2 ++ 2 files changed, 25 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 66d0ed5256..bedc39a2e5 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3716,27 +3716,47 @@ static const TypeInfo spapr_machine_info =3D { type_init(spapr_machine_register_##suffix) =20 /* + * pseries-2.12 + */ +static void spapr_machine_2_12_instance_options(MachineState *machine) +{ +} + +static void spapr_machine_2_12_class_options(MachineClass *mc) +{ + /* Defaults for the latest behaviour inherited from the base class */ +} + +DEFINE_SPAPR_MACHINE(2_12, "2.12", true); + +/* * pseries-2.11 */ +#define SPAPR_COMPAT_2_11 \ + HW_COMPAT_2_11 + static void spapr_machine_2_11_instance_options(MachineState *machine) { + spapr_machine_2_12_instance_options(machine); } =20 static void spapr_machine_2_11_class_options(MachineClass *mc) { - /* Defaults for the latest behaviour inherited from the base class */ + spapr_machine_2_12_class_options(mc); + SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 -DEFINE_SPAPR_MACHINE(2_11, "2.11", true); +DEFINE_SPAPR_MACHINE(2_11, "2.11", false); =20 /* * pseries-2.10 */ #define SPAPR_COMPAT_2_10 \ - HW_COMPAT_2_10 \ + HW_COMPAT_2_10 =20 static void spapr_machine_2_10_instance_options(MachineState *machine) { + spapr_machine_2_11_instance_options(machine); } =20 static void spapr_machine_2_10_class_options(MachineClass *mc) diff --git a/include/hw/compat.h b/include/hw/compat.h index cf389b4e85..0d2a6ac468 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -1,6 +1,8 @@ #ifndef HW_COMPAT_H #define HW_COMPAT_H =20 +#define HW_COMPAT_2_11 + #define HW_COMPAT_2_10 \ {\ .driver =3D "virtio-mouse-device",\ --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517945928121837.9991268016107; Tue, 6 Feb 2018 11:38:48 -0800 (PST) Received: from localhost ([::1]:53477 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej94p-0008Lk-9e for importer@patchew.org; Tue, 06 Feb 2018 14:38:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44244) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iu-0005V0-GA for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:17 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8io-000857-AL for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:08 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:60958 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8io-00084e-05 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:02 -0500 Received: from pps.filterd (m0098419.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JELIB126891 for ; Tue, 6 Feb 2018 14:16:01 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyhwn1fbv-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:00 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:58 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFuYV39977128; Tue, 6 Feb 2018 19:15:57 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 648D0AC040; Tue, 6 Feb 2018 14:17:18 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 2944EAC03F; Tue, 6 Feb 2018 14:17:18 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:14:59 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F4D X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:15:59 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E781 Message-Id: <20180206191515.25830-39-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 38/54] spapr: Capabilities infrastructure X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson Because PAPR is a paravirtual environment access to certain CPU (or other) facilities can be blocked by the hypervisor. PAPR provides ways to advertise in the device tree whether or not those features are available to the guest. In some places we automatically determine whether to make a feature available based on whether our host can support it, in most cases this is based on limitations in the available KVM implementation. Although we correctly advertise this to the guest, it means that host factors might make changes to the guest visible environment which is bad: as well as generaly reducing reproducibility, it means that a migration between different host environments can easily go bad. We've mostly gotten away with it because the environments considered mature enough to be well supported (basically, KVM on POWER8) have had consistent feature availability. But, it's still not right and some limitations on POWER9 is going to make it more of an issue in future. This introduces an infrastructure for defining "sPAPR capabilities". These are set by default based on the machine version, masked by the capabilities of the chosen cpu, but can be overriden with machine properties. The intention is at reset time we verify that the requested capabilities can be supported on the host (considering TCG, KVM and/or host cpu limitations). If not we simply fail, rather than silently modifying the advertised featureset to the guest. This does mean that certain configurations that "worked" may now fail, but such configurations were already more subtly broken. Signed-off-by: David Gibson Reviewed-by: Greg Kurz (cherry picked from commit 33face6b8981add8eba1f7cdaf4cf6cede415d2e) Conflicts: include/hw/ppc/spapr.h *drop context dep on 60c6823b9bc Signed-off-by: Michael Roth --- hw/ppc/Makefile.objs | 2 +- hw/ppc/spapr.c | 7 ++ hw/ppc/spapr_caps.c | 181 +++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 31 +++++++++ 4 files changed, 220 insertions(+), 1 deletion(-) create mode 100644 hw/ppc/spapr_caps.c diff --git a/hw/ppc/Makefile.objs b/hw/ppc/Makefile.objs index 7efc686748..1faff853b7 100644 --- a/hw/ppc/Makefile.objs +++ b/hw/ppc/Makefile.objs @@ -1,7 +1,7 @@ # shared objects obj-y +=3D ppc.o ppc_booke.o fdt.o # IBM pSeries (sPAPR) -obj-$(CONFIG_PSERIES) +=3D spapr.o spapr_vio.o spapr_events.o +obj-$(CONFIG_PSERIES) +=3D spapr.o spapr_caps.o spapr_vio.o spapr_events.o obj-$(CONFIG_PSERIES) +=3D spapr_hcall.o spapr_iommu.o spapr_rtas.o obj-$(CONFIG_PSERIES) +=3D spapr_pci.o spapr_rtc.o spapr_drc.o spapr_rng.o obj-$(CONFIG_PSERIES) +=3D spapr_cpu_core.o spapr_ovec.o diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index bedc39a2e5..958d894add 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1440,6 +1440,8 @@ static void ppc_spapr_reset(void) /* Check for unknown sysbus devices */ foreach_dynamic_sysbus_device(find_unknown_sysbus_device, NULL); =20 + spapr_caps_reset(spapr); + first_ppc_cpu =3D POWERPC_CPU(first_cpu); if (kvm_enabled() && kvmppc_has_cap_mmu_radix() && ppc_check_compat(first_ppc_cpu, CPU_POWERPC_LOGICAL_3_00, 0, @@ -2285,6 +2287,8 @@ static void ppc_spapr_init(MachineState *machine) char *filename; Error *resize_hpt_err =3D NULL; =20 + spapr_caps_validate(spapr, &error_fatal); + msi_nonbroken =3D true; =20 QLIST_INIT(&spapr->phbs); @@ -3665,6 +3669,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) * in which LMBs are represented and hot-added */ mc->numa_mem_align_shift =3D 28; + + smc->default_caps =3D spapr_caps(0); + spapr_caps_add_properties(smc, &error_abort); } =20 static const TypeInfo spapr_machine_info =3D { diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c new file mode 100644 index 0000000000..968ba7b857 --- /dev/null +++ b/hw/ppc/spapr_caps.c @@ -0,0 +1,181 @@ +/* + * QEMU PowerPC pSeries Logical Partition capabilities handling + * + * Copyright (c) 2017 David Gibson, Red Hat Inc. + * + * Permission is hereby granted, free of charge, to any person obtaining a= copy + * of this software and associated documentation files (the "Software"), t= o deal + * in the Software without restriction, including without limitation the r= ights + * to use, copy, modify, merge, publish, distribute, sublicense, and/or se= ll + * copies of the Software, and to permit persons to whom the Software is + * furnished to do so, subject to the following conditions: + * + * The above copyright notice and this permission notice shall be included= in + * all copies or substantial portions of the Software. + * + * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS= OR + * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, + * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL + * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OT= HER + * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING= FROM, + * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS = IN + * THE SOFTWARE. + */ +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qapi/visitor.h" + +#include "hw/ppc/spapr.h" + +typedef struct sPAPRCapabilityInfo { + const char *name; + const char *description; + uint64_t flag; + + /* Make sure the virtual hardware can support this capability */ + void (*allow)(sPAPRMachineState *spapr, Error **errp); + + /* If possible, tell the virtual hardware not to allow the cap to + * be used at all */ + void (*disallow)(sPAPRMachineState *spapr, Error **errp); +} sPAPRCapabilityInfo; + +static sPAPRCapabilityInfo capability_table[] =3D { +}; + +static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, + CPUState *cs) +{ + sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + sPAPRCapabilities caps; + + caps =3D smc->default_caps; + + /* TODO: clamp according to cpu model */ + + return caps; +} + +void spapr_caps_reset(sPAPRMachineState *spapr) +{ + Error *local_err =3D NULL; + sPAPRCapabilities caps; + int i; + + /* First compute the actual set of caps we're running with.. */ + caps =3D default_caps_with_cpu(spapr, first_cpu); + + caps.mask |=3D spapr->forced_caps.mask; + caps.mask &=3D ~spapr->forbidden_caps.mask; + + spapr->effective_caps =3D caps; + + /* .. then apply those caps to the virtual hardware */ + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; + + if (spapr->effective_caps.mask & info->flag) { + /* Failure to allow a cap is fatal - if the guest doesn't + * have it, we'll be supplying an incorrect environment */ + if (info->allow) { + info->allow(spapr, &error_fatal); + } + } else { + /* Failure to enforce a cap is only a warning. The guest + * shouldn't be using it, since it's not advertised, so it + * doesn't get to complain about weird behaviour if it + * goes ahead anyway */ + if (info->disallow) { + info->disallow(spapr, &local_err); + } + if (local_err) { + warn_report_err(local_err); + local_err =3D NULL; + } + } + } +} + +static void spapr_cap_get(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value =3D spapr_has_cap(spapr, cap->flag); + + /* TODO: Could this get called before effective_caps is finalized + * in spapr_caps_reset()? */ + + visit_type_bool(v, name, &value, errp); +} + +static void spapr_cap_set(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value; + Error *local_err =3D NULL; + + visit_type_bool(v, name, &value, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (value) { + spapr->forced_caps.mask |=3D cap->flag; + } else { + spapr->forbidden_caps.mask |=3D cap->flag; + } +} + +void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp) +{ + uint64_t allcaps =3D 0; + int i; + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + g_assert((allcaps & capability_table[i].flag) =3D=3D 0); + allcaps |=3D capability_table[i].flag; + } + + g_assert((spapr->forced_caps.mask & ~allcaps) =3D=3D 0); + g_assert((spapr->forbidden_caps.mask & ~allcaps) =3D=3D 0); + + if (spapr->forced_caps.mask & spapr->forbidden_caps.mask) { + error_setg(errp, "Some sPAPR capabilities set both on and off"); + return; + } + + /* Check for any caps incompatible with other caps. Nothing to do + * yet */ +} + +void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp) +{ + Error *local_err =3D NULL; + ObjectClass *klass =3D OBJECT_CLASS(smc); + int i; + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + sPAPRCapabilityInfo *cap =3D &capability_table[i]; + const char *name =3D g_strdup_printf("cap-%s", cap->name); + + object_class_property_add(klass, name, "bool", + spapr_cap_get, spapr_cap_set, NULL, + cap, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + object_class_property_set_description(klass, name, cap->descriptio= n, + &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + } +} diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 9d21ca9bde..c8852dfbba 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -51,6 +51,15 @@ typedef enum { } sPAPRResizeHPT; =20 /** + * Capabilities + */ + +typedef struct sPAPRCapabilities sPAPRCapabilities; +struct sPAPRCapabilities { + uint64_t mask; +}; + +/** * sPAPRMachineClass: */ struct sPAPRMachineClass { @@ -66,6 +75,7 @@ struct sPAPRMachineClass { hwaddr *mmio32, hwaddr *mmio64, unsigned n_dma, uint32_t *liobns, Error **errp); sPAPRResizeHPT resize_hpt_default; + sPAPRCapabilities default_caps; }; =20 /** @@ -127,6 +137,9 @@ struct sPAPRMachineState { MemoryHotplugState hotplug_memory; =20 const char *icp_type; + + sPAPRCapabilities forced_caps, forbidden_caps; + sPAPRCapabilities effective_caps; }; =20 #define H_SUCCESS 0 @@ -707,4 +720,22 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_on= _cpu_data arg); int spapr_vcpu_id(PowerPCCPU *cpu); PowerPCCPU *spapr_find_cpu(int vcpu_id); =20 +/* + * Handling of optional capabilities + */ +static inline sPAPRCapabilities spapr_caps(uint64_t mask) +{ + sPAPRCapabilities caps =3D { mask }; + return caps; +} + +static inline bool spapr_has_cap(sPAPRMachineState *spapr, uint64_t cap) +{ + return !!(spapr->effective_caps.mask & cap); +} + +void spapr_caps_reset(sPAPRMachineState *spapr); +void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); +void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); + #endif /* HW_SPAPR_H */ --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946277309211.5661742823089; Tue, 6 Feb 2018 11:44:37 -0800 (PST) Received: from localhost ([::1]:53526 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9AS-0005I9-FE for importer@patchew.org; Tue, 06 Feb 2018 14:44:36 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44372) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8iy-0005ZL-6L for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iq-000878-G0 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:12 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:46428 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iq-00086i-AL for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:04 -0500 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JELT8079054 for ; Tue, 6 Feb 2018 14:16:04 -0500 Received: from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyj9209tc-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:02 -0500 Received: from localhost by e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:59 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFwKg41877738; Tue, 6 Feb 2018 19:15:58 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 19D6DAC040; Tue, 6 Feb 2018 14:17:19 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id CCC16AC041; Tue, 6 Feb 2018 14:17:18 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:00 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-2213-0000-0000-0000026884E7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:00 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-2214-0000-0000-00005905BD40 Message-Id: <20180206191515.25830-40-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 39/54] spapr: Treat Hardware Transactional Memory (HTM) as an optional capability X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson This adds an spapr capability bit for Hardware Transactional Memory. It is enabled by default for pseries-2.11 and earlier machine types. with POWER8 or later CPUs (as it must be, since earlier qemu versions would implicitly allow it). However it is disabled by default for the latest pseries-2.12 machine type. This means that with the latest machine type, HTM will not be available, regardless of CPU, unless it is explicitly enabled on the command line. That change is made on the basis that: * This way running with -M pseries,accel=3Dtcg will start with whatever cpu and will provide the same guest visible model as with accel=3Dkvm. - More specifically, this means existing make check tests don't have to be modified to use cap-htm=3Doff in order to run with TCG * We hope to add a new "HTM without suspend" feature in the not too distant future which could work on both POWER8 and POWER9 cpus, and could be enabled by default. * Best guesses suggest that future POWER cpus may well only support the HTM-without-suspend model, not the (frankly, horribly overcomplicated) POWER8 style HTM with suspend. * Anecdotal evidence suggests problems with HTM being enabled when it wasn't wanted are more common than being missing when it was. Signed-off-by: David Gibson Reviewed-by: Greg Kurz (cherry picked from commit ee76a09fc72cfbfab2bb5529320ef7e460adffd8) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 15 ++++++++++----- hw/ppc/spapr_caps.c | 29 ++++++++++++++++++++++++++++- include/hw/ppc/spapr.h | 3 +++ 3 files changed, 41 insertions(+), 6 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 958d894add..08e4a14340 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -253,7 +253,9 @@ static int spapr_fixup_cpu_numa_dt(void *fdt, int offse= t, PowerPCCPU *cpu) } =20 /* Populate the "ibm,pa-features" property */ -static void spapr_populate_pa_features(PowerPCCPU *cpu, void *fdt, int off= set, +static void spapr_populate_pa_features(sPAPRMachineState *spapr, + PowerPCCPU *cpu, + void *fdt, int offset, bool legacy_guest) { CPUPPCState *env =3D &cpu->env; @@ -318,7 +320,7 @@ static void spapr_populate_pa_features(PowerPCCPU *cpu,= void *fdt, int offset, */ pa_features[3] |=3D 0x20; } - if (kvmppc_has_cap_htm() && pa_size > 24) { + if (spapr_has_cap(spapr, SPAPR_CAP_HTM) && pa_size > 24) { pa_features[24] |=3D 0x80; /* Transactional memory support */ } if (legacy_guest && pa_size > 40) { @@ -384,8 +386,8 @@ static int spapr_fixup_cpu_dt(void *fdt, sPAPRMachineSt= ate *spapr) return ret; } =20 - spapr_populate_pa_features(cpu, fdt, offset, - spapr->cas_legacy_guest_workaroun= d); + spapr_populate_pa_features(spapr, cpu, fdt, offset, + spapr->cas_legacy_guest_workaround); } return ret; } @@ -579,7 +581,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, page_sizes_prop, page_sizes_prop_size))); } =20 - spapr_populate_pa_features(cpu, fdt, offset, false); + spapr_populate_pa_features(spapr, cpu, fdt, offset, false); =20 _FDT((fdt_setprop_cell(fdt, offset, "ibm,chip-id", cs->cpu_index / vcpus_per_socket))); @@ -3749,7 +3751,10 @@ static void spapr_machine_2_11_instance_options(Mach= ineState *machine) =20 static void spapr_machine_2_11_class_options(MachineClass *mc) { + sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); + spapr_machine_2_12_class_options(mc); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 968ba7b857..3b35b91a5b 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -24,6 +24,10 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qapi/visitor.h" +#include "sysemu/hw_accel.h" +#include "target/ppc/cpu.h" +#include "cpu-models.h" +#include "kvm_ppc.h" =20 #include "hw/ppc/spapr.h" =20 @@ -40,18 +44,41 @@ typedef struct sPAPRCapabilityInfo { void (*disallow)(sPAPRMachineState *spapr, Error **errp); } sPAPRCapabilityInfo; =20 +static void cap_htm_allow(sPAPRMachineState *spapr, Error **errp) +{ + if (tcg_enabled()) { + error_setg(errp, + "No Transactional Memory support in TCG, try cap-htm=3D= off"); + } else if (kvm_enabled() && !kvmppc_has_cap_htm()) { + error_setg(errp, +"KVM implementation does not support Transactional Memory, try cap-htm=3Do= ff" + ); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { + { + .name =3D "htm", + .description =3D "Allow Hardware Transactional Memory (HTM)", + .flag =3D SPAPR_CAP_HTM, + .allow =3D cap_htm_allow, + /* TODO: add cap_htm_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, CPUState *cs) { sPAPRMachineClass *smc =3D SPAPR_MACHINE_GET_CLASS(spapr); + PowerPCCPU *cpu =3D POWERPC_CPU(cs); sPAPRCapabilities caps; =20 caps =3D smc->default_caps; =20 - /* TODO: clamp according to cpu model */ + if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, + 0, spapr->max_compat_pvr)) { + caps.mask &=3D ~SPAPR_CAP_HTM; + } =20 return caps; } diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index c8852dfbba..72422690bd 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,6 +54,9 @@ typedef enum { * Capabilities */ =20 +/* Hardware Transactional Memory */ +#define SPAPR_CAP_HTM 0x0000000000000001ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Tue, 06 Feb 2018 14:16:05 -0500 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFLpC116906 for ; Tue, 6 Feb 2018 14:16:04 -0500 Received: from e19.ny.us.ibm.com (e19.ny.us.ibm.com [129.33.205.209]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fygkucwmc-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:04 -0500 Received: from localhost by e19.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:15:59 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JFxM649741988; Tue, 6 Feb 2018 19:15:59 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AF617AC040; Tue, 6 Feb 2018 14:17:19 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 7F5F0AC03F; Tue, 6 Feb 2018 14:17:19 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:01 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0056-0000-0000-0000041670AB X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:01 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0057-0000-0000-0000084DDFA1 Message-Id: <20180206191515.25830-41-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 40/54] spapr: Validate capabilities on migration X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson Now that the "pseries" machine type implements optional capabilities (well, one so far) there's the possibility of having different capabilities available at either end of a migration. Although arguably a user error, it would be nice to catch this situation and fail as gracefully as we can. This adds code to migrate the capabilities flags. These aren't pulled directly into the destination's configuration since what the user has specified on the destination command line should take precedence. However, they are checked against the destination capabilities. If the source was using a capability which is absent on the destination, we fail the migration, since that could easily cause a guest crash or other bad behaviour. If the source lacked a capability which is present on the destination we warn, but allow the migration to proceed. Signed-off-by: David Gibson Reviewed-by: Greg Kurz (cherry picked from commit be85537d654565e35e359a74b46fc08b7956525c) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 6 ++++ hw/ppc/spapr_caps.c | 96 ++++++++++++++++++++++++++++++++++++++++++++++= ++-- include/hw/ppc/spapr.h | 6 ++++ 3 files changed, 105 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 08e4a14340..69ddc4bb23 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1563,6 +1563,11 @@ static int spapr_post_load(void *opaque, int version= _id) sPAPRMachineState *spapr =3D (sPAPRMachineState *)opaque; int err =3D 0; =20 + err =3D spapr_caps_post_migration(spapr); + if (err) { + return err; + } + if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) { CPUState *cs; CPU_FOREACH(cs) { @@ -1729,6 +1734,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_ov5_cas, &vmstate_spapr_patb_entry, &vmstate_spapr_pending_events, + &vmstate_spapr_caps, NULL } }; diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 3b35b91a5b..cad40fe49a 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -22,6 +22,7 @@ * THE SOFTWARE. */ #include "qemu/osdep.h" +#include "qemu/error-report.h" #include "qapi/error.h" #include "qapi/visitor.h" #include "sysemu/hw_accel.h" @@ -83,6 +84,93 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMach= ineState *spapr, return caps; } =20 +static bool spapr_caps_needed(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + return (spapr->forced_caps.mask !=3D 0) || (spapr->forbidden_caps.mask= !=3D 0); +} + +/* This has to be called from the top-level spapr post_load, not the + * caps specific one. Otherwise it wouldn't be called when the source + * caps are all defaults, which could still conflict with overridden + * caps on the destination */ +int spapr_caps_post_migration(sPAPRMachineState *spapr) +{ + uint64_t allcaps =3D 0; + int i; + bool ok =3D true; + sPAPRCapabilities dstcaps =3D spapr->effective_caps; + sPAPRCapabilities srccaps; + + srccaps =3D default_caps_with_cpu(spapr, first_cpu); + srccaps.mask |=3D spapr->mig_forced_caps.mask; + srccaps.mask &=3D ~spapr->mig_forbidden_caps.mask; + + for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; + + allcaps |=3D info->flag; + + if ((srccaps.mask & info->flag) && !(dstcaps.mask & info->flag)) { + error_report("cap-%s=3Don in incoming stream, but off in desti= nation", + info->name); + ok =3D false; + } + + if (!(srccaps.mask & info->flag) && (dstcaps.mask & info->flag)) { + warn_report("cap-%s=3Doff in incoming stream, but on in destin= ation", + info->name); + } + } + + if (spapr->mig_forced_caps.mask & ~allcaps) { + error_report( + "Unknown capabilities 0x%"PRIx64" enabled in incoming stream", + spapr->mig_forced_caps.mask & ~allcaps); + ok =3D false; + } + if (spapr->mig_forbidden_caps.mask & ~allcaps) { + warn_report( + "Unknown capabilities 0x%"PRIx64" disabled in incoming stream", + spapr->mig_forbidden_caps.mask & ~allcaps); + } + + return ok ? 0 : -EINVAL; +} + +static int spapr_caps_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_forced_caps =3D spapr->forced_caps; + spapr->mig_forbidden_caps =3D spapr->forbidden_caps; + return 0; +} + +static int spapr_caps_pre_load(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig_forced_caps =3D spapr_caps(0); + spapr->mig_forbidden_caps =3D spapr_caps(0); + return 0; +} + +const VMStateDescription vmstate_spapr_caps =3D { + .name =3D "spapr/caps", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_caps_needed, + .pre_save =3D spapr_caps_pre_save, + .pre_load =3D spapr_caps_pre_load, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(mig_forced_caps.mask, sPAPRMachineState), + VMSTATE_UINT64(mig_forbidden_caps.mask, sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + void spapr_caps_reset(sPAPRMachineState *spapr) { Error *local_err =3D NULL; @@ -92,6 +180,11 @@ void spapr_caps_reset(sPAPRMachineState *spapr) /* First compute the actual set of caps we're running with.. */ caps =3D default_caps_with_cpu(spapr, first_cpu); =20 + /* Remove unnecessary forced/forbidden bits (this will help us + * with migration) */ + spapr->forced_caps.mask &=3D ~caps.mask; + spapr->forbidden_caps.mask &=3D caps.mask; + caps.mask |=3D spapr->forced_caps.mask; caps.mask &=3D ~spapr->forbidden_caps.mask; =20 @@ -175,9 +268,6 @@ void spapr_caps_validate(sPAPRMachineState *spapr, Erro= r **errp) error_setg(errp, "Some sPAPR capabilities set both on and off"); return; } - - /* Check for any caps incompatible with other caps. Nothing to do - * yet */ } =20 void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 72422690bd..985948b622 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,6 +54,8 @@ typedef enum { * Capabilities */ =20 +/* These bits go in the migration stream, so they can't be reassigned */ + /* Hardware Transactional Memory */ #define SPAPR_CAP_HTM 0x0000000000000001ULL =20 @@ -142,6 +144,7 @@ struct sPAPRMachineState { const char *icp_type; =20 sPAPRCapabilities forced_caps, forbidden_caps; + sPAPRCapabilities mig_forced_caps, mig_forbidden_caps; sPAPRCapabilities effective_caps; }; =20 @@ -726,6 +729,8 @@ PowerPCCPU *spapr_find_cpu(int vcpu_id); /* * Handling of optional capabilities */ +extern const VMStateDescription vmstate_spapr_caps; + static inline sPAPRCapabilities spapr_caps(uint64_t mask) { sPAPRCapabilities caps =3D { mask }; @@ -740,5 +745,6 @@ static inline bool spapr_has_cap(sPAPRMachineState *spa= pr, uint64_t cap) void spapr_caps_reset(sPAPRMachineState *spapr); void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); +int spapr_caps_post_migration(sPAPRMachineState *spapr); =20 #endif /* HW_SPAPR_H */ --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946845072114.0462902944447; Tue, 6 Feb 2018 11:54:05 -0800 (PST) Received: from localhost ([::1]:53617 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9Jc-0005EB-8H for importer@patchew.org; Tue, 06 Feb 2018 14:54:04 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44460) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j1-0005dA-5Y for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8it-00089C-Ds for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:15 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:46846 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8it-00088j-7W for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:07 -0500 Received: from pps.filterd (m0098421.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEJo5078816 for ; Tue, 6 Feb 2018 14:16:06 -0500 Received: from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyj9209vb-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:04 -0500 Received: from localhost by e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:01 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG03147710446; Tue, 6 Feb 2018 19:16:00 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 1304AAC03F; Tue, 6 Feb 2018 14:17:21 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id CDA55AC03A; Tue, 6 Feb 2018 14:17:20 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:02 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0036-0000-0000-000002BA0AD2 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:02 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0037-0000-0000-0000433F8171 Message-Id: <20180206191515.25830-42-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 41/54] target/ppc: Clean up probing of VMX, VSX and DFP availability on KVM X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson When constructing the "host" cpu class we modify whether the VMX and VSX vector extensions and DFP (Decimal Floating Point) are available based on whether KVM can support those instructions. This can depend on policy in the host kernel as well as on the actual host cpu capabilities. However, the way we probe for this is not very nice: we explicitly check the host's device tree. That works in practice, but it's not really correct, since the device tree is a property of the host kernel's platform which we don't really know about. We get away with it because the only modern POWER platforms happen to encode VMX, VSX and DFP availability in the device tree in the same way. Arguably we should have an explicit KVM capability for this, but we haven't needed one so far. Barring specific KVM policies which don't yet exist, each of these instruction classes will be available in the guest if and only if they're available in the qemu userspace process. We can determine that from the ELF AUX vector we're supplied with. Once reworked like this, there are no more callers for kvmppc_get_vmx() and kvmppc_get_dfp() so remove them. Signed-off-by: David Gibson Reviewed-by: Greg Kurz (cherry picked from commit 3f2ca480eb872b4946baf77f756236b637a5b15a) Signed-off-by: Michael Roth --- target/ppc/kvm.c | 27 ++++++--------------------- target/ppc/kvm_ppc.h | 2 -- 2 files changed, 6 insertions(+), 23 deletions(-) diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 9d57debf0e..81d9bd56c7 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2014,16 +2014,6 @@ uint64_t kvmppc_get_clockfreq(void) return kvmppc_read_int_cpu_dt("clock-frequency"); } =20 -uint32_t kvmppc_get_vmx(void) -{ - return kvmppc_read_int_cpu_dt("ibm,vmx"); -} - -uint32_t kvmppc_get_dfp(void) -{ - return kvmppc_read_int_cpu_dt("ibm,dfp"); -} - static int kvmppc_get_pvinfo(CPUPPCState *env, struct kvm_ppc_pvinfo *pvin= fo) { PowerPCCPU *cpu =3D ppc_env_get_cpu(env); @@ -2407,23 +2397,18 @@ static void alter_insns(uint64_t *word, uint64_t fl= ags, bool on) static void kvmppc_host_cpu_class_init(ObjectClass *oc, void *data) { PowerPCCPUClass *pcc =3D POWERPC_CPU_CLASS(oc); - uint32_t vmx =3D kvmppc_get_vmx(); - uint32_t dfp =3D kvmppc_get_dfp(); uint32_t dcache_size =3D kvmppc_read_int_cpu_dt("d-cache-size"); uint32_t icache_size =3D kvmppc_read_int_cpu_dt("i-cache-size"); =20 /* Now fix up the class with information we can query from the host */ pcc->pvr =3D mfpvr(); =20 - if (vmx !=3D -1) { - /* Only override when we know what the host supports */ - alter_insns(&pcc->insns_flags, PPC_ALTIVEC, vmx > 0); - alter_insns(&pcc->insns_flags2, PPC2_VSX, vmx > 1); - } - if (dfp !=3D -1) { - /* Only override when we know what the host supports */ - alter_insns(&pcc->insns_flags2, PPC2_DFP, dfp); - } + alter_insns(&pcc->insns_flags, PPC_ALTIVEC, + qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_ALTIVEC); + alter_insns(&pcc->insns_flags2, PPC2_VSX, + qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_VSX); + alter_insns(&pcc->insns_flags2, PPC2_DFP, + qemu_getauxval(AT_HWCAP) & PPC_FEATURE_HAS_DFP); =20 if (dcache_size !=3D -1) { pcc->l1_dcache_size =3D dcache_size; diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index d6be38ecaf..ecb55493cc 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -15,8 +15,6 @@ =20 uint32_t kvmppc_get_tbfreq(void); uint64_t kvmppc_get_clockfreq(void); -uint32_t kvmppc_get_vmx(void); -uint32_t kvmppc_get_dfp(void); bool kvmppc_get_host_model(char **buf); bool kvmppc_get_host_serial(char **buf); int kvmppc_get_hasidle(CPUPPCState *env); --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946474362479.89682925597333; Tue, 6 Feb 2018 11:47:54 -0800 (PST) Received: from localhost ([::1]:53561 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9Dd-00082N-G4 for importer@patchew.org; Tue, 06 Feb 2018 14:47:53 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44435) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j0-0005cD-4b for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:25 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iu-00089i-0t for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:14 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:47914) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8it-00088q-LL for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:07 -0500 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEOlk053344 for ; Tue, 6 Feb 2018 14:16:06 -0500 Received: from e14.ny.us.ibm.com (e14.ny.us.ibm.com [129.33.205.204]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyg4xphd5-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:06 -0500 Received: from localhost by e14.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:01 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG1vF47054962; Tue, 6 Feb 2018 19:16:01 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id B3297AC043; Tue, 6 Feb 2018 14:17:21 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 798D0AC03A; Tue, 6 Feb 2018 14:17:21 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:03 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0052-0000-0000-000002B0F8E7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:03 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0053-0000-0000-0000537EEEA0 Message-Id: <20180206191515.25830-43-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 42/54] spapr: Handle VMX/VSX presence as an spapr capability flag X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson We currently have some conditionals in the spapr device tree code to decide whether or not to advertise the availability of the VMX (aka Altivec) and VSX vector extensions to the guest, based on whether the guest cpu has those features. This can lead to confusion and subtle failures on migration, since it makes a guest visible change based only on host capabilities. We now have a better mechanism for this, in spapr capabilities flags, which explicitly depend on user options rather than host capabilities. Rework the advertisement of VSX and VMX based on a new VSX capability. We no longer bother with a conditional for VMX support, because every CPU that's ever been supported by the pseries machine type supports VMX. NOTE: Some userspace distributions (e.g. RHEL7.4) already rely on availability of VSX in libc, so using cap-vsx=3Doff may lead to a fatal SIGILL in init. Signed-off-by: David Gibson Reviewed-by: Greg Kurz (cherry picked from commit 2938664286499c0c30d6e455a7e2e5d3e6c3f63d) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 20 +++++++++++--------- hw/ppc/spapr_caps.c | 25 +++++++++++++++++++++++++ include/hw/ppc/spapr.h | 3 +++ 3 files changed, 39 insertions(+), 9 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 69ddc4bb23..f006662c5c 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -557,14 +557,16 @@ static void spapr_populate_cpu_dt(CPUState *cs, void = *fdt, int offset, segs, sizeof(segs)))); } =20 - /* Advertise VMX/VSX (vector extensions) if available - * 0 / no property =3D=3D no vector extensions + /* Advertise VSX (vector extensions) if available * 1 =3D=3D VMX / Altivec available - * 2 =3D=3D VSX available */ - if (env->insns_flags & PPC_ALTIVEC) { - uint32_t vmx =3D (env->insns_flags2 & PPC2_VSX) ? 2 : 1; - - _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", vmx))); + * 2 =3D=3D VSX available + * + * Only CPUs for which we create core types in spapr_cpu_core.c + * are possible, and all of those have VMX */ + if (spapr_has_cap(spapr, SPAPR_CAP_VSX)) { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); + } else { + _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); } =20 /* Advertise DFP (Decimal Floating Point) if available @@ -3678,7 +3680,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(0); + smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX); spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3760,7 +3762,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index cad40fe49a..7c855c67ad 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -57,6 +57,19 @@ static void cap_htm_allow(sPAPRMachineState *spapr, Erro= r **errp) } } =20 +static void cap_vsx_allow(sPAPRMachineState *spapr, Error **errp) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); + CPUPPCState *env =3D &cpu->env; + + /* Allowable CPUs in spapr_cpu_core.c should already have gotten + * rid of anything that doesn't do VMX */ + g_assert(env->insns_flags & PPC_ALTIVEC); + if (!(env->insns_flags2 & PPC2_VSX)) { + error_setg(errp, "VSX support not available, try cap-vsx=3Doff"); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { { .name =3D "htm", @@ -65,6 +78,13 @@ static sPAPRCapabilityInfo capability_table[] =3D { .allow =3D cap_htm_allow, /* TODO: add cap_htm_disallow */ }, + { + .name =3D "vsx", + .description =3D "Allow Vector Scalar Extensions (VSX)", + .flag =3D SPAPR_CAP_VSX, + .allow =3D cap_vsx_allow, + /* TODO: add cap_vsx_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -81,6 +101,11 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMac= hineState *spapr, caps.mask &=3D ~SPAPR_CAP_HTM; } =20 + if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, + 0, spapr->max_compat_pvr)) { + caps.mask &=3D ~SPAPR_CAP_VSX; + } + return caps; } =20 diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 985948b622..7765f3439d 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -59,6 +59,9 @@ typedef enum { /* Hardware Transactional Memory */ #define SPAPR_CAP_HTM 0x0000000000000001ULL =20 +/* Vector Scalar Extensions */ +#define SPAPR_CAP_VSX 0x0000000000000002ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946103396650.3274934911144; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:02 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG1SX38273244; Tue, 6 Feb 2018 19:16:01 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 5CBD3AC043; Tue, 6 Feb 2018 14:17:22 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 238B9AC03A; Tue, 6 Feb 2018 14:17:22 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:04 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0056-0000-0000-0000041670AE X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:03 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0057-0000-0000-0000084DDFA3 Message-Id: <20180206191515.25830-44-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 43/54] spapr: Handle Decimal Floating Point (DFP) as an optional capability X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: David Gibson Decimal Floating Point has been available on POWER7 and later (server) cpus. However, it can be disabled on the hypervisor, meaning that it's not available to guests. We currently handle this by conditionally advertising DFP support in the device tree depending on whether the guest CPU model supports it - which can also depend on what's allowed in the host for -cpu host. That can lead to confusion on migration, since host properties are silently affecting guest visible properties. This patch handles it by treating it as an optional capability for the pseries machine type. Signed-off-by: David Gibson Reviewed-by: Greg Kurz (cherry picked from commit 2d1fb9bc8e6e78931d8e1bfeb0ed7a4d223b0480) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 7 ++++--- hw/ppc/spapr_caps.c | 18 ++++++++++++++++++ include/hw/ppc/spapr.h | 3 +++ 3 files changed, 25 insertions(+), 3 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index f006662c5c..c55ed9edfd 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -572,7 +572,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, /* Advertise DFP (Decimal Floating Point) if available * 0 / no property =3D=3D no DFP * 1 =3D=3D DFP available */ - if (env->insns_flags2 & PPC2_DFP) { + if (spapr_has_cap(spapr, SPAPR_CAP_DFP)) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); } =20 @@ -3680,7 +3680,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX); + smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX | SPAPR_CAP_DFP); spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3762,7 +3762,8 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX); + smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX + | SPAPR_CAP_DFP); SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 7c855c67ad..9d070a306c 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -70,6 +70,16 @@ static void cap_vsx_allow(sPAPRMachineState *spapr, Erro= r **errp) } } =20 +static void cap_dfp_allow(sPAPRMachineState *spapr, Error **errp) +{ + PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); + CPUPPCState *env =3D &cpu->env; + + if (!(env->insns_flags2 & PPC2_DFP)) { + error_setg(errp, "DFP support not available, try cap-dfp=3Doff"); + } +} + static sPAPRCapabilityInfo capability_table[] =3D { { .name =3D "htm", @@ -85,6 +95,13 @@ static sPAPRCapabilityInfo capability_table[] =3D { .allow =3D cap_vsx_allow, /* TODO: add cap_vsx_disallow */ }, + { + .name =3D "dfp", + .description =3D "Allow Decimal Floating Point (DFP)", + .flag =3D SPAPR_CAP_DFP, + .allow =3D cap_dfp_allow, + /* TODO: add cap_dfp_disallow */ + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -104,6 +121,7 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRMac= hineState *spapr, if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, spapr->max_compat_pvr)) { caps.mask &=3D ~SPAPR_CAP_VSX; + caps.mask &=3D ~SPAPR_CAP_DFP; } =20 return caps; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 7765f3439d..65cab2a65b 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -62,6 +62,9 @@ typedef enum { /* Vector Scalar Extensions */ #define SPAPR_CAP_VSX 0x0000000000000002ULL =20 +/* Decimal Floating Point */ +#define SPAPR_CAP_DFP 0x0000000000000004ULL + typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { uint64_t mask; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:02 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22034.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG25W52494406; Tue, 6 Feb 2018 19:16:02 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 01372AC046; Tue, 6 Feb 2018 14:17:23 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id BC10EAC040; Tue, 6 Feb 2018 14:17:22 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:05 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0056-0000-0000-0000041670B0 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:04 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0057-0000-0000-0000084DDFA5 Message-Id: <20180206191515.25830-45-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 44/54] hw/ppc/spapr_caps: Rework spapr_caps to use uint8 internal representation X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh Currently spapr_caps are tied to boolean values (on or off). This patch reworks the caps so that they can have any uint8 value. This allows more capabilities with various values to be represented in the same way internally. Capabilities are numbered in ascending order. The internal representation of capability values is an array of uint8s in the sPAPRMachineState, indexed by capability number. Capabilities can have their own name, description, options, getter and setter functions, type and allow functions. They also each have their own section in the migration stream. Capabilities are only migrated if they were explictly set on the command line, with the assumption that otherwise the default will match. On migration we ensure that the capability value on the destination is greater than or equal to the capability value from the source. So long at this remains the case then the migration is considered compatible and allowed to continue. This patch implements generic getter and setter functions for boolean capabilities. It also converts the existings cap-htm, cap-vsx and cap-dfp capabilities to this new format. Signed-off-by: David Gibson (cherry picked from commit 4e5fe3688e23d61b45cc549ff1322aff8f50ef45) Conflicts: include/hw/ppc/spapr.h *drop context dep on 60c6823b9bc Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 45 +++++-- hw/ppc/spapr_caps.c | 322 +++++++++++++++++++++++++--------------------= ---- include/hw/ppc/spapr.h | 44 +++---- 3 files changed, 224 insertions(+), 187 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index c55ed9edfd..34905731e1 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -320,7 +320,7 @@ static void spapr_populate_pa_features(sPAPRMachineStat= e *spapr, */ pa_features[3] |=3D 0x20; } - if (spapr_has_cap(spapr, SPAPR_CAP_HTM) && pa_size > 24) { + if ((spapr_get_cap(spapr, SPAPR_CAP_HTM) !=3D 0) && pa_size > 24) { pa_features[24] |=3D 0x80; /* Transactional memory support */ } if (legacy_guest && pa_size > 40) { @@ -563,7 +563,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, * * Only CPUs for which we create core types in spapr_cpu_core.c * are possible, and all of those have VMX */ - if (spapr_has_cap(spapr, SPAPR_CAP_VSX)) { + if (spapr_get_cap(spapr, SPAPR_CAP_VSX) !=3D 0) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 2))); } else { _FDT((fdt_setprop_cell(fdt, offset, "ibm,vmx", 1))); @@ -572,7 +572,7 @@ static void spapr_populate_cpu_dt(CPUState *cs, void *f= dt, int offset, /* Advertise DFP (Decimal Floating Point) if available * 0 / no property =3D=3D no DFP * 1 =3D=3D DFP available */ - if (spapr_has_cap(spapr, SPAPR_CAP_DFP)) { + if (spapr_get_cap(spapr, SPAPR_CAP_DFP) !=3D 0) { _FDT((fdt_setprop_cell(fdt, offset, "ibm,dfp", 1))); } =20 @@ -1560,6 +1560,18 @@ static bool spapr_vga_init(PCIBus *pci_bus, Error **= errp) } } =20 +static int spapr_pre_load(void *opaque) +{ + int rc; + + rc =3D spapr_caps_pre_load(opaque); + if (rc) { + return rc; + } + + return 0; +} + static int spapr_post_load(void *opaque, int version_id) { sPAPRMachineState *spapr =3D (sPAPRMachineState *)opaque; @@ -1601,6 +1613,18 @@ static int spapr_post_load(void *opaque, int version= _id) return err; } =20 +static int spapr_pre_save(void *opaque) +{ + int rc; + + rc =3D spapr_caps_pre_save(opaque); + if (rc) { + return rc; + } + + return 0; +} + static bool version_before_3(void *opaque, int version_id) { return version_id < 3; @@ -1721,7 +1745,9 @@ static const VMStateDescription vmstate_spapr =3D { .name =3D "spapr", .version_id =3D 3, .minimum_version_id =3D 1, + .pre_load =3D spapr_pre_load, .post_load =3D spapr_post_load, + .pre_save =3D spapr_pre_save, .fields =3D (VMStateField[]) { /* used to be @next_irq */ VMSTATE_UNUSED_BUFFER(version_before_3, 0, 4), @@ -1736,7 +1762,9 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_ov5_cas, &vmstate_spapr_patb_entry, &vmstate_spapr_pending_events, - &vmstate_spapr_caps, + &vmstate_spapr_cap_htm, + &vmstate_spapr_cap_vsx, + &vmstate_spapr_cap_dfp, NULL } }; @@ -2297,8 +2325,6 @@ static void ppc_spapr_init(MachineState *machine) char *filename; Error *resize_hpt_err =3D NULL; =20 - spapr_caps_validate(spapr, &error_fatal); - msi_nonbroken =3D true; =20 QLIST_INIT(&spapr->phbs); @@ -3680,7 +3706,9 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) */ mc->numa_mem_align_shift =3D 28; =20 - smc->default_caps =3D spapr_caps(SPAPR_CAP_VSX | SPAPR_CAP_DFP); + smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; + smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; spapr_caps_add_properties(smc, &error_abort); } =20 @@ -3762,8 +3790,7 @@ static void spapr_machine_2_11_class_options(MachineC= lass *mc) sPAPRMachineClass *smc =3D SPAPR_MACHINE_CLASS(mc); =20 spapr_machine_2_12_class_options(mc); - smc->default_caps =3D spapr_caps(SPAPR_CAP_HTM | SPAPR_CAP_VSX - | SPAPR_CAP_DFP); + smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_ON; SET_MACHINE_COMPAT(mc, SPAPR_COMPAT_2_11); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 9d070a306c..f95a78547d 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -35,18 +35,51 @@ typedef struct sPAPRCapabilityInfo { const char *name; const char *description; - uint64_t flag; + const char *options; /* valid capability values= */ + int index; =20 + /* Getter and Setter Function Pointers */ + ObjectPropertyAccessor *get; + ObjectPropertyAccessor *set; + const char *type; /* Make sure the virtual hardware can support this capability */ - void (*allow)(sPAPRMachineState *spapr, Error **errp); - - /* If possible, tell the virtual hardware not to allow the cap to - * be used at all */ - void (*disallow)(sPAPRMachineState *spapr, Error **errp); + void (*apply)(sPAPRMachineState *spapr, uint8_t val, Error **errp); } sPAPRCapabilityInfo; =20 -static void cap_htm_allow(sPAPRMachineState *spapr, Error **errp) +static void spapr_cap_get_bool(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value =3D spapr_get_cap(spapr, cap->index) =3D=3D SPAPR_CAP_ON; + + visit_type_bool(v, name, &value, errp); +} + +static void spapr_cap_set_bool(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) { + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + bool value; + Error *local_err =3D NULL; + + visit_type_bool(v, name, &value, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + spapr->cmd_line_caps[cap->index] =3D true; + spapr->eff.caps[cap->index] =3D value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; +} + +static void cap_htm_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) +{ + if (!val) { + /* TODO: We don't support disabling htm yet */ + return; + } if (tcg_enabled()) { error_setg(errp, "No Transactional Memory support in TCG, try cap-htm=3D= off"); @@ -57,11 +90,15 @@ static void cap_htm_allow(sPAPRMachineState *spapr, Err= or **errp) } } =20 -static void cap_vsx_allow(sPAPRMachineState *spapr, Error **errp) +static void cap_vsx_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); CPUPPCState *env =3D &cpu->env; =20 + if (!val) { + /* TODO: We don't support disabling vsx yet */ + return; + } /* Allowable CPUs in spapr_cpu_core.c should already have gotten * rid of anything that doesn't do VMX */ g_assert(env->insns_flags & PPC_ALTIVEC); @@ -70,37 +107,51 @@ static void cap_vsx_allow(sPAPRMachineState *spapr, Er= ror **errp) } } =20 -static void cap_dfp_allow(sPAPRMachineState *spapr, Error **errp) +static void cap_dfp_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { PowerPCCPU *cpu =3D POWERPC_CPU(first_cpu); CPUPPCState *env =3D &cpu->env; =20 + if (!val) { + /* TODO: We don't support disabling dfp yet */ + return; + } if (!(env->insns_flags2 & PPC2_DFP)) { error_setg(errp, "DFP support not available, try cap-dfp=3Doff"); } } =20 -static sPAPRCapabilityInfo capability_table[] =3D { - { + +sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { + [SPAPR_CAP_HTM] =3D { .name =3D "htm", .description =3D "Allow Hardware Transactional Memory (HTM)", - .flag =3D SPAPR_CAP_HTM, - .allow =3D cap_htm_allow, - /* TODO: add cap_htm_disallow */ + .options =3D "", + .index =3D SPAPR_CAP_HTM, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", + .apply =3D cap_htm_apply, }, - { + [SPAPR_CAP_VSX] =3D { .name =3D "vsx", .description =3D "Allow Vector Scalar Extensions (VSX)", - .flag =3D SPAPR_CAP_VSX, - .allow =3D cap_vsx_allow, - /* TODO: add cap_vsx_disallow */ + .options =3D "", + .index =3D SPAPR_CAP_VSX, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", + .apply =3D cap_vsx_apply, }, - { + [SPAPR_CAP_DFP] =3D { .name =3D "dfp", .description =3D "Allow Decimal Floating Point (DFP)", - .flag =3D SPAPR_CAP_DFP, - .allow =3D cap_dfp_allow, - /* TODO: add cap_dfp_disallow */ + .options =3D "", + .index =3D SPAPR_CAP_DFP, + .get =3D spapr_cap_get_bool, + .set =3D spapr_cap_set_bool, + .type =3D "bool", + .apply =3D cap_dfp_apply, }, }; =20 @@ -115,23 +166,33 @@ static sPAPRCapabilities default_caps_with_cpu(sPAPRM= achineState *spapr, =20 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_07, 0, spapr->max_compat_pvr)) { - caps.mask &=3D ~SPAPR_CAP_HTM; + caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; } =20 if (!ppc_check_compat(cpu, CPU_POWERPC_LOGICAL_2_06, 0, spapr->max_compat_pvr)) { - caps.mask &=3D ~SPAPR_CAP_VSX; - caps.mask &=3D ~SPAPR_CAP_DFP; + caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_OFF; + caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_OFF; } =20 return caps; } =20 -static bool spapr_caps_needed(void *opaque) +int spapr_caps_pre_load(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - return (spapr->forced_caps.mask !=3D 0) || (spapr->forbidden_caps.mask= !=3D 0); + /* Set to default so we can tell if this came in with the migration */ + spapr->mig =3D spapr->def; + return 0; +} + +int spapr_caps_pre_save(void *opaque) +{ + sPAPRMachineState *spapr =3D opaque; + + spapr->mig =3D spapr->eff; + return 0; } =20 /* This has to be called from the top-level spapr post_load, not the @@ -140,176 +201,121 @@ static bool spapr_caps_needed(void *opaque) * caps on the destination */ int spapr_caps_post_migration(sPAPRMachineState *spapr) { - uint64_t allcaps =3D 0; int i; bool ok =3D true; - sPAPRCapabilities dstcaps =3D spapr->effective_caps; + sPAPRCapabilities dstcaps =3D spapr->eff; sPAPRCapabilities srccaps; =20 srccaps =3D default_caps_with_cpu(spapr, first_cpu); - srccaps.mask |=3D spapr->mig_forced_caps.mask; - srccaps.mask &=3D ~spapr->mig_forbidden_caps.mask; + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + /* If not default value then assume came in with the migration */ + if (spapr->mig.caps[i] !=3D spapr->def.caps[i]) { + srccaps.caps[i] =3D spapr->mig.caps[i]; + } + } =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { sPAPRCapabilityInfo *info =3D &capability_table[i]; =20 - allcaps |=3D info->flag; - - if ((srccaps.mask & info->flag) && !(dstcaps.mask & info->flag)) { - error_report("cap-%s=3Don in incoming stream, but off in desti= nation", - info->name); + if (srccaps.caps[i] > dstcaps.caps[i]) { + error_report("cap-%s higher level (%d) in incoming stream than= on destination (%d)", + info->name, srccaps.caps[i], dstcaps.caps[i]); ok =3D false; } =20 - if (!(srccaps.mask & info->flag) && (dstcaps.mask & info->flag)) { - warn_report("cap-%s=3Doff in incoming stream, but on in destin= ation", - info->name); + if (srccaps.caps[i] < dstcaps.caps[i]) { + warn_report("cap-%s lower level (%d) in incoming stream than o= n destination (%d)", + info->name, srccaps.caps[i], dstcaps.caps[i]); } } =20 - if (spapr->mig_forced_caps.mask & ~allcaps) { - error_report( - "Unknown capabilities 0x%"PRIx64" enabled in incoming stream", - spapr->mig_forced_caps.mask & ~allcaps); - ok =3D false; - } - if (spapr->mig_forbidden_caps.mask & ~allcaps) { - warn_report( - "Unknown capabilities 0x%"PRIx64" disabled in incoming stream", - spapr->mig_forbidden_caps.mask & ~allcaps); - } - return ok ? 0 : -EINVAL; } =20 -static int spapr_caps_pre_save(void *opaque) +static bool spapr_cap_htm_needed(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - spapr->mig_forced_caps =3D spapr->forced_caps; - spapr->mig_forbidden_caps =3D spapr->forbidden_caps; - return 0; + return spapr->cmd_line_caps[SPAPR_CAP_HTM] && + (spapr->eff.caps[SPAPR_CAP_HTM] !=3D spapr->def.caps[SPAPR_CAP_= HTM]); } =20 -static int spapr_caps_pre_load(void *opaque) +const VMStateDescription vmstate_spapr_cap_htm =3D { + .name =3D "spapr/cap/htm", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_htm_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_HTM], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; + +static bool spapr_cap_vsx_needed(void *opaque) { sPAPRMachineState *spapr =3D opaque; =20 - spapr->mig_forced_caps =3D spapr_caps(0); - spapr->mig_forbidden_caps =3D spapr_caps(0); - return 0; + return spapr->cmd_line_caps[SPAPR_CAP_VSX] && + (spapr->eff.caps[SPAPR_CAP_VSX] !=3D spapr->def.caps[SPAPR_CAP_= VSX]); } =20 -const VMStateDescription vmstate_spapr_caps =3D { - .name =3D "spapr/caps", +const VMStateDescription vmstate_spapr_cap_vsx =3D { + .name =3D "spapr/cap/vsx", .version_id =3D 1, .minimum_version_id =3D 1, - .needed =3D spapr_caps_needed, - .pre_save =3D spapr_caps_pre_save, - .pre_load =3D spapr_caps_pre_load, + .needed =3D spapr_cap_vsx_needed, .fields =3D (VMStateField[]) { - VMSTATE_UINT64(mig_forced_caps.mask, sPAPRMachineState), - VMSTATE_UINT64(mig_forbidden_caps.mask, sPAPRMachineState), + VMSTATE_UINT8(mig.caps[SPAPR_CAP_VSX], sPAPRMachineState), VMSTATE_END_OF_LIST() }, }; =20 -void spapr_caps_reset(sPAPRMachineState *spapr) +static bool spapr_cap_dfp_needed(void *opaque) { - Error *local_err =3D NULL; - sPAPRCapabilities caps; - int i; - - /* First compute the actual set of caps we're running with.. */ - caps =3D default_caps_with_cpu(spapr, first_cpu); - - /* Remove unnecessary forced/forbidden bits (this will help us - * with migration) */ - spapr->forced_caps.mask &=3D ~caps.mask; - spapr->forbidden_caps.mask &=3D caps.mask; - - caps.mask |=3D spapr->forced_caps.mask; - caps.mask &=3D ~spapr->forbidden_caps.mask; - - spapr->effective_caps =3D caps; - - /* .. then apply those caps to the virtual hardware */ - - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { - sPAPRCapabilityInfo *info =3D &capability_table[i]; - - if (spapr->effective_caps.mask & info->flag) { - /* Failure to allow a cap is fatal - if the guest doesn't - * have it, we'll be supplying an incorrect environment */ - if (info->allow) { - info->allow(spapr, &error_fatal); - } - } else { - /* Failure to enforce a cap is only a warning. The guest - * shouldn't be using it, since it's not advertised, so it - * doesn't get to complain about weird behaviour if it - * goes ahead anyway */ - if (info->disallow) { - info->disallow(spapr, &local_err); - } - if (local_err) { - warn_report_err(local_err); - local_err =3D NULL; - } - } - } -} - -static void spapr_cap_get(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - sPAPRCapabilityInfo *cap =3D opaque; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - bool value =3D spapr_has_cap(spapr, cap->flag); - - /* TODO: Could this get called before effective_caps is finalized - * in spapr_caps_reset()? */ + sPAPRMachineState *spapr =3D opaque; =20 - visit_type_bool(v, name, &value, errp); + return spapr->cmd_line_caps[SPAPR_CAP_DFP] && + (spapr->eff.caps[SPAPR_CAP_DFP] !=3D spapr->def.caps[SPAPR_CAP_= DFP]); } =20 -static void spapr_cap_set(Object *obj, Visitor *v, const char *name, - void *opaque, Error **errp) -{ - sPAPRCapabilityInfo *cap =3D opaque; - sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - bool value; - Error *local_err =3D NULL; - - visit_type_bool(v, name, &value, &local_err); - if (local_err) { - error_propagate(errp, local_err); - return; - } - - if (value) { - spapr->forced_caps.mask |=3D cap->flag; - } else { - spapr->forbidden_caps.mask |=3D cap->flag; - } -} +const VMStateDescription vmstate_spapr_cap_dfp =3D { + .name =3D "spapr/cap/dfp", + .version_id =3D 1, + .minimum_version_id =3D 1, + .needed =3D spapr_cap_dfp_needed, + .fields =3D (VMStateField[]) { + VMSTATE_UINT8(mig.caps[SPAPR_CAP_DFP], sPAPRMachineState), + VMSTATE_END_OF_LIST() + }, +}; =20 -void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp) +void spapr_caps_reset(sPAPRMachineState *spapr) { - uint64_t allcaps =3D 0; + sPAPRCapabilities default_caps; int i; =20 - for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { - g_assert((allcaps & capability_table[i].flag) =3D=3D 0); - allcaps |=3D capability_table[i].flag; + /* First compute the actual set of caps we're running with.. */ + default_caps =3D default_caps_with_cpu(spapr, first_cpu); + + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + /* Store the defaults */ + spapr->def.caps[i] =3D default_caps.caps[i]; + /* If not set on the command line then apply the default value */ + if (!spapr->cmd_line_caps[i]) { + spapr->eff.caps[i] =3D default_caps.caps[i]; + } } =20 - g_assert((spapr->forced_caps.mask & ~allcaps) =3D=3D 0); - g_assert((spapr->forbidden_caps.mask & ~allcaps) =3D=3D 0); + /* .. then apply those caps to the virtual hardware */ + + for (i =3D 0; i < SPAPR_CAP_NUM; i++) { + sPAPRCapabilityInfo *info =3D &capability_table[i]; =20 - if (spapr->forced_caps.mask & spapr->forbidden_caps.mask) { - error_setg(errp, "Some sPAPR capabilities set both on and off"); - return; + /* + * If the apply function can't set the desired level and thinks it= 's + * fatal, it should cause that. + */ + info->apply(spapr, spapr->eff.caps[i], &error_fatal); } } =20 @@ -322,17 +328,19 @@ void spapr_caps_add_properties(sPAPRMachineClass *smc= , Error **errp) for (i =3D 0; i < ARRAY_SIZE(capability_table); i++) { sPAPRCapabilityInfo *cap =3D &capability_table[i]; const char *name =3D g_strdup_printf("cap-%s", cap->name); + char *desc; =20 - object_class_property_add(klass, name, "bool", - spapr_cap_get, spapr_cap_set, NULL, - cap, &local_err); + object_class_property_add(klass, name, cap->type, + cap->get, cap->set, + NULL, cap, &local_err); if (local_err) { error_propagate(errp, local_err); return; } =20 - object_class_property_set_description(klass, name, cap->descriptio= n, - &local_err); + desc =3D g_strdup_printf("%s%s", cap->description, cap->options); + object_class_property_set_description(klass, name, desc, &local_er= r); + g_free(desc); if (local_err) { error_propagate(errp, local_err); return; diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 65cab2a65b..c9737e6a54 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -54,20 +54,25 @@ typedef enum { * Capabilities */ =20 -/* These bits go in the migration stream, so they can't be reassigned */ - /* Hardware Transactional Memory */ -#define SPAPR_CAP_HTM 0x0000000000000001ULL - +#define SPAPR_CAP_HTM 0x00 /* Vector Scalar Extensions */ -#define SPAPR_CAP_VSX 0x0000000000000002ULL - +#define SPAPR_CAP_VSX 0x01 /* Decimal Floating Point */ -#define SPAPR_CAP_DFP 0x0000000000000004ULL +#define SPAPR_CAP_DFP 0x02 +/* Num Caps */ +#define SPAPR_CAP_NUM (SPAPR_CAP_DFP + 1) + +/* + * Capability Values + */ +/* Bool Caps */ +#define SPAPR_CAP_OFF 0x00 +#define SPAPR_CAP_ON 0x01 =20 typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { - uint64_t mask; + uint8_t caps[SPAPR_CAP_NUM]; }; =20 /** @@ -149,9 +154,8 @@ struct sPAPRMachineState { =20 const char *icp_type; =20 - sPAPRCapabilities forced_caps, forbidden_caps; - sPAPRCapabilities mig_forced_caps, mig_forbidden_caps; - sPAPRCapabilities effective_caps; + bool cmd_line_caps[SPAPR_CAP_NUM]; + sPAPRCapabilities def, eff, mig; }; =20 #define H_SUCCESS 0 @@ -732,24 +736,22 @@ void spapr_do_system_reset_on_cpu(CPUState *cs, run_o= n_cpu_data arg); int spapr_vcpu_id(PowerPCCPU *cpu); PowerPCCPU *spapr_find_cpu(int vcpu_id); =20 +int spapr_caps_pre_load(void *opaque); +int spapr_caps_pre_save(void *opaque); + /* * Handling of optional capabilities */ -extern const VMStateDescription vmstate_spapr_caps; - -static inline sPAPRCapabilities spapr_caps(uint64_t mask) -{ - sPAPRCapabilities caps =3D { mask }; - return caps; -} +extern const VMStateDescription vmstate_spapr_cap_htm; +extern const VMStateDescription vmstate_spapr_cap_vsx; +extern const VMStateDescription vmstate_spapr_cap_dfp; =20 -static inline bool spapr_has_cap(sPAPRMachineState *spapr, uint64_t cap) +static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { - return !!(spapr->effective_caps.mask & cap); + return spapr->eff.caps[cap]; } =20 void spapr_caps_reset(sPAPRMachineState *spapr); -void spapr_caps_validate(sPAPRMachineState *spapr, Error **errp); void spapr_caps_add_properties(sPAPRMachineClass *smc, Error **errp); int spapr_caps_post_migration(sPAPRMachineState *spapr); =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946581022325.9273842399001; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:03 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG36k48824376; Tue, 6 Feb 2018 19:16:03 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id AE464AC041; Tue, 6 Feb 2018 14:17:23 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 75077AC03F; Tue, 6 Feb 2018 14:17:23 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:06 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0008-0000-0000-000002CD7B6A X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:05 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0009-0000-0000-0000382B9EEA Message-Id: <20180206191515.25830-46-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 45/54] ppc: Change Power9 compat table to support at most 8 threads/core X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Jose Ricardo Ziviani , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Jose Ricardo Ziviani Increases the max smt mode to 8 for Power9. That's because KVM supports smt emulation in this platform so QEMU should allow users to use it as well. Today if we try to pass -smp ...,threads=3D8, QEMU will silently truncate it to smt4 mode and may cause a crash if we try to perform a cpu hotplug. Signed-off-by: Jose Ricardo Ziviani [dwg: Added an explanatory comment] Signed-off-by: David Gibson (cherry picked from commit 03ee51d3548f5f553a3089f466483c1c6d5c666b) Signed-off-by: Michael Roth --- target/ppc/compat.c | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/target/ppc/compat.c b/target/ppc/compat.c index ad8f93c064..276b5b52c2 100644 --- a/target/ppc/compat.c +++ b/target/ppc/compat.c @@ -73,7 +73,14 @@ static const CompatInfo compat_table[] =3D { .pvr =3D CPU_POWERPC_LOGICAL_3_00, .pcr =3D PCR_COMPAT_3_00, .pcr_level =3D PCR_COMPAT_3_00, - .max_threads =3D 4, + /* + * POWER9 hardware only supports 4 threads / core, but this + * limit is for guests. We need to support 8 vthreads/vcore + * on POWER9 for POWER8 compatibility guests, and it's very + * confusing if half of the threads disappear from the guest + * if it announces it's POWER9 aware at CAS time. + */ + .max_threads =3D 8, }, }; =20 --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947031038300.18529665879237; Tue, 6 Feb 2018 11:57:11 -0800 (PST) Received: from localhost ([::1]:53666 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9Mc-0008Hk-6K for importer@patchew.org; Tue, 06 Feb 2018 14:57:10 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44642) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j7-0005k0-6t for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ix-0008ET-GI for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:21 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:34968 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ix-0008Da-9W for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:11 -0500 Received: from pps.filterd (m0098414.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEJAG056257 for ; Tue, 6 Feb 2018 14:16:10 -0500 Received: from e11.ny.us.ibm.com (e11.ny.us.ibm.com [129.33.205.201]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fygjbwd3n-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:08 -0500 Received: from localhost by e11.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 6 Feb 2018 14:16:08 -0500 Received: from b01cxnp22035.gho.pok.ibm.com (9.57.198.25) by e11.ny.us.ibm.com (146.89.104.198) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Tue, 6 Feb 2018 14:16:04 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG3U349938526; Tue, 6 Feb 2018 19:16:03 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 625E3AC041; Tue, 6 Feb 2018 14:17:24 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 279E5AC040; Tue, 6 Feb 2018 14:17:24 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:07 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-2213-0000-0000-0000026884EB X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:06 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-2214-0000-0000-00005905BD4C Message-Id: <20180206191515.25830-47-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 46/54] spapr: fix device tree properties when using compatibility mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Greg Kurz Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Greg Kurz Commit 51f84465dd98 changed the compatility mode setting logic: - machine reset only sets compatibility mode for the boot CPU - compatibility mode is set for other CPUs when they are put online by the guest with the "start-cpu" RTAS call This causes a regression for machines started with max-compat-cpu: the device tree nodes related to secondary CPU cores contain wrong "cpu-version" and "ibm,pa-features" values, as shown below. Guest started on a POWER8 host with: -smp cores=3D2 -machine pseries,max-cpu-compat=3Dcompat7 ibm,pa-features =3D [18 00 f6 3f c7 c0 80 f0 80 00 00 00 00 00 00 00 00 00 80 00 80 00 80 00 00 00]; cpu-version =3D <0x4d0200>; ^^^ second CPU core ibm,pa-features =3D <0x600f63f 0xc70080c0>; cpu-version =3D <0xf000003>; ^^^ boot CPU core The second core is advertised in raw POWER8 mode. This happens because CAS assumes all CPUs to have the same compatibility mode. Since the boot CPU already has the requested compatibility mode, the CAS code does not set it for the secondary one, and exposes the bogus device tree properties in in the CAS response to the guest. A similar situation is observed when hot-plugging a CPU core. The related device tree properties are generated and exposed to guest with the "ibm,configure-connector" RTAS before "start-cpu" is called. The CPU core is advertised to the guest in raw mode as well. It both cases, it boils down to the fact that "start-cpu" happens too late. This can be fixed globally by propagating the compatibility mode of the boot CPU to the other CPUs during reset. For this to work, the compatibility mode of the boot CPU must be set before the machine code actually resets all CPUs. It is not needed to set the compatibility mode in "start-cpu" anymore, so the code is dropped. Fixes: 51f84465dd98 Signed-off-by: Greg Kurz Signed-off-by: David Gibson (cherry picked from commit 9012a53f067a78022947e18050b145c34a3dc599) Conflicts: hw/ppc/spapr_cpu_core.c hw/ppc/spapr_rtas.c * drop context dep on d6322252b32 Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 18 +++++++++--------- hw/ppc/spapr_cpu_core.c | 7 +++++++ 2 files changed, 16 insertions(+), 9 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 34905731e1..6ab39a0e61 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1458,6 +1458,15 @@ static void ppc_spapr_reset(void) spapr_setup_hpt_and_vrma(spapr); } =20 + /* if this reset wasn't generated by CAS, we should reset our + * negotiated options and start from scratch */ + if (!spapr->cas_reboot) { + spapr_ovec_cleanup(spapr->ov5_cas); + spapr->ov5_cas =3D spapr_ovec_new(); + + ppc_set_compat(first_ppc_cpu, spapr->max_compat_pvr, &error_fatal); + } + qemu_devices_reset(); =20 /* DRC reset may cause a device to be unplugged. This will cause troub= les @@ -1478,15 +1487,6 @@ static void ppc_spapr_reset(void) rtas_addr =3D rtas_limit - RTAS_MAX_SIZE; fdt_addr =3D rtas_addr - FDT_MAX_SIZE; =20 - /* if this reset wasn't generated by CAS, we should reset our - * negotiated options and start from scratch */ - if (!spapr->cas_reboot) { - spapr_ovec_cleanup(spapr->ov5_cas); - spapr->ov5_cas =3D spapr_ovec_new(); - - ppc_set_compat_all(spapr->max_compat_pvr, &error_fatal); - } - fdt =3D spapr_build_fdt(spapr, rtas_addr, spapr->rtas_size); =20 spapr_load_rtas(spapr, fdt, rtas_addr); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 3a4c174012..e8b0ffb1b1 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -35,6 +35,13 @@ static void spapr_cpu_reset(void *opaque) cs->halted =3D 1; =20 env->spr[SPR_HIOR] =3D 0; + + /* Set compatibility mode to match the boot CPU, which was either set + * by the machine reset code or by CAS. This should never fail. + */ + if (cs !=3D first_cpu) { + ppc_set_compat(cpu, POWERPC_CPU(first_cpu)->compat_pvr, &error_abo= rt); + } } =20 static void spapr_cpu_destroy(PowerPCCPU *cpu) --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946691373834.1887561910335; Tue, 6 Feb 2018 11:51:31 -0800 (PST) Received: from localhost ([::1]:53588 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9H8-0002vK-Ee for importer@patchew.org; Tue, 06 Feb 2018 14:51:30 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44528) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j3-0005fj-SA for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:29 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8ix-0008E3-CE for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:17 -0500 Received: from mx0b-001b2d01.pphosted.com ([148.163.158.5]:60402 helo=mx0a-001b2d01.pphosted.com) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8ix-0008DW-5a for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:11 -0500 Received: from pps.filterd (m0098416.ppops.net [127.0.0.1]) by mx0b-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFh6i016233 for ; Tue, 6 Feb 2018 14:16:10 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0b-001b2d01.pphosted.com with ESMTP id 2fyj9x04hb-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:09 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:04 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG40941877516; Tue, 6 Feb 2018 19:16:04 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 0DE43AC03F; Tue, 6 Feb 2018 14:17:25 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id C8C99AC03A; Tue, 6 Feb 2018 14:17:24 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:08 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> MIME-Version: 1.0 X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7DA7 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:06 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B451 Message-Id: <20180206191515.25830-48-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 Content-Transfer-Encoding: quoted-printable X-MIME-Autoconverted: from 8bit to quoted-printable by mx0b-001b2d01.pphosted.com id w16JFh6i016233 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 47/54] target/ppc: introduce the PPC_BIT() macro X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" From: C=C3=A9dric Le Goater and use them in a couple of obvious places. Other macros will be used in the model of the XIVE interrupt controller. Signed-off-by: C=C3=A9dric Le Goater Signed-off-by: David Gibson (cherry picked from commit 2a83f9976efa9a85e8ceb9d1035a68f25c321334) Signed-off-by: Michael Roth --- target/ppc/cpu.h | 105 +++++++++++++++++++++++++++++----------------------= ---- 1 file changed, 56 insertions(+), 49 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 989761b795..370b05e76e 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -87,6 +87,13 @@ #define PPC_ELF_MACHINE EM_PPC #endif =20 +#define PPC_BIT(bit) (0x8000000000000000UL >> (bit)) +#define PPC_BIT32(bit) (0x80000000UL >> (bit)) +#define PPC_BIT8(bit) (0x80UL >> (bit)) +#define PPC_BITMASK(bs, be) ((PPC_BIT(bs) - PPC_BIT(be)) | PPC_BIT(bs)) +#define PPC_BITMASK32(bs, be) ((PPC_BIT32(bs) - PPC_BIT32(be)) | \ + PPC_BIT32(bs)) + /*************************************************************************= ****/ /* Exception vectors definitions = */ enum { @@ -371,10 +378,10 @@ struct ppc_slb_t { #define MSR_LE 0 /* Little-endian mode 1 hfla= gs */ =20 /* LPCR bits */ -#define LPCR_VPM0 (1ull << (63 - 0)) -#define LPCR_VPM1 (1ull << (63 - 1)) -#define LPCR_ISL (1ull << (63 - 2)) -#define LPCR_KBV (1ull << (63 - 3)) +#define LPCR_VPM0 PPC_BIT(0) +#define LPCR_VPM1 PPC_BIT(1) +#define LPCR_ISL PPC_BIT(2) +#define LPCR_KBV PPC_BIT(3) #define LPCR_DPFD_SHIFT (63 - 11) #define LPCR_DPFD (0x7ull << LPCR_DPFD_SHIFT) #define LPCR_VRMASD_SHIFT (63 - 16) @@ -382,41 +389,41 @@ struct ppc_slb_t { /* P9: Power-saving mode Exit Cause Enable (Upper Section) Mask */ #define LPCR_PECE_U_SHIFT (63 - 19) #define LPCR_PECE_U_MASK (0x7ull << LPCR_PECE_U_SHIFT) -#define LPCR_HVEE (1ull << (63 - 17)) /* Hypervisor Virt Exit Enab= le */ +#define LPCR_HVEE PPC_BIT(17) /* Hypervisor Virt Exit Enable */ #define LPCR_RMLS_SHIFT (63 - 37) #define LPCR_RMLS (0xfull << LPCR_RMLS_SHIFT) -#define LPCR_ILE (1ull << (63 - 38)) +#define LPCR_ILE PPC_BIT(38) #define LPCR_AIL_SHIFT (63 - 40) /* Alternate interrupt location */ #define LPCR_AIL (3ull << LPCR_AIL_SHIFT) -#define LPCR_UPRT (1ull << (63 - 41)) /* Use Process Table */ -#define LPCR_EVIRT (1ull << (63 - 42)) /* Enhanced Virtualisation */ -#define LPCR_ONL (1ull << (63 - 45)) -#define LPCR_LD (1ull << (63 - 46)) /* Large Decrementer */ -#define LPCR_P7_PECE0 (1ull << (63 - 49)) -#define LPCR_P7_PECE1 (1ull << (63 - 50)) -#define LPCR_P7_PECE2 (1ull << (63 - 51)) -#define LPCR_P8_PECE0 (1ull << (63 - 47)) -#define LPCR_P8_PECE1 (1ull << (63 - 48)) -#define LPCR_P8_PECE2 (1ull << (63 - 49)) -#define LPCR_P8_PECE3 (1ull << (63 - 50)) -#define LPCR_P8_PECE4 (1ull << (63 - 51)) +#define LPCR_UPRT PPC_BIT(41) /* Use Process Table */ +#define LPCR_EVIRT PPC_BIT(42) /* Enhanced Virtualisation */ +#define LPCR_ONL PPC_BIT(45) +#define LPCR_LD PPC_BIT(46) /* Large Decrementer */ +#define LPCR_P7_PECE0 PPC_BIT(49) +#define LPCR_P7_PECE1 PPC_BIT(50) +#define LPCR_P7_PECE2 PPC_BIT(51) +#define LPCR_P8_PECE0 PPC_BIT(47) +#define LPCR_P8_PECE1 PPC_BIT(48) +#define LPCR_P8_PECE2 PPC_BIT(49) +#define LPCR_P8_PECE3 PPC_BIT(50) +#define LPCR_P8_PECE4 PPC_BIT(51) /* P9: Power-saving mode Exit Cause Enable (Lower Section) Mask */ #define LPCR_PECE_L_SHIFT (63 - 51) #define LPCR_PECE_L_MASK (0x1full << LPCR_PECE_L_SHIFT) -#define LPCR_PDEE (1ull << (63 - 47)) /* Privileged Doorbell Exit = EN */ -#define LPCR_HDEE (1ull << (63 - 48)) /* Hyperv Doorbell Exit Enab= le */ -#define LPCR_EEE (1ull << (63 - 49)) /* External Exit Enable = */ -#define LPCR_DEE (1ull << (63 - 50)) /* Decrementer Exit Enable = */ -#define LPCR_OEE (1ull << (63 - 51)) /* Other Exit Enable = */ -#define LPCR_MER (1ull << (63 - 52)) -#define LPCR_GTSE (1ull << (63 - 53)) /* Guest Translation Shootdo= wn */ -#define LPCR_TC (1ull << (63 - 54)) -#define LPCR_HEIC (1ull << (63 - 59)) /* HV Extern Interrupt Contr= ol */ -#define LPCR_LPES0 (1ull << (63 - 60)) -#define LPCR_LPES1 (1ull << (63 - 61)) -#define LPCR_RMI (1ull << (63 - 62)) -#define LPCR_HVICE (1ull << (63 - 62)) /* HV Virtualisation Int Ena= ble */ -#define LPCR_HDICE (1ull << (63 - 63)) +#define LPCR_PDEE PPC_BIT(47) /* Privileged Doorbell Exit EN */ +#define LPCR_HDEE PPC_BIT(48) /* Hyperv Doorbell Exit Enable */ +#define LPCR_EEE PPC_BIT(49) /* External Exit Enable */ +#define LPCR_DEE PPC_BIT(50) /* Decrementer Exit Enable */ +#define LPCR_OEE PPC_BIT(51) /* Other Exit Enable */ +#define LPCR_MER PPC_BIT(52) +#define LPCR_GTSE PPC_BIT(53) /* Guest Translation Shootdown */ +#define LPCR_TC PPC_BIT(54) +#define LPCR_HEIC PPC_BIT(59) /* HV Extern Interrupt Control */ +#define LPCR_LPES0 PPC_BIT(60) +#define LPCR_LPES1 PPC_BIT(61) +#define LPCR_RMI PPC_BIT(62) +#define LPCR_HVICE PPC_BIT(62) /* HV Virtualisation Int Enable */ +#define LPCR_HDICE PPC_BIT(63) =20 #define msr_sf ((env->msr >> MSR_SF) & 1) #define msr_isf ((env->msr >> MSR_ISF) & 1) @@ -507,22 +514,22 @@ struct ppc_slb_t { #define FSCR_IC_TAR 8 =20 /* Exception state register bits definition = */ -#define ESR_PIL (1 << (63 - 36)) /* Illegal Instruction = */ -#define ESR_PPR (1 << (63 - 37)) /* Privileged Instruction = */ -#define ESR_PTR (1 << (63 - 38)) /* Trap = */ -#define ESR_FP (1 << (63 - 39)) /* Floating-Point Operation = */ -#define ESR_ST (1 << (63 - 40)) /* Store Operation = */ -#define ESR_AP (1 << (63 - 44)) /* Auxiliary Processor Operation = */ -#define ESR_PUO (1 << (63 - 45)) /* Unimplemented Operation = */ -#define ESR_BO (1 << (63 - 46)) /* Byte Ordering = */ -#define ESR_PIE (1 << (63 - 47)) /* Imprecise exception = */ -#define ESR_DATA (1 << (63 - 53)) /* Data Access (Embedded page table) = */ -#define ESR_TLBI (1 << (63 - 54)) /* TLB Ineligible (Embedded page table)= */ -#define ESR_PT (1 << (63 - 55)) /* Page Table (Embedded page table) = */ -#define ESR_SPV (1 << (63 - 56)) /* SPE/VMX operation = */ -#define ESR_EPID (1 << (63 - 57)) /* External Process ID operation = */ -#define ESR_VLEMI (1 << (63 - 58)) /* VLE operation = */ -#define ESR_MIF (1 << (63 - 62)) /* Misaligned instruction (VLE) = */ +#define ESR_PIL PPC_BIT(36) /* Illegal Instruction */ +#define ESR_PPR PPC_BIT(37) /* Privileged Instruction */ +#define ESR_PTR PPC_BIT(38) /* Trap */ +#define ESR_FP PPC_BIT(39) /* Floating-Point Operation */ +#define ESR_ST PPC_BIT(40) /* Store Operation */ +#define ESR_AP PPC_BIT(44) /* Auxiliary Processor Operation */ +#define ESR_PUO PPC_BIT(45) /* Unimplemented Operation */ +#define ESR_BO PPC_BIT(46) /* Byte Ordering */ +#define ESR_PIE PPC_BIT(47) /* Imprecise exception */ +#define ESR_DATA PPC_BIT(53) /* Data Access (Embedded page table) */ +#define ESR_TLBI PPC_BIT(54) /* TLB Ineligible (Embedded page table) */ +#define ESR_PT PPC_BIT(55) /* Page Table (Embedded page table) */ +#define ESR_SPV PPC_BIT(56) /* SPE/VMX operation */ +#define ESR_EPID PPC_BIT(57) /* External Process ID operation */ +#define ESR_VLEMI PPC_BIT(58) /* VLE operation */ +#define ESR_MIF PPC_BIT(62) /* Misaligned instruction (VLE) */ =20 /* Transaction EXception And Summary Register bits = */ #define TEXASR_FAILURE_PERSISTENT (63 - 7) @@ -1991,7 +1998,7 @@ void ppc_compat_add_property(Object *obj, const char = *name, #define HID0_DEEPNAP (1 << 24) /* pre-2.06 */ #define HID0_DOZE (1 << 23) /* pre-2.06 */ #define HID0_NAP (1 << 22) /* pre-2.06 */ -#define HID0_HILE (1ull << (63 - 19)) /* POWER8 */ +#define HID0_HILE PPC_BIT(19) /* POWER8 */ =20 /*************************************************************************= ****/ /* PowerPC Instructions types definitions = */ --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15179472060231008.9063486817823; Tue, 6 Feb 2018 12:00:06 -0800 (PST) Received: from localhost ([::1]:53738 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9PR-0002UY-5W for importer@patchew.org; Tue, 06 Feb 2018 15:00:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44644) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j7-0005k3-77 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:32 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iz-0008GA-15 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:21 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:45282) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iy-0008F6-M8 for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:12 -0500 Received: from pps.filterd (m0098409.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JG6XX119645 for ; Tue, 6 Feb 2018 14:16:11 -0500 Received: from e15.ny.us.ibm.com (e15.ny.us.ibm.com [129.33.205.205]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fygkucwrq-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:10 -0500 Received: from localhost by e15.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted for from ; Tue, 6 Feb 2018 14:16:08 -0500 Received: from b01cxnp22035.gho.pok.ibm.com (9.57.198.25) by e15.ny.us.ibm.com (146.89.104.202) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Tue, 6 Feb 2018 14:16:05 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22035.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG5MN48824412; Tue, 6 Feb 2018 19:16:05 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id A1174AC03F; Tue, 6 Feb 2018 14:17:25 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 67C4BAC048; Tue, 6 Feb 2018 14:17:25 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:09 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0036-0000-0000-000002BA0ADB X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:07 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0037-0000-0000-0000433F817B Message-Id: <20180206191515.25830-49-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 48/54] target/ppc/spapr_caps: Add macro to generate spapr_caps migration vmstate X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh The vmstate description and the contained needed function for migration of spapr_caps is the same for each cap, with the name of the cap substituted. As such introduce a macro to allow for easier generation of these. Convert the three existing spapr_caps (htm, vsx, and dfp) to use this macro. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson (cherry picked from commit 1f63ebaa91f73f469c8f107dbd266cabdbea3a40) Signed-off-by: Michael Roth --- hw/ppc/spapr_caps.c | 78 +++++++++++++++++--------------------------------= ---- 1 file changed, 24 insertions(+), 54 deletions(-) diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index f95a78547d..5b9e305ac3 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -232,62 +232,32 @@ int spapr_caps_post_migration(sPAPRMachineState *spap= r) return ok ? 0 : -EINVAL; } =20 -static bool spapr_cap_htm_needed(void *opaque) -{ - sPAPRMachineState *spapr =3D opaque; - - return spapr->cmd_line_caps[SPAPR_CAP_HTM] && - (spapr->eff.caps[SPAPR_CAP_HTM] !=3D spapr->def.caps[SPAPR_CAP_= HTM]); -} - -const VMStateDescription vmstate_spapr_cap_htm =3D { - .name =3D "spapr/cap/htm", - .version_id =3D 1, - .minimum_version_id =3D 1, - .needed =3D spapr_cap_htm_needed, - .fields =3D (VMStateField[]) { - VMSTATE_UINT8(mig.caps[SPAPR_CAP_HTM], sPAPRMachineState), - VMSTATE_END_OF_LIST() - }, -}; - -static bool spapr_cap_vsx_needed(void *opaque) -{ - sPAPRMachineState *spapr =3D opaque; - - return spapr->cmd_line_caps[SPAPR_CAP_VSX] && - (spapr->eff.caps[SPAPR_CAP_VSX] !=3D spapr->def.caps[SPAPR_CAP_= VSX]); +/* Used to generate the migration field and needed function for a spapr ca= p */ +#define SPAPR_CAP_MIG_STATE(cap, ccap) \ +static bool spapr_cap_##cap##_needed(void *opaque) \ +{ \ + sPAPRMachineState *spapr =3D opaque; \ + \ + return spapr->cmd_line_caps[SPAPR_CAP_##ccap] && \ + (spapr->eff.caps[SPAPR_CAP_##ccap] !=3D \ + spapr->def.caps[SPAPR_CAP_##ccap]); \ +} \ + \ +const VMStateDescription vmstate_spapr_cap_##cap =3D { \ + .name =3D "spapr/cap/" #cap, \ + .version_id =3D 1, \ + .minimum_version_id =3D 1, \ + .needed =3D spapr_cap_##cap##_needed, \ + .fields =3D (VMStateField[]) { \ + VMSTATE_UINT8(mig.caps[SPAPR_CAP_##ccap], \ + sPAPRMachineState), \ + VMSTATE_END_OF_LIST() \ + }, \ } =20 -const VMStateDescription vmstate_spapr_cap_vsx =3D { - .name =3D "spapr/cap/vsx", - .version_id =3D 1, - .minimum_version_id =3D 1, - .needed =3D spapr_cap_vsx_needed, - .fields =3D (VMStateField[]) { - VMSTATE_UINT8(mig.caps[SPAPR_CAP_VSX], sPAPRMachineState), - VMSTATE_END_OF_LIST() - }, -}; - -static bool spapr_cap_dfp_needed(void *opaque) -{ - sPAPRMachineState *spapr =3D opaque; - - return spapr->cmd_line_caps[SPAPR_CAP_DFP] && - (spapr->eff.caps[SPAPR_CAP_DFP] !=3D spapr->def.caps[SPAPR_CAP_= DFP]); -} - -const VMStateDescription vmstate_spapr_cap_dfp =3D { - .name =3D "spapr/cap/dfp", - .version_id =3D 1, - .minimum_version_id =3D 1, - .needed =3D spapr_cap_dfp_needed, - .fields =3D (VMStateField[]) { - VMSTATE_UINT8(mig.caps[SPAPR_CAP_DFP], sPAPRMachineState), - VMSTATE_END_OF_LIST() - }, -}; +SPAPR_CAP_MIG_STATE(htm, HTM); +SPAPR_CAP_MIG_STATE(vsx, VSX); +SPAPR_CAP_MIG_STATE(dfp, DFP); =20 void spapr_caps_reset(sPAPRMachineState *spapr) { --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517946884958111.53632811397858; Tue, 6 Feb 2018 11:54:44 -0800 (PST) Received: from localhost ([::1]:53624 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9KG-0005v3-03 for importer@patchew.org; Tue, 06 Feb 2018 14:54:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44727) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j9-0005lF-TI for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iz-0008Gs-DW for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:23 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:43484) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iz-0008Fi-3n for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:13 -0500 Received: from pps.filterd (m0098394.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JEWC6093783 for ; Tue, 6 Feb 2018 14:16:12 -0500 Received: from e16.ny.us.ibm.com (e16.ny.us.ibm.com [129.33.205.206]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyf63hfj3-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:10 -0500 Received: from localhost by e16.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:06 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG5ir34537596; Tue, 6 Feb 2018 19:16:05 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 4A75AAC03F; Tue, 6 Feb 2018 14:17:26 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 10ED9AC03A; Tue, 6 Feb 2018 14:17:26 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:10 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0024-0000-0000-0000031F7DAA X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500281; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:07 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0025-0000-0000-000046E4B453 Message-Id: <20180206191515.25830-50-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 49/54] target/ppc/kvm: Add cap_ppc_safe_[cache/bounds_check/indirect_branch] X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh Add three new kvm capabilities used to represent the level of host support for three corresponding workarounds. Host support for each of the capabilities is queried through the new ioctl KVM_PPC_GET_CPU_CHAR which returns four uint64 quantities. The first two, character and behaviour, represent the available characteristics of the cpu and the behaviour of the cpu respectively. The second two, c_mask and b_mask, represent the mask of known bits for the character and beheviour dwords respectively. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson [dwg: Correct some compile errors due to name change in final kernel patch version] Signed-off-by: David Gibson (cherry picked from commit 8acc2ae5e91681ceda3ff4cf946ebf163f6012e9) Signed-off-by: Michael Roth --- include/hw/ppc/spapr.h | 12 +++++++++++ target/ppc/kvm.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ target/ppc/kvm_ppc.h | 18 ++++++++++++++++ 3 files changed, 88 insertions(+) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index c9737e6a54..2fda48fa54 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -295,6 +295,18 @@ struct sPAPRMachineState { #define H_DABRX_KERNEL (1ULL<<(63-62)) #define H_DABRX_USER (1ULL<<(63-63)) =20 +/* Values for KVM_PPC_GET_CPU_CHAR & H_GET_CPU_CHARACTERISTICS */ +#define H_CPU_CHAR_SPEC_BAR_ORI31 PPC_BIT(0) +#define H_CPU_CHAR_BCCTRL_SERIALISED PPC_BIT(1) +#define H_CPU_CHAR_L1D_FLUSH_ORI30 PPC_BIT(2) +#define H_CPU_CHAR_L1D_FLUSH_TRIG2 PPC_BIT(3) +#define H_CPU_CHAR_L1D_THREAD_PRIV PPC_BIT(4) +#define H_CPU_CHAR_HON_BRANCH_HINTS PPC_BIT(5) +#define H_CPU_CHAR_THR_RECONF_TRIG PPC_BIT(6) +#define H_CPU_BEHAV_FAVOUR_SECURITY PPC_BIT(0) +#define H_CPU_BEHAV_L1D_FLUSH_PR PPC_BIT(1) +#define H_CPU_BEHAV_BNDS_CHK_SPEC_BAR PPC_BIT(2) + /* Each control block has to be on a 4K boundary */ #define H_CB_ALIGNMENT 4096 =20 diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 81d9bd56c7..368508b679 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -92,6 +92,9 @@ static int cap_mmu_radix; static int cap_mmu_hash_v3; static int cap_resize_hpt; static int cap_ppc_pvr_compat; +static int cap_ppc_safe_cache; +static int cap_ppc_safe_bounds_check; +static int cap_ppc_safe_indirect_branch; =20 static uint32_t debug_inst_opcode; =20 @@ -124,6 +127,7 @@ static bool kvmppc_is_pr(KVMState *ks) } =20 static int kvm_ppc_register_host_cpu_type(MachineState *ms); +static void kvmppc_get_cpu_characteristics(KVMState *s); =20 int kvm_arch_init(MachineState *ms, KVMState *s) { @@ -150,6 +154,7 @@ int kvm_arch_init(MachineState *ms, KVMState *s) cap_mmu_radix =3D kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_RADIX); cap_mmu_hash_v3 =3D kvm_vm_check_extension(s, KVM_CAP_PPC_MMU_HASH_V3); cap_resize_hpt =3D kvm_vm_check_extension(s, KVM_CAP_SPAPR_RESIZE_HPT); + kvmppc_get_cpu_characteristics(s); /* * Note: setting it to false because there is not such capability * in KVM at this moment. @@ -2459,6 +2464,59 @@ bool kvmppc_has_cap_mmu_hash_v3(void) return cap_mmu_hash_v3; } =20 +static void kvmppc_get_cpu_characteristics(KVMState *s) +{ + struct kvm_ppc_cpu_char c; + int ret; + + /* Assume broken */ + cap_ppc_safe_cache =3D 0; + cap_ppc_safe_bounds_check =3D 0; + cap_ppc_safe_indirect_branch =3D 0; + + ret =3D kvm_vm_check_extension(s, KVM_CAP_PPC_GET_CPU_CHAR); + if (!ret) { + return; + } + ret =3D kvm_vm_ioctl(s, KVM_PPC_GET_CPU_CHAR, &c); + if (ret < 0) { + return; + } + /* Parse and set cap_ppc_safe_cache */ + if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_L1D_FLUSH_PR) { + cap_ppc_safe_cache =3D 2; + } else if ((c.character & c.character_mask & H_CPU_CHAR_L1D_THREAD_PRI= V) && + (c.character & c.character_mask + & (H_CPU_CHAR_L1D_FLUSH_ORI30 | H_CPU_CHAR_L1D_FLUSH_TRIG2= ))) { + cap_ppc_safe_cache =3D 1; + } + /* Parse and set cap_ppc_safe_bounds_check */ + if (~c.behaviour & c.behaviour_mask & H_CPU_BEHAV_BNDS_CHK_SPEC_BAR) { + cap_ppc_safe_bounds_check =3D 2; + } else if (c.character & c.character_mask & H_CPU_CHAR_SPEC_BAR_ORI31)= { + cap_ppc_safe_bounds_check =3D 1; + } + /* Parse and set cap_ppc_safe_indirect_branch */ + if (c.character & H_CPU_CHAR_BCCTRL_SERIALISED) { + cap_ppc_safe_indirect_branch =3D 2; + } +} + +int kvmppc_get_cap_safe_cache(void) +{ + return cap_ppc_safe_cache; +} + +int kvmppc_get_cap_safe_bounds_check(void) +{ + return cap_ppc_safe_bounds_check; +} + +int kvmppc_get_cap_safe_indirect_branch(void) +{ + return cap_ppc_safe_indirect_branch; +} + PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void) { uint32_t host_pvr =3D mfpvr(); diff --git a/target/ppc/kvm_ppc.h b/target/ppc/kvm_ppc.h index ecb55493cc..39830baa77 100644 --- a/target/ppc/kvm_ppc.h +++ b/target/ppc/kvm_ppc.h @@ -59,6 +59,9 @@ bool kvmppc_has_cap_fixup_hcalls(void); bool kvmppc_has_cap_htm(void); bool kvmppc_has_cap_mmu_radix(void); bool kvmppc_has_cap_mmu_hash_v3(void); +int kvmppc_get_cap_safe_cache(void); +int kvmppc_get_cap_safe_bounds_check(void); +int kvmppc_get_cap_safe_indirect_branch(void); int kvmppc_enable_hwrng(void); int kvmppc_put_books_sregs(PowerPCCPU *cpu); PowerPCCPUClass *kvm_ppc_get_host_cpu_class(void); @@ -290,6 +293,21 @@ static inline bool kvmppc_has_cap_mmu_hash_v3(void) return false; } =20 +static inline int kvmppc_get_cap_safe_cache(void) +{ + return 0; +} + +static inline int kvmppc_get_cap_safe_bounds_check(void) +{ + return 0; +} + +static inline int kvmppc_get_cap_safe_indirect_branch(void) +{ + return 0; +} + static inline int kvmppc_enable_hwrng(void) { return -1; --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 15179474686221022.4256043052804; Tue, 6 Feb 2018 12:04:28 -0800 (PST) Received: from localhost ([::1]:54348 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9Tf-0006QT-LJ for importer@patchew.org; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:06 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG6bH47906856; Tue, 6 Feb 2018 19:16:06 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E2D7EAC041; Tue, 6 Feb 2018 14:17:26 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id AFE34AC03F; Tue, 6 Feb 2018 14:17:26 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:11 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F59 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:08 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E793 Message-Id: <20180206191515.25830-51-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 50/54] target/ppc/spapr_caps: Add support for tristate spapr_capabilities X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh spapr_caps are used to represent the level of support for various capabilities related to the spapr machine type. Currently there is only support for boolean capabilities. Add support for tristate capabilities by implementing their get/set functions. These capabilities can have the values 0, 1 or 2 corresponding to broken, workaround and fixed. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson (cherry picked from commit 6898aed77f4636c3e77af9c12631f583f22cb5db) Signed-off-by: Michael Roth --- hw/ppc/spapr_caps.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 4 +++ 2 files changed, 70 insertions(+) diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 5b9e305ac3..3a195c8fef 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -74,6 +74,72 @@ static void spapr_cap_set_bool(Object *obj, Visitor *v, = const char *name, spapr->eff.caps[cap->index] =3D value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; } =20 +static void __attribute__ ((unused)) spapr_cap_get_tristate(Object *obj, + Visitor *v, + const char *na= me, + void *opaque, + Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + char *val =3D NULL; + uint8_t value =3D spapr_get_cap(spapr, cap->index); + + switch (value) { + case SPAPR_CAP_BROKEN: + val =3D g_strdup("broken"); + break; + case SPAPR_CAP_WORKAROUND: + val =3D g_strdup("workaround"); + break; + case SPAPR_CAP_FIXED: + val =3D g_strdup("fixed"); + break; + default: + error_setg(errp, "Invalid value (%d) for cap-%s", value, cap->name= ); + return; + } + + visit_type_str(v, name, &val, errp); + g_free(val); +} + +static void __attribute__ ((unused)) spapr_cap_set_tristate(Object *obj, + Visitor *v, + const char *na= me, + void *opaque, + Error **errp) +{ + sPAPRCapabilityInfo *cap =3D opaque; + sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); + char *val; + Error *local_err =3D NULL; + uint8_t value; + + visit_type_str(v, name, &val, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } + + if (!strcasecmp(val, "broken")) { + value =3D SPAPR_CAP_BROKEN; + } else if (!strcasecmp(val, "workaround")) { + value =3D SPAPR_CAP_WORKAROUND; + } else if (!strcasecmp(val, "fixed")) { + value =3D SPAPR_CAP_FIXED; + } else { + error_setg(errp, "Invalid capability mode \"%s\" for cap-%s", val, + cap->name); + goto out; + } + + spapr->cmd_line_caps[cap->index] =3D true; + spapr->eff.caps[cap->index] =3D value; +out: + g_free(val); +} + static void cap_htm_apply(sPAPRMachineState *spapr, uint8_t val, Error **e= rrp) { if (!val) { diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 2fda48fa54..5d78024433 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -69,6 +69,10 @@ typedef enum { /* Bool Caps */ #define SPAPR_CAP_OFF 0x00 #define SPAPR_CAP_ON 0x01 +/* Broken | Workaround | Fixed Caps */ +#define SPAPR_CAP_BROKEN 0x00 +#define SPAPR_CAP_WORKAROUND 0x01 +#define SPAPR_CAP_FIXED 0x02 =20 typedef struct sPAPRCapabilities sPAPRCapabilities; struct sPAPRCapabilities { --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947293673147.13491343334647; Tue, 6 Feb 2018 12:01:33 -0800 (PST) Received: from localhost ([::1]:53831 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9Qm-0003Xg-Lx for importer@patchew.org; Tue, 06 Feb 2018 15:01:28 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44704) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j9-0005lA-Hl for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ej8iz-0008GZ-Ac for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:23 -0500 Received: from mx0a-001b2d01.pphosted.com ([148.163.156.1]:48526) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1ej8iy-0008FR-Ty for qemu-devel@nongnu.org; Tue, 06 Feb 2018 14:16:13 -0500 Received: from pps.filterd (m0098396.ppops.net [127.0.0.1]) by mx0a-001b2d01.pphosted.com (8.16.0.22/8.16.0.22) with SMTP id w16JFLd1057807 for ; Tue, 6 Feb 2018 14:16:12 -0500 Received: from e12.ny.us.ibm.com (e12.ny.us.ibm.com [129.33.205.202]) by mx0a-001b2d01.pphosted.com with ESMTP id 2fyg4xphj0-1 (version=TLSv1.2 cipher=AES256-SHA bits=256 verify=NOT) for ; Tue, 06 Feb 2018 14:16:11 -0500 Received: from localhost by e12.ny.us.ibm.com with IBM ESMTP SMTP Gateway: Authorized Use Only! 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:08 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG7fk42860740; Tue, 6 Feb 2018 19:16:07 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 48783AC043; Tue, 6 Feb 2018 14:17:28 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 0C6BBAC03A; Tue, 6 Feb 2018 14:17:27 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:12 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F5B X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:09 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E79E Message-Id: <20180206191515.25830-52-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 51/54] target/ppc/spapr_caps: Add new tristate cap safe_cache X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh Add new tristate cap cap-cfpc to represent the cache flush on privilege change capability. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson Signed-off-by: David Gibson (cherry picked from commit 8f38eaf8f9dd194c9961cf76c675724930ce4570) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 2 ++ hw/ppc/spapr_caps.c | 36 ++++++++++++++++++++++++++---------- include/hw/ppc/spapr.h | 5 ++++- 3 files changed, 32 insertions(+), 11 deletions(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 6ab39a0e61..37a414ffe6 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1765,6 +1765,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_cap_htm, &vmstate_spapr_cap_vsx, &vmstate_spapr_cap_dfp, + &vmstate_spapr_cap_cfpc, NULL } }; @@ -3709,6 +3710,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->default_caps.caps[SPAPR_CAP_HTM] =3D SPAPR_CAP_OFF; smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; + smc->default_caps.caps[SPAPR_CAP_CFPC] =3D SPAPR_CAP_BROKEN; spapr_caps_add_properties(smc, &error_abort); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 3a195c8fef..183916895c 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -74,11 +74,8 @@ static void spapr_cap_set_bool(Object *obj, Visitor *v, = const char *name, spapr->eff.caps[cap->index] =3D value ? SPAPR_CAP_ON : SPAPR_CAP_OFF; } =20 -static void __attribute__ ((unused)) spapr_cap_get_tristate(Object *obj, - Visitor *v, - const char *na= me, - void *opaque, - Error **errp) +static void spapr_cap_get_tristate(Object *obj, Visitor *v, const char *na= me, + void *opaque, Error **errp) { sPAPRCapabilityInfo *cap =3D opaque; sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); @@ -104,11 +101,8 @@ static void __attribute__ ((unused)) spapr_cap_get_tri= state(Object *obj, g_free(val); } =20 -static void __attribute__ ((unused)) spapr_cap_set_tristate(Object *obj, - Visitor *v, - const char *na= me, - void *opaque, - Error **errp) +static void spapr_cap_set_tristate(Object *obj, Visitor *v, const char *na= me, + void *opaque, Error **errp) { sPAPRCapabilityInfo *cap =3D opaque; sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); @@ -187,6 +181,18 @@ static void cap_dfp_apply(sPAPRMachineState *spapr, ui= nt8_t val, Error **errp) } } =20 +static void cap_safe_cache_apply(sPAPRMachineState *spapr, uint8_t val, + Error **errp) +{ + if (tcg_enabled() && val) { + /* TODO - for now only allow broken for TCG */ + error_setg(errp, "Requested safe cache capability level not suppor= ted by tcg, try a different value for cap-cfpc"); + } else if (kvm_enabled() && (val > kvmppc_get_cap_safe_cache())) { + error_setg(errp, "Requested safe cache capability level not suppor= ted by kvm, try a different value for cap-cfpc"); + } +} + +#define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" =20 sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { [SPAPR_CAP_HTM] =3D { @@ -219,6 +225,15 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = =3D { .type =3D "bool", .apply =3D cap_dfp_apply, }, + [SPAPR_CAP_CFPC] =3D { + .name =3D "cfpc", + .description =3D "Cache Flush on Privilege Change" VALUE_DESC_TRIS= TATE, + .index =3D SPAPR_CAP_CFPC, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .apply =3D cap_safe_cache_apply, + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -324,6 +339,7 @@ const VMStateDescription vmstate_spapr_cap_##cap =3D { = \ SPAPR_CAP_MIG_STATE(htm, HTM); SPAPR_CAP_MIG_STATE(vsx, VSX); SPAPR_CAP_MIG_STATE(dfp, DFP); +SPAPR_CAP_MIG_STATE(cfpc, CFPC); =20 void spapr_caps_reset(sPAPRMachineState *spapr) { diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 5d78024433..fdb80f2118 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -60,8 +60,10 @@ typedef enum { #define SPAPR_CAP_VSX 0x01 /* Decimal Floating Point */ #define SPAPR_CAP_DFP 0x02 +/* Cache Flush on Privilege Change */ +#define SPAPR_CAP_CFPC 0x03 /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_DFP + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_CFPC + 1) =20 /* * Capability Values @@ -761,6 +763,7 @@ int spapr_caps_pre_save(void *opaque); extern const VMStateDescription vmstate_spapr_cap_htm; extern const VMStateDescription vmstate_spapr_cap_vsx; extern const VMStateDescription vmstate_spapr_cap_dfp; +extern const VMStateDescription vmstate_spapr_cap_cfpc; =20 static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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Violators will be prosecuted for from ; Tue, 6 Feb 2018 14:16:11 -0500 Received: from b01cxnp22033.gho.pok.ibm.com (9.57.198.23) by e12.ny.us.ibm.com (146.89.104.199) with IBM ESMTP SMTP Gateway: Authorized Use Only! Violators will be prosecuted; Tue, 6 Feb 2018 14:16:08 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22033.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG8b338535388; Tue, 6 Feb 2018 19:16:08 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id E8770AC03A; Tue, 6 Feb 2018 14:17:28 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id AF414AC03F; Tue, 6 Feb 2018 14:17:28 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:13 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F5C X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:10 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E7A0 Message-Id: <20180206191515.25830-53-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 52/54] target/ppc/spapr_caps: Add new tristate cap safe_bounds_check X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh Add new tristate cap cap-sbbc to represent the speculation barrier bounds checking capability. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson Signed-off-by: David Gibson (cherry picked from commit 09114fd8179977e4157b36aab2e3d68eaf08adca) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 2 ++ hw/ppc/spapr_caps.c | 21 +++++++++++++++++++++ include/hw/ppc/spapr.h | 5 ++++- 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 37a414ffe6..0db86a7945 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1766,6 +1766,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_cap_vsx, &vmstate_spapr_cap_dfp, &vmstate_spapr_cap_cfpc, + &vmstate_spapr_cap_sbbc, NULL } }; @@ -3711,6 +3712,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->default_caps.caps[SPAPR_CAP_VSX] =3D SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_CFPC] =3D SPAPR_CAP_BROKEN; + smc->default_caps.caps[SPAPR_CAP_SBBC] =3D SPAPR_CAP_BROKEN; spapr_caps_add_properties(smc, &error_abort); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 183916895c..680cb6f0e5 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -192,6 +192,17 @@ static void cap_safe_cache_apply(sPAPRMachineState *sp= apr, uint8_t val, } } =20 +static void cap_safe_bounds_check_apply(sPAPRMachineState *spapr, uint8_t = val, + Error **errp) +{ + if (tcg_enabled() && val) { + /* TODO - for now only allow broken for TCG */ + error_setg(errp, "Requested safe bounds check capability level not= supported by tcg, try a different value for cap-sbbc"); + } else if (kvm_enabled() && (val > kvmppc_get_cap_safe_bounds_check())= ) { + error_setg(errp, "Requested safe bounds check capability level not= supported by kvm, try a different value for cap-sbbc"); + } +} + #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" =20 sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { @@ -234,6 +245,15 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = =3D { .type =3D "string", .apply =3D cap_safe_cache_apply, }, + [SPAPR_CAP_SBBC] =3D { + .name =3D "sbbc", + .description =3D "Speculation Barrier Bounds Checking" VALUE_DESC_= TRISTATE, + .index =3D SPAPR_CAP_SBBC, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .apply =3D cap_safe_bounds_check_apply, + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -340,6 +360,7 @@ SPAPR_CAP_MIG_STATE(htm, HTM); SPAPR_CAP_MIG_STATE(vsx, VSX); SPAPR_CAP_MIG_STATE(dfp, DFP); SPAPR_CAP_MIG_STATE(cfpc, CFPC); +SPAPR_CAP_MIG_STATE(sbbc, SBBC); =20 void spapr_caps_reset(sPAPRMachineState *spapr) { diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index fdb80f2118..f272a304d3 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -62,8 +62,10 @@ typedef enum { #define SPAPR_CAP_DFP 0x02 /* Cache Flush on Privilege Change */ #define SPAPR_CAP_CFPC 0x03 +/* Speculation Barrier Bounds Checking */ +#define SPAPR_CAP_SBBC 0x04 /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_CFPC + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_SBBC + 1) =20 /* * Capability Values @@ -764,6 +766,7 @@ extern const VMStateDescription vmstate_spapr_cap_htm; extern const VMStateDescription vmstate_spapr_cap_vsx; extern const VMStateDescription vmstate_spapr_cap_dfp; extern const VMStateDescription vmstate_spapr_cap_cfpc; +extern const VMStateDescription vmstate_spapr_cap_sbbc; =20 static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947920465507.6613460449679; Tue, 6 Feb 2018 12:12:00 -0800 (PST) Received: from localhost ([::1]:55386 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9ax-0005rs-Ia for importer@patchew.org; Tue, 06 Feb 2018 15:11:59 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44803) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8jD-0005pO-1T for qemu-devel@nongnu.org; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:09 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp23032.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG9fe43188396; Tue, 6 Feb 2018 19:16:09 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 9567EAC03F; Tue, 6 Feb 2018 14:17:29 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 5C646AC03A; Tue, 6 Feb 2018 14:17:29 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:14 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0036-0000-0000-000002BA0ADF X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985885; UDB=6.00500282; IPR=6.00765253; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:11 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0037-0000-0000-0000433F8184 Message-Id: <20180206191515.25830-54-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=1 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.158.5 Subject: [Qemu-devel] [PATCH 53/54] target/ppc/spapr_caps: Add new tristate cap safe_indirect_branch X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh Add new tristate cap cap-ibs to represent the indirect branch serialisation capability. Signed-off-by: Suraj Jitindar Singh Reviewed-by: David Gibson Signed-off-by: David Gibson (cherry picked from commit 4be8d4e7d935fc8919d61f53a0f0fb7230052bb3) Signed-off-by: Michael Roth --- hw/ppc/spapr.c | 2 ++ hw/ppc/spapr_caps.c | 21 +++++++++++++++++++++ include/hw/ppc/spapr.h | 5 ++++- 3 files changed, 27 insertions(+), 1 deletion(-) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 0db86a7945..b57528baf4 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -1767,6 +1767,7 @@ static const VMStateDescription vmstate_spapr =3D { &vmstate_spapr_cap_dfp, &vmstate_spapr_cap_cfpc, &vmstate_spapr_cap_sbbc, + &vmstate_spapr_cap_ibs, NULL } }; @@ -3713,6 +3714,7 @@ static void spapr_machine_class_init(ObjectClass *oc,= void *data) smc->default_caps.caps[SPAPR_CAP_DFP] =3D SPAPR_CAP_ON; smc->default_caps.caps[SPAPR_CAP_CFPC] =3D SPAPR_CAP_BROKEN; smc->default_caps.caps[SPAPR_CAP_SBBC] =3D SPAPR_CAP_BROKEN; + smc->default_caps.caps[SPAPR_CAP_IBS] =3D SPAPR_CAP_BROKEN; spapr_caps_add_properties(smc, &error_abort); } =20 diff --git a/hw/ppc/spapr_caps.c b/hw/ppc/spapr_caps.c index 680cb6f0e5..7b229517be 100644 --- a/hw/ppc/spapr_caps.c +++ b/hw/ppc/spapr_caps.c @@ -203,6 +203,17 @@ static void cap_safe_bounds_check_apply(sPAPRMachineSt= ate *spapr, uint8_t val, } } =20 +static void cap_safe_indirect_branch_apply(sPAPRMachineState *spapr, + uint8_t val, Error **errp) +{ + if (tcg_enabled() && val) { + /* TODO - for now only allow broken for TCG */ + error_setg(errp, "Requested safe indirect branch capability level = not supported by tcg, try a different value for cap-ibs"); + } else if (kvm_enabled() && (val > kvmppc_get_cap_safe_indirect_branch= ())) { + error_setg(errp, "Requested safe indirect branch capability level = not supported by kvm, try a different value for cap-ibs"); + } +} + #define VALUE_DESC_TRISTATE " (broken, workaround, fixed)" =20 sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] =3D { @@ -254,6 +265,15 @@ sPAPRCapabilityInfo capability_table[SPAPR_CAP_NUM] = =3D { .type =3D "string", .apply =3D cap_safe_bounds_check_apply, }, + [SPAPR_CAP_IBS] =3D { + .name =3D "ibs", + .description =3D "Indirect Branch Serialisation" VALUE_DESC_TRISTA= TE, + .index =3D SPAPR_CAP_IBS, + .get =3D spapr_cap_get_tristate, + .set =3D spapr_cap_set_tristate, + .type =3D "string", + .apply =3D cap_safe_indirect_branch_apply, + }, }; =20 static sPAPRCapabilities default_caps_with_cpu(sPAPRMachineState *spapr, @@ -361,6 +381,7 @@ SPAPR_CAP_MIG_STATE(vsx, VSX); SPAPR_CAP_MIG_STATE(dfp, DFP); SPAPR_CAP_MIG_STATE(cfpc, CFPC); SPAPR_CAP_MIG_STATE(sbbc, SBBC); +SPAPR_CAP_MIG_STATE(ibs, IBS); =20 void spapr_caps_reset(sPAPRMachineState *spapr) { diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index f272a304d3..9e7be34d4e 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -64,8 +64,10 @@ typedef enum { #define SPAPR_CAP_CFPC 0x03 /* Speculation Barrier Bounds Checking */ #define SPAPR_CAP_SBBC 0x04 +/* Indirect Branch Serialisation */ +#define SPAPR_CAP_IBS 0x05 /* Num Caps */ -#define SPAPR_CAP_NUM (SPAPR_CAP_SBBC + 1) +#define SPAPR_CAP_NUM (SPAPR_CAP_IBS + 1) =20 /* * Capability Values @@ -767,6 +769,7 @@ extern const VMStateDescription vmstate_spapr_cap_vsx; extern const VMStateDescription vmstate_spapr_cap_dfp; extern const VMStateDescription vmstate_spapr_cap_cfpc; extern const VMStateDescription vmstate_spapr_cap_sbbc; +extern const VMStateDescription vmstate_spapr_cap_ibs; =20 static inline uint8_t spapr_get_cap(sPAPRMachineState *spapr, int cap) { --=20 2.11.0 From nobody Mon Apr 29 16:00:11 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1517947689438483.87404524528085; Tue, 6 Feb 2018 12:08:09 -0800 (PST) Received: from localhost ([::1]:54643 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej9XE-0001YU-Dc for importer@patchew.org; Tue, 06 Feb 2018 15:08:08 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:44688) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ej8j9-0005l7-HY for qemu-devel@nongnu.org; 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Violators will be prosecuted; Tue, 6 Feb 2018 14:16:10 -0500 Received: from b01ledav006.gho.pok.ibm.com (b01ledav006.gho.pok.ibm.com [9.57.199.111]) by b01cxnp22036.gho.pok.ibm.com (8.14.9/8.14.9/NCO v10.0) with ESMTP id w16JG90D47906884; Tue, 6 Feb 2018 19:16:09 GMT Received: from b01ledav006.gho.pok.ibm.com (unknown [127.0.0.1]) by IMSVA (Postfix) with ESMTP id 441A9AC041; Tue, 6 Feb 2018 14:17:30 -0500 (EST) Received: from localhost (unknown [9.80.97.150]) by b01ledav006.gho.pok.ibm.com (Postfix) with ESMTP id 081C3AC043; Tue, 6 Feb 2018 14:17:29 -0500 (EST) From: Michael Roth To: qemu-devel@nongnu.org Date: Tue, 6 Feb 2018 13:15:15 -0600 X-Mailer: git-send-email 2.11.0 In-Reply-To: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> References: <20180206191515.25830-1-mdroth@linux.vnet.ibm.com> X-TM-AS-GCONF: 00 x-cbid: 18020619-0048-0000-0000-000002332F60 X-IBM-SpamModules-Scores: X-IBM-SpamModules-Versions: BY=3.00008485; HX=3.00000241; KW=3.00000007; PH=3.00000004; SC=3.00000248; SDB=6.00985886; UDB=6.00500282; IPR=6.00765252; BA=6.00005813; NDR=6.00000001; ZLA=6.00000005; ZF=6.00000009; ZB=6.00000000; ZP=6.00000000; ZH=6.00000000; ZU=6.00000002; MB=3.00019407; XFM=3.00000015; UTC=2018-02-06 19:16:11 X-IBM-AV-DETECTION: SAVI=unused REMOTE=unused XFE=unused x-cbparentid: 18020619-0049-0000-0000-00004409E7A7 Message-Id: <20180206191515.25830-55-mdroth@linux.vnet.ibm.com> X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10432:, , definitions=2018-02-06_09:, , signatures=0 X-Proofpoint-Spam-Details: rule=outbound_notspam policy=outbound score=0 priorityscore=1501 malwarescore=0 suspectscore=3 phishscore=0 bulkscore=0 spamscore=0 clxscore=1015 lowpriorityscore=0 impostorscore=0 adultscore=0 classifier=spam adjust=0 reason=mlx scancount=1 engine=8.0.1-1709140000 definitions=main-1802060241 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [generic] [fuzzy] X-Received-From: 148.163.156.1 Subject: [Qemu-devel] [PATCH 54/54] target/ppc/spapr: Add H-Call H_GET_CPU_CHARACTERISTICS X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: David Gibson , qemu-stable@nongnu.org, christian.ehrhardt@canonical.com, Suraj Jitindar Singh Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Suraj Jitindar Singh The new H-Call H_GET_CPU_CHARACTERISTICS is used by the guest to query behaviours and available characteristics of the cpu. Implement the handler for this new H-Call which formulates its response based on the setting of the spapr_caps cap-cfpc, cap-sbbc and cap-ibs. Signed-off-by: Suraj Jitindar Singh Signed-off-by: David Gibson (cherry picked from commit c59704b254734182c3202e0c261589ea2ccf485e) Signed-off-by: Michael Roth --- hw/ppc/spapr_hcall.c | 58 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/spapr.h | 1 + 2 files changed, 59 insertions(+) diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c index be22a6b289..0e1a0aed76 100644 --- a/hw/ppc/spapr_hcall.c +++ b/hw/ppc/spapr_hcall.c @@ -1655,6 +1655,60 @@ static target_ulong h_client_architecture_support(Po= werPCCPU *cpu, return H_SUCCESS; } =20 +static target_ulong h_get_cpu_characteristics(PowerPCCPU *cpu, + sPAPRMachineState *spapr, + target_ulong opcode, + target_ulong *args) +{ + uint64_t characteristics =3D H_CPU_CHAR_HON_BRANCH_HINTS & + ~H_CPU_CHAR_THR_RECONF_TRIG; + uint64_t behaviour =3D H_CPU_BEHAV_FAVOUR_SECURITY; + uint8_t safe_cache =3D spapr_get_cap(spapr, SPAPR_CAP_CFPC); + uint8_t safe_bounds_check =3D spapr_get_cap(spapr, SPAPR_CAP_SBBC); + uint8_t safe_indirect_branch =3D spapr_get_cap(spapr, SPAPR_CAP_IBS); + + switch (safe_cache) { + case SPAPR_CAP_WORKAROUND: + characteristics |=3D H_CPU_CHAR_L1D_FLUSH_ORI30; + characteristics |=3D H_CPU_CHAR_L1D_FLUSH_TRIG2; + characteristics |=3D H_CPU_CHAR_L1D_THREAD_PRIV; + behaviour |=3D H_CPU_BEHAV_L1D_FLUSH_PR; + break; + case SPAPR_CAP_FIXED: + break; + default: /* broken */ + assert(safe_cache =3D=3D SPAPR_CAP_BROKEN); + behaviour |=3D H_CPU_BEHAV_L1D_FLUSH_PR; + break; + } + + switch (safe_bounds_check) { + case SPAPR_CAP_WORKAROUND: + characteristics |=3D H_CPU_CHAR_SPEC_BAR_ORI31; + behaviour |=3D H_CPU_BEHAV_BNDS_CHK_SPEC_BAR; + break; + case SPAPR_CAP_FIXED: + break; + default: /* broken */ + assert(safe_bounds_check =3D=3D SPAPR_CAP_BROKEN); + behaviour |=3D H_CPU_BEHAV_BNDS_CHK_SPEC_BAR; + break; + } + + switch (safe_indirect_branch) { + case SPAPR_CAP_FIXED: + characteristics |=3D H_CPU_CHAR_BCCTRL_SERIALISED; + default: /* broken */ + assert(safe_indirect_branch =3D=3D SPAPR_CAP_BROKEN); + break; + } + + args[0] =3D characteristics; + args[1] =3D behaviour; + + return H_SUCCESS; +} + static spapr_hcall_fn papr_hypercall_table[(MAX_HCALL_OPCODE / 4) + 1]; static spapr_hcall_fn kvmppc_hypercall_table[KVMPPC_HCALL_MAX - KVMPPC_HCA= LL_BASE + 1]; =20 @@ -1734,6 +1788,10 @@ static void hypercall_register_types(void) spapr_register_hypercall(H_INVALIDATE_PID, h_invalidate_pid); spapr_register_hypercall(H_REGISTER_PROC_TBL, h_register_process_table= ); =20 + /* hcall-get-cpu-characteristics */ + spapr_register_hypercall(H_GET_CPU_CHARACTERISTICS, + h_get_cpu_characteristics); + /* "debugger" hcalls (also used by SLOF). Note: We do -not- differenci= ate * here between the "CI" and the "CACHE" variants, they will use whate= ver * mapping attributes qemu is using. When using KVM, the kernel will diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 9e7be34d4e..363ffd71c4 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -404,6 +404,7 @@ struct sPAPRMachineState { #define H_GET_HCA_INFO 0x1B8 #define H_GET_PERF_COUNT 0x1BC #define H_MANAGE_TRACE 0x1C0 +#define H_GET_CPU_CHARACTERISTICS 0x1C8 #define H_FREE_LOGICAL_LAN_BUFFER 0x1D4 #define H_QUERY_INT_STATE 0x1E4 #define H_POLL_PENDING 0x1D8 --=20 2.11.0