[Qemu-devel] [PATCH v2 0/7] target/m68k: supervisor mode (part 2)

Laurent Vivier posted 7 patches 6 years, 3 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20180113004338.16867-1-laurent@vivier.eu
Test checkpatch failed
Test docker passed
Test ppc passed
Test s390x passed
There is a newer version of this series
accel/tcg/cputlb.c            |  13 +-
accel/tcg/softmmu_template.h  |  14 +-
accel/tcg/user-exec.c         |   2 +-
hmp-commands-info.hx          |   2 +-
include/exec/exec-all.h       |   6 +-
include/qom/cpu.h             |   2 +-
target/alpha/cpu.h            |   2 +-
target/alpha/helper.c         |   4 +-
target/alpha/mem_helper.c     |   6 +-
target/arm/cpu.c              |   4 +-
target/arm/op_helper.c        |   4 +-
target/cris/cpu.h             |   2 +-
target/cris/helper.c          |   4 +-
target/cris/op_helper.c       |   6 +-
target/hppa/cpu.h             |   3 +-
target/hppa/helper.c          |   2 +-
target/hppa/op_helper.c       |   2 +-
target/i386/cpu.h             |   2 +-
target/i386/excp_helper.c     |   4 +-
target/i386/mem_helper.c      |   6 +-
target/lm32/cpu.h             |   2 +-
target/lm32/helper.c          |   2 +-
target/lm32/op_helper.c       |   6 +-
target/m68k/cpu.c             |   4 +-
target/m68k/cpu.h             | 145 +++++++++-
target/m68k/helper.c          | 604 +++++++++++++++++++++++++++++++++++++++++-
target/m68k/helper.h          |   2 +
target/m68k/monitor.c         |  22 ++
target/m68k/op_helper.c       | 101 ++++++-
target/m68k/qregs.def         |   2 +
target/m68k/translate.c       | 247 ++++++++++++-----
target/microblaze/cpu.h       |   2 +-
target/microblaze/helper.c    |   4 +-
target/microblaze/op_helper.c |   6 +-
target/mips/helper.c          |   2 +-
target/mips/internal.h        |   2 +-
target/mips/op_helper.c       |  10 +-
target/moxie/cpu.h            |   2 +-
target/moxie/helper.c         |  10 +-
target/nios2/cpu.h            |   2 +-
target/nios2/helper.c         |   6 +-
target/nios2/mmu.c            |   6 +-
target/openrisc/cpu.h         |   2 +-
target/openrisc/mmu.c         |   8 +-
target/openrisc/mmu_helper.c  |   6 +-
target/ppc/cpu.h              |   2 +-
target/ppc/mmu_helper.c       |   4 +-
target/ppc/user_only_helper.c |   2 +-
target/s390x/excp_helper.c    |   4 +-
target/s390x/internal.h       |   2 +-
target/s390x/mem_helper.c     |   8 +-
target/sh4/cpu.h              |   2 +-
target/sh4/helper.c           |   4 +-
target/sh4/op_helper.c        |   6 +-
target/sparc/cpu.h            |   2 +-
target/sparc/ldst_helper.c    |   6 +-
target/sparc/mmu_helper.c     |   6 +-
target/tilegx/cpu.c           |   4 +-
target/tricore/op_helper.c    |   4 +-
target/unicore32/cpu.h        |   2 +-
target/unicore32/helper.c     |   2 +-
target/unicore32/op_helper.c  |   6 +-
target/unicore32/softmmu.c    |   2 +-
target/xtensa/op_helper.c     |   4 +-
64 files changed, 1166 insertions(+), 201 deletions(-)
[Qemu-devel] [PATCH v2 0/7] target/m68k: supervisor mode (part 2)
Posted by Laurent Vivier 6 years, 3 months ago
This series introduces the MC68040 MMU.

But first of all, we need to modify the prototype
of tlb_fill() and handle_mmu_fault handler to pass
the size of the access. MC68040 stores this value
in the exception stack frame.

Following patches add:
- MMU page table and fault handlers,
- Transparent Translation Registers
- instruction "moves" to move data
  between user and kernel space
- instructions pflush/ptest, to flush TLB and
  convert virtual address to physical address
- "info tlb" HMP command

I have tested it doesn't break QEMU linux-user mode
emulation and coldfire softmmu machine.

With the help of these patches I'm able to start
a debian etch-m68k, but the following patches
are still missing in master:
- m68k softfloat series
- Quadra 800 machine emulation series
  (VIA emulation, Nubus emulation,
   ESCC control/data address bit selector,
   video card emulation, ESP Pseudo-DMA,
   SWIM floppy controller, Apple Sound Chip
   emulation, and some big-endian fixes for
   dp8393x)

v2: use "0" for the access size when we don't know
    the size of the access
    move mmu_fault to CPUM68KState
    set TARGET_PAGE_BITS to 12 to avoid tlb_add_large_page() path
    use -page_size to mask address instead of TARGET_PAGE_MASK
    add ACCESS_DEBUG to not update page table USED/MODIFIED bits
    on gdb access
    rename ACCESS_INT to ACCESS_DATA
    add index parameter to gen_load()/gen_store()
    copy bit 2 of SFC and DFC to tb->flags to
    inline memory access in moves decoder
    change ACCESS_PTEST value because of new ACCESS_DEBUG

Laurent Vivier (7):
  accel/tcg: add size paremeter in tlb_fill()
  target/m68k: add MC68040 MMU
  target/m68k: add Transparent Translation
  target/m68k: add index parameter to gen_load()/gen_store() and Co.
  target/m68k: add moves
  target/m68k: add pflush/ptest
  target/m68k: add HMP command "info tlb"

 accel/tcg/cputlb.c            |  13 +-
 accel/tcg/softmmu_template.h  |  14 +-
 accel/tcg/user-exec.c         |   2 +-
 hmp-commands-info.hx          |   2 +-
 include/exec/exec-all.h       |   6 +-
 include/qom/cpu.h             |   2 +-
 target/alpha/cpu.h            |   2 +-
 target/alpha/helper.c         |   4 +-
 target/alpha/mem_helper.c     |   6 +-
 target/arm/cpu.c              |   4 +-
 target/arm/op_helper.c        |   4 +-
 target/cris/cpu.h             |   2 +-
 target/cris/helper.c          |   4 +-
 target/cris/op_helper.c       |   6 +-
 target/hppa/cpu.h             |   3 +-
 target/hppa/helper.c          |   2 +-
 target/hppa/op_helper.c       |   2 +-
 target/i386/cpu.h             |   2 +-
 target/i386/excp_helper.c     |   4 +-
 target/i386/mem_helper.c      |   6 +-
 target/lm32/cpu.h             |   2 +-
 target/lm32/helper.c          |   2 +-
 target/lm32/op_helper.c       |   6 +-
 target/m68k/cpu.c             |   4 +-
 target/m68k/cpu.h             | 145 +++++++++-
 target/m68k/helper.c          | 604 +++++++++++++++++++++++++++++++++++++++++-
 target/m68k/helper.h          |   2 +
 target/m68k/monitor.c         |  22 ++
 target/m68k/op_helper.c       | 101 ++++++-
 target/m68k/qregs.def         |   2 +
 target/m68k/translate.c       | 247 ++++++++++++-----
 target/microblaze/cpu.h       |   2 +-
 target/microblaze/helper.c    |   4 +-
 target/microblaze/op_helper.c |   6 +-
 target/mips/helper.c          |   2 +-
 target/mips/internal.h        |   2 +-
 target/mips/op_helper.c       |  10 +-
 target/moxie/cpu.h            |   2 +-
 target/moxie/helper.c         |  10 +-
 target/nios2/cpu.h            |   2 +-
 target/nios2/helper.c         |   6 +-
 target/nios2/mmu.c            |   6 +-
 target/openrisc/cpu.h         |   2 +-
 target/openrisc/mmu.c         |   8 +-
 target/openrisc/mmu_helper.c  |   6 +-
 target/ppc/cpu.h              |   2 +-
 target/ppc/mmu_helper.c       |   4 +-
 target/ppc/user_only_helper.c |   2 +-
 target/s390x/excp_helper.c    |   4 +-
 target/s390x/internal.h       |   2 +-
 target/s390x/mem_helper.c     |   8 +-
 target/sh4/cpu.h              |   2 +-
 target/sh4/helper.c           |   4 +-
 target/sh4/op_helper.c        |   6 +-
 target/sparc/cpu.h            |   2 +-
 target/sparc/ldst_helper.c    |   6 +-
 target/sparc/mmu_helper.c     |   6 +-
 target/tilegx/cpu.c           |   4 +-
 target/tricore/op_helper.c    |   4 +-
 target/unicore32/cpu.h        |   2 +-
 target/unicore32/helper.c     |   2 +-
 target/unicore32/op_helper.c  |   6 +-
 target/unicore32/softmmu.c    |   2 +-
 target/xtensa/op_helper.c     |   4 +-
 64 files changed, 1166 insertions(+), 201 deletions(-)

-- 
2.14.3


Re: [Qemu-devel] [PATCH v2 0/7] target/m68k: supervisor mode (part 2)
Posted by no-reply@patchew.org 6 years, 3 months ago
Hi,

This series seems to have some coding style problems. See output below for
more information:

Type: series
Message-id: 20180113004338.16867-1-laurent@vivier.eu
Subject: [Qemu-devel] [PATCH v2 0/7] target/m68k: supervisor mode (part 2)

=== TEST SCRIPT BEGIN ===
#!/bin/bash

BASE=base
n=1
total=$(git log --oneline $BASE.. | wc -l)
failed=0

git config --local diff.renamelimit 0
git config --local diff.renames True

commits="$(git log --format=%H --reverse $BASE..)"
for c in $commits; do
    echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..."
    if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then
        failed=1
        echo
    fi
    n=$((n+1))
done

exit $failed
=== TEST SCRIPT END ===

Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
Switched to a new branch 'test'
9220bb87f5 target/m68k: add HMP command "info tlb"
b44e08dab0 target/m68k: add pflush/ptest
57cd7dca74 target/m68k: add moves
a050513d8b target/m68k: add index parameter to gen_load()/gen_store() and Co.
5dde4ae837 target/m68k: add Transparent Translation
af87360514 target/m68k: add MC68040 MMU
f316363523 accel/tcg: add size paremeter in tlb_fill()

=== OUTPUT BEGIN ===
Checking PATCH 1/7: accel/tcg: add size paremeter in tlb_fill()...
Checking PATCH 2/7: target/m68k: add MC68040 MMU...
Checking PATCH 3/7: target/m68k: add Transparent Translation...
Checking PATCH 4/7: target/m68k: add index parameter to gen_load()/gen_store() and Co....
ERROR: "foo * bar" should be "foo *bar"
#26: FILE: target/m68k/translate.c:284:
+static inline TCGv gen_load(DisasContext * s, int opsize, TCGv addr,

WARNING: line over 80 characters
#132: FILE: target/m68k/translate.c:945:
+static void gen_load_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, int index)

WARNING: line over 80 characters
#145: FILE: target/m68k/translate.c:999:
+static void gen_store_fp(DisasContext *s, int opsize, TCGv addr, TCGv_ptr fp, int index)

WARNING: line over 80 characters
#421: FILE: target/m68k/translate.c:4850:
+        if (gen_ea_fp(env, s, insn, opsize, cpu_src, EA_STORE, IS_USER(s)) == -1) {

WARNING: line over 80 characters
#430: FILE: target/m68k/translate.c:4872:
+        if (gen_ea_fp(env, s, insn, opsize, cpu_src, EA_LOADS, IS_USER(s)) == -1) {

total: 1 errors, 4 warnings, 387 lines checked

Your patch has style problems, please review.  If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.

Checking PATCH 5/7: target/m68k: add moves...
Checking PATCH 6/7: target/m68k: add pflush/ptest...
Checking PATCH 7/7: target/m68k: add HMP command "info tlb"...
=== OUTPUT END ===

Test command exited with code: 1


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