Hi everyone,

This patchset is a spin-off from original i.MX7 support submission
found here [1], containing all of the patchest that are more or less
agreed upon and are ready (hopefully!) for inclusion.

Changes since [1]:

	- Rx buffer in FEC was moved from stack to heap to allow
          worry-free expansion to 16K limit.

 	- Added more comments explaining rather convoluted bit-moving
          in eSHDC emuation code

	- Triple Tx ring DMA "VMState" code was changed to follow
          Peter's recommendations (avoiding the need to incrememnt the
          version_id)

	- FSL_IMX25_FEC_SIZE is used as a size of FEC's register file

	- Removed leftover code from "imx_fec: Change queue flushing
          heuristics"

[1] https://lists.gnu.org/archive/html/qemu-arm/2017-11/msg00045.html


Andrey Smirnov (13):
  imx_fec: Do not link to netdev
  imx_fec: Refactor imx_eth_enable_rx()
  imx_fec: Change queue flushing heuristicsw
  imx_fec: Move Tx frame buffer away from the stack
  imx_fec: Use ENET_FTRL to determine truncation length
  imx_fec: Use MIN instead of explicit ternary operator
  imx_fec: Emulate SHIFT16 in ENETx_RACC
  imx_fec: Add support for multiple Tx DMA rings
  imx_fec: Use correct length for packet size
  imx_fec: Fix a typo in imx_enet_receive()
  imx_fec: Reserve full FSL_IMX25_FEC_SIZE page for the register file
  sdhci: Add i.MX specific subtype of SDHCI
  sdhci: Implement write method of ACMD12ERRSTS register

 hw/arm/fsl-imx6.c          |   1 +
 hw/net/imx_fec.c           | 210 ++++++++++++++++++++++++++++++++---------
 hw/sd/sdhci-internal.h     |  19 ++++
 hw/sd/sdhci.c              | 231 ++++++++++++++++++++++++++++++++++++++++++++-
 include/hw/arm/fsl-imx25.h |   1 -
 include/hw/net/imx_fec.h   |  27 +++++-
 include/hw/sd/sdhci.h      |   8 ++
 7 files changed, 444 insertions(+), 53 deletions(-)

-- 
2.14.3

On 11 December 2017 at 21:29, Andrey Smirnov <andrew.smirnov@gmail.com> wrote:
> Hi everyone,
>
> This patchset is a spin-off from original i.MX7 support submission
> found here [1], containing all of the patchest that are more or less
> agreed upon and are ready (hopefully!) for inclusion.
>
> Changes since [1]:
>
>         - Rx buffer in FEC was moved from stack to heap to allow
>           worry-free expansion to 16K limit.
>
>         - Added more comments explaining rather convoluted bit-moving
>           in eSHDC emuation code
>
>         - Triple Tx ring DMA "VMState" code was changed to follow
>           Peter's recommendations (avoiding the need to incrememnt the
>           version_id)
>
>         - FSL_IMX25_FEC_SIZE is used as a size of FEC's register file
>
>         - Removed leftover code from "imx_fec: Change queue flushing
>           heuristics"
>
> [1] https://lists.gnu.org/archive/html/qemu-arm/2017-11/msg00045.html

Hi; thanks for sending this set separately. Patch 4 ("Move Tx frame buffer
away from the stack") seems to have got lost -- it isn't in the mailing
list archives or my mailbox. Could you try resending that one?

Incidentally we should use the new i.MX SDHCI controller in the
imx6: coincidentally somebody ran into this bug recently:
https://stackoverflow.com/questions/47538951/qemu-freescale-i-mx6-duallite-sabre-root-filesystem-does-not-mount/47552596

I'll retest that this patchset works with my imx6 image, and
send a patch to sit on top of it to switch imx6 over to TYPE_IMX_USDHC.

thanks
-- PMM

Hi Andrey, Peter,

On 12/12/2017 02:40 PM, Peter Maydell wrote:
> On 11 December 2017 at 21:29, Andrey Smirnov <andrew.smirnov@gmail.com> wrote:
>> Hi everyone,
>>
>> This patchset is a spin-off from original i.MX7 support submission
>> found here [1], containing all of the patchest that are more or less
>> agreed upon and are ready (hopefully!) for inclusion.
[...]
> Incidentally we should use the new i.MX SDHCI controller in the
> imx6: coincidentally somebody ran into this bug recently:
> https://stackoverflow.com/questions/47538951/qemu-freescale-i-mx6-duallite-sabre-root-filesystem-does-not-mount/47552596
> 
> I'll retest that this patchset works with my imx6 image, and
> send a patch to sit on top of it to switch imx6 over to TYPE_IMX_USDHC.

If you don't mind, I'd like to take the patches 12/13 (SDHCI) and adapt
them to the SDHCI series I'm working on, to avoid a big diverge/clash.

Regards,

Phil.

On Wed, Dec 13, 2017 at 6:09 PM, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> Hi Andrey, Peter,
>
> On 12/12/2017 02:40 PM, Peter Maydell wrote:
>> On 11 December 2017 at 21:29, Andrey Smirnov <andrew.smirnov@gmail.com> wrote:
>>> Hi everyone,
>>>
>>> This patchset is a spin-off from original i.MX7 support submission
>>> found here [1], containing all of the patchest that are more or less
>>> agreed upon and are ready (hopefully!) for inclusion.
> [...]
>> Incidentally we should use the new i.MX SDHCI controller in the
>> imx6: coincidentally somebody ran into this bug recently:
>> https://stackoverflow.com/questions/47538951/qemu-freescale-i-mx6-duallite-sabre-root-filesystem-does-not-mount/47552596
>>
>> I'll retest that this patchset works with my imx6 image, and
>> send a patch to sit on top of it to switch imx6 over to TYPE_IMX_USDHC.
>
> If you don't mind, I'd like to take the patches 12/13 (SDHCI) and adapt
> them to the SDHCI series I'm working on, to avoid a big diverge/clash.
>

I am fine with patches going in either way. I'll submit a v2 of my
patchset and if we decide to push SD portion of it as a part of your
work, then you can just pick those from there.

Thanks,
Andrey Smirnov

On Tue, Dec 12, 2017 at 9:40 AM, Peter Maydell <peter.maydell@linaro.org> wrote:
> On 11 December 2017 at 21:29, Andrey Smirnov <andrew.smirnov@gmail.com> wrote:
>> Hi everyone,
>>
>> This patchset is a spin-off from original i.MX7 support submission
>> found here [1], containing all of the patchest that are more or less
>> agreed upon and are ready (hopefully!) for inclusion.
>>
>> Changes since [1]:
>>
>>         - Rx buffer in FEC was moved from stack to heap to allow
>>           worry-free expansion to 16K limit.
>>
>>         - Added more comments explaining rather convoluted bit-moving
>>           in eSHDC emuation code
>>
>>         - Triple Tx ring DMA "VMState" code was changed to follow
>>           Peter's recommendations (avoiding the need to incrememnt the
>>           version_id)
>>
>>         - FSL_IMX25_FEC_SIZE is used as a size of FEC's register file
>>
>>         - Removed leftover code from "imx_fec: Change queue flushing
>>           heuristics"
>>
>> [1] https://lists.gnu.org/archive/html/qemu-arm/2017-11/msg00045.html
>
> Hi; thanks for sending this set separately. Patch 4 ("Move Tx frame buffer
> away from the stack") seems to have got lost -- it isn't in the mailing
> list archives or my mailbox. Could you try resending that one?
>

My bad, I forgot to add correct Cc tags to that one. I am a bit
surprised it's not in the archive since it did have correct To: info,
but it doesn't matter. I'll make sure this patch is sent out in v2.

> Incidentally we should use the new i.MX SDHCI controller in the
> imx6: coincidentally somebody ran into this bug recently:
> https://stackoverflow.com/questions/47538951/qemu-freescale-i-mx6-duallite-sabre-root-filesystem-does-not-mount/47552596
>
> I'll retest that this patchset works with my imx6 image, and
> send a patch to sit on top of it to switch imx6 over to TYPE_IMX_USDHC.
>

Out of curiosity, I gave emulating SD on i.MX6 a try and it mostly
worked (there were other unrelated to SD problems).  I'll include what
I came up with and we can go from there.

Thanks,
Andrey Smirnov