From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511945346202481.0425178385683; Wed, 29 Nov 2017 00:49:06 -0800 (PST) Received: from localhost ([::1]:41845 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy36-0003JK-Id for importer@patchew.org; Wed, 29 Nov 2017 03:48:56 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58846) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy0u-00022M-92 for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:43 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJy0r-0005dQ-PP for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:40 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:56289) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJy0q-0005Z6-Vl for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:37 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3ymvK34JCXz9s83; Wed, 29 Nov 2017 19:46:31 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1511945191; bh=lqCSRFvHydF/QMhD9JM9ISrnIedRPvgSTQ7LQEyaPIE=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=LIC3s/OtkiuAZy8S2T1ZZ1xEcBTo6N9/auIDVOrP2lweoOwB0ofMpQIj1TR6PueME CxILfzLbPpgZr9QKc7gmnET0jwc2kN4HBcHFePQKvJDylnJ+1fisZnoJsuALYXtJ1e lPGZcwVMnuKx/f99jBrM8+yfT52n22wx7Gn3+QQA= From: David Gibson To: "Michael S . Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:22 +1100 Message-Id: <20171129084628.12336-2-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [for-2.12 1/7] pci: Rename root bus initialization functions for clarity X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" pci_bus_init(), pci_bus_new_inplace(), pci_bus_new() and pci_register_bus() are misleadingly named. They're not used for initializing *any* PCI bus, but only for a root PCI bus. Non-root buses - i.e. ones under a logical PCI to PCI bridge - are instead created with a direct qbus_create_inplace() (see pci_bridge_initfn()). This patch renames the functions to make it clear they're only used for a root bus. Signed-off-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu --- hw/alpha/typhoon.c | 8 +++--- hw/mips/gt64xxx_pci.c | 12 ++++----- hw/pci-bridge/pci_expander_bridge.c | 4 +-- hw/pci-host/apb.c | 10 ++++---- hw/pci-host/bonito.c | 8 +++--- hw/pci-host/gpex.c | 6 ++--- hw/pci-host/grackle.c | 14 +++++------ hw/pci-host/piix.c | 4 +-- hw/pci-host/ppce500.c | 6 ++--- hw/pci-host/prep.c | 4 +-- hw/pci-host/q35.c | 7 +++--- hw/pci-host/uninorth.c | 24 +++++++++--------- hw/pci-host/versatile.c | 6 ++--- hw/pci-host/xilinx-pcie.c | 6 ++--- hw/pci/pci.c | 49 ++++++++++++++++++++-------------= ---- hw/ppc/ppc4xx_pci.c | 6 ++--- hw/ppc/spapr_pci.c | 8 +++--- hw/s390x/s390-pci-bus.c | 8 +++--- hw/sh4/sh_pci.c | 12 ++++----- include/hw/pci/pci.h | 25 ++++++++++--------- 20 files changed, 116 insertions(+), 111 deletions(-) diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index ae11e012c7..6a40869488 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -881,10 +881,10 @@ PCIBus *typhoon_init(ram_addr_t ram_size, ISABus **is= a_bus, memory_region_add_subregion(addr_space, 0x801fc000000ULL, &s->pchip.reg_io); =20 - b =3D pci_register_bus(dev, "pci", - typhoon_set_irq, sys_map_irq, s, - &s->pchip.reg_mem, &s->pchip.reg_io, - 0, 64, TYPE_PCI_BUS); + b =3D pci_register_root_bus(dev, "pci", + typhoon_set_irq, sys_map_irq, s, + &s->pchip.reg_mem, &s->pchip.reg_io, + 0, 64, TYPE_PCI_BUS); phb->bus =3D b; qdev_init_nofail(dev); =20 diff --git a/hw/mips/gt64xxx_pci.c b/hw/mips/gt64xxx_pci.c index 5a9dad9aae..a9c222a967 100644 --- a/hw/mips/gt64xxx_pci.c +++ b/hw/mips/gt64xxx_pci.c @@ -1171,12 +1171,12 @@ PCIBus *gt64120_register(qemu_irq *pic) phb =3D PCI_HOST_BRIDGE(dev); memory_region_init(&d->pci0_mem, OBJECT(dev), "pci0-mem", UINT32_MAX); address_space_init(&d->pci0_mem_as, &d->pci0_mem, "pci0-mem"); - phb->bus =3D pci_register_bus(dev, "pci", - gt64120_pci_set_irq, gt64120_pci_map_irq, - pic, - &d->pci0_mem, - get_system_io(), - PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); + phb->bus =3D pci_register_root_bus(dev, "pci", + gt64120_pci_set_irq, gt64120_pci_map_= irq, + pic, + &d->pci0_mem, + get_system_io(), + PCI_DEVFN(18, 0), 4, TYPE_PCI_BUS); qdev_init_nofail(dev); memory_region_init_io(&d->ISD_mem, OBJECT(dev), &isd_mem_ops, d, "isd-= mem", 0x1000); =20 diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index 8c8ac737ad..b2fa829e29 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -230,9 +230,9 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool= pcie, Error **errp) =20 ds =3D qdev_create(NULL, TYPE_PXB_HOST); if (pcie) { - bus =3D pci_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCIE_BUS= ); + bus =3D pci_root_bus_new(ds, dev_name, NULL, NULL, 0, TYPE_PXB_PCI= E_BUS); } else { - bus =3D pci_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_PXB_BU= S); + bus =3D pci_root_bus_new(ds, "pxb-internal", NULL, NULL, 0, TYPE_P= XB_BUS); bds =3D qdev_create(BUS(bus), "pci-bridge"); bds->id =3D dev_name; qdev_prop_set_uint8(bds, PCI_BRIDGE_DEV_PROP_CHASSIS_NR, pxb->bus_= nr); diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index 64025cd8cc..1df998443d 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -714,11 +714,11 @@ PCIBus *pci_apb_init(hwaddr special_base, dev =3D qdev_create(NULL, TYPE_APB); d =3D APB_DEVICE(dev); phb =3D PCI_HOST_BRIDGE(dev); - phb->bus =3D pci_register_bus(DEVICE(phb), "pci", - pci_apb_set_irq, pci_apb_map_irq, d, - &d->pci_mmio, - &d->pci_ioport, - 0, 32, TYPE_PCI_BUS); + phb->bus =3D pci_register_root_bus(DEVICE(phb), "pci", + pci_apb_set_irq, pci_apb_map_irq, d, + &d->pci_mmio, + &d->pci_ioport, + 0, 32, TYPE_PCI_BUS); qdev_init_nofail(dev); s =3D SYS_BUS_DEVICE(dev); /* apb_config */ diff --git a/hw/pci-host/bonito.c b/hw/pci-host/bonito.c index 9f61e27edc..f08593feab 100644 --- a/hw/pci-host/bonito.c +++ b/hw/pci-host/bonito.c @@ -714,10 +714,10 @@ static int bonito_pcihost_initfn(SysBusDevice *dev) { PCIHostState *phb =3D PCI_HOST_BRIDGE(dev); =20 - phb->bus =3D pci_register_bus(DEVICE(dev), "pci", - pci_bonito_set_irq, pci_bonito_map_irq, de= v, - get_system_memory(), get_system_io(), - 0x28, 32, TYPE_PCI_BUS); + phb->bus =3D pci_register_root_bus(DEVICE(dev), "pci", + pci_bonito_set_irq, pci_bonito_map_ir= q, + dev, get_system_memory(), get_system_= io(), + 0x28, 32, TYPE_PCI_BUS); =20 return 0; } diff --git a/hw/pci-host/gpex.c b/hw/pci-host/gpex.c index edf305b1fd..2583b151a4 100644 --- a/hw/pci-host/gpex.c +++ b/hw/pci-host/gpex.c @@ -89,9 +89,9 @@ static void gpex_host_realize(DeviceState *dev, Error **e= rrp) s->irq_num[i] =3D -1; } =20 - pci->bus =3D pci_register_bus(dev, "pcie.0", gpex_set_irq, - pci_swizzle_map_irq_fn, s, &s->io_mmio, - &s->io_ioport, 0, 4, TYPE_PCIE_BUS); + pci->bus =3D pci_register_root_bus(dev, "pcie.0", gpex_set_irq, + pci_swizzle_map_irq_fn, s, &s->io_mmi= o, + &s->io_ioport, 0, 4, TYPE_PCIE_BUS); =20 qdev_set_parent_bus(DEVICE(&s->gpex_root), BUS(pci->bus)); pci_bus_set_route_irq_fn(pci->bus, gpex_route_intx_pin_to_irq); diff --git a/hw/pci-host/grackle.c b/hw/pci-host/grackle.c index 38cd279b6b..3caf1ccb37 100644 --- a/hw/pci-host/grackle.c +++ b/hw/pci-host/grackle.c @@ -82,13 +82,13 @@ PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic, memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); =20 - phb->bus =3D pci_register_bus(dev, NULL, - pci_grackle_set_irq, - pci_grackle_map_irq, - pic, - &d->pci_mmio, - address_space_io, - 0, 4, TYPE_PCI_BUS); + phb->bus =3D pci_register_root_bus(dev, NULL, + pci_grackle_set_irq, + pci_grackle_map_irq, + pic, + &d->pci_mmio, + address_space_io, + 0, 4, TYPE_PCI_BUS); =20 pci_create_simple(phb->bus, 0, "grackle"); qdev_init_nofail(dev); diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index a684a7cca9..cf9070186c 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -361,8 +361,8 @@ PCIBus *i440fx_init(const char *host_type, const char *= pci_type, =20 dev =3D qdev_create(NULL, host_type); s =3D PCI_HOST_BRIDGE(dev); - b =3D pci_bus_new(dev, NULL, pci_address_space, - address_space_io, 0, TYPE_PCI_BUS); + b =3D pci_root_bus_new(dev, NULL, pci_address_space, + address_space_io, 0, TYPE_PCI_BUS); s->bus =3D b; object_property_add_child(qdev_get_machine(), "i440fx", OBJECT(dev), N= ULL); qdev_init_nofail(dev); diff --git a/hw/pci-host/ppce500.c b/hw/pci-host/ppce500.c index 39cd24464d..67edbf744c 100644 --- a/hw/pci-host/ppce500.c +++ b/hw/pci-host/ppce500.c @@ -465,9 +465,9 @@ static int e500_pcihost_initfn(SysBusDevice *dev) /* PIO lives at the bottom of our bus space */ memory_region_add_subregion_overlap(&s->busmem, 0, &s->pio, -2); =20 - b =3D pci_register_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq, - mpc85xx_pci_map_irq, s, &s->busmem, &s->pio, - PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS); + b =3D pci_register_root_bus(DEVICE(dev), NULL, mpc85xx_pci_set_irq, + mpc85xx_pci_map_irq, s, &s->busmem, &s->pio, + PCI_DEVFN(s->first_slot, 0), 4, TYPE_PCI_BUS= ); h->bus =3D b; =20 /* Set up PCI view of memory */ diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 92eed0f3e1..01f67f9db1 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -269,8 +269,8 @@ static void raven_pcihost_initfn(Object *obj) memory_region_add_subregion_overlap(address_space_mem, 0x80000000, &s->pci_io_non_contiguous, 1); memory_region_add_subregion(address_space_mem, 0xc0000000, &s->pci_mem= ory); - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj), NULL, - &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS); + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), DEVICE(obj),= NULL, + &s->pci_memory, &s->pci_io, 0, TYPE_PCI_BUS); =20 /* Bus master address space */ memory_region_init(&s->bm, obj, "bm-raven", UINT32_MAX); diff --git a/hw/pci-host/q35.c b/hw/pci-host/q35.c index 6cb9a8d121..a36a1195e4 100644 --- a/hw/pci-host/q35.c +++ b/hw/pci-host/q35.c @@ -51,9 +51,10 @@ static void q35_host_realize(DeviceState *dev, Error **e= rrp) sysbus_add_io(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, &pci->data_mem); sysbus_init_ioports(sbd, MCH_HOST_BRIDGE_CONFIG_DATA, 4); =20 - pci->bus =3D pci_bus_new(DEVICE(s), "pcie.0", - s->mch.pci_address_space, s->mch.address_space_= io, - 0, TYPE_PCIE_BUS); + pci->bus =3D pci_root_bus_new(DEVICE(s), "pcie.0", + s->mch.pci_address_space, + s->mch.address_space_io, + 0, TYPE_PCIE_BUS); PC_MACHINE(qdev_get_machine())->bus =3D pci->bus; qdev_set_parent_bus(DEVICE(&s->mch), BUS(pci->bus)); qdev_init_nofail(DEVICE(&s->mch)); diff --git a/hw/pci-host/uninorth.c b/hw/pci-host/uninorth.c index ea5c265718..5d8ccaa711 100644 --- a/hw/pci-host/uninorth.c +++ b/hw/pci-host/uninorth.c @@ -233,12 +233,12 @@ PCIBus *pci_pmac_init(qemu_irq *pic, memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); =20 - h->bus =3D pci_register_bus(dev, NULL, - pci_unin_set_irq, pci_unin_map_irq, - pic, - &d->pci_mmio, - address_space_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + h->bus =3D pci_register_root_bus(dev, NULL, + pci_unin_set_irq, pci_unin_map_irq, + pic, + &d->pci_mmio, + address_space_io, + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); =20 #if 0 pci_create_simple(h->bus, PCI_DEVFN(11, 0), "uni-north"); @@ -299,12 +299,12 @@ PCIBus *pci_pmac_u3_init(qemu_irq *pic, memory_region_add_subregion(address_space_mem, 0x80000000ULL, &d->pci_hole); =20 - h->bus =3D pci_register_bus(dev, NULL, - pci_unin_set_irq, pci_unin_map_irq, - pic, - &d->pci_mmio, - address_space_io, - PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); + h->bus =3D pci_register_root_bus(dev, NULL, + pci_unin_set_irq, pci_unin_map_irq, + pic, + &d->pci_mmio, + address_space_io, + PCI_DEVFN(11, 0), 4, TYPE_PCI_BUS); =20 sysbus_mmio_map(s, 0, 0xf0800000); sysbus_mmio_map(s, 1, 0xf0c00000); diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 6394a520fc..8803ada925 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -399,9 +399,9 @@ static void pci_vpb_realize(DeviceState *dev, Error **e= rrp) memory_region_init(&s->pci_io_space, OBJECT(s), "pci_io", 1ULL << 32); memory_region_init(&s->pci_mem_space, OBJECT(s), "pci_mem", 1ULL << 32= ); =20 - pci_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci", - &s->pci_mem_space, &s->pci_io_space, - PCI_DEVFN(11, 0), TYPE_PCI_BUS); + pci_root_bus_new_inplace(&s->pci_bus, sizeof(s->pci_bus), dev, "pci", + &s->pci_mem_space, &s->pci_io_space, + PCI_DEVFN(11, 0), TYPE_PCI_BUS); h->bus =3D &s->pci_bus; =20 object_initialize(&s->pci_dev, sizeof(s->pci_dev), TYPE_VERSATILE_PCI_= HOST); diff --git a/hw/pci-host/xilinx-pcie.c b/hw/pci-host/xilinx-pcie.c index 7659253090..d2f88d11dd 100644 --- a/hw/pci-host/xilinx-pcie.c +++ b/hw/pci-host/xilinx-pcie.c @@ -129,9 +129,9 @@ static void xilinx_pcie_host_realize(DeviceState *dev, = Error **errp) sysbus_init_mmio(sbd, &pex->mmio); sysbus_init_mmio(sbd, &s->mmio); =20 - pci->bus =3D pci_register_bus(dev, s->name, xilinx_pcie_set_irq, - pci_swizzle_map_irq_fn, s, &s->mmio, - &s->io, 0, 4, TYPE_PCIE_BUS); + pci->bus =3D pci_register_root_bus(dev, s->name, xilinx_pcie_set_irq, + pci_swizzle_map_irq_fn, s, &s->mmio, + &s->io, 0, 4, TYPE_PCIE_BUS); =20 qdev_set_parent_bus(DEVICE(&s->root), BUS(pci->bus)); qdev_init_nofail(DEVICE(&s->root)); diff --git a/hw/pci/pci.c b/hw/pci/pci.c index b2d139bd9a..232e7dacf8 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -376,10 +376,10 @@ const char *pci_root_bus_path(PCIDevice *dev) return rootbus->qbus.name; } =20 -static void pci_bus_init(PCIBus *bus, DeviceState *parent, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - uint8_t devfn_min) +static void pci_root_bus_init(PCIBus *bus, DeviceState *parent, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + uint8_t devfn_min) { assert(PCI_FUNC(devfn_min) =3D=3D 0); bus->devfn_min =3D devfn_min; @@ -403,25 +403,27 @@ bool pci_bus_is_root(PCIBus *bus) return PCI_BUS_GET_CLASS(bus)->is_root(bus); } =20 -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent, - const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - uint8_t devfn_min, const char *typename) +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, + const char *name, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + uint8_t devfn_min, const char *typename) { qbus_create_inplace(bus, bus_size, typename, parent, name); - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_m= in); + pci_root_bus_init(bus, parent, address_space_mem, address_space_io, + devfn_min); } =20 -PCIBus *pci_bus_new(DeviceState *parent, const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - uint8_t devfn_min, const char *typename) +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + uint8_t devfn_min, const char *typename) { PCIBus *bus; =20 bus =3D PCI_BUS(qbus_create(typename, parent, name)); - pci_bus_init(bus, parent, address_space_mem, address_space_io, devfn_m= in); + pci_root_bus_init(bus, parent, address_space_mem, address_space_io, + devfn_min); return bus; } =20 @@ -435,17 +437,18 @@ void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq= , pci_map_irq_fn map_irq, bus->irq_count =3D g_malloc0(nirq * sizeof(bus->irq_count[0])); } =20 -PCIBus *pci_register_bus(DeviceState *parent, const char *name, - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - void *irq_opaque, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - uint8_t devfn_min, int nirq, const char *typename) +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, + pci_set_irq_fn set_irq, pci_map_irq_fn map_i= rq, + void *irq_opaque, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + uint8_t devfn_min, int nirq, + const char *typename) { PCIBus *bus; =20 - bus =3D pci_bus_new(parent, name, address_space_mem, - address_space_io, devfn_min, typename); + bus =3D pci_root_bus_new(parent, name, address_space_mem, + address_space_io, devfn_min, typename); pci_bus_irqs(bus, set_irq, map_irq, irq_opaque, nirq); return bus; } diff --git a/hw/ppc/ppc4xx_pci.c b/hw/ppc/ppc4xx_pci.c index 4765dcecca..b7642bac01 100644 --- a/hw/ppc/ppc4xx_pci.c +++ b/hw/ppc/ppc4xx_pci.c @@ -314,9 +314,9 @@ static int ppc4xx_pcihost_initfn(SysBusDevice *dev) sysbus_init_irq(dev, &s->irq[i]); } =20 - b =3D pci_register_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq, - ppc4xx_pci_map_irq, s->irq, get_system_memory(), - get_system_io(), 0, 4, TYPE_PCI_BUS); + b =3D pci_register_root_bus(DEVICE(dev), NULL, ppc4xx_pci_set_irq, + ppc4xx_pci_map_irq, s->irq, get_system_memor= y(), + get_system_io(), 0, 4, TYPE_PCI_BUS); h->bus =3D b; =20 pci_create_simple(b, 0, "ppc4xx-host-bridge"); diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 5a3122a9f9..9262682116 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -1621,10 +1621,10 @@ static void spapr_phb_realize(DeviceState *dev, Err= or **errp) memory_region_add_subregion(get_system_memory(), sphb->io_win_addr, &sphb->iowindow); =20 - bus =3D pci_register_bus(dev, NULL, - pci_spapr_set_irq, pci_spapr_map_irq, sphb, - &sphb->memspace, &sphb->iospace, - PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BUS); + bus =3D pci_register_root_bus(dev, NULL, + pci_spapr_set_irq, pci_spapr_map_irq, sphb, + &sphb->memspace, &sphb->iospace, + PCI_DEVFN(0, 0), PCI_NUM_PINS, TYPE_PCI_BU= S); phb->bus =3D bus; qbus_set_hotplug_handler(BUS(phb->bus), DEVICE(sphb), NULL); =20 diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 2b1e1409bf..347329dd50 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -554,10 +554,10 @@ static int s390_pcihost_init(SysBusDevice *dev) =20 DPRINTF("host_init\n"); =20 - b =3D pci_register_bus(DEVICE(dev), NULL, - s390_pci_set_irq, s390_pci_map_irq, NULL, - get_system_memory(), get_system_io(), 0, 64, - TYPE_PCI_BUS); + b =3D pci_register_root_bus(DEVICE(dev), NULL, + s390_pci_set_irq, s390_pci_map_irq, NULL, + get_system_memory(), get_system_io(), 0, 64, + TYPE_PCI_BUS); pci_setup_iommu(b, s390_pci_dma_iommu, s); =20 bus =3D BUS(b); diff --git a/hw/sh4/sh_pci.c b/hw/sh4/sh_pci.c index cbb01af57f..4ec2e35500 100644 --- a/hw/sh4/sh_pci.c +++ b/hw/sh4/sh_pci.c @@ -131,12 +131,12 @@ static int sh_pci_device_init(SysBusDevice *dev) for (i =3D 0; i < 4; i++) { sysbus_init_irq(dev, &s->irq[i]); } - phb->bus =3D pci_register_bus(DEVICE(dev), "pci", - sh_pci_set_irq, sh_pci_map_irq, - s->irq, - get_system_memory(), - get_system_io(), - PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS); + phb->bus =3D pci_register_root_bus(DEVICE(dev), "pci", + sh_pci_set_irq, sh_pci_map_irq, + s->irq, + get_system_memory(), + get_system_io(), + PCI_DEVFN(0, 0), 4, TYPE_PCI_BUS); memory_region_init_io(&s->memconfig_p4, OBJECT(s), &sh_pci_reg_ops, s, "sh_pci", 0x224); memory_region_init_alias(&s->memconfig_a7, OBJECT(s), "sh_pci.2", diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 8d02a0a383..870ebcfd4b 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -400,26 +400,27 @@ typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque= , int pin); =20 bool pci_bus_is_express(PCIBus *bus); bool pci_bus_is_root(PCIBus *bus); -void pci_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *parent, - const char *name, +void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, + const char *name, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + uint8_t devfn_min, const char *typename); +PCIBus *pci_root_bus_new(DeviceState *parent, const char *name, MemoryRegion *address_space_mem, MemoryRegion *address_space_io, uint8_t devfn_min, const char *typename); -PCIBus *pci_bus_new(DeviceState *parent, const char *name, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - uint8_t devfn_min, const char *typename); void pci_bus_irqs(PCIBus *bus, pci_set_irq_fn set_irq, pci_map_irq_fn map_= irq, void *irq_opaque, int nirq); int pci_bus_get_irq_level(PCIBus *bus, int irq_num); /* 0 <=3D pin <=3D 3 0 =3D INTA, 1 =3D INTB, 2 =3D INTC, 3 =3D INTD */ int pci_swizzle_map_irq_fn(PCIDevice *pci_dev, int pin); -PCIBus *pci_register_bus(DeviceState *parent, const char *name, - pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, - void *irq_opaque, - MemoryRegion *address_space_mem, - MemoryRegion *address_space_io, - uint8_t devfn_min, int nirq, const char *typename= ); +PCIBus *pci_register_root_bus(DeviceState *parent, const char *name, + pci_set_irq_fn set_irq, pci_map_irq_fn map_i= rq, + void *irq_opaque, + MemoryRegion *address_space_mem, + MemoryRegion *address_space_io, + uint8_t devfn_min, int nirq, + const char *typename); void pci_bus_set_route_irq_fn(PCIBus *, pci_route_irq_fn); PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *dev, int pin); bool pci_intx_route_changed(PCIINTxRoute *old, PCIINTxRoute *new); --=20 2.14.3 From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 15119455178241016.6201346632952; Wed, 29 Nov 2017 00:51:57 -0800 (PST) Received: from localhost ([::1]:41863 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy5m-0005bU-VD for importer@patchew.org; Wed, 29 Nov 2017 03:51:43 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58855) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy0u-00022V-KJ for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:41 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJy0r-0005d1-Hx for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:40 -0500 Received: from ozlabs.org ([103.22.144.67]:55203) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJy0q-0005ZF-PE for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:37 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3ymvK35gxYz9sRn; Wed, 29 Nov 2017 19:46:31 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1511945191; bh=BPY3r0UeyRO3r5gN36LFUFr10aAbwmTw3a4HAWnTvWI=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=HQ8r0PQTHNBv2H2WtYWKVJcrv4fHaBfBsAN6ei0pJdcP7HT9GGT8dLrcOAVTFKXid nZOfsaCyJjCcRyUrZR9AU6/c3YLrCRKIftvA8jS6IxW2/NaNvwDj/PhJ+dDgyk4xHP sS4Jv5lP7IEUDfC10R+u21l0LFKDGn1VjdYihKjY= From: David Gibson To: "Michael S . Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:23 +1100 Message-Id: <20171129084628.12336-3-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [for-2.12 2/7] pci: Move bridge data structures from pci_bus.h to pci_bridge.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" include/hw/pci/pci_bus.h contains several data structures related to PCI bridges that aren't needed by most users of pci_bus.h. We already have a pci_bridge.h, so move them there. Signed-off-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu --- include/hw/pci-host/xilinx-pcie.h | 2 +- include/hw/pci/pci_bridge.h | 48 ++++++++++++++++++++++++++++++++++++ include/hw/pci/pci_bus.h | 51 ++---------------------------------= ---- 3 files changed, 51 insertions(+), 50 deletions(-) diff --git a/include/hw/pci-host/xilinx-pcie.h b/include/hw/pci-host/xilinx= -pcie.h index bec66b27c5..74c04dc9bb 100644 --- a/include/hw/pci-host/xilinx-pcie.h +++ b/include/hw/pci-host/xilinx-pcie.h @@ -23,7 +23,7 @@ #include "hw/hw.h" #include "hw/sysbus.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" +#include "hw/pci/pci_bridge.h" #include "hw/pci/pcie_host.h" =20 #define TYPE_XILINX_PCIE_HOST "xilinx-pcie-host" diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 1acadc2c15..9b44ffd22a 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -27,6 +27,54 @@ #define QEMU_PCI_BRIDGE_H =20 #include "hw/pci/pci.h" +#include "hw/pci/pci_bus.h" + +typedef struct PCIBridgeWindows PCIBridgeWindows; + +/* + * Aliases for each of the address space windows that the bridge + * can forward. Mapped into the bridge's parent's address space, + * as subregions. + */ +struct PCIBridgeWindows { + MemoryRegion alias_pref_mem; + MemoryRegion alias_mem; + MemoryRegion alias_io; + /* + * When bridge control VGA forwarding is enabled, bridges will + * provide positive decode on the PCI VGA defined I/O port and + * MMIO ranges. When enabled forwarding is only qualified on the + * I/O and memory enable bits in the bridge command register. + */ + MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS]; +}; + +#define TYPE_PCI_BRIDGE "base-pci-bridge" +#define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE) + +struct PCIBridge { + /*< private >*/ + PCIDevice parent_obj; + /*< public >*/ + + /* private member */ + PCIBus sec_bus; + /* + * Memory regions for the bridge's address spaces. These regions are = not + * directly added to system_memory/system_io or its descendants. + * Bridge's secondary bus points to these, so that devices + * under the bridge see these regions as its address spaces. + * The regions are as large as the entire address space - + * they don't take into account any windows. + */ + MemoryRegion address_space_mem; + MemoryRegion address_space_io; + + PCIBridgeWindows *windows; + + pci_map_irq_fn map_irq; + const char *bus_name; +}; =20 #define PCI_BRIDGE_DEV_PROP_CHASSIS_NR "chassis_nr" #define PCI_BRIDGE_DEV_PROP_MSI "msi" diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h index bc34fd0017..b7da8f555b 100644 --- a/include/hw/pci/pci_bus.h +++ b/include/hw/pci/pci_bus.h @@ -2,10 +2,10 @@ #define QEMU_PCI_BUS_H =20 /* - * PCI Bus and Bridge datastructures. + * PCI Bus datastructures. * * Do not access the following members directly; - * use accessor functions in pci.h, pci_bridge.h + * use accessor functions in pci.h */ =20 typedef struct PCIBusClass { @@ -44,51 +44,4 @@ struct PCIBus { Notifier machine_done; }; =20 -typedef struct PCIBridgeWindows PCIBridgeWindows; - -/* - * Aliases for each of the address space windows that the bridge - * can forward. Mapped into the bridge's parent's address space, - * as subregions. - */ -struct PCIBridgeWindows { - MemoryRegion alias_pref_mem; - MemoryRegion alias_mem; - MemoryRegion alias_io; - /* - * When bridge control VGA forwarding is enabled, bridges will - * provide positive decode on the PCI VGA defined I/O port and - * MMIO ranges. When enabled forwarding is only qualified on the - * I/O and memory enable bits in the bridge command register. - */ - MemoryRegion alias_vga[QEMU_PCI_VGA_NUM_REGIONS]; -}; - -#define TYPE_PCI_BRIDGE "base-pci-bridge" -#define PCI_BRIDGE(obj) OBJECT_CHECK(PCIBridge, (obj), TYPE_PCI_BRIDGE) - -struct PCIBridge { - /*< private >*/ - PCIDevice parent_obj; - /*< public >*/ - - /* private member */ - PCIBus sec_bus; - /* - * Memory regions for the bridge's address spaces. These regions are = not - * directly added to system_memory/system_io or its descendants. - * Bridge's secondary bus points to these, so that devices - * under the bridge see these regions as its address spaces. - * The regions are as large as the entire address space - - * they don't take into account any windows. - */ - MemoryRegion address_space_mem; - MemoryRegion address_space_io; - - PCIBridgeWindows *windows; - - pci_map_irq_fn map_irq; - const char *bus_name; -}; - #endif /* QEMU_PCI_BUS_H */ --=20 2.14.3 From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511945348437240.72282299621236; Wed, 29 Nov 2017 00:49:08 -0800 (PST) Received: from localhost ([::1]:41844 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy2y-0003FI-WE for importer@patchew.org; Wed, 29 Nov 2017 03:48:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58838) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy0u-00022L-8d for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJy0r-0005dD-KG for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:39 -0500 Received: from ozlabs.org ([2401:3900:2:1::2]:43323) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJy0r-0005Z7-2D for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:37 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3ymvK36lLmz9t16; Wed, 29 Nov 2017 19:46:31 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1511945191; bh=aSQLpynirM1ZKlsm6z1KFuqWk+8DFnbW4k6KvCLRd5U=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=E65pwtT594BFZ0DV6wzi0slOLXWxuIwsOBmMNFu4lgfNT+kNNk/buaGNcBIKEb/Ys X+RQyiqY5tHyBDArp9mm6KqVYs8JEtwIFBHeQ9782DlYMylZyHtJjYOA42nQTjg1wS DbzLSCXVzvLp6IBjAR5ucAcd00601aCl7i6aviP4= From: David Gibson To: "Michael S . Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:24 +1100 Message-Id: <20171129084628.12336-4-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [for-2.12 3/7] pci: Fold pci_bus.h into pci.h X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" include/hw/pci/pci_bus.h is now very small and can only safely be included after hw/pci/pci.h. So, just fold it into pci.h. Signed-off-by: David Gibson --- hw/acpi/pcihp.c | 1 - hw/i386/acpi-build.c | 1 - hw/i386/amd_iommu.h | 1 - hw/i386/intel_iommu.c | 1 - hw/i386/pc.c | 1 - hw/isa/lpc_ich9.c | 1 - hw/pci-bridge/dec.c | 1 - hw/pci-bridge/pci_bridge_dev.c | 1 - hw/pci-bridge/pci_expander_bridge.c | 1 - hw/pci-bridge/pcie_pci_bridge.c | 1 - hw/pci-host/apb.c | 1 - hw/pci-host/prep.c | 1 - hw/pci-host/versatile.c | 1 - hw/pci/pci.c | 1 - hw/pci/pci_bridge.c | 1 - hw/pci/pci_host.c | 1 - hw/pci/pcie.c | 1 - hw/pci/pcie_aer.c | 1 - hw/pci/shpc.c | 1 - hw/ppc/spapr_pci.c | 1 - hw/s390x/s390-pci-bus.c | 1 - hw/sparc64/sun4u.c | 1 - include/hw/i386/ich9.h | 1 - include/hw/pci/pci.h | 44 ++++++++++++++++++++++++++++++++-- include/hw/pci/pci_bridge.h | 1 - include/hw/pci/pci_bus.h | 47 ---------------------------------= ---- include/hw/pci/pcie_port.h | 1 - 27 files changed, 42 insertions(+), 74 deletions(-) delete mode 100644 include/hw/pci/pci_bus.h diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 7da51c0569..0da905ab3a 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -34,7 +34,6 @@ #include "sysemu/sysemu.h" #include "exec/ioport.h" #include "exec/address-spaces.h" -#include "hw/pci/pci_bus.h" #include "qapi/error.h" #include "qom/qom-qobject.h" =20 diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 73519ab3ac..bda5ef1307 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -51,7 +51,6 @@ #include "hw/acpi/piix4.h" #include "hw/acpi/pcihp.h" #include "hw/i386/ich9.h" -#include "hw/pci/pci_bus.h" #include "hw/pci-host/q35.h" #include "hw/i386/x86-iommu.h" =20 diff --git a/hw/i386/amd_iommu.h b/hw/i386/amd_iommu.h index d370ae3549..b587f6b49f 100644 --- a/hw/i386/amd_iommu.h +++ b/hw/i386/amd_iommu.h @@ -27,7 +27,6 @@ #include "hw/sysbus.h" #include "sysemu/dma.h" #include "hw/i386/pc.h" -#include "hw/pci/pci_bus.h" #include "hw/i386/x86-iommu.h" =20 /* Capability registers */ diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 3a5bb0bc2e..3ef4bfbe05 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -26,7 +26,6 @@ #include "exec/address-spaces.h" #include "intel_iommu_internal.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/i386/pc.h" #include "hw/i386/apic-msidef.h" #include "hw/boards.h" diff --git a/hw/i386/pc.c b/hw/i386/pc.c index c3afe5b7f1..5380a004be 100644 --- a/hw/i386/pc.c +++ b/hw/i386/pc.c @@ -31,7 +31,6 @@ #include "hw/block/fdc.h" #include "hw/ide.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/nvram/fw_cfg.h" #include "hw/timer/hpet.h" #include "hw/smbios/smbios.h" diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index ec3c9f7d0b..e77a4abb15 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -44,7 +44,6 @@ #include "hw/i386/ich9.h" #include "hw/acpi/acpi.h" #include "hw/acpi/ich9.h" -#include "hw/pci/pci_bus.h" #include "exec/address-spaces.h" #include "sysemu/sysemu.h" #include "qom/cpu.h" diff --git a/hw/pci-bridge/dec.c b/hw/pci-bridge/dec.c index 84492d5e5f..ae4b9697ed 100644 --- a/hw/pci-bridge/dec.c +++ b/hw/pci-bridge/dec.c @@ -29,7 +29,6 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/pci/pci_bridge.h" -#include "hw/pci/pci_bus.h" =20 /* debug DEC */ //#define DEBUG_DEC diff --git a/hw/pci-bridge/pci_bridge_dev.c b/hw/pci-bridge/pci_bridge_dev.c index d56f6638c2..bc3c8d9f57 100644 --- a/hw/pci-bridge/pci_bridge_dev.c +++ b/hw/pci-bridge/pci_bridge_dev.c @@ -27,7 +27,6 @@ #include "hw/pci/shpc.h" #include "hw/pci/slotid_cap.h" #include "exec/memory.h" -#include "hw/pci/pci_bus.h" #include "hw/hotplug.h" =20 #define TYPE_PCI_BRIDGE_DEV "pci-bridge" diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index b2fa829e29..5652cf06e9 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -13,7 +13,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" #include "hw/pci/pci_bridge.h" #include "hw/i386/pc.h" diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridg= e.c index a4d827c99d..f609a4fb32 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -10,7 +10,6 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/msi.h" #include "hw/pci/shpc.h" diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index 1df998443d..bf7c7b0079 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -32,7 +32,6 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" #include "hw/pci/pci_bridge.h" -#include "hw/pci/pci_bus.h" #include "hw/pci-host/apb.h" #include "sysemu/sysemu.h" #include "exec/address-spaces.h" diff --git a/hw/pci-host/prep.c b/hw/pci-host/prep.c index 01f67f9db1..56920914c6 100644 --- a/hw/pci-host/prep.c +++ b/hw/pci-host/prep.c @@ -27,7 +27,6 @@ #include "qapi/error.h" #include "hw/hw.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" #include "hw/i386/pc.h" #include "hw/loader.h" diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index 8803ada925..b5bf4dce55 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -10,7 +10,6 @@ #include "qemu/osdep.h" #include "hw/sysbus.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" #include "exec/address-spaces.h" #include "qemu/log.h" diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 232e7dacf8..6e11dc2fec 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -25,7 +25,6 @@ #include "hw/hw.h" #include "hw/pci/pci.h" #include "hw/pci/pci_bridge.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" #include "monitor/monitor.h" #include "net/net.h" diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index a47d257149..6a5072fcc6 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -31,7 +31,6 @@ =20 #include "qemu/osdep.h" #include "hw/pci/pci_bridge.h" -#include "hw/pci/pci_bus.h" #include "qemu/range.h" #include "qapi/error.h" =20 diff --git a/hw/pci/pci_host.c b/hw/pci/pci_host.c index 5eaa935cb5..3a26880f18 100644 --- a/hw/pci/pci_host.c +++ b/hw/pci/pci_host.c @@ -21,7 +21,6 @@ #include "qemu/osdep.h" #include "hw/pci/pci.h" #include "hw/pci/pci_host.h" -#include "hw/pci/pci_bus.h" #include "trace.h" =20 /* debug PCI */ diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 32191f2a55..28ba4a0a72 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -25,7 +25,6 @@ #include "hw/pci/pcie.h" #include "hw/pci/msix.h" #include "hw/pci/msi.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pcie_regs.h" #include "qemu/range.h" =20 diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 97200742b4..171955195f 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -27,7 +27,6 @@ #include "hw/pci/pcie.h" #include "hw/pci/msix.h" #include "hw/pci/msi.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pcie_regs.h" #include "qapi/error.h" =20 diff --git a/hw/pci/shpc.c b/hw/pci/shpc.c index 69fc14b218..7d25e5dc78 100644 --- a/hw/pci/shpc.c +++ b/hw/pci/shpc.c @@ -5,7 +5,6 @@ #include "qemu/error-report.h" #include "hw/pci/shpc.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/msi.h" =20 /* TODO: model power only and disabled slot states. */ diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 9262682116..4742cad64c 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -42,7 +42,6 @@ #include "qapi/qmp/qerror.h" #include "hw/ppc/fdt.h" #include "hw/pci/pci_bridge.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_ids.h" #include "hw/ppc/spapr_drc.h" #include "sysemu/device_tree.h" diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 347329dd50..3a8894a36c 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -18,7 +18,6 @@ #include "cpu.h" #include "s390-pci-bus.h" #include "s390-pci-inst.h" -#include "hw/pci/pci_bus.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/msi.h" #include "qemu/error-report.h" diff --git a/hw/sparc64/sun4u.c b/hw/sparc64/sun4u.c index 1672f256e7..078414388b 100644 --- a/hw/sparc64/sun4u.c +++ b/hw/sparc64/sun4u.c @@ -27,7 +27,6 @@ #include "cpu.h" #include "hw/hw.h" #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" #include "hw/pci-host/apb.h" #include "hw/i386/pc.h" #include "hw/char/serial.h" diff --git a/include/hw/i386/ich9.h b/include/hw/i386/ich9.h index 673d13d28f..c613f85b11 100644 --- a/include/hw/i386/ich9.h +++ b/include/hw/i386/ich9.h @@ -12,7 +12,6 @@ #include "hw/pci/pci_bridge.h" #include "hw/acpi/acpi.h" #include "hw/acpi/ich9.h" -#include "hw/pci/pci_bus.h" =20 void ich9_lpc_set_irq(void *opaque, int irq_num, int level); int ich9_lpc_map_irq(PCIDevice *pci_dev, int intx); diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 870ebcfd4b..77d92a3dc4 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -392,12 +392,54 @@ typedef void (*pci_set_irq_fn)(void *opaque, int irq_= num, int level); typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); typedef PCIINTxRoute (*pci_route_irq_fn)(void *opaque, int pin); =20 +typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int); + +/* + * PCI Bus datastructures. + */ + #define TYPE_PCI_BUS "PCI" #define PCI_BUS(obj) OBJECT_CHECK(PCIBus, (obj), TYPE_PCI_BUS) #define PCI_BUS_CLASS(klass) OBJECT_CLASS_CHECK(PCIBusClass, (klass), TYPE= _PCI_BUS) #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_P= CI_BUS) #define TYPE_PCIE_BUS "PCIE" =20 +typedef struct PCIBusClass { + /*< private >*/ + BusClass parent_class; + /*< public >*/ + + bool (*is_root)(PCIBus *bus); + int (*bus_num)(PCIBus *bus); + uint16_t (*numa_node)(PCIBus *bus); +} PCIBusClass; + +struct PCIBus { + BusState qbus; + PCIIOMMUFunc iommu_fn; + void *iommu_opaque; + uint8_t devfn_min; + uint32_t slot_reserved_mask; + pci_set_irq_fn set_irq; + pci_map_irq_fn map_irq; + pci_route_irq_fn route_intx_to_irq; + void *irq_opaque; + PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; + PCIDevice *parent_dev; + MemoryRegion *address_space_mem; + MemoryRegion *address_space_io; + + QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ + QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ + + /* The bus IRQ state is the logical OR of the connected devices. + Keep a count of the number of devices with raised IRQs. */ + int nirq; + int *irq_count; + + Notifier machine_done; +}; + bool pci_bus_is_express(PCIBus *bus); bool pci_bus_is_root(PCIBus *bus); void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, @@ -468,8 +510,6 @@ void pci_bus_get_w64_range(PCIBus *bus, Range *range); =20 void pci_device_deassert_intx(PCIDevice *dev); =20 -typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *, int); - AddressSpace *pci_device_iommu_address_space(PCIDevice *dev); void pci_setup_iommu(PCIBus *bus, PCIIOMMUFunc fn, void *opaque); =20 diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 9b44ffd22a..454bb09951 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -27,7 +27,6 @@ #define QEMU_PCI_BRIDGE_H =20 #include "hw/pci/pci.h" -#include "hw/pci/pci_bus.h" =20 typedef struct PCIBridgeWindows PCIBridgeWindows; =20 diff --git a/include/hw/pci/pci_bus.h b/include/hw/pci/pci_bus.h deleted file mode 100644 index b7da8f555b..0000000000 --- a/include/hw/pci/pci_bus.h +++ /dev/null @@ -1,47 +0,0 @@ -#ifndef QEMU_PCI_BUS_H -#define QEMU_PCI_BUS_H - -/* - * PCI Bus datastructures. - * - * Do not access the following members directly; - * use accessor functions in pci.h - */ - -typedef struct PCIBusClass { - /*< private >*/ - BusClass parent_class; - /*< public >*/ - - bool (*is_root)(PCIBus *bus); - int (*bus_num)(PCIBus *bus); - uint16_t (*numa_node)(PCIBus *bus); -} PCIBusClass; - -struct PCIBus { - BusState qbus; - PCIIOMMUFunc iommu_fn; - void *iommu_opaque; - uint8_t devfn_min; - uint32_t slot_reserved_mask; - pci_set_irq_fn set_irq; - pci_map_irq_fn map_irq; - pci_route_irq_fn route_intx_to_irq; - void *irq_opaque; - PCIDevice *devices[PCI_SLOT_MAX * PCI_FUNC_MAX]; - PCIDevice *parent_dev; - MemoryRegion *address_space_mem; - MemoryRegion *address_space_io; - - QLIST_HEAD(, PCIBus) child; /* this will be replaced by qdev later */ - QLIST_ENTRY(PCIBus) sibling;/* this will be replaced by qdev later */ - - /* The bus IRQ state is the logical OR of the connected devices. - Keep a count of the number of devices with raised IRQs. */ - int nirq; - int *irq_count; - - Notifier machine_done; -}; - -#endif /* QEMU_PCI_BUS_H */ diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 0736014bfd..bda76d79e0 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -22,7 +22,6 @@ #define QEMU_PCIE_PORT_H =20 #include "hw/pci/pci_bridge.h" -#include "hw/pci/pci_bus.h" =20 #define TYPE_PCIE_PORT "pcie-port" #define PCIE_PORT(obj) OBJECT_CHECK(PCIEPort, (obj), TYPE_PCIE_PORT) --=20 2.14.3 From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511945357068207.14642288406515; Wed, 29 Nov 2017 00:49:17 -0800 (PST) Received: from localhost ([::1]:41846 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy3J-0003VB-AL for importer@patchew.org; Wed, 29 Nov 2017 03:49:09 -0500 Received: from eggs.gnu.org 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Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:25 +1100 Message-Id: <20171129084628.12336-5-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2401:3900:2:1::2 Subject: [Qemu-devel] [for-2.12 4/7] pci: Simplify pci_bus_is_root() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" pci_bus_is_root() currently relies on a method in the PCIBusClass. But it's always known if a PCI bus is a root bus when we create it, so using a dynamic method is overkill. This replaces it with an IS_ROOT bit in a new flags field, which is set on root buses and otherwise clear. As a bonus this removes the special is_root logic from pci_expander_bridge, since it already creates its bus as a root bus. Signed-off-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu --- hw/pci-bridge/pci_expander_bridge.c | 6 ------ hw/pci/pci.c | 14 ++------------ include/hw/pci/pci.h | 12 +++++++++++- 3 files changed, 13 insertions(+), 19 deletions(-) diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index 5652cf06e9..11dfa9258e 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -65,11 +65,6 @@ static int pxb_bus_num(PCIBus *bus) return pxb->bus_nr; } =20 -static bool pxb_is_root(PCIBus *bus) -{ - return true; /* by definition */ -} - static uint16_t pxb_bus_numa_node(PCIBus *bus) { PXBDev *pxb =3D convert_to_pxb(bus->parent_dev); @@ -82,7 +77,6 @@ static void pxb_bus_class_init(ObjectClass *class, void *= data) PCIBusClass *pbc =3D PCI_BUS_CLASS(class); =20 pbc->bus_num =3D pxb_bus_num; - pbc->is_root =3D pxb_is_root; pbc->numa_node =3D pxb_bus_numa_node; } =20 diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 6e11dc2fec..5fab7f23b3 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -126,14 +126,9 @@ static void pci_bus_unrealize(BusState *qbus, Error **= errp) vmstate_unregister(NULL, &vmstate_pcibus, bus); } =20 -static bool pcibus_is_root(PCIBus *bus) -{ - return !bus->parent_dev; -} - static int pcibus_num(PCIBus *bus) { - if (pcibus_is_root(bus)) { + if (pci_bus_is_root(bus)) { return 0; /* pci host bridge */ } return bus->parent_dev->config[PCI_SECONDARY_BUS]; @@ -156,7 +151,6 @@ static void pci_bus_class_init(ObjectClass *klass, void= *data) k->unrealize =3D pci_bus_unrealize; k->reset =3D pcibus_reset; =20 - pbc->is_root =3D pcibus_is_root; pbc->bus_num =3D pcibus_num; pbc->numa_node =3D pcibus_numa_node; } @@ -385,6 +379,7 @@ static void pci_root_bus_init(PCIBus *bus, DeviceState = *parent, bus->slot_reserved_mask =3D 0x0; bus->address_space_mem =3D address_space_mem; bus->address_space_io =3D address_space_io; + bus->flags |=3D PCI_BUS_IS_ROOT; =20 /* host bridge */ QLIST_INIT(&bus->child); @@ -397,11 +392,6 @@ bool pci_bus_is_express(PCIBus *bus) return object_dynamic_cast(OBJECT(bus), TYPE_PCIE_BUS); } =20 -bool pci_bus_is_root(PCIBus *bus) -{ - return PCI_BUS_GET_CLASS(bus)->is_root(bus); -} - void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, const char *name, MemoryRegion *address_space_mem, diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 77d92a3dc4..cbb3386207 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -404,6 +404,11 @@ typedef AddressSpace *(*PCIIOMMUFunc)(PCIBus *, void *= , int); #define PCI_BUS_GET_CLASS(obj) OBJECT_GET_CLASS(PCIBusClass, (obj), TYPE_P= CI_BUS) #define TYPE_PCIE_BUS "PCIE" =20 +enum PCIBusFlags { + /* This bus is the root of a PCI domain */ + PCI_BUS_IS_ROOT =3D 0x0001, +}; + typedef struct PCIBusClass { /*< private >*/ BusClass parent_class; @@ -416,6 +421,7 @@ typedef struct PCIBusClass { =20 struct PCIBus { BusState qbus; + enum PCIBusFlags flags; PCIIOMMUFunc iommu_fn; void *iommu_opaque; uint8_t devfn_min; @@ -440,8 +446,12 @@ struct PCIBus { Notifier machine_done; }; =20 +static inline bool pci_bus_is_root(PCIBus *bus) +{ + return !!(bus->flags & PCI_BUS_IS_ROOT); +} + bool pci_bus_is_express(PCIBus *bus); -bool pci_bus_is_root(PCIBus *bus); void pci_root_bus_new_inplace(PCIBus *bus, size_t bus_size, DeviceState *p= arent, const char *name, MemoryRegion *address_space_mem, --=20 2.14.3 From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511945346113752.8283703679014; Wed, 29 Nov 2017 00:49:06 -0800 (PST) Received: from localhost ([::1]:41843 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy2x-0003FB-QP for importer@patchew.org; Wed, 29 Nov 2017 03:48:47 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58883) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy0v-00022j-Ks for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:42 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJy0u-0005ih-B9 for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:41 -0500 Received: from ozlabs.org ([103.22.144.67]:54079) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJy0t-0005dd-O6 for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:40 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3ymvK45nxmz9t2x; Wed, 29 Nov 2017 19:46:31 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1511945192; bh=7tyaK0tDiDvYxdZs9wnCg8bPIJBIOjRhAopQrhDv5eg=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=ZQfq2NDK5nhmW/LOSyUlHcGHjoxInmyYJJfNcZIjwgFKUa8/LsFAxLiebuxWWU8Yq D5a04xWQ0QYlGJ6eIXqx8HdyiDjZ4HNsSTtarjwVdBhwUwG2NyBEk3dyK+99+V5+Ph j2DT6T0zQ7UWwJ413ny7xZsZoNWAUxy8nanuMjDM= From: David Gibson To: "Michael S . Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:26 +1100 Message-Id: <20171129084628.12336-6-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [for-2.12 5/7] pci: Add pci_dev_bus_num() helper X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" A fair proportion of the users of pci_bus_num() want to get the bus number on a specific device, so first have to look up the bus from the device then call it. This adds a helper to do that (since we're going to make looking up the bus slightly more verbose). Signed-off-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu --- hw/pci/pcie_aer.c | 2 +- hw/s390x/s390-pci-bus.c | 2 +- hw/scsi/megasas.c | 2 +- hw/scsi/mptsas.c | 2 +- hw/xen/xen_pt.c | 6 +++--- include/hw/pci/pci.h | 5 +++++ include/hw/xen/xen_common.h | 8 ++++---- 7 files changed, 16 insertions(+), 11 deletions(-) diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 171955195f..7688293edc 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -1024,7 +1024,7 @@ static int do_pcie_aer_inject_error(Monitor *mon, } details->id =3D id; details->root_bus =3D pci_root_bus_path(dev); - details->bus =3D pci_bus_num(dev->bus); + details->bus =3D pci_dev_bus_num(dev); details->devfn =3D dev->devfn; =20 return 0; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 3a8894a36c..1aecada271 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -691,7 +691,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotpl= ug_dev, /* In the case the PCI device does not define an id */ /* we generate one based on the PCI address */ dev->id =3D g_strdup_printf("auto_%02x:%02x.%01x", - pci_bus_num(pdev->bus), + pci_dev_bus_num(pdev), PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn)); } diff --git a/hw/scsi/megasas.c b/hw/scsi/megasas.c index d5eae6239a..3e38e9e8aa 100644 --- a/hw/scsi/megasas.c +++ b/hw/scsi/megasas.c @@ -2372,7 +2372,7 @@ static void megasas_scsi_realize(PCIDevice *dev, Erro= r **errp) if (!s->sas_addr) { s->sas_addr =3D ((NAA_LOCALLY_ASSIGNED_ID << 24) | IEEE_COMPANY_LOCALLY_ASSIGNED) << 36; - s->sas_addr |=3D (pci_bus_num(dev->bus) << 16); + s->sas_addr |=3D (pci_dev_bus_num(dev) << 16); s->sas_addr |=3D (PCI_SLOT(dev->devfn) << 8); s->sas_addr |=3D PCI_FUNC(dev->devfn); } diff --git a/hw/scsi/mptsas.c b/hw/scsi/mptsas.c index f6db1b0103..3f061f3f68 100644 --- a/hw/scsi/mptsas.c +++ b/hw/scsi/mptsas.c @@ -1312,7 +1312,7 @@ static void mptsas_scsi_realize(PCIDevice *dev, Error= **errp) if (!s->sas_addr) { s->sas_addr =3D ((NAA_LOCALLY_ASSIGNED_ID << 24) | IEEE_COMPANY_LOCALLY_ASSIGNED) << 36; - s->sas_addr |=3D (pci_bus_num(dev->bus) << 16); + s->sas_addr |=3D (pci_dev_bus_num(dev) << 16); s->sas_addr |=3D (PCI_SLOT(dev->devfn) << 8); s->sas_addr |=3D PCI_FUNC(dev->devfn); } diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 9bba717708..6236f0c391 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -73,7 +73,7 @@ void xen_pt_log(const PCIDevice *d, const char *f, ...) =20 va_start(ap, f); if (d) { - fprintf(stderr, "[%02x:%02x.%d] ", pci_bus_num(d->bus), + fprintf(stderr, "[%02x:%02x.%d] ", pci_dev_bus_num(d), PCI_SLOT(d->devfn), PCI_FUNC(d->devfn)); } vfprintf(stderr, f, ap); @@ -711,7 +711,7 @@ static void xen_pt_destroy(PCIDevice *d) { intx =3D xen_pt_pci_intx(s); rc =3D xc_domain_unbind_pt_irq(xen_xc, xen_domid, machine_irq, PT_IRQ_TYPE_PCI, - pci_bus_num(d->bus), + pci_dev_bus_num(d), PCI_SLOT(s->dev.devfn), intx, 0 /* isa_irq */); @@ -867,7 +867,7 @@ static void xen_pt_realize(PCIDevice *d, Error **errp) uint8_t e_intx =3D xen_pt_pci_intx(s); =20 rc =3D xc_domain_bind_pt_pci_irq(xen_xc, xen_domid, machine_irq, - pci_bus_num(d->bus), + pci_dev_bus_num(d), PCI_SLOT(d->devfn), e_intx); if (rc < 0) { diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index cbb3386207..a490a2c7d4 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -488,6 +488,11 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *ro= otbus, PCIDevice *pci_vga_init(PCIBus *bus); =20 int pci_bus_num(PCIBus *s); +static inline int pci_dev_bus_num(const PCIDevice *dev) +{ + return pci_bus_num(dev->bus); +} + int pci_bus_numa_node(PCIBus *bus); void pci_for_each_device(PCIBus *bus, int bus_num, void (*fn)(PCIBus *bus, PCIDevice *d, void *opaqu= e), diff --git a/include/hw/xen/xen_common.h b/include/hw/xen/xen_common.h index 86c7f26106..64a978e4e0 100644 --- a/include/hw/xen/xen_common.h +++ b/include/hw/xen/xen_common.h @@ -542,10 +542,10 @@ static inline void xen_map_pcidev(domid_t dom, return; } =20 - trace_xen_map_pcidev(ioservid, pci_bus_num(pci_dev->bus), + trace_xen_map_pcidev(ioservid, pci_dev_bus_num(pci_dev), PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn= )); xendevicemodel_map_pcidev_to_ioreq_server(xen_dmod, dom, ioservid, 0, - pci_bus_num(pci_dev->bus), + pci_dev_bus_num(pci_dev), PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn)); } @@ -558,10 +558,10 @@ static inline void xen_unmap_pcidev(domid_t dom, return; } =20 - trace_xen_unmap_pcidev(ioservid, pci_bus_num(pci_dev->bus), + trace_xen_unmap_pcidev(ioservid, pci_dev_bus_num(pci_dev), PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->dev= fn)); xendevicemodel_unmap_pcidev_from_ioreq_server(xen_dmod, dom, ioservid,= 0, - pci_bus_num(pci_dev->bus= ), + pci_dev_bus_num(pci_dev), PCI_SLOT(pci_dev->devfn), PCI_FUNC(pci_dev->devfn)= ); } --=20 2.14.3 From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 151194563137078.06202517795157; Wed, 29 Nov 2017 00:53:51 -0800 (PST) Received: from localhost ([::1]:41873 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy7k-00008D-Jq for importer@patchew.org; Wed, 29 Nov 2017 03:53:44 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58915) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy0y-00024n-Hr for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:48 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJy0u-0005jF-LD for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:44 -0500 Received: from ozlabs.org ([103.22.144.67]:41431) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJy0t-0005dc-NW for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:40 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3ymvK44cX0z9t3Z; Wed, 29 Nov 2017 19:46:32 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1511945192; bh=sJxKHZ+5zvAJd8iImHqWjvvSU60rchNVFZ45GPRLWvs=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=bRG8CxozdiRuOxx5Uh+orKdtp9HCetH2j46C0DI1vy3y8M1jwbkmxM/UsLh58IjkW wCcmDx5D3DOk01RcNg2o1nNv/ZUslZaeOiW5WWPRxTIc3Y1L1cBa1W5JrFqXJt5izE 1u/hiF+Rfn1D+tlPDOqlxdZrAJwtyXuy4njdcvL0= From: David Gibson To: "Michael S . Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:27 +1100 Message-Id: <20171129084628.12336-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [for-2.12 6/7] pci: Eliminate redundant PCIDevice::bus pointer X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The bus pointer in PCIDevice is basically redundant with QOM information. It's always initialized to the qdev_get_parent_bus(), the only difference is the type. Therefore this patch eliminates the field, instead creating a pci_get_bus() helper to do the type mangling to derive it conveniently from the QOM Device object underneath. Signed-off-by: David Gibson Reviewed-by: Eduardo Habkost Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu --- hw/acpi/pcihp.c | 4 +- hw/acpi/piix4.c | 7 ++-- hw/i386/xen/xen_platform.c | 12 +++--- hw/isa/lpc_ich9.c | 10 ++--- hw/net/vmxnet3.c | 2 +- hw/pci-bridge/pci_expander_bridge.c | 17 +++++---- hw/pci-host/piix.c | 10 ++--- hw/pci-host/versatile.c | 2 +- hw/pci/pci.c | 76 +++++++++++++++++++--------------= ---- hw/pci/pci_bridge.c | 6 +-- hw/pci/pcie.c | 5 ++- hw/pci/pcie_aer.c | 2 +- hw/ppc/spapr_pci.c | 2 +- hw/s390x/s390-pci-bus.c | 8 ++-- hw/scsi/vmw_pvscsi.c | 2 +- hw/usb/hcd-xhci.c | 2 +- hw/vfio/pci.c | 10 ++--- hw/virtio/virtio-pci.c | 4 +- hw/xen/xen_pt.c | 4 +- include/hw/pci/pci.h | 9 +++-- 20 files changed, 102 insertions(+), 92 deletions(-) diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 0da905ab3a..98f13722bc 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -222,7 +222,7 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_= dev, AcpiPciHpState *s, { PCIDevice *pdev =3D PCI_DEVICE(dev); int slot =3D PCI_SLOT(pdev->devfn); - int bsel =3D acpi_pcihp_get_bsel(pdev->bus); + int bsel =3D acpi_pcihp_get_bsel(pci_get_bus(pdev)); if (bsel < 0) { error_setg(errp, "Unsupported bus. Bus doesn't have property '" ACPI_PCIHP_PROP_BSEL "' set"); @@ -245,7 +245,7 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplu= g_dev, AcpiPciHpState *s, { PCIDevice *pdev =3D PCI_DEVICE(dev); int slot =3D PCI_SLOT(pdev->devfn); - int bsel =3D acpi_pcihp_get_bsel(pdev->bus); + int bsel =3D acpi_pcihp_get_bsel(pci_get_bus(pdev)); if (bsel < 0) { error_setg(errp, "Unsupported bus. Bus doesn't have property '" ACPI_PCIHP_PROP_BSEL "' set"); diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index a0fb1ce037..8b703455b7 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -460,9 +460,9 @@ static void piix4_pm_machine_ready(Notifier *n, void *o= paque) (memory_region_present(io_as, 0x2f8) ? 0x90 : 0); =20 if (s->use_acpi_pci_hotplug) { - pci_for_each_bus(d->bus, piix4_update_bus_hotplug, s); + pci_for_each_bus(pci_get_bus(d), piix4_update_bus_hotplug, s); } else { - piix4_update_bus_hotplug(d->bus, s); + piix4_update_bus_hotplug(pci_get_bus(d), s); } } =20 @@ -535,7 +535,8 @@ static void piix4_pm_realize(PCIDevice *dev, Error **er= rp) qemu_add_machine_init_done_notifier(&s->machine_ready); qemu_register_reset(piix4_reset, s); =20 - piix4_acpi_system_hot_add_init(pci_address_space_io(dev), dev->bus, s); + piix4_acpi_system_hot_add_init(pci_address_space_io(dev), + pci_get_bus(dev), s); =20 piix4_pm_add_propeties(s); } diff --git a/hw/i386/xen/xen_platform.c b/hw/i386/xen/xen_platform.c index 056b87de0b..9ab54834d5 100644 --- a/hw/i386/xen/xen_platform.c +++ b/hw/i386/xen/xen_platform.c @@ -186,11 +186,11 @@ static void platform_fixed_ioport_writew(void *opaque= , uint32_t addr, uint32_t v if (val & (UNPLUG_IDE_SCSI_DISKS | UNPLUG_AUX_IDE_DISKS | UNPLUG_NVME_DISKS)) { DPRINTF("unplug disks\n"); - pci_unplug_disks(pci_dev->bus, val); + pci_unplug_disks(pci_get_bus(pci_dev), val); } if (val & UNPLUG_ALL_NICS) { DPRINTF("unplug nics\n"); - pci_unplug_nics(pci_dev->bus); + pci_unplug_nics(pci_get_bus(pci_dev)); } break; } @@ -372,17 +372,17 @@ static void xen_platform_ioport_writeb(void *opaque, = hwaddr addr, * If VMDP was to control both disk and LAN it would use 4. * If it controlled just disk or just LAN, it would use 8 belo= w. */ - pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS); - pci_unplug_nics(pci_dev->bus); + pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS); + pci_unplug_nics(pci_get_bus(pci_dev)); } break; case 8: switch (val) { case 1: - pci_unplug_disks(pci_dev->bus, UNPLUG_IDE_SCSI_DISKS); + pci_unplug_disks(pci_get_bus(pci_dev), UNPLUG_IDE_SCSI_DISKS); break; case 2: - pci_unplug_nics(pci_dev->bus); + pci_unplug_nics(pci_get_bus(pci_dev)); break; default: log_writeb(s, (uint32_t)val); diff --git a/hw/isa/lpc_ich9.c b/hw/isa/lpc_ich9.c index e77a4abb15..186457f8cb 100644 --- a/hw/isa/lpc_ich9.c +++ b/hw/isa/lpc_ich9.c @@ -161,7 +161,7 @@ static void ich9_cc_write(void *opaque, hwaddr addr, =20 ich9_cc_addr_len(&addr, &len); memcpy(lpc->chip_config + addr, &val, len); - pci_bus_fire_intx_routing_notifier(lpc->d.bus); + pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d)); ich9_cc_update(lpc); } =20 @@ -217,7 +217,7 @@ static void ich9_lpc_update_pic(ICH9LPCState *lpc, int = gsi) int tmp_dis; ich9_lpc_pic_irq(lpc, i, &tmp_irq, &tmp_dis); if (!tmp_dis && tmp_irq =3D=3D gsi) { - pic_level |=3D pci_bus_get_irq_level(lpc->d.bus, i); + pic_level |=3D pci_bus_get_irq_level(pci_get_bus(&lpc->d), i); } } if (gsi =3D=3D lpc->sci_gsi) { @@ -245,7 +245,7 @@ static void ich9_lpc_update_apic(ICH9LPCState *lpc, int= gsi) =20 assert(gsi >=3D ICH9_LPC_PIC_NUM_PINS); =20 - level |=3D pci_bus_get_irq_level(lpc->d.bus, ich9_gsi_to_pirq(gsi)); + level |=3D pci_bus_get_irq_level(pci_get_bus(&lpc->d), ich9_gsi_to_pir= q(gsi)); if (gsi =3D=3D lpc->sci_gsi) { level |=3D lpc->sci_level; } @@ -523,10 +523,10 @@ static void ich9_lpc_config_write(PCIDevice *d, ich9_lpc_rcba_update(lpc, rcba_old); } if (ranges_overlap(addr, len, ICH9_LPC_PIRQA_ROUT, 4)) { - pci_bus_fire_intx_routing_notifier(lpc->d.bus); + pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d)); } if (ranges_overlap(addr, len, ICH9_LPC_PIRQE_ROUT, 4)) { - pci_bus_fire_intx_routing_notifier(lpc->d.bus); + pci_bus_fire_intx_routing_notifier(pci_get_bus(&lpc->d)); } if (ranges_overlap(addr, len, ICH9_LPC_GEN_PMCON_1, 8)) { ich9_lpc_pmcon_update(lpc); diff --git a/hw/net/vmxnet3.c b/hw/net/vmxnet3.c index b8404cb2e2..0654d594c1 100644 --- a/hw/net/vmxnet3.c +++ b/hw/net/vmxnet3.c @@ -2356,7 +2356,7 @@ static void vmxnet3_pci_realize(PCIDevice *pci_dev, E= rror **errp) vmxnet3_net_init(s); =20 if (pci_is_express(pci_dev)) { - if (pci_bus_is_express(pci_dev->bus)) { + if (pci_bus_is_express(pci_get_bus(pci_dev))) { pcie_endpoint_cap_init(pci_dev, VMXNET3_EXP_EP_OFFSET); } =20 diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expand= er_bridge.c index 11dfa9258e..fb60f9a054 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -51,7 +51,8 @@ typedef struct PXBDev { =20 static PXBDev *convert_to_pxb(PCIDevice *dev) { - return pci_bus_is_express(dev->bus) ? PXB_PCIE_DEV(dev) : PXB_DEV(dev); + return pci_bus_is_express(pci_get_bus(dev)) + ? PXB_PCIE_DEV(dev) : PXB_DEV(dev); } =20 static GList *pxb_dev_list; @@ -159,7 +160,7 @@ static const TypeInfo pxb_host_info =3D { */ static void pxb_register_bus(PCIDevice *dev, PCIBus *pxb_bus, Error **errp) { - PCIBus *bus =3D dev->bus; + PCIBus *bus =3D pci_get_bus(dev); int pxb_bus_num =3D pci_bus_num(pxb_bus); =20 if (bus->parent_dev) { @@ -173,12 +174,12 @@ static void pxb_register_bus(PCIDevice *dev, PCIBus *= pxb_bus, Error **errp) return; } } - QLIST_INSERT_HEAD(&dev->bus->child, pxb_bus, sibling); + QLIST_INSERT_HEAD(&pci_get_bus(dev)->child, pxb_bus, sibling); } =20 static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) { - PCIDevice *pxb =3D pci_dev->bus->parent_dev; + PCIDevice *pxb =3D pci_get_bus(pci_dev)->parent_dev; =20 /* * The bios does not index the pxb slot number when @@ -233,8 +234,8 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool= pcie, Error **errp) } =20 bus->parent_dev =3D dev; - bus->address_space_mem =3D dev->bus->address_space_mem; - bus->address_space_io =3D dev->bus->address_space_io; + bus->address_space_mem =3D pci_get_bus(dev)->address_space_mem; + bus->address_space_io =3D pci_get_bus(dev)->address_space_io; bus->map_irq =3D pxb_map_irq_fn; =20 PCI_HOST_BRIDGE(ds)->bus =3D bus; @@ -265,7 +266,7 @@ err_register_bus: =20 static void pxb_dev_realize(PCIDevice *dev, Error **errp) { - if (pci_bus_is_express(dev->bus)) { + if (pci_bus_is_express(pci_get_bus(dev))) { error_setg(errp, "pxb devices cannot reside on a PCIe bus"); return; } @@ -317,7 +318,7 @@ static const TypeInfo pxb_dev_info =3D { =20 static void pxb_pcie_dev_realize(PCIDevice *dev, Error **errp) { - if (!pci_bus_is_express(dev->bus)) { + if (!pci_bus_is_express(pci_get_bus(dev))) { error_setg(errp, "pxb-pcie devices cannot reside on a PCI bus"); return; } diff --git a/hw/pci-host/piix.c b/hw/pci-host/piix.c index cf9070186c..effe3db8e2 100644 --- a/hw/pci-host/piix.c +++ b/hw/pci-host/piix.c @@ -512,12 +512,12 @@ static PCIINTxRoute piix3_route_intx_pin_to_irq(void = *opaque, int pin) /* irq routing is changed. so rebuild bitmap */ static void piix3_update_irq_levels(PIIX3State *piix3) { + PCIBus *bus =3D pci_get_bus(&piix3->dev); int pirq; =20 piix3->pic_levels =3D 0; for (pirq =3D 0; pirq < PIIX_NUM_PIRQS; pirq++) { - piix3_set_irq_level(piix3, pirq, - pci_bus_get_irq_level(piix3->dev.bus, pirq)); + piix3_set_irq_level(piix3, pirq, pci_bus_get_irq_level(bus, pirq)); } } =20 @@ -529,7 +529,7 @@ static void piix3_write_config(PCIDevice *dev, PIIX3State *piix3 =3D PIIX3_PCI_DEVICE(dev); int pic_irq; =20 - pci_bus_fire_intx_routing_notifier(piix3->dev.bus); + pci_bus_fire_intx_routing_notifier(pci_get_bus(&piix3->dev)); piix3_update_irq_levels(piix3); for (pic_irq =3D 0; pic_irq < PIIX_NUM_PIC_IRQS; pic_irq++) { piix3_set_irq_pic(piix3, pic_irq); @@ -601,7 +601,7 @@ static int piix3_post_load(void *opaque, int version_id) piix3->pic_levels =3D 0; for (pirq =3D 0; pirq < PIIX_NUM_PIRQS; pirq++) { piix3_set_irq_level_internal(piix3, pirq, - pci_bus_get_irq_level(piix3->dev.bus, pirq)); + pci_bus_get_irq_level(pci_get_bus(&piix3->dev), pirq)); } return 0; } @@ -613,7 +613,7 @@ static int piix3_pre_save(void *opaque) =20 for (i =3D 0; i < ARRAY_SIZE(piix3->pci_irq_levels_vmstate); i++) { piix3->pci_irq_levels_vmstate[i] =3D - pci_bus_get_irq_level(piix3->dev.bus, i); + pci_bus_get_irq_level(pci_get_bus(&piix3->dev), i); } =20 return 0; diff --git a/hw/pci-host/versatile.c b/hw/pci-host/versatile.c index b5bf4dce55..2586f8c982 100644 --- a/hw/pci-host/versatile.c +++ b/hw/pci-host/versatile.c @@ -310,7 +310,7 @@ static const MemoryRegionOps pci_vpb_config_ops =3D { =20 static int pci_vpb_map_irq(PCIDevice *d, int irq_num) { - PCIVPBState *s =3D container_of(d->bus, PCIVPBState, pci_bus); + PCIVPBState *s =3D container_of(pci_get_bus(d), PCIVPBState, pci_bus); =20 if (s->irq_mapping =3D=3D PCI_VPB_IRQMAP_BROKEN) { /* Legacy broken IRQ mapping for compatibility with old and diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 5fab7f23b3..cd4d9d7ecd 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -215,7 +215,7 @@ static void pci_change_irq_level(PCIDevice *pci_dev, in= t irq_num, int change) { PCIBus *bus; for (;;) { - bus =3D pci_dev->bus; + bus =3D pci_get_bus(pci_dev); irq_num =3D bus->map_irq(pci_dev, irq_num); if (bus->set_irq) break; @@ -342,13 +342,13 @@ PCIBus *pci_find_primary_bus(void) =20 PCIBus *pci_device_root_bus(const PCIDevice *d) { - PCIBus *bus =3D d->bus; + PCIBus *bus =3D pci_get_bus(d); =20 while (!pci_bus_is_root(bus)) { d =3D bus->parent_dev; assert(d !=3D NULL); =20 - bus =3D d->bus; + bus =3D pci_get_bus(d); } =20 return bus; @@ -871,7 +871,7 @@ static void pci_config_free(PCIDevice *pci_dev) =20 static void do_pci_unregister_device(PCIDevice *pci_dev) { - pci_dev->bus->devices[pci_dev->devfn] =3D NULL; + pci_get_bus(pci_dev)->devices[pci_dev->devfn] =3D NULL; pci_config_free(pci_dev); =20 if (memory_region_is_mapped(&pci_dev->bus_master_enable_region)) { @@ -892,7 +892,7 @@ static uint16_t pci_req_id_cache_extract(PCIReqIDCache = *cache) result =3D pci_get_bdf(cache->dev); break; case PCI_REQ_ID_SECONDARY_BUS: - bus_n =3D pci_bus_num(cache->dev->bus); + bus_n =3D pci_dev_bus_num(cache->dev); result =3D PCI_BUILD_BDF(bus_n, 0); break; default: @@ -922,9 +922,9 @@ static PCIReqIDCache pci_req_id_cache_get(PCIDevice *de= v) .type =3D PCI_REQ_ID_BDF, }; =20 - while (!pci_bus_is_root(dev->bus)) { + while (!pci_bus_is_root(pci_get_bus(dev))) { /* We are under PCI/PCIe bridges */ - parent =3D dev->bus->parent_dev; + parent =3D pci_get_bus(dev)->parent_dev; if (pci_is_express(parent)) { if (pcie_cap_get_type(parent) =3D=3D PCI_EXP_TYPE_PCI_BRIDGE) { /* When we pass through PCIe-to-PCI/PCIX bridges, we @@ -967,7 +967,7 @@ static bool pci_bus_devfn_reserved(PCIBus *bus, int dev= fn) } =20 /* -1 for devfn means auto assign */ -static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, PCIBus *bus, +static PCIDevice *do_pci_register_device(PCIDevice *pci_dev, const char *name, int devfn, Error **errp) { @@ -976,8 +976,8 @@ static PCIDevice *do_pci_register_device(PCIDevice *pci= _dev, PCIBus *bus, PCIConfigWriteFunc *config_write =3D pc->config_write; Error *local_err =3D NULL; DeviceState *dev =3D DEVICE(pci_dev); + PCIBus *bus =3D pci_get_bus(pci_dev); =20 - pci_dev->bus =3D bus; /* Only pci bridges can be attached to extra PCI root buses */ if (pci_bus_is_root(bus) && bus->parent_dev && !pc->is_bridge) { error_setg(errp, @@ -1131,8 +1131,8 @@ void pci_register_bar(PCIDevice *pci_dev, int region_= num, r->type =3D type; r->memory =3D memory; r->address_space =3D type & PCI_BASE_ADDRESS_SPACE_IO - ? pci_dev->bus->address_space_io - : pci_dev->bus->address_space_mem; + ? pci_get_bus(pci_dev)->address_space_io + : pci_get_bus(pci_dev)->address_space_mem; =20 wmask =3D ~(size - 1); if (region_num =3D=3D PCI_ROM_SLOT) { @@ -1174,21 +1174,23 @@ static void pci_update_vga(PCIDevice *pci_dev) void pci_register_vga(PCIDevice *pci_dev, MemoryRegion *mem, MemoryRegion *io_lo, MemoryRegion *io_hi) { + PCIBus *bus =3D pci_get_bus(pci_dev); + assert(!pci_dev->has_vga); =20 assert(memory_region_size(mem) =3D=3D QEMU_PCI_VGA_MEM_SIZE); pci_dev->vga_regions[QEMU_PCI_VGA_MEM] =3D mem; - memory_region_add_subregion_overlap(pci_dev->bus->address_space_mem, + memory_region_add_subregion_overlap(bus->address_space_mem, QEMU_PCI_VGA_MEM_BASE, mem, 1); =20 assert(memory_region_size(io_lo) =3D=3D QEMU_PCI_VGA_IO_LO_SIZE); pci_dev->vga_regions[QEMU_PCI_VGA_IO_LO] =3D io_lo; - memory_region_add_subregion_overlap(pci_dev->bus->address_space_io, + memory_region_add_subregion_overlap(bus->address_space_io, QEMU_PCI_VGA_IO_LO_BASE, io_lo, 1); =20 assert(memory_region_size(io_hi) =3D=3D QEMU_PCI_VGA_IO_HI_SIZE); pci_dev->vga_regions[QEMU_PCI_VGA_IO_HI] =3D io_hi; - memory_region_add_subregion_overlap(pci_dev->bus->address_space_io, + memory_region_add_subregion_overlap(bus->address_space_io, QEMU_PCI_VGA_IO_HI_BASE, io_hi, 1); pci_dev->has_vga =3D true; =20 @@ -1197,15 +1199,17 @@ void pci_register_vga(PCIDevice *pci_dev, MemoryReg= ion *mem, =20 void pci_unregister_vga(PCIDevice *pci_dev) { + PCIBus *bus =3D pci_get_bus(pci_dev); + if (!pci_dev->has_vga) { return; } =20 - memory_region_del_subregion(pci_dev->bus->address_space_mem, + memory_region_del_subregion(bus->address_space_mem, pci_dev->vga_regions[QEMU_PCI_VGA_MEM]); - memory_region_del_subregion(pci_dev->bus->address_space_io, + memory_region_del_subregion(bus->address_space_io, pci_dev->vga_regions[QEMU_PCI_VGA_IO_LO]); - memory_region_del_subregion(pci_dev->bus->address_space_io, + memory_region_del_subregion(bus->address_space_io, pci_dev->vga_regions[QEMU_PCI_VGA_IO_HI]); pci_dev->has_vga =3D false; } @@ -1308,7 +1312,7 @@ static void pci_update_mappings(PCIDevice *d) =20 /* now do the real mapping */ if (r->addr !=3D PCI_BAR_UNMAPPED) { - trace_pci_update_mappings_del(d, pci_bus_num(d->bus), + trace_pci_update_mappings_del(d, pci_dev_bus_num(d), PCI_SLOT(d->devfn), PCI_FUNC(d->devfn), i, r->addr, r->size); @@ -1316,7 +1320,7 @@ static void pci_update_mappings(PCIDevice *d) } r->addr =3D new_addr; if (r->addr !=3D PCI_BAR_UNMAPPED) { - trace_pci_update_mappings_add(d, pci_bus_num(d->bus), + trace_pci_update_mappings_add(d, pci_dev_bus_num(d), PCI_SLOT(d->devfn), PCI_FUNC(d->devfn), i, r->addr, r->size); @@ -1435,9 +1439,9 @@ PCIINTxRoute pci_device_route_intx_to_irq(PCIDevice *= dev, int pin) PCIBus *bus; =20 do { - bus =3D dev->bus; - pin =3D bus->map_irq(dev, pin); - dev =3D bus->parent_dev; + bus =3D pci_get_bus(dev); + pin =3D bus->map_irq(dev, pin); + dev =3D bus->parent_dev; } while (dev); =20 if (!bus->route_intx_to_irq) { @@ -2007,7 +2011,6 @@ static void pci_qdev_realize(DeviceState *qdev, Error= **errp) PCIDevice *pci_dev =3D (PCIDevice *)qdev; PCIDeviceClass *pc =3D PCI_DEVICE_GET_CLASS(pci_dev); Error *local_err =3D NULL; - PCIBus *bus; bool is_default_rom; =20 /* initialize cap_present for pci_is_express() and pci_config_size() */ @@ -2015,8 +2018,7 @@ static void pci_qdev_realize(DeviceState *qdev, Error= **errp) pci_dev->cap_present |=3D QEMU_PCI_CAP_EXPRESS; } =20 - bus =3D PCI_BUS(qdev_get_parent_bus(qdev)); - pci_dev =3D do_pci_register_device(pci_dev, bus, + pci_dev =3D do_pci_register_device(pci_dev, object_get_typename(OBJECT(qdev)), pci_dev->devfn, errp); if (pci_dev =3D=3D NULL) @@ -2309,7 +2311,7 @@ int pci_add_capability(PCIDevice *pdev, uint8_t cap_i= d, error_setg(errp, "%s:%02x:%02x.%x " "Attempt to add PCI capability %x at offset " "%x overlaps existing capability %x at offset %= x", - pci_root_bus_path(pdev), pci_bus_num(pdev->bus), + pci_root_bus_path(pdev), pci_dev_bus_num(pdev), PCI_SLOT(pdev->devfn), PCI_FUNC(pdev->devfn), cap_id, offset, overlapping_cap, i); return -EINVAL; @@ -2373,7 +2375,7 @@ static void pcibus_dev_print(Monitor *mon, DeviceStat= e *dev, int indent) =20 monitor_printf(mon, "%*sclass %s, addr %02x:%02x.%x, " "pci id %04x:%04x (sub %04x:%04x)\n", - indent, "", ctxt, pci_bus_num(d->bus), + indent, "", ctxt, pci_dev_bus_num(d), PCI_SLOT(d->devfn), PCI_FUNC(d->devfn), pci_get_word(d->config + PCI_VENDOR_ID), pci_get_word(d->config + PCI_DEVICE_ID), @@ -2456,7 +2458,7 @@ static char *pcibus_get_dev_path(DeviceState *dev) =20 /* Calculate # of slots on path between device and root. */; slot_depth =3D 0; - for (t =3D d; t; t =3D t->bus->parent_dev) { + for (t =3D d; t; t =3D pci_get_bus(t)->parent_dev) { ++slot_depth; } =20 @@ -2471,7 +2473,7 @@ static char *pcibus_get_dev_path(DeviceState *dev) /* Fill in slot numbers. We walk up from device to root, so need to pr= int * them in the reverse order, last to first. */ p =3D path + path_len; - for (t =3D d; t; t =3D t->bus->parent_dev) { + for (t =3D d; t; t =3D pci_get_bus(t)->parent_dev) { p -=3D slot_len; s =3D snprintf(slot, sizeof slot, ":%02x.%x", PCI_SLOT(t->devfn), PCI_FUNC(t->devfn)); @@ -2519,12 +2521,12 @@ int pci_qdev_find_device(const char *id, PCIDevice = **pdev) =20 MemoryRegion *pci_address_space(PCIDevice *dev) { - return dev->bus->address_space_mem; + return pci_get_bus(dev)->address_space_mem; } =20 MemoryRegion *pci_address_space_io(PCIDevice *dev) { - return dev->bus->address_space_io; + return pci_get_bus(dev)->address_space_io; } =20 static void pci_device_class_init(ObjectClass *klass, void *data) @@ -2552,11 +2554,11 @@ static void pci_device_class_base_init(ObjectClass = *klass, void *data) =20 AddressSpace *pci_device_iommu_address_space(PCIDevice *dev) { - PCIBus *bus =3D PCI_BUS(dev->bus); + PCIBus *bus =3D pci_get_bus(dev); PCIBus *iommu_bus =3D bus; =20 while(iommu_bus && !iommu_bus->iommu_fn && iommu_bus->parent_dev) { - iommu_bus =3D PCI_BUS(iommu_bus->parent_dev->bus); + iommu_bus =3D pci_get_bus(iommu_bus->parent_dev); } if (iommu_bus && iommu_bus->iommu_fn) { return iommu_bus->iommu_fn(bus, iommu_bus->iommu_opaque, dev->devf= n); @@ -2627,7 +2629,7 @@ void pci_bus_get_w64_range(PCIBus *bus, Range *range) =20 static bool pcie_has_upstream_port(PCIDevice *dev) { - PCIDevice *parent_dev =3D pci_bridge_get_device(dev->bus); + PCIDevice *parent_dev =3D pci_bridge_get_device(pci_get_bus(dev)); =20 /* Device associated with an upstream port. * As there are several types of these, it's easier to check the @@ -2643,12 +2645,14 @@ static bool pcie_has_upstream_port(PCIDevice *dev) =20 PCIDevice *pci_get_function_0(PCIDevice *pci_dev) { + PCIBus *bus =3D pci_get_bus(pci_dev); + if(pcie_has_upstream_port(pci_dev)) { /* With an upstream PCIe port, we only support 1 device at slot 0 = */ - return pci_dev->bus->devices[0]; + return bus->devices[0]; } else { /* Other bus types might support multiple devices at slots 0-31 */ - return pci_dev->bus->devices[PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 0= )]; + return bus->devices[PCI_DEVFN(PCI_SLOT(pci_dev->devfn), 0)]; } } =20 diff --git a/hw/pci/pci_bridge.c b/hw/pci/pci_bridge.c index 6a5072fcc6..f88c33e0e5 100644 --- a/hw/pci/pci_bridge.c +++ b/hw/pci/pci_bridge.c @@ -182,7 +182,7 @@ static void pci_bridge_init_vga_aliases(PCIBridge *br, = PCIBus *parent, static PCIBridgeWindows *pci_bridge_region_init(PCIBridge *br) { PCIDevice *pd =3D PCI_DEVICE(br); - PCIBus *parent =3D pd->bus; + PCIBus *parent =3D pci_get_bus(pd); PCIBridgeWindows *w =3D g_new(PCIBridgeWindows, 1); uint16_t cmd =3D pci_get_word(pd->config + PCI_COMMAND); =20 @@ -213,7 +213,7 @@ static PCIBridgeWindows *pci_bridge_region_init(PCIBrid= ge *br) static void pci_bridge_region_del(PCIBridge *br, PCIBridgeWindows *w) { PCIDevice *pd =3D PCI_DEVICE(br); - PCIBus *parent =3D pd->bus; + PCIBus *parent =3D pci_get_bus(pd); =20 memory_region_del_subregion(parent->address_space_io, &w->alias_io); memory_region_del_subregion(parent->address_space_mem, &w->alias_mem); @@ -338,7 +338,7 @@ void pci_bridge_reset(DeviceState *qdev) /* default qdev initialization function for PCI-to-PCI bridge */ void pci_bridge_initfn(PCIDevice *dev, const char *typename) { - PCIBus *parent =3D dev->bus; + PCIBus *parent =3D pci_get_bus(dev); PCIBridge *br =3D PCI_BRIDGE(dev); PCIBus *sec_bus =3D &br->sec_bus; =20 diff --git a/hw/pci/pcie.c b/hw/pci/pcie.c index 28ba4a0a72..424d2f7a64 100644 --- a/hw/pci/pcie.c +++ b/hw/pci/pcie.c @@ -154,7 +154,8 @@ pcie_endpoint_cap_common_init(PCIDevice *dev, uint8_t o= ffset, uint8_t cap_size) * a regular Endpoint type is exposed on a root complex. These * should instead be Root Complex Integrated Endpoints. */ - if (pci_bus_is_express(dev->bus) && pci_bus_is_root(dev->bus)) { + if (pci_bus_is_express(pci_get_bus(dev)) + && pci_bus_is_root(pci_get_bus(dev))) { type =3D PCI_EXP_TYPE_RC_END; } =20 @@ -368,7 +369,7 @@ void pcie_cap_slot_hot_unplug_request_cb(HotplugHandler= *hotplug_dev, { uint8_t *exp_cap; PCIDevice *pci_dev =3D PCI_DEVICE(dev); - PCIBus *bus =3D pci_dev->bus; + PCIBus *bus =3D pci_get_bus(pci_dev); =20 pcie_cap_slot_hotplug_common(PCI_DEVICE(hotplug_dev), dev, &exp_cap, e= rrp); =20 diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 7688293edc..5553e614af 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -408,7 +408,7 @@ static void pcie_aer_msg(PCIDevice *dev, const PCIEAERM= sg *msg) */ return; } - dev =3D pci_bridge_get_device(dev->bus); + dev =3D pci_bridge_get_device(pci_get_bus(dev)); } } =20 diff --git a/hw/ppc/spapr_pci.c b/hw/ppc/spapr_pci.c index 4742cad64c..13d7404693 100644 --- a/hw/ppc/spapr_pci.c +++ b/hw/ppc/spapr_pci.c @@ -504,7 +504,7 @@ static void rtas_ibm_get_config_addr_info2(PowerPCCPU *= cpu, goto param_error_exit; } =20 - rtas_st(rets, 1, (pci_bus_num(pdev->bus) << 16) + 1); + rtas_st(rets, 1, (pci_bus_num(pci_get_bus(pdev)) << 16) + 1); break; case RTAS_GET_PE_MODE: rtas_st(rets, 1, RTAS_PE_MODE_SHARED); diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index 1aecada271..721755ded3 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -679,10 +679,10 @@ static void s390_pcihost_hot_plug(HotplugHandler *hot= plug_dev, s->bus_no +=3D 1; pci_default_write_config(pdev, PCI_SECONDARY_BUS, s->bus_no, 1= ); do { - pdev =3D pdev->bus->parent_dev; + pdev =3D pci_get_bus(pdev)->parent_dev; pci_default_write_config(pdev, PCI_SUBORDINATE_BUS, s->bus_no, 1); - } while (pdev->bus && pci_bus_num(pdev->bus)); + } while (pci_get_bus(pdev) && pci_dev_bus_num(pdev)); } } else if (object_dynamic_cast(OBJECT(dev), TYPE_PCI_DEVICE)) { pdev =3D PCI_DEVICE(dev); @@ -712,7 +712,7 @@ static void s390_pcihost_hot_plug(HotplugHandler *hotpl= ug_dev, } =20 pbdev->pdev =3D pdev; - pbdev->iommu =3D s390_pci_get_iommu(s, pdev->bus, pdev->devfn); + pbdev->iommu =3D s390_pci_get_iommu(s, pci_get_bus(pdev), pdev->de= vfn); pbdev->iommu->pbdev =3D pbdev; pbdev->state =3D ZPCI_FS_DISABLED; =20 @@ -806,7 +806,7 @@ static void s390_pcihost_hot_unplug(HotplugHandler *hot= plug_dev, =20 s390_pci_generate_plug_event(HP_EVENT_STANDBY_TO_RESERVED, pbdev->fh, pbdev->fid); - bus =3D pci_dev->bus; + bus =3D pci_get_bus(pci_dev); devfn =3D pci_dev->devfn; object_unparent(OBJECT(pci_dev)); s390_pci_msix_free(pbdev); diff --git a/hw/scsi/vmw_pvscsi.c b/hw/scsi/vmw_pvscsi.c index d564e5caff..27749c0e42 100644 --- a/hw/scsi/vmw_pvscsi.c +++ b/hw/scsi/vmw_pvscsi.c @@ -1133,7 +1133,7 @@ pvscsi_realizefn(PCIDevice *pci_dev, Error **errp) =20 pvscsi_init_msi(s); =20 - if (pci_is_express(pci_dev) && pci_bus_is_express(pci_dev->bus)) { + if (pci_is_express(pci_dev) && pci_bus_is_express(pci_get_bus(pci_dev)= )) { pcie_endpoint_cap_init(pci_dev, PVSCSI_EXP_EP_OFFSET); } =20 diff --git a/hw/usb/hcd-xhci.c b/hw/usb/hcd-xhci.c index af3a9d88de..228e82b3fb 100644 --- a/hw/usb/hcd-xhci.c +++ b/hw/usb/hcd-xhci.c @@ -3416,7 +3416,7 @@ static void usb_xhci_realize(struct PCIDevice *dev, E= rror **errp) PCI_BASE_ADDRESS_SPACE_MEMORY|PCI_BASE_ADDRESS_MEM_TY= PE_64, &xhci->mem); =20 - if (pci_bus_is_express(dev->bus) || + if (pci_bus_is_express(pci_get_bus(dev)) || xhci_get_flag(xhci, XHCI_FLAG_FORCE_PCIE_ENDCAP)) { ret =3D pcie_endpoint_cap_init(dev, 0xa0); assert(ret > 0); diff --git a/hw/vfio/pci.c b/hw/vfio/pci.c index c977ee327f..2c71295125 100644 --- a/hw/vfio/pci.c +++ b/hw/vfio/pci.c @@ -1654,8 +1654,8 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev, i= nt pos, uint8_t size, return -EINVAL; } =20 - if (!pci_bus_is_express(vdev->pdev.bus)) { - PCIBus *bus =3D vdev->pdev.bus; + if (!pci_bus_is_express(pci_get_bus(&vdev->pdev))) { + PCIBus *bus =3D pci_get_bus(&vdev->pdev); PCIDevice *bridge; =20 /* @@ -1680,14 +1680,14 @@ static int vfio_setup_pcie_cap(VFIOPCIDevice *vdev,= int pos, uint8_t size, */ while (!pci_bus_is_root(bus)) { bridge =3D pci_bridge_get_device(bus); - bus =3D bridge->bus; + bus =3D pci_get_bus(bridge); } =20 if (pci_bus_is_express(bus)) { return 0; } =20 - } else if (pci_bus_is_root(vdev->pdev.bus)) { + } else if (pci_bus_is_root(pci_get_bus(&vdev->pdev))) { /* * On a Root Complex bus Endpoints become Root Complex Integrated * Endpoints, which changes the type and clears the LNK & LNK2 fie= lds. @@ -1890,7 +1890,7 @@ static void vfio_add_ext_cap(VFIOPCIDevice *vdev) uint8_t *config; =20 /* Only add extended caps if we have them and the guest can see them */ - if (!pci_is_express(pdev) || !pci_bus_is_express(pdev->bus) || + if (!pci_is_express(pdev) || !pci_bus_is_express(pci_get_bus(pdev)) || !pci_get_long(pdev->config + PCI_CONFIG_SPACE_SIZE)) { return; } diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index e92837c42b..42b31fbcf8 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1708,8 +1708,8 @@ static void virtio_pci_realize(PCIDevice *pci_dev, Er= ror **errp) { VirtIOPCIProxy *proxy =3D VIRTIO_PCI(pci_dev); VirtioPCIClass *k =3D VIRTIO_PCI_GET_CLASS(pci_dev); - bool pcie_port =3D pci_bus_is_express(pci_dev->bus) && - !pci_bus_is_root(pci_dev->bus); + bool pcie_port =3D pci_bus_is_express(pci_get_bus(pci_dev)) && + !pci_bus_is_root(pci_get_bus(pci_dev)); =20 if (kvm_enabled() && !kvm_has_many_ioeventfds()) { proxy->flags &=3D ~VIRTIO_PCI_FLAG_USE_IOEVENTFD; diff --git a/hw/xen/xen_pt.c b/hw/xen/xen_pt.c index 6236f0c391..752b6f6d5c 100644 --- a/hw/xen/xen_pt.c +++ b/hw/xen/xen_pt.c @@ -602,7 +602,7 @@ static void xen_pt_region_update(XenPCIPassthroughState= *s, } =20 args.type =3D d->io_regions[bar].type; - pci_for_each_device(d->bus, pci_bus_num(d->bus), + pci_for_each_device(pci_get_bus(d), pci_dev_bus_num(d), xen_pt_check_bar_overlap, &args); if (args.rc) { XEN_PT_WARN(d, "Region: %d (addr: %#"FMT_PCIBUS @@ -695,7 +695,7 @@ xen_igd_passthrough_isa_bridge_create(XenPCIPassthrough= State *s, PCIDevice *d =3D &s->dev; =20 gpu_dev_id =3D dev->device_id; - igd_passthrough_isa_bridge_create(d->bus, gpu_dev_id); + igd_passthrough_isa_bridge_create(pci_get_bus(d), gpu_dev_id); } =20 /* destroy. */ diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index a490a2c7d4..50034157fd 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -285,7 +285,6 @@ struct PCIDevice { uint8_t *used; =20 /* the following fields are read only */ - PCIBus *bus; int32_t devfn; /* Cached device to fetch requester ID from, to avoid the PCI * tree walking every time we invoke PCI request (e.g., @@ -487,10 +486,14 @@ PCIDevice *pci_nic_init_nofail(NICInfo *nd, PCIBus *r= ootbus, =20 PCIDevice *pci_vga_init(PCIBus *bus); =20 +static inline PCIBus *pci_get_bus(const PCIDevice *dev) +{ + return PCI_BUS(qdev_get_parent_bus(DEVICE(dev))); +} int pci_bus_num(PCIBus *s); static inline int pci_dev_bus_num(const PCIDevice *dev) { - return pci_bus_num(dev->bus); + return pci_bus_num(pci_get_bus(dev)); } =20 int pci_bus_numa_node(PCIBus *bus); @@ -795,7 +798,7 @@ static inline uint32_t pci_config_size(const PCIDevice = *d) =20 static inline uint16_t pci_get_bdf(PCIDevice *dev) { - return PCI_BUILD_BDF(pci_bus_num(dev->bus), dev->devfn); + return PCI_BUILD_BDF(pci_bus_num(pci_get_bus(dev)), dev->devfn); } =20 uint16_t pci_requester_id(PCIDevice *dev); --=20 2.14.3 From nobody Mon May 6 10:05:34 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511945499763714.2357936138536; Wed, 29 Nov 2017 00:51:39 -0800 (PST) Received: from localhost ([::1]:41862 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy5d-0005Ug-U9 for importer@patchew.org; Wed, 29 Nov 2017 03:51:33 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58873) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJy0v-00022g-75 for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJy0u-0005iD-5t for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:41 -0500 Received: from ozlabs.org ([103.22.144.67]:35463) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJy0t-0005db-P6 for qemu-devel@nongnu.org; Wed, 29 Nov 2017 03:46:40 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 3ymvK43dqtz9t2Z; Wed, 29 Nov 2017 19:46:32 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1511945192; bh=fviwXXjxFZjyzGclmArUPo2USb0/6t5bHuUdaiCtlK0=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=lLHHeUZqI9JlGpdadvjW1vTos7R7D1rpRRPFcUsjjzFdwwu4qZBT3oiCD9RT/FiSz R6NwnSINQ/CrNf1m8gqxOAfQuAC72SRVIAae+XtnrYud17IwNYXWWI3qNb05ZXRz3X PgG4Os8bWPGOqHPotjGMakR3cabxRrUROtKIvFrE= From: David Gibson To: "Michael S . Tsirkin" , Eduardo Habkost , Marcel Apfelbaum , Igor Mammedov Date: Wed, 29 Nov 2017 19:46:28 +1100 Message-Id: <20171129084628.12336-8-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.14.3 In-Reply-To: <20171129084628.12336-1-david@gibson.dropbear.id.au> References: <20171129084628.12336-1-david@gibson.dropbear.id.au> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 103.22.144.67 Subject: [Qemu-devel] [for-2.12 7/7] pci: Eliminate pci_find_primary_bus() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-devel@nongnu.org, David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" pci_find_primary_bus() only has one user, in pc_xen_hvm_init(). That's inside the machine construction code, so it already has easy access to the machine's primary PCI bus. Get it directly, and thereby remove pci_find_primary_bus(). This removes one of only a handful of users of the ugly pci_host_bridges global. Signed-off-by: David Gibson Reviewed-by: Marcel Apfelbaum Reviewed-by: Peter Xu --- hw/i386/pc_piix.c | 8 ++------ hw/pci/pci.c | 16 ---------------- include/hw/pci/pci.h | 1 - 3 files changed, 2 insertions(+), 23 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 5e47528993..2febd0e136 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -394,7 +394,7 @@ static void pc_xen_hvm_init_pci(MachineState *machine) =20 static void pc_xen_hvm_init(MachineState *machine) { - PCIBus *bus; + PCMachineState *pcms =3D PC_MACHINE(machine); =20 if (!xen_enabled()) { error_report("xenfv machine requires the xen accelerator"); @@ -402,11 +402,7 @@ static void pc_xen_hvm_init(MachineState *machine) } =20 pc_xen_hvm_init_pci(machine); - - bus =3D pci_find_primary_bus(); - if (bus !=3D NULL) { - pci_create_simple(bus, -1, "xen-platform"); - } + pci_create_simple(pcms->bus, -1, "xen-platform"); } #endif =20 diff --git a/hw/pci/pci.c b/hw/pci/pci.c index cd4d9d7ecd..ab76c4f3f1 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -324,22 +324,6 @@ static void pci_host_bus_register(DeviceState *host) QLIST_INSERT_HEAD(&pci_host_bridges, host_bridge, next); } =20 -PCIBus *pci_find_primary_bus(void) -{ - PCIBus *primary_bus =3D NULL; - PCIHostState *host; - - QLIST_FOREACH(host, &pci_host_bridges, next) { - if (primary_bus) { - /* We have multiple root buses, refuse to select a primary */ - return NULL; - } - primary_bus =3D host->bus; - } - - return primary_bus; -} - PCIBus *pci_device_root_bus(const PCIDevice *d) { PCIBus *bus =3D pci_get_bus(d); diff --git a/include/hw/pci/pci.h b/include/hw/pci/pci.h index 50034157fd..867b1ee175 100644 --- a/include/hw/pci/pci.h +++ b/include/hw/pci/pci.h @@ -519,7 +519,6 @@ void pci_for_each_bus(PCIBus *bus, pci_for_each_bus_depth_first(bus, NULL, fn, opaque); } =20 -PCIBus *pci_find_primary_bus(void); PCIBus *pci_device_root_bus(const PCIDevice *d); const char *pci_root_bus_path(PCIDevice *dev); PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn); --=20 2.14.3