From nobody Fri May 3 10:32:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511757512820641.2668577946721; Sun, 26 Nov 2017 20:38:32 -0800 (PST) Received: from localhost ([::1]:59145 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJBBT-0000vF-93 for importer@patchew.org; Sun, 26 Nov 2017 23:38:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43879) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJB9l-0007pM-IX for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJB9g-0004wR-Q4 for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:33 -0500 Received: from mga06.intel.com ([134.134.136.31]:29419) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJB9g-0004w1-Df for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:28 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Nov 2017 20:36:27 -0800 Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.142]) by orsmga003.jf.intel.com with ESMTP; 26 Nov 2017 20:36:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,462,1505804400"; d="scan'208";a="6602666" From: Haozhong Zhang To: qemu-devel@nongnu.org Date: Mon, 27 Nov 2017 12:35:15 +0800 Message-Id: <20171127043517.22441-2-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171127043517.22441-1-haozhong.zhang@intel.com> References: <20171127043517.22441-1-haozhong.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH v3 1/3] hostmem-file: add "align" option X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haozhong Zhang , Eduardo Habkost , Peter Crosthwaite , Stefan Hajnoczi , Xiao Guangrong , Paolo Bonzini , Igor Mammedov , Dan Williams , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When mmap(2) the backend files, QEMU uses the host page size (getpagesize(2)) by default as the alignment of mapping address. However, some backends may require alignments different than the page size. For example, mmap a device DAX (e.g., /dev/dax0.0) on Linux kernel 4.13 to an address, which is 4K-aligned but not 2M-aligned, fails with a kernel message like [617494.969768] dax dax0.0: qemu-system-x86: dax_mmap: fail, unaligned vma = (0x7fa37c579000 - 0x7fa43c579000, 0x1fffff) Because there is no common approach to get such alignment requirement, we add the 'align' option to 'memory-backend-file', so that users or management utils, which have enough knowledge about the backend, can specify a proper alignment via this option. Signed-off-by: Haozhong Zhang --- backends/hostmem-file.c | 41 ++++++++++++++++++++++++++++++++++++++++- docs/nvdimm.txt | 16 ++++++++++++++++ exec.c | 8 +++++++- include/exec/memory.h | 3 +++ memory.c | 2 ++ numa.c | 2 +- 6 files changed, 69 insertions(+), 3 deletions(-) diff --git a/backends/hostmem-file.c b/backends/hostmem-file.c index e44c319915..e319ec1ad8 100644 --- a/backends/hostmem-file.c +++ b/backends/hostmem-file.c @@ -34,6 +34,7 @@ struct HostMemoryBackendFile { bool share; bool discard_data; char *mem_path; + uint64_t align; }; =20 static void @@ -58,7 +59,7 @@ file_backend_memory_alloc(HostMemoryBackend *backend, Err= or **errp) path =3D object_get_canonical_path(OBJECT(backend)); memory_region_init_ram_from_file(&backend->mr, OBJECT(backend), path, - backend->size, fb->share, + backend->size, fb->align, fb->share, fb->mem_path, errp); g_free(path); } @@ -115,6 +116,40 @@ static void file_memory_backend_set_discard_data(Objec= t *o, bool value, MEMORY_BACKEND_FILE(o)->discard_data =3D value; } =20 +static void file_memory_backend_get_align(Object *o, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + HostMemoryBackendFile *fb =3D MEMORY_BACKEND_FILE(o); + uint64_t val =3D fb->align; + + visit_type_size(v, name, &val, errp); +} + +static void file_memory_backend_set_align(Object *o, Visitor *v, + const char *name, void *opaque, + Error **errp) +{ + HostMemoryBackend *backend =3D MEMORY_BACKEND(o); + HostMemoryBackendFile *fb =3D MEMORY_BACKEND_FILE(o); + Error *local_err =3D NULL; + uint64_t val; + + if (host_memory_backend_mr_inited(backend)) { + error_setg(&local_err, "cannot change property value"); + goto out; + } + + visit_type_size(v, name, &val, &local_err); + if (local_err) { + goto out; + } + fb->align =3D val; + + out: + error_propagate(errp, local_err); +} + static void file_backend_unparent(Object *obj) { HostMemoryBackend *backend =3D MEMORY_BACKEND(obj); @@ -145,6 +180,10 @@ file_backend_class_init(ObjectClass *oc, void *data) object_class_property_add_str(oc, "mem-path", get_mem_path, set_mem_path, &error_abort); + object_class_property_add(oc, "align", "int", + file_memory_backend_get_align, + file_memory_backend_set_align, + NULL, NULL, &error_abort); } =20 static void file_backend_instance_finalize(Object *o) diff --git a/docs/nvdimm.txt b/docs/nvdimm.txt index 2d9f8c0e8c..21249dd062 100644 --- a/docs/nvdimm.txt +++ b/docs/nvdimm.txt @@ -122,3 +122,19 @@ Note: M >=3D size of RAM devices + size of statically plugged vNVDIMM devices + size of hotplugged vNVDIMM devices + +Alignment +--------- + +QEMU uses mmap(2) to maps vNVDIMM backends and aligns the mapping +address to the page size (getpagesize(2)) by default. However, some +types of backends may require an alignment different than the page +size. In that case, QEMU v2.12.0 and later provide 'align' option to +memory-backend-file to allow users to specify the proper alignment. + +For example, device dax require the 2 MB alignment, so we can use +following QEMU command line options to use it (/dev/dax0.0) as the +backend of vNVDIMM: + + -object memory-backend-file,id=3Dmem1,share=3Don,mem-path=3D/dev/dax0.0,s= ize=3D4G,align=3D2M + -device nvdimm,id=3Dnvdimm1,memdev=3Dmem1 diff --git a/exec.c b/exec.c index 03238a3449..90440efecd 100644 --- a/exec.c +++ b/exec.c @@ -1600,7 +1600,13 @@ static void *file_ram_alloc(RAMBlock *block, void *area; =20 block->page_size =3D qemu_fd_getpagesize(fd); - block->mr->align =3D block->page_size; + if (block->mr->align % block->page_size) { + error_setg(errp, "aligment 0x%" PRIx64 + " must be multiples of page size 0x%" PRIx64, + block->mr->align, block->page_size); + return NULL; + } + block->mr->align =3D MAX(block->page_size, block->mr->align); #if defined(__s390x__) if (kvm_enabled()) { block->mr->align =3D MAX(block->mr->align, QEMU_VMALLOC_ALIGN); diff --git a/include/exec/memory.h b/include/exec/memory.h index 5ed4042f87..a1be8b06d3 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -465,6 +465,8 @@ void memory_region_init_resizeable_ram(MemoryRegion *mr, * @name: Region name, becomes part of RAMBlock name used in migration str= eam * must be unique within any device * @size: size of the region. + * @align: alignment of the region base address; if 0, the default alignme= nt + * (getpagesize()) will be used. * @share: %true if memory must be mmaped with the MAP_SHARED flag * @path: the path in which to allocate the RAM. * @errp: pointer to Error*, to store an error if it happens. @@ -476,6 +478,7 @@ void memory_region_init_ram_from_file(MemoryRegion *mr, struct Object *owner, const char *name, uint64_t size, + uint64_t align, bool share, const char *path, Error **errp); diff --git a/memory.c b/memory.c index e26e5a3b1d..2c80656e39 100644 --- a/memory.c +++ b/memory.c @@ -1570,6 +1570,7 @@ void memory_region_init_ram_from_file(MemoryRegion *m= r, struct Object *owner, const char *name, uint64_t size, + uint64_t align, bool share, const char *path, Error **errp) @@ -1578,6 +1579,7 @@ void memory_region_init_ram_from_file(MemoryRegion *m= r, mr->ram =3D true; mr->terminates =3D true; mr->destructor =3D memory_region_destructor_ram; + mr->align =3D align; mr->ram_block =3D qemu_ram_alloc_from_file(size, mr, share, path, errp= ); mr->dirty_log_mask =3D tcg_enabled() ? (1 << DIRTY_MEMORY_CODE) : 0; } diff --git a/numa.c b/numa.c index 7151b24d1c..b0fe22a60c 100644 --- a/numa.c +++ b/numa.c @@ -551,7 +551,7 @@ static void allocate_system_memory_nonnuma(MemoryRegion= *mr, Object *owner, if (mem_path) { #ifdef __linux__ Error *err =3D NULL; - memory_region_init_ram_from_file(mr, owner, name, ram_size, false, + memory_region_init_ram_from_file(mr, owner, name, ram_size, 0, fal= se, mem_path, &err); if (err) { error_report_err(err); --=20 2.14.1 From nobody Fri May 3 10:32:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511757508189960.44455998301; Sun, 26 Nov 2017 20:38:28 -0800 (PST) Received: from localhost ([::1]:59144 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJBBR-0000uk-OW for importer@patchew.org; Sun, 26 Nov 2017 23:38:17 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43881) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJB9l-0007pW-Ng for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:34 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJB9j-0004x7-50 for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:33 -0500 Received: from mga06.intel.com ([134.134.136.31]:29419) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJB9i-0004w1-Sz for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:31 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Nov 2017 20:36:30 -0800 Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.142]) by orsmga003.jf.intel.com with ESMTP; 26 Nov 2017 20:36:28 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,462,1505804400"; d="scan'208";a="6602676" From: Haozhong Zhang To: qemu-devel@nongnu.org Date: Mon, 27 Nov 2017 12:35:16 +0800 Message-Id: <20171127043517.22441-3-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171127043517.22441-1-haozhong.zhang@intel.com> References: <20171127043517.22441-1-haozhong.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH v3 2/3] nvdimm: add a macro for property "label-size" X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haozhong Zhang , Xiao Guangrong , "Michael S. Tsirkin" , Stefan Hajnoczi , Xiao Guangrong , Igor Mammedov , Dan Williams Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Haozhong Zhang Reviewed-by: Stefan Hajnoczi --- hw/mem/nvdimm.c | 2 +- include/hw/mem/nvdimm.h | 3 +++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c index 952fce5ec8..618c3d677b 100644 --- a/hw/mem/nvdimm.c +++ b/hw/mem/nvdimm.c @@ -66,7 +66,7 @@ out: =20 static void nvdimm_init(Object *obj) { - object_property_add(obj, "label-size", "int", + object_property_add(obj, NVDIMM_LABLE_SIZE_PROP, "int", nvdimm_get_label_size, nvdimm_set_label_size, NULL, NULL, NULL); } diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index 03e1ff9558..28e68ddf59 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -47,6 +47,9 @@ #define NVDIMM_CLASS(oc) OBJECT_CLASS_CHECK(NVDIMMClass, (oc), TYPE_NVDIMM) #define NVDIMM_GET_CLASS(obj) OBJECT_GET_CLASS(NVDIMMClass, (obj), \ TYPE_NVDIMM) + +#define NVDIMM_LABLE_SIZE_PROP "label-size" + struct NVDIMMDevice { /* private */ PCDIMMDevice parent_obj; --=20 2.14.1 From nobody Fri May 3 10:32:37 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1511757593364866.2579565387784; Sun, 26 Nov 2017 20:39:53 -0800 (PST) Received: from localhost ([::1]:59150 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJBCv-00021o-Lu for importer@patchew.org; Sun, 26 Nov 2017 23:39:49 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:43909) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eJB9o-0007rC-BV for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:37 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eJB9n-0004ye-3T for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:36 -0500 Received: from mga06.intel.com ([134.134.136.31]:29419) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eJB9m-0004w1-Nn for qemu-devel@nongnu.org; Sun, 26 Nov 2017 23:36:35 -0500 Received: from orsmga003.jf.intel.com ([10.7.209.27]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 26 Nov 2017 20:36:34 -0800 Received: from hz-desktop.sh.intel.com (HELO localhost) ([10.239.159.142]) by orsmga003.jf.intel.com with ESMTP; 26 Nov 2017 20:36:32 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,462,1505804400"; d="scan'208";a="6602684" From: Haozhong Zhang To: qemu-devel@nongnu.org Date: Mon, 27 Nov 2017 12:35:17 +0800 Message-Id: <20171127043517.22441-4-haozhong.zhang@intel.com> X-Mailer: git-send-email 2.14.1 In-Reply-To: <20171127043517.22441-1-haozhong.zhang@intel.com> References: <20171127043517.22441-1-haozhong.zhang@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 134.134.136.31 Subject: [Qemu-devel] [PATCH v3 3/3] nvdimm: add 'unarmed' option X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Haozhong Zhang , Xiao Guangrong , "Michael S. Tsirkin" , Stefan Hajnoczi , Xiao Guangrong , Igor Mammedov , Dan Williams Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Currently the only vNVDIMM backend can guarantee the guest write persistence is device DAX on Linux, because no host-side kernel cache is involved in the guest access to it. The approach to detect whether the backend is device DAX needs to access sysfs, which may not work with SELinux. Instead, we add the 'unarmed' option to device 'nvdimm', so that users or management utils, which have enough knowledge about the backend, can control the unarmed flag in guest ACPI NFIT via this option. The guest Linux NVDIMM driver, for example, will mark the corresponding vNVDIMM device read-only if the unarmed flag in guest NFIT is set. The default value of 'unarmed' option is 'off' in order to keep the backwards compatibility. Signed-off-by: Haozhong Zhang --- docs/nvdimm.txt | 15 +++++++++++++++ hw/acpi/nvdimm.c | 7 +++++++ hw/mem/nvdimm.c | 26 ++++++++++++++++++++++++++ include/hw/mem/nvdimm.h | 9 +++++++++ 4 files changed, 57 insertions(+) diff --git a/docs/nvdimm.txt b/docs/nvdimm.txt index 21249dd062..e903d8bb09 100644 --- a/docs/nvdimm.txt +++ b/docs/nvdimm.txt @@ -138,3 +138,18 @@ backend of vNVDIMM: =20 -object memory-backend-file,id=3Dmem1,share=3Don,mem-path=3D/dev/dax0.0,s= ize=3D4G,align=3D2M -device nvdimm,id=3Dnvdimm1,memdev=3Dmem1 + +Guest Data Persistence +---------------------- + +Though QEMU supports multiple types of vNVDIMM backends on Linux, +currently the only one that can guarantee the guest write persistence +is the device DAX on the real NVDIMM device (e.g., /dev/dax0.0), to +which all guest access do not involve any host-side kernel cache. + +When using other types of backends, it's suggested to set 'unarmed' +option of '-device nvdimm' to 'on', which sets the unarmed flag of the +guest NVDIMM region mapping structure. This unarmed flag indicates +guest software that this vNVDIMM device contains a region that cannot +accept persistent writes. In result, for example, the guest Linux +NVDIMM driver, marks such vNVDIMM device as read-only. diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c index 6ceea196e7..e55ff2cd12 100644 --- a/hw/acpi/nvdimm.c +++ b/hw/acpi/nvdimm.c @@ -138,6 +138,8 @@ struct NvdimmNfitMemDev { } QEMU_PACKED; typedef struct NvdimmNfitMemDev NvdimmNfitMemDev; =20 +#define ACPI_NFIT_MEM_NOT_ARMED (1 << 3) + /* * NVDIMM Control Region Structure * @@ -284,6 +286,7 @@ static void nvdimm_build_structure_memdev(GArray *structures, DeviceState *dev) { NvdimmNfitMemDev *nfit_memdev; + NVDIMMDevice *nvdimm =3D NVDIMM(OBJECT(dev)); uint64_t size =3D object_property_get_uint(OBJECT(dev), PC_DIMM_SIZE_P= ROP, NULL); int slot =3D object_property_get_int(OBJECT(dev), PC_DIMM_SLOT_PROP, @@ -312,6 +315,10 @@ nvdimm_build_structure_memdev(GArray *structures, Devi= ceState *dev) =20 /* Only one interleave for PMEM. */ nfit_memdev->interleave_ways =3D cpu_to_le16(1); + + if (nvdimm->unarmed) { + nfit_memdev->flags |=3D ACPI_NFIT_MEM_NOT_ARMED; + } } =20 /* diff --git a/hw/mem/nvdimm.c b/hw/mem/nvdimm.c index 618c3d677b..61e677f92f 100644 --- a/hw/mem/nvdimm.c +++ b/hw/mem/nvdimm.c @@ -25,6 +25,7 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qapi/visitor.h" +#include "qapi-visit.h" #include "hw/mem/nvdimm.h" =20 static void nvdimm_get_label_size(Object *obj, Visitor *v, const char *nam= e, @@ -64,11 +65,36 @@ out: error_propagate(errp, local_err); } =20 +static bool nvdimm_get_unarmed(Object *obj, Error **errp) +{ + NVDIMMDevice *nvdimm =3D NVDIMM(obj); + + return nvdimm->unarmed; +} + +static void nvdimm_set_unarmed(Object *obj, bool value, Error **errp) +{ + NVDIMMDevice *nvdimm =3D NVDIMM(obj); + Error *local_err =3D NULL; + + if (memory_region_size(&nvdimm->nvdimm_mr)) { + error_setg(&local_err, "cannot change property value"); + goto out; + } + + nvdimm->unarmed =3D value; + + out: + error_propagate(errp, local_err); +} + static void nvdimm_init(Object *obj) { object_property_add(obj, NVDIMM_LABLE_SIZE_PROP, "int", nvdimm_get_label_size, nvdimm_set_label_size, NULL, NULL, NULL); + object_property_add_bool(obj, NVDIMM_UNARMED_PROP, + nvdimm_get_unarmed, nvdimm_set_unarmed, NULL); } =20 static MemoryRegion *nvdimm_get_memory_region(PCDIMMDevice *dimm, Error **= errp) diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h index 28e68ddf59..7fd87c4e1c 100644 --- a/include/hw/mem/nvdimm.h +++ b/include/hw/mem/nvdimm.h @@ -49,6 +49,7 @@ TYPE_NVDIMM) =20 #define NVDIMM_LABLE_SIZE_PROP "label-size" +#define NVDIMM_UNARMED_PROP "unarmed" =20 struct NVDIMMDevice { /* private */ @@ -74,6 +75,14 @@ struct NVDIMMDevice { * guest via ACPI NFIT and _FIT method if NVDIMM hotplug is supported. */ MemoryRegion nvdimm_mr; + + /* + * The 'on' value results in the unarmed flag set in ACPI NFIT, + * which can be used to notify guest implicitly that the host + * backend (e.g., files on HDD, /dev/pmemX, etc.) cannot guarantee + * the guest write persistence. + */ + bool unarmed; }; typedef struct NVDIMMDevice NVDIMMDevice; =20 --=20 2.14.1