[Qemu-devel] [PATCH v11 0/5] Add support for Smartfusion2 SoC

Philippe Mathieu-Daudé posted 5 patches 6 years, 7 months ago
Patches applied successfully (tree, apply log)
git fetch https://github.com/patchew-project/qemu tags/patchew/20170920201737.25723-1-f4bug@amsat.org
Test checkpatch passed
Test docker passed
Test s390x passed
default-configs/arm-softmmu.mak |   1 +
include/hw/arm/msf2-soc.h       |  67 +++++++
include/hw/misc/msf2-sysreg.h   |  77 ++++++++
include/hw/ssi/mss-spi.h        |  58 ++++++
include/hw/timer/mss-timer.h    |  64 +++++++
hw/arm/msf2-soc.c               | 238 +++++++++++++++++++++++
hw/arm/msf2-som.c               | 105 +++++++++++
hw/misc/msf2-sysreg.c           | 160 ++++++++++++++++
hw/ssi/mss-spi.c                | 404 ++++++++++++++++++++++++++++++++++++++++
hw/timer/mss-timer.c            | 289 ++++++++++++++++++++++++++++
hw/arm/Makefile.objs            |   1 +
hw/misc/Makefile.objs           |   1 +
hw/misc/trace-events            |   5 +
hw/ssi/Makefile.objs            |   1 +
hw/timer/Makefile.objs          |   1 +
15 files changed, 1472 insertions(+)
create mode 100644 include/hw/arm/msf2-soc.h
create mode 100644 include/hw/misc/msf2-sysreg.h
create mode 100644 include/hw/ssi/mss-spi.h
create mode 100644 include/hw/timer/mss-timer.h
create mode 100644 hw/arm/msf2-soc.c
create mode 100644 hw/arm/msf2-som.c
create mode 100644 hw/misc/msf2-sysreg.c
create mode 100644 hw/ssi/mss-spi.c
create mode 100644 hw/timer/mss-timer.c
[Qemu-devel] [PATCH v11 0/5] Add support for Smartfusion2 SoC
Posted by Philippe Mathieu-Daudé 6 years, 7 months ago
Hi Peter,

Now than Igor's patch landed, I respin Sundeep's series updating it to work
after the "arm: drop intermediate cpu_model -> cpu type parsing and use cpu
type directly" patch.

v11:
- msf2-soc.c: add a check for null m3clk
- msf2-soc.c, msf2-som.c: drop cpu_model to directly use cpu type

--

Sundeep original cover:

I am trying to add Smartfusion2 SoC.
SoC is from Microsemi and System on Module(SOM)
board is from Emcraft systems. Smartfusion2 has hardened
Microcontroller(Cortex-M3)based Sub System and FPGA fabric.
At the moment only system timer, sysreg and SPI
controller are modelled.

Testing:
./arm-softmmu/qemu-system-arm -M emcraft-sf2 -serial mon:stdio \
-kernel u-boot.bin -display none -drive file=spi.bin,if=mtd,format=raw

Binaries u-boot.bin and spi.bin are at:
https://github.com/Subbaraya-Sundeep/qemu-test-binaries.git

U-boot is from Emcraft with modified
    - SPI driver not to use PDMA.
    - ugly hack to pass dtb to kernel in r1.
@
https://github.com/Subbaraya-Sundeep/emcraft-uboot-sf2.git

Linux is 4.5 linux with Smartfusion2 SoC dts and clocksource
driver added by myself @
https://github.com/Subbaraya-Sundeep/linux.git

v10:
    Added msf2_sysreg_realize in msf2-sysreg.c
    modified unimplemented devices names:
        pdma->dma and hpdma->hs-dma
    used uint8_t for apb divisors properties
    simplified msf2_divbits() using ctz32()

v9:
    used trace instead of DB_PRINT in msf2-sysreg.c
    used LOG_UNIMP for non guest errors in msf2-sysreg.c
    added unimplemented devices in msf2-soc.c
    removed .alias suffix in alias memory region name for eNVM
    removed mc->ignore_memory_transaction_failures in msf2-som.c

v8:
    memory_region_init_ram to memory_region_init_rom in soc
    %s/emcraft_sf2_init/emcraft_sf2_s2s010_init/g in som
    Added mc->ignore_memory_transaction_failures = true in som
        as per latest commit.
    Code simplifications as suggested by Alistair in sysreg and ssi.

v7:
    Removed vmstate_register_ram_global as per latest commit
    Moved header files to C which are local to C source files
    Removed abort() from msf2-sysreg.c
    Added VMStateDescription in mss-timer.c

v6:
    Moved some defines from header files to source files
    Added properties m3clk, apb0div, apb0div1 properties
    to soc.
    Added properties apb0divisor, apb1divisor to sysreg
    Update system_clock_source in msf2-soc.c
    Changed machine name smartfusion2-som->emcraft-sf2

v5
    As per Philippe comments:
        Added abort in Sysreg if guest tries to remap memory
        other than default mapping.
        Use of CONFIG_MSF2 in Makefile for soc.c
        Fixed incorrect logic in timer model.
        Renamed msf2-timer.c -> mss-timer.c
                msf2-spi.c -> mss-spi.c also type names
        Renamed function msf2_init->emcraft_sf2_init in msf2-som.c
        Added part-name,eNVM-size,eSRAM-size,pclk0 and pclk1
            properties to soc.
        Pass soc part-name,memory size and clock rate properties from som.
v4:
    Fixed build failure by using PRIx macros.
v3:
    Added SoC file and board file as per Alistair comments.
v2:
    Added SPI controller so that u-boot loads kernel from spi flash.
v1:
    Initial patch set with timer and sysreg

Thanks,
Sundeep

Subbaraya Sundeep (5):
  msf2: Add Smartfusion2 System timer
  msf2: Microsemi Smartfusion2 System Register block
  msf2: Add Smartfusion2 SPI controller
  msf2: Add Smartfusion2 SoC
  msf2: Add Emcraft's Smartfusion2 SOM kit

 default-configs/arm-softmmu.mak |   1 +
 include/hw/arm/msf2-soc.h       |  67 +++++++
 include/hw/misc/msf2-sysreg.h   |  77 ++++++++
 include/hw/ssi/mss-spi.h        |  58 ++++++
 include/hw/timer/mss-timer.h    |  64 +++++++
 hw/arm/msf2-soc.c               | 238 +++++++++++++++++++++++
 hw/arm/msf2-som.c               | 105 +++++++++++
 hw/misc/msf2-sysreg.c           | 160 ++++++++++++++++
 hw/ssi/mss-spi.c                | 404 ++++++++++++++++++++++++++++++++++++++++
 hw/timer/mss-timer.c            | 289 ++++++++++++++++++++++++++++
 hw/arm/Makefile.objs            |   1 +
 hw/misc/Makefile.objs           |   1 +
 hw/misc/trace-events            |   5 +
 hw/ssi/Makefile.objs            |   1 +
 hw/timer/Makefile.objs          |   1 +
 15 files changed, 1472 insertions(+)
 create mode 100644 include/hw/arm/msf2-soc.h
 create mode 100644 include/hw/misc/msf2-sysreg.h
 create mode 100644 include/hw/ssi/mss-spi.h
 create mode 100644 include/hw/timer/mss-timer.h
 create mode 100644 hw/arm/msf2-soc.c
 create mode 100644 hw/arm/msf2-som.c
 create mode 100644 hw/misc/msf2-sysreg.c
 create mode 100644 hw/ssi/mss-spi.c
 create mode 100644 hw/timer/mss-timer.c

-- 
2.14.1


Re: [Qemu-devel] [PATCH v11 0/5] Add support for Smartfusion2 SoC
Posted by sundeep subbaraya 6 years, 7 months ago
Thanks Philippe :)

Sundeep

On Thu, Sep 21, 2017 at 1:47 AM, Philippe Mathieu-Daudé <f4bug@amsat.org>
wrote:

> Hi Peter,
>
> Now than Igor's patch landed, I respin Sundeep's series updating it to work
> after the "arm: drop intermediate cpu_model -> cpu type parsing and use cpu
> type directly" patch.
>
> v11:
> - msf2-soc.c: add a check for null m3clk
> - msf2-soc.c, msf2-som.c: drop cpu_model to directly use cpu type
>
> --
>
> Sundeep original cover:
>
> I am trying to add Smartfusion2 SoC.
> SoC is from Microsemi and System on Module(SOM)
> board is from Emcraft systems. Smartfusion2 has hardened
> Microcontroller(Cortex-M3)based Sub System and FPGA fabric.
> At the moment only system timer, sysreg and SPI
> controller are modelled.
>
> Testing:
> ./arm-softmmu/qemu-system-arm -M emcraft-sf2 -serial mon:stdio \
> -kernel u-boot.bin -display none -drive file=spi.bin,if=mtd,format=raw
>
> Binaries u-boot.bin and spi.bin are at:
> https://github.com/Subbaraya-Sundeep/qemu-test-binaries.git
>
> U-boot is from Emcraft with modified
>     - SPI driver not to use PDMA.
>     - ugly hack to pass dtb to kernel in r1.
> @
> https://github.com/Subbaraya-Sundeep/emcraft-uboot-sf2.git
>
> Linux is 4.5 linux with Smartfusion2 SoC dts and clocksource
> driver added by myself @
> https://github.com/Subbaraya-Sundeep/linux.git
>
> v10:
>     Added msf2_sysreg_realize in msf2-sysreg.c
>     modified unimplemented devices names:
>         pdma->dma and hpdma->hs-dma
>     used uint8_t for apb divisors properties
>     simplified msf2_divbits() using ctz32()
>
> v9:
>     used trace instead of DB_PRINT in msf2-sysreg.c
>     used LOG_UNIMP for non guest errors in msf2-sysreg.c
>     added unimplemented devices in msf2-soc.c
>     removed .alias suffix in alias memory region name for eNVM
>     removed mc->ignore_memory_transaction_failures in msf2-som.c
>
> v8:
>     memory_region_init_ram to memory_region_init_rom in soc
>     %s/emcraft_sf2_init/emcraft_sf2_s2s010_init/g in som
>     Added mc->ignore_memory_transaction_failures = true in som
>         as per latest commit.
>     Code simplifications as suggested by Alistair in sysreg and ssi.
>
> v7:
>     Removed vmstate_register_ram_global as per latest commit
>     Moved header files to C which are local to C source files
>     Removed abort() from msf2-sysreg.c
>     Added VMStateDescription in mss-timer.c
>
> v6:
>     Moved some defines from header files to source files
>     Added properties m3clk, apb0div, apb0div1 properties
>     to soc.
>     Added properties apb0divisor, apb1divisor to sysreg
>     Update system_clock_source in msf2-soc.c
>     Changed machine name smartfusion2-som->emcraft-sf2
>
> v5
>     As per Philippe comments:
>         Added abort in Sysreg if guest tries to remap memory
>         other than default mapping.
>         Use of CONFIG_MSF2 in Makefile for soc.c
>         Fixed incorrect logic in timer model.
>         Renamed msf2-timer.c -> mss-timer.c
>                 msf2-spi.c -> mss-spi.c also type names
>         Renamed function msf2_init->emcraft_sf2_init in msf2-som.c
>         Added part-name,eNVM-size,eSRAM-size,pclk0 and pclk1
>             properties to soc.
>         Pass soc part-name,memory size and clock rate properties from som.
> v4:
>     Fixed build failure by using PRIx macros.
> v3:
>     Added SoC file and board file as per Alistair comments.
> v2:
>     Added SPI controller so that u-boot loads kernel from spi flash.
> v1:
>     Initial patch set with timer and sysreg
>
> Thanks,
> Sundeep
>
> Subbaraya Sundeep (5):
>   msf2: Add Smartfusion2 System timer
>   msf2: Microsemi Smartfusion2 System Register block
>   msf2: Add Smartfusion2 SPI controller
>   msf2: Add Smartfusion2 SoC
>   msf2: Add Emcraft's Smartfusion2 SOM kit
>
>  default-configs/arm-softmmu.mak |   1 +
>  include/hw/arm/msf2-soc.h       |  67 +++++++
>  include/hw/misc/msf2-sysreg.h   |  77 ++++++++
>  include/hw/ssi/mss-spi.h        |  58 ++++++
>  include/hw/timer/mss-timer.h    |  64 +++++++
>  hw/arm/msf2-soc.c               | 238 +++++++++++++++++++++++
>  hw/arm/msf2-som.c               | 105 +++++++++++
>  hw/misc/msf2-sysreg.c           | 160 ++++++++++++++++
>  hw/ssi/mss-spi.c                | 404 ++++++++++++++++++++++++++++++
> ++++++++++
>  hw/timer/mss-timer.c            | 289 ++++++++++++++++++++++++++++
>  hw/arm/Makefile.objs            |   1 +
>  hw/misc/Makefile.objs           |   1 +
>  hw/misc/trace-events            |   5 +
>  hw/ssi/Makefile.objs            |   1 +
>  hw/timer/Makefile.objs          |   1 +
>  15 files changed, 1472 insertions(+)
>  create mode 100644 include/hw/arm/msf2-soc.h
>  create mode 100644 include/hw/misc/msf2-sysreg.h
>  create mode 100644 include/hw/ssi/mss-spi.h
>  create mode 100644 include/hw/timer/mss-timer.h
>  create mode 100644 hw/arm/msf2-soc.c
>  create mode 100644 hw/arm/msf2-som.c
>  create mode 100644 hw/misc/msf2-sysreg.c
>  create mode 100644 hw/ssi/mss-spi.c
>  create mode 100644 hw/timer/mss-timer.c
>
> --
> 2.14.1
>
>
Re: [Qemu-devel] [PATCH v11 0/5] Add support for Smartfusion2 SoC
Posted by Peter Maydell 6 years, 7 months ago
On 20 September 2017 at 21:17, Philippe Mathieu-Daudé <f4bug@amsat.org> wrote:
> Hi Peter,
>
> Now than Igor's patch landed, I respin Sundeep's series updating it to work
> after the "arm: drop intermediate cpu_model -> cpu type parsing and use cpu
> type directly" patch.
>
> v11:
> - msf2-soc.c: add a check for null m3clk
> - msf2-soc.c, msf2-som.c: drop cpu_model to directly use cpu type
>
> --

Applied to target-arm.next.

Thanks to Sundeep for being so patient with our code review process,
and to Philippe and Alistair for doing the review and shepherding
the series through it.

thank
-- PMM

Re: [Qemu-devel] [PATCH v11 0/5] Add support for Smartfusion2 SoC
Posted by sundeep subbaraya 6 years, 7 months ago
Thanks Peter, Philippe and Alistair :)
Sundeep

On Thu, Sep 21, 2017 at 10:03 PM, Peter Maydell <peter.maydell@linaro.org>
wrote:

> On 20 September 2017 at 21:17, Philippe Mathieu-Daudé <f4bug@amsat.org>
> wrote:
> > Hi Peter,
> >
> > Now than Igor's patch landed, I respin Sundeep's series updating it to
> work
> > after the "arm: drop intermediate cpu_model -> cpu type parsing and use
> cpu
> > type directly" patch.
> >
> > v11:
> > - msf2-soc.c: add a check for null m3clk
> > - msf2-soc.c, msf2-som.c: drop cpu_model to directly use cpu type
> >
> > --
>
> Applied to target-arm.next.
>
> Thanks to Sundeep for being so patient with our code review process,
> and to Philippe and Alistair for doing the review and shepherding
> the series through it.
>
> thank
> -- PMM
>