From nobody Sun May 5 11:19:26 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500615789014184.23227844340022; Thu, 20 Jul 2017 22:43:09 -0700 (PDT) Received: from localhost ([::1]:41149 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dYQiP-0007jh-C6 for importer@patchew.org; Fri, 21 Jul 2017 01:43:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:48756) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dYQhc-0007Sq-Co for qemu-devel@nongnu.org; Fri, 21 Jul 2017 01:42:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dYQhY-00006t-De for qemu-devel@nongnu.org; Fri, 21 Jul 2017 01:42:16 -0400 Received: from out1-smtp.messagingengine.com ([66.111.4.25]:47121) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dYQhY-00006X-2t for qemu-devel@nongnu.org; Fri, 21 Jul 2017 01:42:12 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id 5F6EC20A66; Fri, 21 Jul 2017 01:42:11 -0400 (EDT) Received: from frontend2 ([10.202.2.161]) by compute4.internal (MEProxy); Fri, 21 Jul 2017 01:42:11 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 1D70A24081; Fri, 21 Jul 2017 01:42:11 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :content-type:date:from:in-reply-to:message-id:mime-version :references:subject:to:x-me-sender:x-me-sender:x-sasl-enc :x-sasl-enc; s=mesmtp; bh=GLjvP6UUtfB0ligDFGy7ZPNIRLkUeFVbbyTvNX tLitc=; b=pKe33/DrePBNbZEq35riuvjMqFNYM4P7Z1MhKKuiQdoVj11I1MUQR6 quyhtlxE4HpgRRh+xJmJruHJECSwNrjlf5KV6OYgyJJZy7hrXsYZ6bedAJBGFRrV myEkt6kfvDJpjrcRxVhSIS7mEUnogRkeLN/29wF4F0ibEHHoJxJ/k= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:content-type:date:from:in-reply-to :message-id:mime-version:references:subject:to:x-me-sender :x-me-sender:x-sasl-enc:x-sasl-enc; s=fm1; bh=GLjvP6UUtfB0ligDFG y7ZPNIRLkUeFVbbyTvNXtLitc=; b=pu0LPkOUu8E3SuKXRj5hMOy+Vxt3G+TM6G 2pxIDL55yRBkv3Dh/Tv87e7m4AIS6c80FqrSGxN+RdY7T+vlUz41NzYiJgfot5OA oQDMENvA+kH/UGC7v/KebreBIdVC6PPMYstSEsWSEDkgszpEX4TIN7uG1sYpY6WT +2IWHCAlueSNqIj6kabdU+KRR31M4OxE29bI9lCXzZiyWF7gZP8uvstt+GHi+Nwq S+33QfMeeD8M+iBiyGu3CODm4PptLVgquusPOahza3w0nD6He3Pn53ZKkc43do3l Em+Qto0Sciz8ziCyRxrro+Nr6PPj887RRuGjg7seeihBReEQLxdg== X-ME-Sender: X-Sasl-enc: A5D7jzqhXKTj026CKj3iUxzJJomjW4fkfvHyzATcrg+I 1500615731 Date: Fri, 21 Jul 2017 01:42:10 -0400 From: "Emilio G. Cota" To: Richard Henderson Message-ID: <20170721054210.GA16334@flamenco> References: <20170719233455.8740-1-rth@twiddle.net> <20170719233455.8740-7-rth@twiddle.net> MIME-Version: 1.0 Content-Disposition: inline In-Reply-To: <20170719233455.8740-7-rth@twiddle.net> User-Agent: Mutt/1.5.24 (2015-08-30) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.25 Subject: [Qemu-devel] [PATCH] target/arm: fix TCG temp leak in aarch64 rev16 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-devel@nongnu.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable Content-Type: text/plain; charset="utf-8" On Wed, Jul 19, 2017 at 13:34:47 -1000, Richard Henderson wrote: > It is much shorter to reverse all 4 half-words in parallel > than extract, reverse, and deposit each in turn. >=20 > Suggested-by: Aurelien Jarno > Signed-off-by: Richard Henderson > --- > target/arm/translate-a64.c | 24 ++++++------------------ > 1 file changed, 6 insertions(+), 18 deletions(-) >=20 > diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c > index 3fa39023ca..5bb0f8ef22 100644 > --- a/target/arm/translate-a64.c > +++ b/target/arm/translate-a64.c > @@ -4043,25 +4043,13 @@ static void handle_rev16(DisasContext *s, unsigne= d int sf, > TCGv_i64 tcg_rd =3D cpu_reg(s, rd); > TCGv_i64 tcg_tmp =3D tcg_temp_new_i64(); > TCGv_i64 tcg_rn =3D read_cpu_reg(s, rn, sf); > + TCGv_i64 mask =3D tcg_const_i64(sf ? 0x00ff00ff00ff00ffull : 0x00ff0= 0ff); > =20 > - tcg_gen_andi_i64(tcg_tmp, tcg_rn, 0xffff); > - tcg_gen_bswap16_i64(tcg_rd, tcg_tmp); > - > - tcg_gen_shri_i64(tcg_tmp, tcg_rn, 16); > - tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff); > - tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp); > - tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 16, 16); > - > - if (sf) { > - tcg_gen_shri_i64(tcg_tmp, tcg_rn, 32); > - tcg_gen_andi_i64(tcg_tmp, tcg_tmp, 0xffff); > - tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp); > - tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 32, 16); > - > - tcg_gen_shri_i64(tcg_tmp, tcg_rn, 48); > - tcg_gen_bswap16_i64(tcg_tmp, tcg_tmp); > - tcg_gen_deposit_i64(tcg_rd, tcg_rd, tcg_tmp, 48, 16); > - } > + tcg_gen_shri_i64(tcg_tmp, tcg_rn, 8); > + tcg_gen_and_i64(tcg_rd, tcg_rn, mask); > + tcg_gen_and_i64(tcg_tmp, tcg_tmp, mask); > + tcg_gen_shli_i64(tcg_rd, tcg_rd, 8); > + tcg_gen_or_i64(tcg_rd, tcg_rd, tcg_tmp); > =20 > tcg_temp_free_i64(tcg_tmp); const leak! patch below -- cut with `git am --scissors'. Emilio ---8<--- Signed-off-by: Emilio G. Cota --- target/arm/translate-a64.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c index 883e9df..58ed4c6 100644 --- a/target/arm/translate-a64.c +++ b/target/arm/translate-a64.c @@ -4044,20 +4044,21 @@ static void handle_rev16(DisasContext *s, unsigned = int sf, TCGv_i64 tcg_tmp =3D tcg_temp_new_i64(); TCGv_i64 tcg_rn =3D read_cpu_reg(s, rn, sf); TCGv_i64 mask =3D tcg_const_i64(sf ? 0x00ff00ff00ff00ffull : 0x00ff00f= f); =20 tcg_gen_shri_i64(tcg_tmp, tcg_rn, 8); tcg_gen_and_i64(tcg_rd, tcg_rn, mask); tcg_gen_and_i64(tcg_tmp, tcg_tmp, mask); tcg_gen_shli_i64(tcg_rd, tcg_rd, 8); tcg_gen_or_i64(tcg_rd, tcg_rd, tcg_tmp); =20 + tcg_temp_free_i64(mask); tcg_temp_free_i64(tcg_tmp); } =20 /* C3.5.7 Data-processing (1 source) * 31 30 29 28 21 20 16 15 10 9 5 4 0 * +----+---+---+-----------------+---------+--------+------+------+ * | sf | 1 | S | 1 1 0 1 0 1 1 0 | opcode2 | opcode | Rn | Rd | * +----+---+---+-----------------+---------+--------+------+------+ */ static void disas_data_proc_1src(DisasContext *s, uint32_t insn) --=20 2.7.4