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[97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.36 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:37 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=IViwNHcf/zEo7ApaAZ235h4liHsQUxWd5M0SeDhfg9o=; b=LBlHLSX3INykmGfELSkkW3nkKRWbbM96xUqu7s0dF54/LBnc9U+trUVzKE20b5SdMN LvV8IsWuFbOaUdj441mRX1h7yrbyexfateqxvokvNtY5O0UyGoMQp+3dlDgrh1Sh0w8J HEG0PuwnFQe0zT1PPDe75FGGjiYhubNrkQkbvMe7t34/pBC4FgiEvdAJu7lKkB2hGHxF /l1MoiIvv/vAjMgRCOrIgFINPYAXmPgswDcbvvdM5xDTunVf1u9f6f6ImS/NXVGWsADE UpKtzri0kWW2cBgfyT7HmqjfAWTpaN4M3lt5mc3+hy1yKPD6alsDfddTYVnQLWM22jqR vrbQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=IViwNHcf/zEo7ApaAZ235h4liHsQUxWd5M0SeDhfg9o=; b=bIWlZbRBVLdD+nus6Dh5gmEuRIfWVa0sfkdUKxPkEdzNVbHKG318T+7adNNw0fkV1F Rxx+12PO4J3S65z0X7UViXfpW/NY0jsEse2eVj80DL1pJeSFgkt3XfDVRaG1lUKPu6Jx bgaOH+9ERl/FpfUwYryq7cVz6BD0AcXx18Q7PKlgzzmQs2+v0cZQbB3KkdSKL4XhxDtI QihiPp4dBmhZWJebjokBwtUpYKcHhUU/5DJN5wYcyoEMavLcFb7rNaGGzWHOykBJwH3e O4sjASZaV3ezxPqOsM7Zqcm/UhpKOffJ6ZaYJ9gzDR39s4qKcQtOXjmoMFaMpJgdRtu2 KEiw== X-Gm-Message-State: AKS2vOycfwxwk52SUMr0YNzx5B1HbKXZVinK8XNh/3JHvGqUjU8qUBMN H/k6VmgSBJUA0H9mytI= X-Received: by 10.237.32.68 with SMTP id 62mr39615860qta.218.1498013317927; Tue, 20 Jun 2017 19:48:37 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:16 -0700 Message-Id: <20170621024831.26019-2-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 01/16] tcg: Merge opcode arguments into TCGOp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Rather than have a separate buffer of 10*max_ops entries, give each opcode 10 entries. The result is actually a bit smaller and should have slightly more cache locality. Signed-off-by: Richard Henderson --- tcg/optimize.c | 6 ++-- tcg/tcg-op.c | 99 +++++++++++++++++++++---------------------------------= ---- tcg/tcg.c | 98 ++++++++++++++++++++++++++----------------------------= --- tcg/tcg.h | 33 +++++++------------- 4 files changed, 94 insertions(+), 142 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index adfc56c..002aad6 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -576,7 +576,7 @@ void tcg_optimize(TCGContext *s) TCGArg tmp; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D &s->gen_opparam_buf[op->args]; + TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; =20 @@ -1184,7 +1184,7 @@ void tcg_optimize(TCGContext *s) uint64_t b =3D ((uint64_t)bh << 32) | bl; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); - TCGArg *args2 =3D &s->gen_opparam_buf[op2->args]; + TCGArg *args2 =3D op2->args; =20 if (opc =3D=3D INDEX_op_add2_i32) { a +=3D b; @@ -1210,7 +1210,7 @@ void tcg_optimize(TCGContext *s) uint64_t r =3D (uint64_t)a * b; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); - TCGArg *args2 =3D &s->gen_opparam_buf[op2->args]; + TCGArg *args2 =3D op2->args; =20 rl =3D args[0]; rh =3D args[1]; diff --git a/tcg/tcg-op.c b/tcg/tcg-op.c index 87f673e..3a627c1 100644 --- a/tcg/tcg-op.c +++ b/tcg/tcg-op.c @@ -45,107 +45,78 @@ extern TCGv_i32 TCGV_HIGH_link_error(TCGv_i64); Up to and including filling in the forward link immediately. We'll do proper termination of the end of the list after we finish translation. = */ =20 -static void tcg_emit_op(TCGContext *ctx, TCGOpcode opc, int args) +static inline TCGOp *tcg_emit_op(TCGContext *ctx, TCGOpcode opc) { int oi =3D ctx->gen_next_op_idx; int ni =3D oi + 1; int pi =3D oi - 1; + TCGOp *op =3D &ctx->gen_op_buf[oi]; =20 tcg_debug_assert(oi < OPC_BUF_SIZE); ctx->gen_op_buf[0].prev =3D oi; ctx->gen_next_op_idx =3D ni; =20 - ctx->gen_op_buf[oi] =3D (TCGOp){ - .opc =3D opc, - .args =3D args, - .prev =3D pi, - .next =3D ni - }; + memset(op, 0, offsetof(TCGOp, args)); + op->opc =3D opc; + op->prev =3D pi; + op->next =3D ni; + + return op; } =20 void tcg_gen_op1(TCGContext *ctx, TCGOpcode opc, TCGArg a1) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 1 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 1; - ctx->gen_opparam_buf[pi] =3D a1; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; } =20 void tcg_gen_op2(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 2 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 2; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; } =20 void tcg_gen_op3(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 3 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 3; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; } =20 void tcg_gen_op4(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 4 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 4; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - ctx->gen_opparam_buf[pi + 3] =3D a4; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; + op->args[3] =3D a4; } =20 void tcg_gen_op5(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 5 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 5; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - ctx->gen_opparam_buf[pi + 3] =3D a4; - ctx->gen_opparam_buf[pi + 4] =3D a5; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; + op->args[3] =3D a4; + op->args[4] =3D a5; } =20 void tcg_gen_op6(TCGContext *ctx, TCGOpcode opc, TCGArg a1, TCGArg a2, TCGArg a3, TCGArg a4, TCGArg a5, TCGArg a6) { - int pi =3D ctx->gen_next_parm_idx; - - tcg_debug_assert(pi + 6 <=3D OPPARAM_BUF_SIZE); - ctx->gen_next_parm_idx =3D pi + 6; - ctx->gen_opparam_buf[pi + 0] =3D a1; - ctx->gen_opparam_buf[pi + 1] =3D a2; - ctx->gen_opparam_buf[pi + 2] =3D a3; - ctx->gen_opparam_buf[pi + 3] =3D a4; - ctx->gen_opparam_buf[pi + 4] =3D a5; - ctx->gen_opparam_buf[pi + 5] =3D a6; - - tcg_emit_op(ctx, opc, pi); + TCGOp *op =3D tcg_emit_op(ctx, opc); + op->args[0] =3D a1; + op->args[1] =3D a2; + op->args[2] =3D a3; + op->args[3] =3D a4; + op->args[4] =3D a5; + op->args[5] =3D a6; } =20 void tcg_gen_mb(TCGBar mb_type) diff --git a/tcg/tcg.c b/tcg/tcg.c index 3559829..298aa0c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -469,7 +469,6 @@ void tcg_func_start(TCGContext *s) s->gen_op_buf[0].next =3D 1; s->gen_op_buf[0].prev =3D 0; s->gen_next_op_idx =3D 1; - s->gen_next_parm_idx =3D 0; =20 s->be =3D tcg_malloc(sizeof(TCGBackendData)); } @@ -757,9 +756,10 @@ int tcg_check_temp_count(void) void tcg_gen_callN(TCGContext *s, void *func, TCGArg ret, int nargs, TCGArg *args) { - int i, real_args, nb_rets, pi, pi_first; + int i, real_args, nb_rets, pi; unsigned sizemask, flags; TCGHelperInfo *info; + TCGOp *op; =20 info =3D g_hash_table_lookup(s->helpers, (gpointer)func); flags =3D info->flags; @@ -772,11 +772,11 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, int orig_sizemask =3D sizemask; int orig_nargs =3D nargs; TCGv_i64 retl, reth; + TCGArg split_args[MAX_OPC_PARAM]; =20 TCGV_UNUSED_I64(retl); TCGV_UNUSED_I64(reth); if (sizemask !=3D 0) { - TCGArg *split_args =3D __builtin_alloca(sizeof(TCGArg) * nargs * 2= ); for (i =3D real_args =3D 0; i < nargs; ++i) { int is_64bit =3D sizemask & (1 << (i+1)*2); if (is_64bit) { @@ -811,7 +811,19 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg r= et, } #endif /* TCG_TARGET_EXTEND_ARGS */ =20 - pi_first =3D pi =3D s->gen_next_parm_idx; + i =3D s->gen_next_op_idx; + tcg_debug_assert(i < OPC_BUF_SIZE); + s->gen_op_buf[0].prev =3D i; + s->gen_next_op_idx =3D i + 1; + op =3D &s->gen_op_buf[i]; + + /* Set links for sequential allocation during translation. */ + memset(op, 0, offsetof(TCGOp, args)); + op->opc =3D INDEX_op_call; + op->prev =3D i - 1; + op->next =3D i + 1; + + pi =3D 0; if (ret !=3D TCG_CALL_DUMMY_ARG) { #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) @@ -821,31 +833,33 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, two return temporaries, and reassemble below. */ retl =3D tcg_temp_new_i64(); reth =3D tcg_temp_new_i64(); - s->gen_opparam_buf[pi++] =3D GET_TCGV_I64(reth); - s->gen_opparam_buf[pi++] =3D GET_TCGV_I64(retl); + op->args[pi++] =3D GET_TCGV_I64(reth); + op->args[pi++] =3D GET_TCGV_I64(retl); nb_rets =3D 2; } else { - s->gen_opparam_buf[pi++] =3D ret; + op->args[pi++] =3D ret; nb_rets =3D 1; } #else if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { #ifdef HOST_WORDS_BIGENDIAN - s->gen_opparam_buf[pi++] =3D ret + 1; - s->gen_opparam_buf[pi++] =3D ret; + op->args[pi++] =3D ret + 1; + op->args[pi++] =3D ret; #else - s->gen_opparam_buf[pi++] =3D ret; - s->gen_opparam_buf[pi++] =3D ret + 1; + op->args[pi++] =3D ret; + op->args[pi++] =3D ret + 1; #endif nb_rets =3D 2; } else { - s->gen_opparam_buf[pi++] =3D ret; + op->args[pi++] =3D ret; nb_rets =3D 1; } #endif } else { nb_rets =3D 0; } + op->callo =3D nb_rets; + real_args =3D 0; for (i =3D 0; i < nargs; i++) { int is_64bit =3D sizemask & (1 << (i+1)*2); @@ -853,7 +867,7 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg re= t, #ifdef TCG_TARGET_CALL_ALIGN_ARGS /* some targets want aligned 64 bit args */ if (real_args & 1) { - s->gen_opparam_buf[pi++] =3D TCG_CALL_DUMMY_ARG; + op->args[pi++] =3D TCG_CALL_DUMMY_ARG; real_args++; } #endif @@ -868,42 +882,26 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, have to get more complicated to differentiate between stack arguments and register arguments. */ #if defined(HOST_WORDS_BIGENDIAN) !=3D defined(TCG_TARGET_STACK_GROWSUP) - s->gen_opparam_buf[pi++] =3D args[i] + 1; - s->gen_opparam_buf[pi++] =3D args[i]; + op->args[pi++] =3D args[i] + 1; + op->args[pi++] =3D args[i]; #else - s->gen_opparam_buf[pi++] =3D args[i]; - s->gen_opparam_buf[pi++] =3D args[i] + 1; + op->args[pi++] =3D args[i]; + op->args[pi++] =3D args[i] + 1; #endif real_args +=3D 2; continue; } =20 - s->gen_opparam_buf[pi++] =3D args[i]; + op->args[pi++] =3D args[i]; real_args++; } - s->gen_opparam_buf[pi++] =3D (uintptr_t)func; - s->gen_opparam_buf[pi++] =3D flags; + op->args[pi++] =3D (uintptr_t)func; + op->args[pi++] =3D flags; + op->calli =3D real_args; =20 - i =3D s->gen_next_op_idx; - tcg_debug_assert(i < OPC_BUF_SIZE); - tcg_debug_assert(pi <=3D OPPARAM_BUF_SIZE); - - /* Set links for sequential allocation during translation. */ - s->gen_op_buf[i] =3D (TCGOp){ - .opc =3D INDEX_op_call, - .callo =3D nb_rets, - .calli =3D real_args, - .args =3D pi_first, - .prev =3D i - 1, - .next =3D i + 1 - }; - - /* Make sure the calli field didn't overflow. */ - tcg_debug_assert(s->gen_op_buf[i].calli =3D=3D real_args); - - s->gen_op_buf[0].prev =3D i; - s->gen_next_op_idx =3D i + 1; - s->gen_next_parm_idx =3D pi; + /* Make sure the fields didn't overflow. */ + tcg_debug_assert(op->calli =3D=3D real_args); + tcg_debug_assert(pi <=3D ARRAY_SIZE(op->args)); =20 #if defined(__sparc__) && !defined(__arch64__) \ && !defined(CONFIG_TCG_INTERPRETER) @@ -1063,7 +1061,7 @@ void tcg_dump_ops(TCGContext *s) op =3D &s->gen_op_buf[oi]; c =3D op->opc; def =3D &tcg_op_defs[c]; - args =3D &s->gen_opparam_buf[op->args]; + args =3D op->args; =20 if (c =3D=3D INDEX_op_insn_start) { col +=3D qemu_log("%s ----", oi !=3D s->gen_op_buf[0].next ? "= \n" : ""); @@ -1347,20 +1345,16 @@ TCGOp *tcg_op_insert_before(TCGContext *s, TCGOp *o= ld_op, TCGOpcode opc, int nargs) { int oi =3D s->gen_next_op_idx; - int pi =3D s->gen_next_parm_idx; int prev =3D old_op->prev; int next =3D old_op - s->gen_op_buf; TCGOp *new_op; =20 tcg_debug_assert(oi < OPC_BUF_SIZE); - tcg_debug_assert(pi + nargs <=3D OPPARAM_BUF_SIZE); s->gen_next_op_idx =3D oi + 1; - s->gen_next_parm_idx =3D pi + nargs; =20 new_op =3D &s->gen_op_buf[oi]; *new_op =3D (TCGOp){ .opc =3D opc, - .args =3D pi, .prev =3D prev, .next =3D next }; @@ -1374,20 +1368,16 @@ TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *ol= d_op, TCGOpcode opc, int nargs) { int oi =3D s->gen_next_op_idx; - int pi =3D s->gen_next_parm_idx; int prev =3D old_op - s->gen_op_buf; int next =3D old_op->next; TCGOp *new_op; =20 tcg_debug_assert(oi < OPC_BUF_SIZE); - tcg_debug_assert(pi + nargs <=3D OPPARAM_BUF_SIZE); s->gen_next_op_idx =3D oi + 1; - s->gen_next_parm_idx =3D pi + nargs; =20 new_op =3D &s->gen_op_buf[oi]; *new_op =3D (TCGOp){ .opc =3D opc, - .args =3D pi, .prev =3D prev, .next =3D next }; @@ -1443,7 +1433,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) TCGArg arg; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D &s->gen_opparam_buf[op->args]; + TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; =20 @@ -1681,7 +1671,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) =20 for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp *op =3D &s->gen_op_buf[oi]; - TCGArg *args =3D &s->gen_opparam_buf[op->args]; + TCGArg *args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; @@ -1724,7 +1714,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) ? INDEX_op_ld_i32 : INDEX_op_ld_i64); TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); - TCGArg *largs =3D &s->gen_opparam_buf[lop->args]; + TCGArg *largs =3D lop->args; =20 largs[0] =3D dir; largs[1] =3D temp_idx(s, its->mem_base); @@ -1796,7 +1786,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) ? INDEX_op_st_i32 : INDEX_op_st_i64); TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); - TCGArg *sargs =3D &s->gen_opparam_buf[sop->args]; + TCGArg *sargs =3D sop->args; =20 sargs[0] =3D dir; sargs[1] =3D temp_idx(s, its->mem_base); @@ -2624,7 +2614,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) num_insns =3D -1; for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D &s->gen_opparam_buf[op->args]; + TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; diff --git a/tcg/tcg.h b/tcg/tcg.h index 9e37722..720e04e 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -51,8 +51,6 @@ #define OPC_BUF_SIZE 640 #define OPC_MAX_SIZE (OPC_BUF_SIZE - MAX_OP_PER_INSTR) =20 -#define OPPARAM_BUF_SIZE (OPC_BUF_SIZE * MAX_OPC_PARAM) - #define CPU_TEMP_BUF_NLONGS 128 =20 /* Default target word size to pointer size. */ @@ -613,33 +611,29 @@ typedef struct TCGTempSet { #define SYNC_ARG 1 typedef uint16_t TCGLifeData; =20 -/* The layout here is designed to avoid crossing of a 32-bit boundary. - If we do so, gcc adds padding, expanding the size to 12. */ +/* The layout here is designed to avoid crossing of a 32-bit boundary. */ typedef struct TCGOp { TCGOpcode opc : 8; /* 8 */ =20 - /* Index of the prev/next op, or 0 for the end of the list. */ - unsigned prev : 10; /* 18 */ - unsigned next : 10; /* 28 */ - /* The number of out and in parameter for a call. */ - unsigned calli : 4; /* 32 */ - unsigned callo : 2; /* 34 */ + unsigned calli : 4; /* 12 */ + unsigned callo : 2; /* 14 */ + unsigned : 2; /* 16 */ =20 - /* Index of the arguments for this op, or 0 for zero-operand ops. */ - unsigned args : 14; /* 48 */ + /* Index of the prev/next op, or 0 for the end of the list. */ + unsigned prev : 16; /* 32 */ + unsigned next : 16; /* 48 */ =20 /* Lifetime data of the operands. */ unsigned life : 16; /* 64 */ + + /* Arguments for the opcode. */ + TCGArg args[MAX_OPC_PARAM]; } TCGOp; =20 /* Make sure operands fit in the bitfields above. */ QEMU_BUILD_BUG_ON(NB_OPS > (1 << 8)); -QEMU_BUILD_BUG_ON(OPC_BUF_SIZE > (1 << 10)); -QEMU_BUILD_BUG_ON(OPPARAM_BUF_SIZE > (1 << 14)); - -/* Make sure that we don't overflow 64 bits without noticing. */ -QEMU_BUILD_BUG_ON(sizeof(TCGOp) > 8); +QEMU_BUILD_BUG_ON(OPC_BUF_SIZE > (1 << 16)); =20 struct TCGContext { uint8_t *pool_cur, *pool_end; @@ -691,7 +685,6 @@ struct TCGContext { #endif =20 int gen_next_op_idx; - int gen_next_parm_idx; =20 /* Code generation. Note that we specifically do not use tcg_insn_unit here, because there's too much arithmetic throughout that relies @@ -723,7 +716,6 @@ struct TCGContext { TCGTemp *reg_to_temp[TCG_TARGET_NB_REGS]; =20 TCGOp gen_op_buf[OPC_BUF_SIZE]; - TCGArg gen_opparam_buf[OPPARAM_BUF_SIZE]; =20 uint16_t gen_insn_end_off[TCG_MAX_INSNS]; target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS]; @@ -734,8 +726,7 @@ extern bool parallel_cpus; =20 static inline void tcg_set_insn_param(int op_idx, int arg, TCGArg v) { - int op_argi =3D tcg_ctx.gen_op_buf[op_idx].args; - tcg_ctx.gen_opparam_buf[op_argi + arg] =3D v; + tcg_ctx.gen_op_buf[op_idx].args[arg] =3D v; } =20 /* The number of opcodes emitted so far. */ --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013587608685.0127910818703; Tue, 20 Jun 2017 19:53:07 -0700 (PDT) Received: from localhost ([::1]:51546 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVlR-0001Dd-Lu for importer@patchew.org; Tue, 20 Jun 2017 22:53:05 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33857) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhD-0006Pv-IR for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhA-0002Kv-Nd for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:43 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:36443) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhA-0002Kn-Hc for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:40 -0400 Received: by mail-qt0-x243.google.com with SMTP id s33so25675738qtg.3 for ; Tue, 20 Jun 2017 19:48:40 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.38 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:38 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=b9U6reDYiILsAGygkbvLDTEbp9KF14sEfXBRIU+u2v0=; b=ZWtQpJfPPHpMQjOLgtEcFXFyc52Jen4hAItwEFOARszxb6l0iJfXc21s4WffVscNRr /UrN3A5HPTp61U/WterzC+eQC5DyURludxCHy+f9McOpQ7cUyPO9kcDk4UlgMF4EyHBW 4yKXk6o/tOeF1g7VZsHoc/VyKT2jez0Y88O1BnV9ei2YpABolCOOIGpedN68lxaSr/8o WR1t+bP0RlDPTmDuHIyrV2a1Ol09HCttC5DBRnNM2ey8nj2rV0xcDVgf7M80zitf6CTq fKk8GS7lFtn2/SYz3Ry+f2P9vpUschGFf5wNEj8noORx0aFUHvspBfpboLdIJyc6zK7e /urQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=b9U6reDYiILsAGygkbvLDTEbp9KF14sEfXBRIU+u2v0=; b=j+smR1BhDE4IJNcoS3q9T8EuKxMFOaW5ZxrlFgvsm7kMIhtKHuUsMLrCQ6nuZU5bga NYB4HFRzH5fPUDkLvq/V1XRr5IgdKQebSYjTYnFaSMr/jrholWdfsIBoPoCs2wdWLvYQ pTgyiRvRPZ4RNVzYTo6EsOsS7tMqTgDy3pZhxxkZUZRhMU8ZmGWj7I48OWyXZfRlRurZ 5fmBhvhjyGuYVPaAZlKPx1N3efCkm5KjTKKPrsE5F6gI7YDBDhCjNFCTEfUuu5tn7KSx VZT/7v5UNOByzDUJ/rCGhnMvgNhVBJPrChtuvEM9URj4Tj3POOZpPjb6hIh/ppGwyZrP QgXw== X-Gm-Message-State: AKS2vOwMoAJJ/Wn1NHnLsy19RyOYf3VQAMiUz0mBM/dzQbJnzVKgvkBc gXfm2q94DLUbmm4dTWI= X-Received: by 10.200.56.67 with SMTP id r3mr29592816qtb.174.1498013319218; Tue, 20 Jun 2017 19:48:39 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:17 -0700 Message-Id: <20170621024831.26019-3-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PATCH 02/16] tcg: Propagate args to op->args in optimizer X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/optimize.c | 430 ++++++++++++++++++++++++++++++-----------------------= ---- 1 file changed, 227 insertions(+), 203 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 002aad6..1a1c6fb 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -166,8 +166,7 @@ static bool temps_are_copies(TCGArg arg1, TCGArg arg2) return false; } =20 -static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg *args, - TCGArg dst, TCGArg val) +static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg = val) { TCGOpcode new_op =3D op_to_movi(op->opc); tcg_target_ulong mask; @@ -184,12 +183,11 @@ static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op= , TCGArg *args, } temps[dst].mask =3D mask; =20 - args[0] =3D dst; - args[1] =3D val; + op->args[0] =3D dst; + op->args[1] =3D val; } =20 -static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg *args, - TCGArg dst, TCGArg src) +static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg s= rc) { if (temps_are_copies(dst, src)) { tcg_op_remove(s, op); @@ -218,8 +216,8 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, T= CGArg *args, temps[dst].val =3D temps[src].val; } =20 - args[0] =3D dst; - args[1] =3D src; + op->args[0] =3D dst; + op->args[1] =3D src; } =20 static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) @@ -559,7 +557,7 @@ static bool swap_commutative2(TCGArg *p1, TCGArg *p2) void tcg_optimize(TCGContext *s) { int oi, oi_next, nb_temps, nb_globals; - TCGArg *prev_mb_args =3D NULL; + TCGOp *prev_mb =3D NULL; =20 /* Array VALS has an element for each temp. If this temp holds a constant then its value is kept in VALS' eleme= nt. @@ -576,7 +574,6 @@ void tcg_optimize(TCGContext *s) TCGArg tmp; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; =20 @@ -588,7 +585,7 @@ void tcg_optimize(TCGContext *s) nb_oargs =3D op->callo; nb_iargs =3D op->calli; for (i =3D 0; i < nb_oargs + nb_iargs; i++) { - tmp =3D args[i]; + tmp =3D op->args[i]; if (tmp !=3D TCG_CALL_DUMMY_ARG) { init_temp_info(tmp); } @@ -597,14 +594,14 @@ void tcg_optimize(TCGContext *s) nb_oargs =3D def->nb_oargs; nb_iargs =3D def->nb_iargs; for (i =3D 0; i < nb_oargs + nb_iargs; i++) { - init_temp_info(args[i]); + init_temp_info(op->args[i]); } } =20 /* Do copy propagation */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { - if (temp_is_copy(args[i])) { - args[i] =3D find_better_copy(s, args[i]); + if (temp_is_copy(op->args[i])) { + op->args[i] =3D find_better_copy(s, op->args[i]); } } =20 @@ -620,45 +617,45 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(nor): CASE_OP_32_64(muluh): CASE_OP_32_64(mulsh): - swap_commutative(args[0], &args[1], &args[2]); + swap_commutative(op->args[0], &op->args[1], &op->args[2]); break; CASE_OP_32_64(brcond): - if (swap_commutative(-1, &args[0], &args[1])) { - args[2] =3D tcg_swap_cond(args[2]); + if (swap_commutative(-1, &op->args[0], &op->args[1])) { + op->args[2] =3D tcg_swap_cond(op->args[2]); } break; CASE_OP_32_64(setcond): - if (swap_commutative(args[0], &args[1], &args[2])) { - args[3] =3D tcg_swap_cond(args[3]); + if (swap_commutative(op->args[0], &op->args[1], &op->args[2]))= { + op->args[3] =3D tcg_swap_cond(op->args[3]); } break; CASE_OP_32_64(movcond): - if (swap_commutative(-1, &args[1], &args[2])) { - args[5] =3D tcg_swap_cond(args[5]); + if (swap_commutative(-1, &op->args[1], &op->args[2])) { + op->args[5] =3D tcg_swap_cond(op->args[5]); } /* For movcond, we canonicalize the "false" input reg to match the destination reg so that the tcg backend can implement a "move if true" operation. */ - if (swap_commutative(args[0], &args[4], &args[3])) { - args[5] =3D tcg_invert_cond(args[5]); + if (swap_commutative(op->args[0], &op->args[4], &op->args[3]))= { + op->args[5] =3D tcg_invert_cond(op->args[5]); } break; CASE_OP_32_64(add2): - swap_commutative(args[0], &args[2], &args[4]); - swap_commutative(args[1], &args[3], &args[5]); + swap_commutative(op->args[0], &op->args[2], &op->args[4]); + swap_commutative(op->args[1], &op->args[3], &op->args[5]); break; CASE_OP_32_64(mulu2): CASE_OP_32_64(muls2): - swap_commutative(args[0], &args[2], &args[3]); + swap_commutative(op->args[0], &op->args[2], &op->args[3]); break; case INDEX_op_brcond2_i32: - if (swap_commutative2(&args[0], &args[2])) { - args[4] =3D tcg_swap_cond(args[4]); + if (swap_commutative2(&op->args[0], &op->args[2])) { + op->args[4] =3D tcg_swap_cond(op->args[4]); } break; case INDEX_op_setcond2_i32: - if (swap_commutative2(&args[1], &args[3])) { - args[5] =3D tcg_swap_cond(args[5]); + if (swap_commutative2(&op->args[1], &op->args[3])) { + op->args[5] =3D tcg_swap_cond(op->args[5]); } break; default: @@ -673,8 +670,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(sar): CASE_OP_32_64(rotl): CASE_OP_32_64(rotr): - if (temp_is_const(args[1]) && temps[args[1]].val =3D=3D 0) { - tcg_opt_gen_movi(s, op, args, args[0], 0); + if (temp_is_const(op->args[1]) && temps[op->args[1]].val =3D= =3D 0) { + tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } break; @@ -683,7 +680,7 @@ void tcg_optimize(TCGContext *s) TCGOpcode neg_op; bool have_neg; =20 - if (temp_is_const(args[2])) { + if (temp_is_const(op->args[2])) { /* Proceed with possible constant folding. */ break; } @@ -697,40 +694,45 @@ void tcg_optimize(TCGContext *s) if (!have_neg) { break; } - if (temp_is_const(args[1]) && temps[args[1]].val =3D=3D 0)= { + if (temp_is_const(op->args[1]) + && temps[op->args[1]].val =3D=3D 0) { op->opc =3D neg_op; - reset_temp(args[0]); - args[1] =3D args[2]; + reset_temp(op->args[0]); + op->args[1] =3D op->args[2]; continue; } } break; CASE_OP_32_64(xor): CASE_OP_32_64(nand): - if (!temp_is_const(args[1]) - && temp_is_const(args[2]) && temps[args[2]].val =3D=3D -1)= { + if (!temp_is_const(op->args[1]) + && temp_is_const(op->args[2]) + && temps[op->args[2]].val =3D=3D -1) { i =3D 1; goto try_not; } break; CASE_OP_32_64(nor): - if (!temp_is_const(args[1]) - && temp_is_const(args[2]) && temps[args[2]].val =3D=3D 0) { + if (!temp_is_const(op->args[1]) + && temp_is_const(op->args[2]) + && temps[op->args[2]].val =3D=3D 0) { i =3D 1; goto try_not; } break; CASE_OP_32_64(andc): - if (!temp_is_const(args[2]) - && temp_is_const(args[1]) && temps[args[1]].val =3D=3D -1)= { + if (!temp_is_const(op->args[2]) + && temp_is_const(op->args[1]) + && temps[op->args[1]].val =3D=3D -1) { i =3D 2; goto try_not; } break; CASE_OP_32_64(orc): CASE_OP_32_64(eqv): - if (!temp_is_const(args[2]) - && temp_is_const(args[1]) && temps[args[1]].val =3D=3D 0) { + if (!temp_is_const(op->args[2]) + && temp_is_const(op->args[1]) + && temps[op->args[1]].val =3D=3D 0) { i =3D 2; goto try_not; } @@ -751,8 +753,8 @@ void tcg_optimize(TCGContext *s) break; } op->opc =3D not_op; - reset_temp(args[0]); - args[1] =3D args[i]; + reset_temp(op->args[0]); + op->args[1] =3D op->args[i]; continue; } default: @@ -771,18 +773,20 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(or): CASE_OP_32_64(xor): CASE_OP_32_64(andc): - if (!temp_is_const(args[1]) - && temp_is_const(args[2]) && temps[args[2]].val =3D=3D 0) { - tcg_opt_gen_mov(s, op, args, args[0], args[1]); + if (!temp_is_const(op->args[1]) + && temp_is_const(op->args[2]) + && temps[op->args[2]].val =3D=3D 0) { + tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } break; CASE_OP_32_64(and): CASE_OP_32_64(orc): CASE_OP_32_64(eqv): - if (!temp_is_const(args[1]) - && temp_is_const(args[2]) && temps[args[2]].val =3D=3D -1)= { - tcg_opt_gen_mov(s, op, args, args[0], args[1]); + if (!temp_is_const(op->args[1]) + && temp_is_const(op->args[2]) + && temps[op->args[2]].val =3D=3D -1) { + tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } break; @@ -796,21 +800,21 @@ void tcg_optimize(TCGContext *s) affected =3D -1; switch (opc) { CASE_OP_32_64(ext8s): - if ((temps[args[1]].mask & 0x80) !=3D 0) { + if ((temps[op->args[1]].mask & 0x80) !=3D 0) { break; } CASE_OP_32_64(ext8u): mask =3D 0xff; goto and_const; CASE_OP_32_64(ext16s): - if ((temps[args[1]].mask & 0x8000) !=3D 0) { + if ((temps[op->args[1]].mask & 0x8000) !=3D 0) { break; } CASE_OP_32_64(ext16u): mask =3D 0xffff; goto and_const; case INDEX_op_ext32s_i64: - if ((temps[args[1]].mask & 0x80000000) !=3D 0) { + if ((temps[op->args[1]].mask & 0x80000000) !=3D 0) { break; } case INDEX_op_ext32u_i64: @@ -818,110 +822,111 @@ void tcg_optimize(TCGContext *s) goto and_const; =20 CASE_OP_32_64(and): - mask =3D temps[args[2]].mask; - if (temp_is_const(args[2])) { + mask =3D temps[op->args[2]].mask; + if (temp_is_const(op->args[2])) { and_const: - affected =3D temps[args[1]].mask & ~mask; + affected =3D temps[op->args[1]].mask & ~mask; } - mask =3D temps[args[1]].mask & mask; + mask =3D temps[op->args[1]].mask & mask; break; =20 case INDEX_op_ext_i32_i64: - if ((temps[args[1]].mask & 0x80000000) !=3D 0) { + if ((temps[op->args[1]].mask & 0x80000000) !=3D 0) { break; } case INDEX_op_extu_i32_i64: /* We do not compute affected as it is a size changing op. */ - mask =3D (uint32_t)temps[args[1]].mask; + mask =3D (uint32_t)temps[op->args[1]].mask; break; =20 CASE_OP_32_64(andc): /* Known-zeros does not imply known-ones. Therefore unless - args[2] is constant, we can't infer anything from it. */ - if (temp_is_const(args[2])) { - mask =3D ~temps[args[2]].mask; + op->args[2] is constant, we can't infer anything from it. = */ + if (temp_is_const(op->args[2])) { + mask =3D ~temps[op->args[2]].mask; goto and_const; } - /* But we certainly know nothing outside args[1] may be set. */ - mask =3D temps[args[1]].mask; + /* But we certainly know nothing outside op->args[1] may be se= t. */ + mask =3D temps[op->args[1]].mask; break; =20 case INDEX_op_sar_i32: - if (temp_is_const(args[2])) { - tmp =3D temps[args[2]].val & 31; - mask =3D (int32_t)temps[args[1]].mask >> tmp; + if (temp_is_const(op->args[2])) { + tmp =3D temps[op->args[2]].val & 31; + mask =3D (int32_t)temps[op->args[1]].mask >> tmp; } break; case INDEX_op_sar_i64: - if (temp_is_const(args[2])) { - tmp =3D temps[args[2]].val & 63; - mask =3D (int64_t)temps[args[1]].mask >> tmp; + if (temp_is_const(op->args[2])) { + tmp =3D temps[op->args[2]].val & 63; + mask =3D (int64_t)temps[op->args[1]].mask >> tmp; } break; =20 case INDEX_op_shr_i32: - if (temp_is_const(args[2])) { - tmp =3D temps[args[2]].val & 31; - mask =3D (uint32_t)temps[args[1]].mask >> tmp; + if (temp_is_const(op->args[2])) { + tmp =3D temps[op->args[2]].val & 31; + mask =3D (uint32_t)temps[op->args[1]].mask >> tmp; } break; case INDEX_op_shr_i64: - if (temp_is_const(args[2])) { - tmp =3D temps[args[2]].val & 63; - mask =3D (uint64_t)temps[args[1]].mask >> tmp; + if (temp_is_const(op->args[2])) { + tmp =3D temps[op->args[2]].val & 63; + mask =3D (uint64_t)temps[op->args[1]].mask >> tmp; } break; =20 case INDEX_op_extrl_i64_i32: - mask =3D (uint32_t)temps[args[1]].mask; + mask =3D (uint32_t)temps[op->args[1]].mask; break; case INDEX_op_extrh_i64_i32: - mask =3D (uint64_t)temps[args[1]].mask >> 32; + mask =3D (uint64_t)temps[op->args[1]].mask >> 32; break; =20 CASE_OP_32_64(shl): - if (temp_is_const(args[2])) { - tmp =3D temps[args[2]].val & (TCG_TARGET_REG_BITS - 1); - mask =3D temps[args[1]].mask << tmp; + if (temp_is_const(op->args[2])) { + tmp =3D temps[op->args[2]].val & (TCG_TARGET_REG_BITS - 1); + mask =3D temps[op->args[1]].mask << tmp; } break; =20 CASE_OP_32_64(neg): /* Set to 1 all bits to the left of the rightmost. */ - mask =3D -(temps[args[1]].mask & -temps[args[1]].mask); + mask =3D -(temps[op->args[1]].mask & -temps[op->args[1]].mask); break; =20 CASE_OP_32_64(deposit): - mask =3D deposit64(temps[args[1]].mask, args[3], args[4], - temps[args[2]].mask); + mask =3D deposit64(temps[op->args[1]].mask, op->args[3], + op->args[4], temps[op->args[2]].mask); break; =20 CASE_OP_32_64(extract): - mask =3D extract64(temps[args[1]].mask, args[2], args[3]); - if (args[2] =3D=3D 0) { - affected =3D temps[args[1]].mask & ~mask; + mask =3D extract64(temps[op->args[1]].mask, op->args[2], op->a= rgs[3]); + if (op->args[2] =3D=3D 0) { + affected =3D temps[op->args[1]].mask & ~mask; } break; CASE_OP_32_64(sextract): - mask =3D sextract64(temps[args[1]].mask, args[2], args[3]); - if (args[2] =3D=3D 0 && (tcg_target_long)mask >=3D 0) { - affected =3D temps[args[1]].mask & ~mask; + mask =3D sextract64(temps[op->args[1]].mask, + op->args[2], op->args[3]); + if (op->args[2] =3D=3D 0 && (tcg_target_long)mask >=3D 0) { + affected =3D temps[op->args[1]].mask & ~mask; } break; =20 CASE_OP_32_64(or): CASE_OP_32_64(xor): - mask =3D temps[args[1]].mask | temps[args[2]].mask; + mask =3D temps[op->args[1]].mask | temps[op->args[2]].mask; break; =20 case INDEX_op_clz_i32: case INDEX_op_ctz_i32: - mask =3D temps[args[2]].mask | 31; + mask =3D temps[op->args[2]].mask | 31; break; =20 case INDEX_op_clz_i64: case INDEX_op_ctz_i64: - mask =3D temps[args[2]].mask | 63; + mask =3D temps[op->args[2]].mask | 63; break; =20 case INDEX_op_ctpop_i32: @@ -937,7 +942,7 @@ void tcg_optimize(TCGContext *s) break; =20 CASE_OP_32_64(movcond): - mask =3D temps[args[3]].mask | temps[args[4]].mask; + mask =3D temps[op->args[3]].mask | temps[op->args[4]].mask; break; =20 CASE_OP_32_64(ld8u): @@ -952,7 +957,7 @@ void tcg_optimize(TCGContext *s) =20 CASE_OP_32_64(qemu_ld): { - TCGMemOpIdx oi =3D args[nb_oargs + nb_iargs]; + TCGMemOpIdx oi =3D op->args[nb_oargs + nb_iargs]; TCGMemOp mop =3D get_memop(oi); if (!(mop & MO_SIGN)) { mask =3D (2ULL << ((8 << (mop & MO_SIZE)) - 1)) - 1; @@ -976,12 +981,12 @@ void tcg_optimize(TCGContext *s) =20 if (partmask =3D=3D 0) { tcg_debug_assert(nb_oargs =3D=3D 1); - tcg_opt_gen_movi(s, op, args, args[0], 0); + tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } if (affected =3D=3D 0) { tcg_debug_assert(nb_oargs =3D=3D 1); - tcg_opt_gen_mov(s, op, args, args[0], args[1]); + tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } =20 @@ -991,8 +996,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(mul): CASE_OP_32_64(muluh): CASE_OP_32_64(mulsh): - if ((temp_is_const(args[2]) && temps[args[2]].val =3D=3D 0)) { - tcg_opt_gen_movi(s, op, args, args[0], 0); + if ((temp_is_const(op->args[2]) && temps[op->args[2]].val =3D= =3D 0)) { + tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } break; @@ -1004,8 +1009,8 @@ void tcg_optimize(TCGContext *s) switch (opc) { CASE_OP_32_64(or): CASE_OP_32_64(and): - if (temps_are_copies(args[1], args[2])) { - tcg_opt_gen_mov(s, op, args, args[0], args[1]); + if (temps_are_copies(op->args[1], op->args[2])) { + tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } break; @@ -1018,8 +1023,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(andc): CASE_OP_32_64(sub): CASE_OP_32_64(xor): - if (temps_are_copies(args[1], args[2])) { - tcg_opt_gen_movi(s, op, args, args[0], 0); + if (temps_are_copies(op->args[1], op->args[2])) { + tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } break; @@ -1032,10 +1037,10 @@ void tcg_optimize(TCGContext *s) allocator where needed and possible. Also detect copies. */ switch (opc) { CASE_OP_32_64(mov): - tcg_opt_gen_mov(s, op, args, args[0], args[1]); + tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); break; CASE_OP_32_64(movi): - tcg_opt_gen_movi(s, op, args, args[0], args[1]); + tcg_opt_gen_movi(s, op, op->args[0], op->args[1]); break; =20 CASE_OP_32_64(not): @@ -1051,9 +1056,9 @@ void tcg_optimize(TCGContext *s) case INDEX_op_extu_i32_i64: case INDEX_op_extrl_i64_i32: case INDEX_op_extrh_i64_i32: - if (temp_is_const(args[1])) { - tmp =3D do_constant_folding(opc, temps[args[1]].val, 0); - tcg_opt_gen_movi(s, op, args, args[0], tmp); + if (temp_is_const(op->args[1])) { + tmp =3D do_constant_folding(opc, temps[op->args[1]].val, 0= ); + tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; @@ -1080,68 +1085,72 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(divu): CASE_OP_32_64(rem): CASE_OP_32_64(remu): - if (temp_is_const(args[1]) && temp_is_const(args[2])) { - tmp =3D do_constant_folding(opc, temps[args[1]].val, - temps[args[2]].val); - tcg_opt_gen_movi(s, op, args, args[0], tmp); + if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) { + tmp =3D do_constant_folding(opc, temps[op->args[1]].val, + temps[op->args[2]].val); + tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; =20 CASE_OP_32_64(clz): CASE_OP_32_64(ctz): - if (temp_is_const(args[1])) { - TCGArg v =3D temps[args[1]].val; + if (temp_is_const(op->args[1])) { + TCGArg v =3D temps[op->args[1]].val; if (v !=3D 0) { tmp =3D do_constant_folding(opc, v, 0); - tcg_opt_gen_movi(s, op, args, args[0], tmp); + tcg_opt_gen_movi(s, op, op->args[0], tmp); } else { - tcg_opt_gen_mov(s, op, args, args[0], args[2]); + tcg_opt_gen_mov(s, op, op->args[0], op->args[2]); } break; } goto do_default; =20 CASE_OP_32_64(deposit): - if (temp_is_const(args[1]) && temp_is_const(args[2])) { - tmp =3D deposit64(temps[args[1]].val, args[3], args[4], - temps[args[2]].val); - tcg_opt_gen_movi(s, op, args, args[0], tmp); + if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) { + tmp =3D deposit64(temps[op->args[1]].val, op->args[3], + op->args[4], temps[op->args[2]].val); + tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; =20 CASE_OP_32_64(extract): - if (temp_is_const(args[1])) { - tmp =3D extract64(temps[args[1]].val, args[2], args[3]); - tcg_opt_gen_movi(s, op, args, args[0], tmp); + if (temp_is_const(op->args[1])) { + tmp =3D extract64(temps[op->args[1]].val, + op->args[2], op->args[3]); + tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; =20 CASE_OP_32_64(sextract): - if (temp_is_const(args[1])) { - tmp =3D sextract64(temps[args[1]].val, args[2], args[3]); - tcg_opt_gen_movi(s, op, args, args[0], tmp); + if (temp_is_const(op->args[1])) { + tmp =3D sextract64(temps[op->args[1]].val, + op->args[2], op->args[3]); + tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; =20 CASE_OP_32_64(setcond): - tmp =3D do_constant_folding_cond(opc, args[1], args[2], args[3= ]); + tmp =3D do_constant_folding_cond(opc, op->args[1], + op->args[2], op->args[3]); if (tmp !=3D 2) { - tcg_opt_gen_movi(s, op, args, args[0], tmp); + tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; =20 CASE_OP_32_64(brcond): - tmp =3D do_constant_folding_cond(opc, args[0], args[1], args[2= ]); + tmp =3D do_constant_folding_cond(opc, op->args[0], + op->args[1], op->args[2]); if (tmp !=3D 2) { if (tmp) { reset_all_temps(nb_temps); op->opc =3D INDEX_op_br; - args[0] =3D args[3]; + op->args[0] =3D op->args[3]; } else { tcg_op_remove(s, op); } @@ -1150,21 +1159,22 @@ void tcg_optimize(TCGContext *s) goto do_default; =20 CASE_OP_32_64(movcond): - tmp =3D do_constant_folding_cond(opc, args[1], args[2], args[5= ]); + tmp =3D do_constant_folding_cond(opc, op->args[1], + op->args[2], op->args[5]); if (tmp !=3D 2) { - tcg_opt_gen_mov(s, op, args, args[0], args[4-tmp]); + tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]); break; } - if (temp_is_const(args[3]) && temp_is_const(args[4])) { - tcg_target_ulong tv =3D temps[args[3]].val; - tcg_target_ulong fv =3D temps[args[4]].val; - TCGCond cond =3D args[5]; + if (temp_is_const(op->args[3]) && temp_is_const(op->args[4])) { + tcg_target_ulong tv =3D temps[op->args[3]].val; + tcg_target_ulong fv =3D temps[op->args[4]].val; + TCGCond cond =3D op->args[5]; if (fv =3D=3D 1 && tv =3D=3D 0) { cond =3D tcg_invert_cond(cond); } else if (!(tv =3D=3D 1 && fv =3D=3D 0)) { goto do_default; } - args[3] =3D cond; + op->args[3] =3D cond; op->opc =3D opc =3D (opc =3D=3D INDEX_op_movcond_i32 ? INDEX_op_setcond_i32 : INDEX_op_setcond_i64); @@ -1174,17 +1184,16 @@ void tcg_optimize(TCGContext *s) =20 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: - if (temp_is_const(args[2]) && temp_is_const(args[3]) - && temp_is_const(args[4]) && temp_is_const(args[5])) { - uint32_t al =3D temps[args[2]].val; - uint32_t ah =3D temps[args[3]].val; - uint32_t bl =3D temps[args[4]].val; - uint32_t bh =3D temps[args[5]].val; + if (temp_is_const(op->args[2]) && temp_is_const(op->args[3]) + && temp_is_const(op->args[4]) && temp_is_const(op->args[5]= )) { + uint32_t al =3D temps[op->args[2]].val; + uint32_t ah =3D temps[op->args[3]].val; + uint32_t bl =3D temps[op->args[4]].val; + uint32_t bh =3D temps[op->args[5]].val; uint64_t a =3D ((uint64_t)ah << 32) | al; uint64_t b =3D ((uint64_t)bh << 32) | bl; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); - TCGArg *args2 =3D op2->args; =20 if (opc =3D=3D INDEX_op_add2_i32) { a +=3D b; @@ -1192,10 +1201,10 @@ void tcg_optimize(TCGContext *s) a -=3D b; } =20 - rl =3D args[0]; - rh =3D args[1]; - tcg_opt_gen_movi(s, op, args, rl, (int32_t)a); - tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(a >> 32)); + rl =3D op->args[0]; + rh =3D op->args[1]; + tcg_opt_gen_movi(s, op, rl, (int32_t)a); + tcg_opt_gen_movi(s, op2, rh, (int32_t)(a >> 32)); =20 /* We've done all we need to do with the movi. Skip it. = */ oi_next =3D op2->next; @@ -1204,18 +1213,17 @@ void tcg_optimize(TCGContext *s) goto do_default; =20 case INDEX_op_mulu2_i32: - if (temp_is_const(args[2]) && temp_is_const(args[3])) { - uint32_t a =3D temps[args[2]].val; - uint32_t b =3D temps[args[3]].val; + if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])) { + uint32_t a =3D temps[op->args[2]].val; + uint32_t b =3D temps[op->args[3]].val; uint64_t r =3D (uint64_t)a * b; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); - TCGArg *args2 =3D op2->args; =20 - rl =3D args[0]; - rh =3D args[1]; - tcg_opt_gen_movi(s, op, args, rl, (int32_t)r); - tcg_opt_gen_movi(s, op2, args2, rh, (int32_t)(r >> 32)); + rl =3D op->args[0]; + rh =3D op->args[1]; + tcg_opt_gen_movi(s, op, rl, (int32_t)r); + tcg_opt_gen_movi(s, op2, rh, (int32_t)(r >> 32)); =20 /* We've done all we need to do with the movi. Skip it. = */ oi_next =3D op2->next; @@ -1224,41 +1232,47 @@ void tcg_optimize(TCGContext *s) goto do_default; =20 case INDEX_op_brcond2_i32: - tmp =3D do_constant_folding_cond2(&args[0], &args[2], args[4]); + tmp =3D do_constant_folding_cond2(&op->args[0], &op->args[2], + op->args[4]); if (tmp !=3D 2) { if (tmp) { do_brcond_true: reset_all_temps(nb_temps); op->opc =3D INDEX_op_br; - args[0] =3D args[5]; + op->args[0] =3D op->args[5]; } else { do_brcond_false: tcg_op_remove(s, op); } - } else if ((args[4] =3D=3D TCG_COND_LT || args[4] =3D=3D TCG_C= OND_GE) - && temp_is_const(args[2]) && temps[args[2]].val =3D= =3D 0 - && temp_is_const(args[3]) && temps[args[3]].val =3D= =3D 0) { + } else if ((op->args[4] =3D=3D TCG_COND_LT + || op->args[4] =3D=3D TCG_COND_GE) + && temp_is_const(op->args[2]) + && temps[op->args[2]].val =3D=3D 0 + && temp_is_const(op->args[3]) + && temps[op->args[3]].val =3D=3D 0) { /* Simplify LT/GE comparisons vs zero to a single compare vs the high word of the input. */ do_brcond_high: reset_all_temps(nb_temps); op->opc =3D INDEX_op_brcond_i32; - args[0] =3D args[1]; - args[1] =3D args[3]; - args[2] =3D args[4]; - args[3] =3D args[5]; - } else if (args[4] =3D=3D TCG_COND_EQ) { + op->args[0] =3D op->args[1]; + op->args[1] =3D op->args[3]; + op->args[2] =3D op->args[4]; + op->args[3] =3D op->args[5]; + } else if (op->args[4] =3D=3D TCG_COND_EQ) { /* Simplify EQ comparisons where one of the pairs can be simplified. */ tmp =3D do_constant_folding_cond(INDEX_op_brcond_i32, - args[0], args[2], TCG_COND_= EQ); + op->args[0], op->args[2], + TCG_COND_EQ); if (tmp =3D=3D 0) { goto do_brcond_false; } else if (tmp =3D=3D 1) { goto do_brcond_high; } tmp =3D do_constant_folding_cond(INDEX_op_brcond_i32, - args[1], args[3], TCG_COND_= EQ); + op->args[1], op->args[3], + TCG_COND_EQ); if (tmp =3D=3D 0) { goto do_brcond_false; } else if (tmp !=3D 1) { @@ -1267,21 +1281,23 @@ void tcg_optimize(TCGContext *s) do_brcond_low: reset_all_temps(nb_temps); op->opc =3D INDEX_op_brcond_i32; - args[1] =3D args[2]; - args[2] =3D args[4]; - args[3] =3D args[5]; - } else if (args[4] =3D=3D TCG_COND_NE) { + op->args[1] =3D op->args[2]; + op->args[2] =3D op->args[4]; + op->args[3] =3D op->args[5]; + } else if (op->args[4] =3D=3D TCG_COND_NE) { /* Simplify NE comparisons where one of the pairs can be simplified. */ tmp =3D do_constant_folding_cond(INDEX_op_brcond_i32, - args[0], args[2], TCG_COND_= NE); + op->args[0], op->args[2], + TCG_COND_NE); if (tmp =3D=3D 0) { goto do_brcond_high; } else if (tmp =3D=3D 1) { goto do_brcond_true; } tmp =3D do_constant_folding_cond(INDEX_op_brcond_i32, - args[1], args[3], TCG_COND_= NE); + op->args[1], op->args[3], + TCG_COND_NE); if (tmp =3D=3D 0) { goto do_brcond_low; } else if (tmp =3D=3D 1) { @@ -1294,57 +1310,65 @@ void tcg_optimize(TCGContext *s) break; =20 case INDEX_op_setcond2_i32: - tmp =3D do_constant_folding_cond2(&args[1], &args[3], args[5]); + tmp =3D do_constant_folding_cond2(&op->args[1], &op->args[3], + op->args[5]); if (tmp !=3D 2) { do_setcond_const: - tcg_opt_gen_movi(s, op, args, args[0], tmp); - } else if ((args[5] =3D=3D TCG_COND_LT || args[5] =3D=3D TCG_C= OND_GE) - && temp_is_const(args[3]) && temps[args[3]].val =3D= =3D 0 - && temp_is_const(args[4]) && temps[args[4]].val =3D= =3D 0) { + tcg_opt_gen_movi(s, op, op->args[0], tmp); + } else if ((op->args[5] =3D=3D TCG_COND_LT + || op->args[5] =3D=3D TCG_COND_GE) + && temp_is_const(op->args[3]) + && temps[op->args[3]].val =3D=3D 0 + && temp_is_const(op->args[4]) + && temps[op->args[4]].val =3D=3D 0) { /* Simplify LT/GE comparisons vs zero to a single compare vs the high word of the input. */ do_setcond_high: - reset_temp(args[0]); - temps[args[0]].mask =3D 1; + reset_temp(op->args[0]); + temps[op->args[0]].mask =3D 1; op->opc =3D INDEX_op_setcond_i32; - args[1] =3D args[2]; - args[2] =3D args[4]; - args[3] =3D args[5]; - } else if (args[5] =3D=3D TCG_COND_EQ) { + op->args[1] =3D op->args[2]; + op->args[2] =3D op->args[4]; + op->args[3] =3D op->args[5]; + } else if (op->args[5] =3D=3D TCG_COND_EQ) { /* Simplify EQ comparisons where one of the pairs can be simplified. */ tmp =3D do_constant_folding_cond(INDEX_op_setcond_i32, - args[1], args[3], TCG_COND_= EQ); + op->args[1], op->args[3], + TCG_COND_EQ); if (tmp =3D=3D 0) { goto do_setcond_const; } else if (tmp =3D=3D 1) { goto do_setcond_high; } tmp =3D do_constant_folding_cond(INDEX_op_setcond_i32, - args[2], args[4], TCG_COND_= EQ); + op->args[2], op->args[4], + TCG_COND_EQ); if (tmp =3D=3D 0) { goto do_setcond_high; } else if (tmp !=3D 1) { goto do_default; } do_setcond_low: - reset_temp(args[0]); - temps[args[0]].mask =3D 1; + reset_temp(op->args[0]); + temps[op->args[0]].mask =3D 1; op->opc =3D INDEX_op_setcond_i32; - args[2] =3D args[3]; - args[3] =3D args[5]; - } else if (args[5] =3D=3D TCG_COND_NE) { + op->args[2] =3D op->args[3]; + op->args[3] =3D op->args[5]; + } else if (op->args[5] =3D=3D TCG_COND_NE) { /* Simplify NE comparisons where one of the pairs can be simplified. */ tmp =3D do_constant_folding_cond(INDEX_op_setcond_i32, - args[1], args[3], TCG_COND_= NE); + op->args[1], op->args[3], + TCG_COND_NE); if (tmp =3D=3D 0) { goto do_setcond_high; } else if (tmp =3D=3D 1) { goto do_setcond_const; } tmp =3D do_constant_folding_cond(INDEX_op_setcond_i32, - args[2], args[4], TCG_COND_= NE); + op->args[2], op->args[4], + TCG_COND_NE); if (tmp =3D=3D 0) { goto do_setcond_low; } else if (tmp =3D=3D 1) { @@ -1357,7 +1381,7 @@ void tcg_optimize(TCGContext *s) break; =20 case INDEX_op_call: - if (!(args[nb_oargs + nb_iargs + 1] + if (!(op->args[nb_oargs + nb_iargs + 1] & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS)= )) { for (i =3D 0; i < nb_globals; i++) { if (test_bit(i, temps_used.l)) { @@ -1379,11 +1403,11 @@ void tcg_optimize(TCGContext *s) } else { do_reset_output: for (i =3D 0; i < nb_oargs; i++) { - reset_temp(args[i]); + reset_temp(op->args[i]); /* Save the corresponding known-zero bits mask for the first output argument (only one supported so far). = */ if (i =3D=3D 0) { - temps[args[i]].mask =3D mask; + temps[op->args[i]].mask =3D mask; } } } @@ -1391,7 +1415,7 @@ void tcg_optimize(TCGContext *s) } =20 /* Eliminate duplicate and redundant fence instructions. */ - if (prev_mb_args) { + if (prev_mb) { switch (opc) { case INDEX_op_mb: /* Merge two barriers of the same type into one, @@ -1405,7 +1429,7 @@ void tcg_optimize(TCGContext *s) * barrier. This is stricter than specified but for * the purposes of TCG is better than not optimizing. */ - prev_mb_args[0] |=3D args[0]; + prev_mb->args[0] |=3D op->args[0]; tcg_op_remove(s, op); break; =20 @@ -1421,11 +1445,11 @@ void tcg_optimize(TCGContext *s) case INDEX_op_qemu_st_i64: case INDEX_op_call: /* Opcodes that touch guest memory stop the optimization. = */ - prev_mb_args =3D NULL; + prev_mb =3D NULL; break; } } else if (opc =3D=3D INDEX_op_mb) { - prev_mb_args =3D args; + prev_mb =3D op; } } } --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149801370003839.25693547744288; Tue, 20 Jun 2017 19:55:00 -0700 (PDT) Received: from localhost ([::1]:51553 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVnG-00030J-KQ for importer@patchew.org; Tue, 20 Jun 2017 22:54:58 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33861) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhD-0006Q9-ST for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhB-0002LJ-W7 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:43 -0400 Received: from mail-qk0-x242.google.com ([2607:f8b0:400d:c09::242]:35639) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhB-0002LE-P5 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:41 -0400 Received: by mail-qk0-x242.google.com with SMTP id 16so8295539qkg.2 for ; Tue, 20 Jun 2017 19:48:41 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.39 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=qzLz4uxKLeOxZF5QJcB/seQ2qqD4Jf8WFDnVxPhGLi4=; b=lhASnBkDUUoLG4lnYFdGWzqluAEUtbmmqmrL2wNqGg36H5fd7cQhqxy1IIvsnBp3gV ShD/gwKqM8BJnWcuSF7eScbUhAuu4sJe/ZpEvHjeDnvEFdh82Uf/K16BrZCtduAz8b6Z COlFRFEk7kqE3HsSg5mx4Z9QD3RHMaJk5WwV403z2oBJHXDsEl65uTa88Bo+WYterfQr XI+o05kkkAjR8A2RETla/JM0bsvqiEJfI8BSwI0WHNFw37+Gu97UItTHpqSbveltbwBn vbGDxPpMzQHVG84QNz164e4XWZAYBmJLCVLgS7tYlvjBJja7wqvLIk/kxdmoA5rbMqG7 +SYA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=qzLz4uxKLeOxZF5QJcB/seQ2qqD4Jf8WFDnVxPhGLi4=; b=NmAXgGWWoyvwUt4RDtmERtGT9pMKu/AN27qmKVHM1KV/E3mQRw9pEX2B923vG6PUHR Ff3YUdZonIcfl+R6j1CUmQOkHU+xvw/Imb3esKEyCcjqYRu1ujWvdyLu5/SBf2xkIbcp iFYclsFyu+0nLRhb8qRVHDrsyWPS/ohYikkEWyAbCRd0tlzo22kyKWB5ANrhqrKdto6B tGvvmFGywpH3u8PCDCTMNt5XtbuOGt6oxHM5EQODB5FwCOpSQro7/dbExYYYFhhUDiZM nx3bdKKTd2NZlpPmT/3Kp64HIpwDWgL6xokXWIraqdAO98bz9FpBZfJVTwtMuLooi2iU 3aPA== X-Gm-Message-State: AKS2vOzQX1jEAx640Gse76P3Nu6ez3iis+oA5ffwkpOZo+lkWaZ15dEM 2KYefkXgHqriQERCqMs= X-Received: by 10.55.116.66 with SMTP id p63mr34802769qkc.250.1498013320580; Tue, 20 Jun 2017 19:48:40 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:18 -0700 Message-Id: <20170621024831.26019-4-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::242 Subject: [Qemu-devel] [PATCH 03/16] tcg: Propagate args to op->args in tcg.c X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg.c | 121 ++++++++++++++++++++++++++++++----------------------------= ---- 1 file changed, 58 insertions(+), 63 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 298aa0c..be5b69c 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1054,14 +1054,12 @@ void tcg_dump_ops(TCGContext *s) for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D op->next) { int i, k, nb_oargs, nb_iargs, nb_cargs; const TCGOpDef *def; - const TCGArg *args; TCGOpcode c; int col =3D 0; =20 op =3D &s->gen_op_buf[oi]; c =3D op->opc; def =3D &tcg_op_defs[c]; - args =3D op->args; =20 if (c =3D=3D INDEX_op_insn_start) { col +=3D qemu_log("%s ----", oi !=3D s->gen_op_buf[0].next ? "= \n" : ""); @@ -1069,9 +1067,9 @@ void tcg_dump_ops(TCGContext *s) for (i =3D 0; i < TARGET_INSN_START_WORDS; ++i) { target_ulong a; #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS - a =3D ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2]; + a =3D deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + = 1]); #else - a =3D args[i]; + a =3D op->args[i]; #endif col +=3D qemu_log(" " TARGET_FMT_lx, a); } @@ -1083,14 +1081,14 @@ void tcg_dump_ops(TCGContext *s) =20 /* function name, flags, out args */ col +=3D qemu_log(" %s %s,$0x%" TCG_PRIlx ",$%d", def->name, - tcg_find_helper(s, args[nb_oargs + nb_iargs]), - args[nb_oargs + nb_iargs + 1], nb_oargs); + tcg_find_helper(s, op->args[nb_oargs + nb_iarg= s]), + op->args[nb_oargs + nb_iargs + 1], nb_oargs); for (i =3D 0; i < nb_oargs; i++) { col +=3D qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeo= f(buf), - args[i])); + op->args[i])); } for (i =3D 0; i < nb_iargs; i++) { - TCGArg arg =3D args[nb_oargs + i]; + TCGArg arg =3D op->args[nb_oargs + i]; const char *t =3D ""; if (arg !=3D TCG_CALL_DUMMY_ARG) { t =3D tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); @@ -1110,14 +1108,14 @@ void tcg_dump_ops(TCGContext *s) col +=3D qemu_log(","); } col +=3D qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof= (buf), - args[k++])); + op->args[k++])); } for (i =3D 0; i < nb_iargs; i++) { if (k !=3D 0) { col +=3D qemu_log(","); } col +=3D qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof= (buf), - args[k++])); + op->args[k++])); } switch (c) { case INDEX_op_brcond_i32: @@ -1128,10 +1126,11 @@ void tcg_dump_ops(TCGContext *s) case INDEX_op_brcond_i64: case INDEX_op_setcond_i64: case INDEX_op_movcond_i64: - if (args[k] < ARRAY_SIZE(cond_name) && cond_name[args[k]])= { - col +=3D qemu_log(",%s", cond_name[args[k++]]); + if (op->args[k] < ARRAY_SIZE(cond_name) + && cond_name[op->args[k]]) { + col +=3D qemu_log(",%s", cond_name[op->args[k++]]); } else { - col +=3D qemu_log(",$0x%" TCG_PRIlx, args[k++]); + col +=3D qemu_log(",$0x%" TCG_PRIlx, op->args[k++]); } i =3D 1; break; @@ -1140,7 +1139,7 @@ void tcg_dump_ops(TCGContext *s) case INDEX_op_qemu_ld_i64: case INDEX_op_qemu_st_i64: { - TCGMemOpIdx oi =3D args[k++]; + TCGMemOpIdx oi =3D op->args[k++]; TCGMemOp op =3D get_memop(oi); unsigned ix =3D get_mmuidx(oi); =20 @@ -1165,14 +1164,15 @@ void tcg_dump_ops(TCGContext *s) case INDEX_op_brcond_i32: case INDEX_op_brcond_i64: case INDEX_op_brcond2_i32: - col +=3D qemu_log("%s$L%d", k ? "," : "", arg_label(args[k= ])->id); + col +=3D qemu_log("%s$L%d", k ? "," : "", + arg_label(op->args[k])->id); i++, k++; break; default: break; } for (; i < nb_cargs; i++, k++) { - col +=3D qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", args[k= ]); + col +=3D qemu_log("%s$0x%" TCG_PRIlx, k ? "," : "", op->ar= gs[k]); } } if (op->life) { @@ -1433,7 +1433,6 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) TCGArg arg; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; =20 @@ -1446,12 +1445,12 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) =20 nb_oargs =3D op->callo; nb_iargs =3D op->calli; - call_flags =3D args[nb_oargs + nb_iargs + 1]; + call_flags =3D op->args[nb_oargs + nb_iargs + 1]; =20 /* pure functions can be removed if their result is unused= */ if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { for (i =3D 0; i < nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (temp_state[arg] !=3D TS_DEAD) { goto do_not_remove_call; } @@ -1462,7 +1461,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) =20 /* output args are dead */ for (i =3D 0; i < nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (temp_state[arg] & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } @@ -1485,7 +1484,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) =20 /* record arguments that die in this helper */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (arg !=3D TCG_CALL_DUMMY_ARG) { if (temp_state[arg] & TS_DEAD) { arg_life |=3D DEAD_ARG << i; @@ -1494,7 +1493,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) } /* input arguments are live for preceding opcodes */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (arg !=3D TCG_CALL_DUMMY_ARG) { temp_state[arg] &=3D ~TS_DEAD; } @@ -1506,7 +1505,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) break; case INDEX_op_discard: /* mark the temporary as dead */ - temp_state[args[0]] =3D TS_DEAD; + temp_state[op->args[0]] =3D TS_DEAD; break; =20 case INDEX_op_add2_i32: @@ -1527,15 +1526,15 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) the low part. The result can be optimized to a simple add or sub. This happens often for x86_64 guest when the cpu mode is set to 32 bit. */ - if (temp_state[args[1]] =3D=3D TS_DEAD) { - if (temp_state[args[0]] =3D=3D TS_DEAD) { + if (temp_state[op->args[1]] =3D=3D TS_DEAD) { + if (temp_state[op->args[0]] =3D=3D TS_DEAD) { goto do_remove; } /* Replace the opcode and adjust the args in place, leaving 3 unused args at the end. */ op->opc =3D opc =3D opc_new; - args[1] =3D args[2]; - args[2] =3D args[4]; + op->args[1] =3D op->args[2]; + op->args[2] =3D op->args[4]; /* Fall through and mark the single-word operation live. = */ nb_iargs =3D 2; nb_oargs =3D 1; @@ -1565,21 +1564,21 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) do_mul2: nb_iargs =3D 2; nb_oargs =3D 2; - if (temp_state[args[1]] =3D=3D TS_DEAD) { - if (temp_state[args[0]] =3D=3D TS_DEAD) { + if (temp_state[op->args[1]] =3D=3D TS_DEAD) { + if (temp_state[op->args[0]] =3D=3D TS_DEAD) { /* Both parts of the operation are dead. */ goto do_remove; } /* The high part of the operation is dead; generate the lo= w. */ op->opc =3D opc =3D opc_new; - args[1] =3D args[2]; - args[2] =3D args[3]; - } else if (temp_state[args[0]] =3D=3D TS_DEAD && have_opc_new2= ) { + op->args[1] =3D op->args[2]; + op->args[2] =3D op->args[3]; + } else if (temp_state[op->args[0]] =3D=3D TS_DEAD && have_opc_= new2) { /* The low part of the operation is dead; generate the hig= h. */ op->opc =3D opc =3D opc_new2; - args[0] =3D args[1]; - args[1] =3D args[2]; - args[2] =3D args[3]; + op->args[0] =3D op->args[1]; + op->args[1] =3D op->args[2]; + op->args[2] =3D op->args[3]; } else { goto do_not_remove; } @@ -1597,7 +1596,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) implies side effects */ if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs !=3D 0) { for (i =3D 0; i < nb_oargs; i++) { - if (temp_state[args[i]] !=3D TS_DEAD) { + if (temp_state[op->args[i]] !=3D TS_DEAD) { goto do_not_remove; } } @@ -1607,7 +1606,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) do_not_remove: /* output args are dead */ for (i =3D 0; i < nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (temp_state[arg] & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } @@ -1629,14 +1628,14 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) =20 /* record arguments that die in this opcode */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (temp_state[arg] & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } } /* input arguments are live for preceding opcodes */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { - temp_state[args[i]] &=3D ~TS_DEAD; + temp_state[op->args[i]] &=3D ~TS_DEAD; } } break; @@ -1671,7 +1670,6 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) =20 for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp *op =3D &s->gen_op_buf[oi]; - TCGArg *args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; @@ -1683,7 +1681,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) if (opc =3D=3D INDEX_op_call) { nb_oargs =3D op->callo; nb_iargs =3D op->calli; - call_flags =3D args[nb_oargs + nb_iargs + 1]; + call_flags =3D op->args[nb_oargs + nb_iargs + 1]; } else { nb_iargs =3D def->nb_iargs; nb_oargs =3D def->nb_oargs; @@ -1704,7 +1702,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) =20 /* Make sure that input arguments are available. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; /* Note this unsigned test catches TCG_CALL_ARG_DUMMY too. */ if (arg < nb_globals) { dir =3D dir_temps[arg]; @@ -1714,11 +1712,10 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) ? INDEX_op_ld_i32 : INDEX_op_ld_i64); TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); - TCGArg *largs =3D lop->args; =20 - largs[0] =3D dir; - largs[1] =3D temp_idx(s, its->mem_base); - largs[2] =3D its->mem_offset; + lop->args[0] =3D dir; + lop->args[1] =3D temp_idx(s, its->mem_base); + lop->args[2] =3D its->mem_offset; =20 /* Loaded, but synced with memory. */ temp_state[arg] =3D TS_MEM; @@ -1730,11 +1727,11 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) No action is required except keeping temp_state up to date so that we reload when needed. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (arg < nb_globals) { dir =3D dir_temps[arg]; if (dir !=3D 0) { - args[i] =3D dir; + op->args[i] =3D dir; changes =3D true; if (IS_DEAD_ARG(i)) { temp_state[arg] =3D TS_DEAD; @@ -1765,7 +1762,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) =20 /* Outputs become available. */ for (i =3D 0; i < nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; if (arg >=3D nb_globals) { continue; } @@ -1773,7 +1770,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) if (dir =3D=3D 0) { continue; } - args[i] =3D dir; + op->args[i] =3D dir; changes =3D true; =20 /* The output is now live and modified. */ @@ -1786,11 +1783,10 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) ? INDEX_op_st_i32 : INDEX_op_st_i64); TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); - TCGArg *sargs =3D sop->args; =20 - sargs[0] =3D dir; - sargs[1] =3D temp_idx(s, its->mem_base); - sargs[2] =3D its->mem_offset; + sop->args[0] =3D dir; + sop->args[1] =3D temp_idx(s, its->mem_base); + sop->args[2] =3D its->mem_offset; =20 temp_state[arg] =3D TS_MEM; } @@ -2614,7 +2610,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) num_insns =3D -1; for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp * const op =3D &s->gen_op_buf[oi]; - TCGArg * const args =3D op->args; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; @@ -2627,11 +2622,11 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *t= b) switch (opc) { case INDEX_op_mov_i32: case INDEX_op_mov_i64: - tcg_reg_alloc_mov(s, def, args, arg_life); + tcg_reg_alloc_mov(s, def, op->args, arg_life); break; case INDEX_op_movi_i32: case INDEX_op_movi_i64: - tcg_reg_alloc_movi(s, args, arg_life); + tcg_reg_alloc_movi(s, op->args, arg_life); break; case INDEX_op_insn_start: if (num_insns >=3D 0) { @@ -2641,22 +2636,22 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *t= b) for (i =3D 0; i < TARGET_INSN_START_WORDS; ++i) { target_ulong a; #if TARGET_LONG_BITS > TCG_TARGET_REG_BITS - a =3D ((target_ulong)args[i * 2 + 1] << 32) | args[i * 2]; + a =3D deposit64(op->args[i * 2], 32, 32, op->args[i * 2 + = 1]); #else - a =3D args[i]; + a =3D op->args[i]; #endif s->gen_insn_data[num_insns][i] =3D a; } break; case INDEX_op_discard: - temp_dead(s, &s->temps[args[0]]); + temp_dead(s, &s->temps[op->args[0]]); break; case INDEX_op_set_label: tcg_reg_alloc_bb_end(s, s->reserved_regs); - tcg_out_label(s, arg_label(args[0]), s->code_ptr); + tcg_out_label(s, arg_label(op->args[0]), s->code_ptr); break; case INDEX_op_call: - tcg_reg_alloc_call(s, op->callo, op->calli, args, arg_life); + tcg_reg_alloc_call(s, op->callo, op->calli, op->args, arg_life= ); break; default: /* Sanity check that we've not introduced any unhandled opcode= s. */ @@ -2666,7 +2661,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) /* Note: in order to speed up the code, it would be much faster to have specialized register allocator functions for some common argument patterns */ - tcg_reg_alloc_op(s, def, opc, args, arg_life); + tcg_reg_alloc_op(s, def, opc, op->args, arg_life); break; } #ifdef CONFIG_DEBUG_TCG --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013572932643.3242520169375; Tue, 20 Jun 2017 19:52:52 -0700 (PDT) Received: from localhost ([::1]:51544 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVlD-00010J-0N for importer@patchew.org; Tue, 20 Jun 2017 22:52:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33866) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhE-0006QZ-CH for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:45 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhC-0002M1-Vd for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:44 -0400 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:33227) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhC-0002LS-Qq for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:42 -0400 Received: by mail-qk0-x241.google.com with SMTP id p21so1449641qke.0 for ; Tue, 20 Jun 2017 19:48:42 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.40 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:41 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=CEcTyVo0bTrAY05S3ENGI46cy9pS85tgYn82jOryHs4=; b=Cgm/3KNPtVVgt3DYp4vivyboK8Ek8iXvkBnIASJQKttjz+FtOOqPt0zRXtp6zDD7La nxkb5+v7vC0/EvgfYOHKNqOhpoz01QWG7+7ytmjuuHDb+A4ermeirINdiJIsnN3CrK5r bKj7/kPGh9A4YMVFUHT5LkTu/pTjoQKSeDtud4izrVvjkWa8/gsTHNu0Bw7bRcLOMvi7 RufQpGWHgb/Iddw3EyAVbPBkNL2LraWuvtwuusgSblS2CwaqNz8uT0FUDumG+jFbAYvs ECxkT8VoRU699wPlejt7LRWWEt2X57thq4N16Owak+XefbFCvTNpp51enTY5y/F4ToPT 5tTw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=CEcTyVo0bTrAY05S3ENGI46cy9pS85tgYn82jOryHs4=; b=pB3ZCKeiHSUr7pfHPHthPbNFkZJNNFgr6/Jpbu8EAIRQqj8b1u4+ZzhkFuyB8Bi3zI xUVfK52+oED8AsbN1W8Sqr3YzHyz63SKoiaNrAyC8SyT75TKKaOBy05z+B7WCkLcaV+K QhE73da2StfDGsWm/4LxZLwGJBYUJr97MwsSEBzVGqbZ7wXyKD2Gqr9/k5z56cEiWv+W 0ko0ffkwatMI4ob8mefuCS51fLu7owUb0OtXfs0QeYWH20d2KV0O4DA106ke9EoO80eA LGW7DiqProNYqA15a0SrDl0XAamqL6HaLQoL3WtwWjC1+ftZ5Nq+L5pPhoRRheOQZeWr 9ChA== X-Gm-Message-State: AKS2vOyIzfWuOrpjpTvQWosliwIf4xuSv97rg6CdNwAHDQZ0gEZ3kTDg hnADuplQCrDoo/LVuhI= X-Received: by 10.55.102.214 with SMTP id a205mr37023425qkc.154.1498013321920; Tue, 20 Jun 2017 19:48:41 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:19 -0700 Message-Id: <20170621024831.26019-5-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::241 Subject: [Qemu-devel] [PATCH 04/16] tcg: Propagate TCGOp down to allocators X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg.c | 82 +++++++++++++++++++++++++++++++----------------------------= ---- 1 file changed, 40 insertions(+), 42 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index be5b69c..e2248a6 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -2111,25 +2111,24 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TC= GTemp *ots, } } =20 -static void tcg_reg_alloc_movi(TCGContext *s, const TCGArg *args, - TCGLifeData arg_life) +static void tcg_reg_alloc_movi(TCGContext *s, const TCGOp *op) { - TCGTemp *ots =3D &s->temps[args[0]]; - tcg_target_ulong val =3D args[1]; + TCGTemp *ots =3D &s->temps[op->args[0]]; + tcg_target_ulong val =3D op->args[1]; =20 - tcg_reg_alloc_do_movi(s, ots, val, arg_life); + tcg_reg_alloc_do_movi(s, ots, val, op->life); } =20 -static void tcg_reg_alloc_mov(TCGContext *s, const TCGOpDef *def, - const TCGArg *args, TCGLifeData arg_life) +static void tcg_reg_alloc_mov(TCGContext *s, const TCGOp *op) { + const TCGLifeData arg_life =3D op->life; TCGRegSet allocated_regs; TCGTemp *ts, *ots; TCGType otype, itype; =20 tcg_regset_set(allocated_regs, s->reserved_regs); - ots =3D &s->temps[args[0]]; - ts =3D &s->temps[args[1]]; + ots =3D &s->temps[op->args[0]]; + ts =3D &s->temps[op->args[1]]; =20 /* Note that otype !=3D itype for no-op truncation. */ otype =3D ots->type; @@ -2159,7 +2158,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOpDef *def, liveness analysis disabled). */ tcg_debug_assert(NEED_SYNC_ARG(0)); if (!ots->mem_allocated) { - temp_allocate_frame(s, args[0]); + temp_allocate_frame(s, op->args[0]); } tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset); if (IS_DEAD_ARG(1)) { @@ -2193,10 +2192,10 @@ static void tcg_reg_alloc_mov(TCGContext *s, const = TCGOpDef *def, } } =20 -static void tcg_reg_alloc_op(TCGContext *s,=20 - const TCGOpDef *def, TCGOpcode opc, - const TCGArg *args, TCGLifeData arg_life) +static void tcg_reg_alloc_op(TCGContext *s, const TCGOp *op) { + const TCGLifeData arg_life =3D op->life; + const TCGOpDef * const def =3D &tcg_op_defs[op->opc]; TCGRegSet i_allocated_regs; TCGRegSet o_allocated_regs; int i, k, nb_iargs, nb_oargs; @@ -2207,21 +2206,24 @@ static void tcg_reg_alloc_op(TCGContext *s, TCGArg new_args[TCG_MAX_OP_ARGS]; int const_args[TCG_MAX_OP_ARGS]; =20 + /* Sanity check that we've not introduced any unhandled opcodes. */ + tcg_debug_assert(!(def->flags & TCG_OPF_NOT_PRESENT)); + nb_oargs =3D def->nb_oargs; nb_iargs =3D def->nb_iargs; =20 /* copy constants */ memcpy(new_args + nb_oargs + nb_iargs,=20 - args + nb_oargs + nb_iargs,=20 + op->args + nb_oargs + nb_iargs, sizeof(TCGArg) * def->nb_cargs); =20 tcg_regset_set(i_allocated_regs, s->reserved_regs); tcg_regset_set(o_allocated_regs, s->reserved_regs); =20 /* satisfy input constraints */=20 - for(k =3D 0; k < nb_iargs; k++) { + for (k =3D 0; k < nb_iargs; k++) { i =3D def->sorted_args[nb_oargs + k]; - arg =3D args[i]; + arg =3D op->args[i]; arg_ct =3D &def->args_ct[i]; ts =3D &s->temps[arg]; =20 @@ -2239,7 +2241,7 @@ static void tcg_reg_alloc_op(TCGContext *s, if (ts->fixed_reg) { /* if fixed register, we must allocate a new register if the alias is not the same register */ - if (arg !=3D args[arg_ct->alias_index]) + if (arg !=3D op->args[arg_ct->alias_index]) goto allocate_in_reg; } else { /* if the input is aliased to an output and if it is @@ -2280,7 +2282,7 @@ static void tcg_reg_alloc_op(TCGContext *s, /* mark dead temporaries and free the associated registers */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { if (IS_DEAD_ARG(i)) { - temp_dead(s, &s->temps[args[i]]); + temp_dead(s, &s->temps[op->args[i]]); } } =20 @@ -2304,7 +2306,7 @@ static void tcg_reg_alloc_op(TCGContext *s, /* satisfy the output constraints */ for(k =3D 0; k < nb_oargs; k++) { i =3D def->sorted_args[k]; - arg =3D args[i]; + arg =3D op->args[i]; arg_ct =3D &def->args_ct[i]; ts =3D &s->temps[arg]; if ((arg_ct->ct & TCG_CT_ALIAS) @@ -2343,11 +2345,11 @@ static void tcg_reg_alloc_op(TCGContext *s, } =20 /* emit instruction */ - tcg_out_op(s, opc, new_args, const_args); + tcg_out_op(s, op->opc, new_args, const_args); =20 /* move the outputs in the correct register if needed */ for(i =3D 0; i < nb_oargs; i++) { - ts =3D &s->temps[args[i]]; + ts =3D &s->temps[op->args[i]]; reg =3D new_args[i]; if (ts->fixed_reg && ts->reg !=3D reg) { tcg_out_mov(s, ts->type, ts->reg, reg); @@ -2366,9 +2368,11 @@ static void tcg_reg_alloc_op(TCGContext *s, #define STACK_DIR(x) (x) #endif =20 -static void tcg_reg_alloc_call(TCGContext *s, int nb_oargs, int nb_iargs, - const TCGArg * const args, TCGLifeData arg_= life) +static void tcg_reg_alloc_call(TCGContext *s, TCGOp *op) { + const int nb_oargs =3D op->callo; + const int nb_iargs =3D op->calli; + const TCGLifeData arg_life =3D op->life; int flags, nb_regs, i; TCGReg reg; TCGArg arg; @@ -2379,8 +2383,8 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_= oargs, int nb_iargs, int allocate_args; TCGRegSet allocated_regs; =20 - func_addr =3D (tcg_insn_unit *)(intptr_t)args[nb_oargs + nb_iargs]; - flags =3D args[nb_oargs + nb_iargs + 1]; + func_addr =3D (tcg_insn_unit *)(intptr_t)op->args[nb_oargs + nb_iargs]; + flags =3D op->args[nb_oargs + nb_iargs + 1]; =20 nb_regs =3D ARRAY_SIZE(tcg_target_call_iarg_regs); if (nb_regs > nb_iargs) { @@ -2399,8 +2403,8 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_= oargs, int nb_iargs, } =20 stack_offset =3D TCG_TARGET_CALL_STACK_OFFSET; - for(i =3D nb_regs; i < nb_iargs; i++) { - arg =3D args[nb_oargs + i]; + for (i =3D nb_regs; i < nb_iargs; i++) { + arg =3D op->args[nb_oargs + i]; #ifdef TCG_TARGET_STACK_GROWSUP stack_offset -=3D sizeof(tcg_target_long); #endif @@ -2417,8 +2421,8 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_= oargs, int nb_iargs, =20 /* assign input registers */ tcg_regset_set(allocated_regs, s->reserved_regs); - for(i =3D 0; i < nb_regs; i++) { - arg =3D args[nb_oargs + i]; + for (i =3D 0; i < nb_regs; i++) { + arg =3D op->args[nb_oargs + i]; if (arg !=3D TCG_CALL_DUMMY_ARG) { ts =3D &s->temps[arg]; reg =3D tcg_target_call_iarg_regs[i]; @@ -2441,9 +2445,9 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_= oargs, int nb_iargs, } =20 /* mark dead temporaries and free the associated registers */ - for(i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { + for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { if (IS_DEAD_ARG(i)) { - temp_dead(s, &s->temps[args[i]]); + temp_dead(s, &s->temps[op->args[i]]); } } =20 @@ -2468,7 +2472,7 @@ static void tcg_reg_alloc_call(TCGContext *s, int nb_= oargs, int nb_iargs, =20 /* assign output registers and emit moves if needed */ for(i =3D 0; i < nb_oargs; i++) { - arg =3D args[i]; + arg =3D op->args[i]; ts =3D &s->temps[arg]; reg =3D tcg_target_call_oarg_regs[i]; tcg_debug_assert(s->reg_to_temp[reg] =3D=3D NULL); @@ -2611,8 +2615,6 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp * const op =3D &s->gen_op_buf[oi]; TCGOpcode opc =3D op->opc; - const TCGOpDef *def =3D &tcg_op_defs[opc]; - TCGLifeData arg_life =3D op->life; =20 oi_next =3D op->next; #ifdef CONFIG_PROFILER @@ -2622,11 +2624,11 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *t= b) switch (opc) { case INDEX_op_mov_i32: case INDEX_op_mov_i64: - tcg_reg_alloc_mov(s, def, op->args, arg_life); + tcg_reg_alloc_mov(s, op); break; case INDEX_op_movi_i32: case INDEX_op_movi_i64: - tcg_reg_alloc_movi(s, op->args, arg_life); + tcg_reg_alloc_movi(s, op); break; case INDEX_op_insn_start: if (num_insns >=3D 0) { @@ -2651,17 +2653,13 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *t= b) tcg_out_label(s, arg_label(op->args[0]), s->code_ptr); break; case INDEX_op_call: - tcg_reg_alloc_call(s, op->callo, op->calli, op->args, arg_life= ); + tcg_reg_alloc_call(s, op); break; default: - /* Sanity check that we've not introduced any unhandled opcode= s. */ - if (def->flags & TCG_OPF_NOT_PRESENT) { - tcg_abort(); - } /* Note: in order to speed up the code, it would be much faster to have specialized register allocator functions for some common argument patterns */ - tcg_reg_alloc_op(s, def, opc, op->args, arg_life); + tcg_reg_alloc_op(s, op); break; } #ifdef CONFIG_DEBUG_TCG --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013763182953.5000802380808; Tue, 20 Jun 2017 19:56:03 -0700 (PDT) Received: from localhost ([::1]:51561 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVoH-0003rD-Au for importer@patchew.org; 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X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PATCH 05/16] tcg: Introduce arg_temp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/optimize.c | 4 ++-- tcg/tcg.c | 51 +++++++++++++++++++++++++-------------------------- tcg/tcg.h | 5 +++++ 3 files changed, 32 insertions(+), 28 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 1a1c6fb..d8c3a7e 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -133,7 +133,7 @@ static TCGArg find_better_copy(TCGContext *s, TCGArg te= mp) } =20 /* If it is a temp, search for a temp local. */ - if (!s->temps[temp].temp_local) { + if (!arg_temp(temp)->temp_local) { for (i =3D temps[temp].next_copy ; i !=3D temp ; i =3D temps[i].ne= xt_copy) { if (s->temps[i].temp_local) { return i; @@ -207,7 +207,7 @@ static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, T= CGArg dst, TCGArg src) } temps[dst].mask =3D mask; =20 - if (s->temps[src].type =3D=3D s->temps[dst].type) { + if (arg_temp(src)->type =3D=3D arg_temp(dst)->type) { temps[dst].next_copy =3D temps[src].next_copy; temps[dst].prev_copy =3D src; temps[temps[dst].next_copy].prev_copy =3D dst; diff --git a/tcg/tcg.c b/tcg/tcg.c index e2248a6..068ac51 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -977,11 +977,10 @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char = *buf, int buf_size, return buf; } =20 -static char *tcg_get_arg_str_idx(TCGContext *s, char *buf, - int buf_size, int idx) +static char *tcg_get_arg_str(TCGContext *s, char *buf, + int buf_size, TCGArg arg) { - tcg_debug_assert(idx >=3D 0 && idx < s->nb_temps); - return tcg_get_arg_str_ptr(s, buf, buf_size, &s->temps[idx]); + return tcg_get_arg_str_ptr(s, buf, buf_size, arg_temp(arg)); } =20 /* Find helper name. */ @@ -1084,14 +1083,14 @@ void tcg_dump_ops(TCGContext *s) tcg_find_helper(s, op->args[nb_oargs + nb_iarg= s]), op->args[nb_oargs + nb_iargs + 1], nb_oargs); for (i =3D 0; i < nb_oargs; i++) { - col +=3D qemu_log(",%s", tcg_get_arg_str_idx(s, buf, sizeo= f(buf), - op->args[i])); + col +=3D qemu_log(",%s", tcg_get_arg_str(s, buf, sizeof(bu= f), + op->args[i])); } for (i =3D 0; i < nb_iargs; i++) { TCGArg arg =3D op->args[nb_oargs + i]; const char *t =3D ""; if (arg !=3D TCG_CALL_DUMMY_ARG) { - t =3D tcg_get_arg_str_idx(s, buf, sizeof(buf), arg); + t =3D tcg_get_arg_str(s, buf, sizeof(buf), arg); } col +=3D qemu_log(",%s", t); } @@ -1107,15 +1106,15 @@ void tcg_dump_ops(TCGContext *s) if (k !=3D 0) { col +=3D qemu_log(","); } - col +=3D qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof= (buf), - op->args[k++])); + col +=3D qemu_log("%s", tcg_get_arg_str(s, buf, sizeof(buf= ), + op->args[k++])); } for (i =3D 0; i < nb_iargs; i++) { if (k !=3D 0) { col +=3D qemu_log(","); } - col +=3D qemu_log("%s", tcg_get_arg_str_idx(s, buf, sizeof= (buf), - op->args[k++])); + col +=3D qemu_log("%s", tcg_get_arg_str(s, buf, sizeof(buf= ), + op->args[k++])); } switch (c) { case INDEX_op_brcond_i32: @@ -1707,7 +1706,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) if (arg < nb_globals) { dir =3D dir_temps[arg]; if (dir !=3D 0 && temp_state[arg] =3D=3D TS_DEAD) { - TCGTemp *its =3D &s->temps[arg]; + TCGTemp *its =3D arg_temp(arg); TCGOpcode lopc =3D (its->type =3D=3D TCG_TYPE_I32 ? INDEX_op_ld_i32 : INDEX_op_ld_i64); @@ -1778,7 +1777,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) =20 /* Sync outputs upon their last write. */ if (NEED_SYNC_ARG(i)) { - TCGTemp *its =3D &s->temps[arg]; + TCGTemp *its =3D arg_temp(arg); TCGOpcode sopc =3D (its->type =3D=3D TCG_TYPE_I32 ? INDEX_op_st_i32 : INDEX_op_st_i64); @@ -1809,7 +1808,7 @@ static void dump_regs(TCGContext *s) =20 for(i =3D 0; i < s->nb_temps; i++) { ts =3D &s->temps[i]; - printf(" %10s: ", tcg_get_arg_str_idx(s, buf, sizeof(buf), i)); + printf(" %10s: ", tcg_get_arg_str_ptr(s, buf, sizeof(buf), ts)); switch(ts->val_type) { case TEMP_VAL_REG: printf("%s", tcg_target_reg_names[ts->reg]); @@ -2113,7 +2112,7 @@ static void tcg_reg_alloc_do_movi(TCGContext *s, TCGT= emp *ots, =20 static void tcg_reg_alloc_movi(TCGContext *s, const TCGOp *op) { - TCGTemp *ots =3D &s->temps[op->args[0]]; + TCGTemp *ots =3D arg_temp(op->args[0]); tcg_target_ulong val =3D op->args[1]; =20 tcg_reg_alloc_do_movi(s, ots, val, op->life); @@ -2127,8 +2126,8 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOp *op) TCGType otype, itype; =20 tcg_regset_set(allocated_regs, s->reserved_regs); - ots =3D &s->temps[op->args[0]]; - ts =3D &s->temps[op->args[1]]; + ots =3D arg_temp(op->args[0]); + ts =3D arg_temp(op->args[1]); =20 /* Note that otype !=3D itype for no-op truncation. */ otype =3D ots->type; @@ -2225,7 +2224,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) i =3D def->sorted_args[nb_oargs + k]; arg =3D op->args[i]; arg_ct =3D &def->args_ct[i]; - ts =3D &s->temps[arg]; + ts =3D arg_temp(arg); =20 if (ts->val_type =3D=3D TEMP_VAL_CONST && tcg_target_const_match(ts->val, ts->type, arg_ct)) { @@ -2282,7 +2281,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) /* mark dead temporaries and free the associated registers */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { if (IS_DEAD_ARG(i)) { - temp_dead(s, &s->temps[op->args[i]]); + temp_dead(s, arg_temp(op->args[i])); } } =20 @@ -2308,7 +2307,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) i =3D def->sorted_args[k]; arg =3D op->args[i]; arg_ct =3D &def->args_ct[i]; - ts =3D &s->temps[arg]; + ts =3D arg_temp(arg); if ((arg_ct->ct & TCG_CT_ALIAS) && !const_args[arg_ct->alias_index]) { reg =3D new_args[arg_ct->alias_index]; @@ -2349,7 +2348,7 @@ static void tcg_reg_alloc_op(TCGContext *s, const TCG= Op *op) =20 /* move the outputs in the correct register if needed */ for(i =3D 0; i < nb_oargs; i++) { - ts =3D &s->temps[op->args[i]]; + ts =3D arg_temp(op->args[i]); reg =3D new_args[i]; if (ts->fixed_reg && ts->reg !=3D reg) { tcg_out_mov(s, ts->type, ts->reg, reg); @@ -2409,7 +2408,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) stack_offset -=3D sizeof(tcg_target_long); #endif if (arg !=3D TCG_CALL_DUMMY_ARG) { - ts =3D &s->temps[arg]; + ts =3D arg_temp(arg); temp_load(s, ts, tcg_target_available_regs[ts->type], s->reserved_regs); tcg_out_st(s, ts->type, ts->reg, TCG_REG_CALL_STACK, stack_off= set); @@ -2424,7 +2423,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) for (i =3D 0; i < nb_regs; i++) { arg =3D op->args[nb_oargs + i]; if (arg !=3D TCG_CALL_DUMMY_ARG) { - ts =3D &s->temps[arg]; + ts =3D arg_temp(arg); reg =3D tcg_target_call_iarg_regs[i]; tcg_reg_free(s, reg, allocated_regs); =20 @@ -2447,7 +2446,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) /* mark dead temporaries and free the associated registers */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { if (IS_DEAD_ARG(i)) { - temp_dead(s, &s->temps[op->args[i]]); + temp_dead(s, arg_temp(op->args[i])); } } =20 @@ -2473,7 +2472,7 @@ static void tcg_reg_alloc_call(TCGContext *s, TCGOp *= op) /* assign output registers and emit moves if needed */ for(i =3D 0; i < nb_oargs; i++) { arg =3D op->args[i]; - ts =3D &s->temps[arg]; + ts =3D arg_temp(arg); reg =3D tcg_target_call_oarg_regs[i]; tcg_debug_assert(s->reg_to_temp[reg] =3D=3D NULL); =20 @@ -2646,7 +2645,7 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb) } break; case INDEX_op_discard: - temp_dead(s, &s->temps[op->args[0]]); + temp_dead(s, arg_temp(op->args[0])); break; case INDEX_op_set_label: tcg_reg_alloc_bb_end(s, s->reserved_regs); diff --git a/tcg/tcg.h b/tcg/tcg.h index 720e04e..70d9fda 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -724,6 +724,11 @@ struct TCGContext { extern TCGContext tcg_ctx; extern bool parallel_cpus; =20 +static inline TCGTemp *arg_temp(TCGArg a) +{ + return &tcg_ctx.temps[a]; +} + static inline void tcg_set_insn_param(int op_idx, int arg, TCGArg v) { tcg_ctx.gen_op_buf[op_idx].args[arg] =3D v; --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013877876972.0015518733412; Tue, 20 Jun 2017 19:57:57 -0700 (PDT) Received: from localhost ([::1]:51569 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVq8-0005wj-Kt for importer@patchew.org; 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[97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.43 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:43 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=hBE1q9W0lWKlhI719ICRtBjn4AfETsgJM+T+gZhdnbk=; b=NpAknUBIfK535r+2Y3ppckYJSEMV8enONwvgA4ArAXp1A1pzec2eZ2QRDeFudH9R1U kyiXUdbf0WK8ZnrV73e7HsD60fmSpy8yj5V0g0m0YSuSY6PI09fHqJlMj86T3W9Dt/l4 A7yfcVzUb5DlZnyBQtgNPTvTU20OiXBPaBESxEnbj8BbrDJYbJP8l5LEHLN9/IuAWDKf A896CmhJZ1FTsxaQsl4axhqoUZKhuoaGFOnxjK4SEW80P2xwIXpjSNyJa+rFrh6LFb+u 5CRAJj0he9xEFe3tO/l43mkZhM3aLXYLDHzDO9BjZaVjlQy9Eo02K/M3jHDrkX8R6+vh FPQw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=hBE1q9W0lWKlhI719ICRtBjn4AfETsgJM+T+gZhdnbk=; b=OurbgJLTDaiIgboCrfIinyHAvUCHz/7vf4xbW17a1bdWkCCwMpmFGkHgbHSkvCN+Z1 v36aDxzYjuN6bpe5nFe8V3Z/i2gcR0779try5B6CK3pJe+8YjLr7NhC8MtfqpZSaQB5Z ThV7OFTKWEwa+jwHgJeZV/KJe+S63OtDPblhxiV9/NCBP1hCmf2RTwOksmXKL70cLWmo rOcrbCq/bcxdi4SebziVkUJIAZUQHQDeYWSEqSyJb+M9uBIjCNr45PQwaVyJbYdi2PDW I13/CDdfRYkJBFtsMWoApC7IALEDt8Jwq/+gu3UZ4LxAOb7CWIZDh07OJWEQMoguQfTg /q6w== X-Gm-Message-State: AKS2vOzA4UuTIRWjKh4/jfSqRItftHqJWCwBHllLNn0/CZ+C/oNK8bN1 Cl10TXVqpq1dmySv/yQ= X-Received: by 10.55.44.129 with SMTP id s123mr35575638qkh.137.1498013324532; Tue, 20 Jun 2017 19:48:44 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:21 -0700 Message-Id: <20170621024831.26019-7-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PATCH 06/16] tcg: Add temp_global bit to TCGTemp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This avoids needing to test the index of a temp against nb_globals. Signed-off-by: Richard Henderson --- tcg/optimize.c | 15 ++++++++------- tcg/tcg.c | 11 ++++++++--- tcg/tcg.h | 12 ++++++++---- 3 files changed, 24 insertions(+), 14 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index d8c3a7e..55f9e83 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -116,25 +116,26 @@ static TCGOpcode op_to_movi(TCGOpcode op) } } =20 -static TCGArg find_better_copy(TCGContext *s, TCGArg temp) +static TCGArg find_better_copy(TCGContext *s, TCGArg arg) { + TCGTemp *ts =3D arg_temp(arg); TCGArg i; =20 /* If this is already a global, we can't do better. */ - if (temp < s->nb_globals) { - return temp; + if (ts->temp_global) { + return arg; } =20 /* Search for a global first. */ - for (i =3D temps[temp].next_copy ; i !=3D temp ; i =3D temps[i].next_c= opy) { + for (i =3D temps[arg].next_copy ; i !=3D arg; i =3D temps[i].next_copy= ) { if (i < s->nb_globals) { return i; } } =20 /* If it is a temp, search for a temp local. */ - if (!arg_temp(temp)->temp_local) { - for (i =3D temps[temp].next_copy ; i !=3D temp ; i =3D temps[i].ne= xt_copy) { + if (!ts->temp_local) { + for (i =3D temps[arg].next_copy ; i !=3D arg; i =3D temps[i].next_= copy) { if (s->temps[i].temp_local) { return i; } @@ -142,7 +143,7 @@ static TCGArg find_better_copy(TCGContext *s, TCGArg te= mp) } =20 /* Failure to find a better representation, return the same temp. */ - return temp; + return arg; } =20 static bool temps_are_copies(TCGArg arg1, TCGArg arg2) diff --git a/tcg/tcg.c b/tcg/tcg.c index 068ac51..0bb88b1 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -489,9 +489,14 @@ static inline TCGTemp *tcg_temp_alloc(TCGContext *s) =20 static inline TCGTemp *tcg_global_alloc(TCGContext *s) { + TCGTemp *ts; + tcg_debug_assert(s->nb_globals =3D=3D s->nb_temps); s->nb_globals++; - return tcg_temp_alloc(s); + ts =3D tcg_temp_alloc(s); + ts->temp_global =3D 1; + + return ts; } =20 static int tcg_global_reg_new_internal(TCGContext *s, TCGType type, @@ -967,7 +972,7 @@ static char *tcg_get_arg_str_ptr(TCGContext *s, char *b= uf, int buf_size, { int idx =3D temp_idx(s, ts); =20 - if (idx < s->nb_globals) { + if (ts->temp_global) { pstrcpy(buf, buf_size, ts->name); } else if (ts->temp_local) { snprintf(buf, buf_size, "loc%d", idx - s->nb_globals); @@ -1905,7 +1910,7 @@ static void temp_free_or_dead(TCGContext *s, TCGTemp = *ts, int free_or_dead) } ts->val_type =3D (free_or_dead < 0 || ts->temp_local - || temp_idx(s, ts) < s->nb_globals + || ts->temp_global ? TEMP_VAL_MEM : TEMP_VAL_DEAD); } =20 diff --git a/tcg/tcg.h b/tcg/tcg.h index 70d9fda..3b35344 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -586,10 +586,14 @@ typedef struct TCGTemp { unsigned int indirect_base:1; unsigned int mem_coherent:1; unsigned int mem_allocated:1; - unsigned int temp_local:1; /* If true, the temp is saved across - basic blocks. Otherwise, it is not - preserved across basic blocks. */ - unsigned int temp_allocated:1; /* never used for code gen */ + /* If true, the temp is saved across both basic blocks and + translation blocks. */ + unsigned int temp_global:1; + /* If true, the temp is saved across basic blocks but dead + at the end of translation blocks. If false, the temp is + dead at the end of basic blocks. */ + unsigned int temp_local:1; + unsigned int temp_allocated:1; =20 tcg_target_long val; struct TCGTemp *mem_base; --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14980139735521.108748370043827; Tue, 20 Jun 2017 19:59:33 -0700 (PDT) Received: from localhost ([::1]:51573 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVrg-0006y8-3P for importer@patchew.org; Tue, 20 Jun 2017 22:59:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33913) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhJ-0006UX-1t for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhG-0002NW-KU for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:49 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:35745) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhG-0002NN-GH for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:46 -0400 Received: by mail-qt0-x243.google.com with SMTP id x58so25653267qtc.2 for ; Tue, 20 Jun 2017 19:48:46 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.44 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:45 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=GuQimmGc2e0Ou+H9duZ+eZo963+IZdy+fG8O1Fz1QnA=; b=SQtB2M7GPTTbjPvvW/TPjZGHqE54B9gkAtyu5Xt4bbqbYnq+aLlW6mw4zecJsTqC8E dlZGT57ZZrUPJEblBBfe2OUietFxewD+8IRtMT3GFRS+hT/D/gQd/xck12gyZLShexa8 fh0WqfRsX4MpV4Ta3P+QQ99my/Wzr0OrWwUBDjrAuU/hjCsO9zQNyezPsg2e1jKN0sOt qRzXTu/wgpLHNXKrIALJjrsaJbhDzC1QnVvoWC0XMQ9zQ4yS/4AvVX8Aem3Csdhh+Ocm 2jItk6TcE63VSBpjKvp7yvA7mlNTY7GHWq7B2UO0KKaePKA/bQCFZw4YPE0/Bu+k2s/N uHmw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=GuQimmGc2e0Ou+H9duZ+eZo963+IZdy+fG8O1Fz1QnA=; b=UrjSXW6lEzU5RGpDfiAAJpc229Or1YTwAq3ct4+UJN2JMyCp2a3UMNcLJw3kHqd5EO Qf/GkSbA3LfB56LEYh/1zHw7afqnxY6xCnRtS6crerAp88IySf425g0p16ng7BiO6Hqx cxyuU2KuTqQ4bEKN7/SdRMznO74Fm7HiSV5ZZLgwyxNiu1UZfWkr+M4cJNLZf2AjI3QX 51q9SAXVPW+HCpVgJBl46drvJDskKPuRMR97Pp16xiBZj0SLXGe26xrOgUN3z+fZh0N5 4CoBigFIQsDv+TDcKgVpcKTtGeDnOnkli2TbLtPTkQNANX2orV7xadZBCwHlqBYrvwtT nWNA== X-Gm-Message-State: AKS2vOycj1u0/uQYZsgpRpULlWqOvkuAulraoB6GoYJvfJYoqfVfS7wc EreLAjQwqScxQYsE/zo= X-Received: by 10.200.36.194 with SMTP id t2mr40558167qtt.147.1498013325800; Tue, 20 Jun 2017 19:48:45 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:22 -0700 Message-Id: <20170621024831.26019-8-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PATCH 07/16] tcg: Return NULL temp for TCG_CALL_DUMMY_ARG X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/tcg/tcg.h b/tcg/tcg.h index 3b35344..6c357e7 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -730,7 +730,7 @@ extern bool parallel_cpus; =20 static inline TCGTemp *arg_temp(TCGArg a) { - return &tcg_ctx.temps[a]; + return a =3D=3D TCG_CALL_DUMMY_ARG ? NULL : &tcg_ctx.temps[a]; } =20 static inline void tcg_set_insn_param(int op_idx, int arg, TCGArg v) --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498014071289491.9629654497312; Tue, 20 Jun 2017 20:01:11 -0700 (PDT) Received: from localhost ([::1]:51585 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVtF-00085S-MP for importer@patchew.org; Tue, 20 Jun 2017 23:01:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33911) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhJ-0006UW-12 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhH-0002OU-TV for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:49 -0400 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:34441) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhH-0002OQ-Oy for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:47 -0400 Received: by mail-qt0-x244.google.com with SMTP id o21so25678185qtb.1 for ; Tue, 20 Jun 2017 19:48:47 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.46 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:46 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=s8dShvYAxEdgmAAnoqGFfJicoRus13IAF9bJMwc56pI=; b=eEIV1NuV9OdP9sZmRDy2PtKdgpgaNsTC+uuzuKdtqobLRh0p6GMg1rg27nkqEmkigm JIoyOOSrbtbhfwi9Z5siPAeQDvIWHznu+xrSmtiGXipfBhEwSyqMZjVh22DWFvhgrFxU afetHZss3LVjrTOhbTLatZ9PpjzXskeErMJLckZPG5jSXCQlzb+KtJIlQOwmH0qry+4Y HRTBoJaeaP2CYZE+c3ih89dFXNcI2TSCMMkNq1h0KiA3eVNyy2dXQV3Vp4+d8fYTuQFU htul9fte+naatYG5GI3+pYNAVeVARojpMYm/wSx6h4anHf1HyFXO6OF6L47GaxersEe7 kdXw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=s8dShvYAxEdgmAAnoqGFfJicoRus13IAF9bJMwc56pI=; b=Yal2w94IGlRer5NrpqCNRFSBzKvZrHlLGOUM7Gvm87Q4qAJtRZpmkkz3PtRYN5xr6c joe54rfCHfxt9BQy7dVOBvk6arl0Fy/qXsTfyrsmjOb1+l0i0WcksfEFwFbGrFQkLQy5 tpEWI/EP2kClUIQ+K8eiRHy78cMR853t7v41VapZBPYkj/VqSCZLu7uM9Hv8tn7o8V7u J5+wW0CXMv1Xo4AMOyPX7enkIWLRofuSVUm3vLmYGZP9DEvMcH92AtQWLtXG1ypZXWCQ Nc+KtdM862NafKLShncuMyUjcALMtjrPBOVE33ViQMa7CmY8lTWUhgsxicOigLoJXqPc XjmA== X-Gm-Message-State: AKS2vOz9OsuNnEZLW81Y5AafPgXOdQQz4+u1FiX97O0p6nWBJO4rp4VJ lo1STxznKpSMKEEK0a8= X-Received: by 10.237.36.248 with SMTP id u53mr35238004qtc.154.1498013327033; Tue, 20 Jun 2017 19:48:47 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:23 -0700 Message-Id: <20170621024831.26019-9-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 08/16] tcg: Introduce temp_arg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg.c | 4 ++-- tcg/tcg.h | 7 +++++++ 2 files changed, 9 insertions(+), 2 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 0bb88b1..0d758e4 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1718,7 +1718,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); =20 lop->args[0] =3D dir; - lop->args[1] =3D temp_idx(s, its->mem_base); + lop->args[1] =3D temp_arg(its->mem_base); lop->args[2] =3D its->mem_offset; =20 /* Loaded, but synced with memory. */ @@ -1789,7 +1789,7 @@ static bool liveness_pass_2(TCGContext *s, uint8_t *t= emp_state) TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); =20 sop->args[0] =3D dir; - sop->args[1] =3D temp_idx(s, its->mem_base); + sop->args[1] =3D temp_arg(its->mem_base); sop->args[2] =3D its->mem_offset; =20 temp_state[arg] =3D TS_MEM; diff --git a/tcg/tcg.h b/tcg/tcg.h index 6c357e7..80012b5 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -728,6 +728,13 @@ struct TCGContext { extern TCGContext tcg_ctx; extern bool parallel_cpus; =20 +static inline TCGArg temp_arg(TCGTemp *ts) +{ + ptrdiff_t n =3D ts - tcg_ctx.temps; + tcg_debug_assert(n >=3D 0 && n < tcg_ctx.nb_temps); + return n; +} + static inline TCGTemp *arg_temp(TCGArg a) { return a =3D=3D TCG_CALL_DUMMY_ARG ? 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[97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.47 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:47 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=F5Q9aGNyvKG8l5+n5PJh2tQHUlG0LHz+v1QVORfdCA8=; b=SLa/oOS21Oafy/11yi8XcDnb6LsUQ5+24noBHkUrQu/CSpx6khmkSTqlQEdjUy3Lpe LbgmMlKXa/J8JAkV+IHASLf+T8JGSWdyTgO8FTG8Zp4y8Yj/IsHnKfuSFm3eRpo9S1vn bxb5+ccUOqJQdZIW6Z+Ql2UyFTDm0qp+r5ca5lmmRt5UPJf/D8Sv1UOcV4P1XZo1lj3A CUSZRlnDrrwFafzfNyU504/M1Q+M735qu26kt5GeYUE4eTQKghakWJ1NnZKAPjTF50xt enhgW0HvFISmnjmFO/EF0zyQ/CS3E6cPmdwed7hvLhoLC0oDFISvNk4c5GKzSb3AgwES BPXA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=F5Q9aGNyvKG8l5+n5PJh2tQHUlG0LHz+v1QVORfdCA8=; b=lLzkhZzbcLo4Mx8aaIPq1H9YGgLz7MW9NXRsP95fy3wEF5vb5laEhSmccS4LMOtMVT vwAxsQ/eHZE09zRgawADhcpS/PLctGwUR0SNjEhK9oejNq78IvcCmW+lqm5buSrKr7Qg A9++3Yudz8iuONaSjqhAI3F+LF2tn2E/Kju6P2eUlFlWLV83hu/qkZrd3My+DD7vxgK2 DfeCGAxw2JLroTNOV4Xw1K337SR0dITcjrEcQT9d+55WzVYuP5EVmAuc86PPijrx67F2 24YEZStZSYCEfZJhZ8cMBNEzdiF0Nd3yJD9wwBSrjBuB0CGCFoCc2xemQI5nCVRn/dRX IyoQ== X-Gm-Message-State: AKS2vOwJvMatwQqKAWyl3v57kM6eWP20dCqAXtZi/cF+kL0WI243FLxz XrncmIS2XvuwqEOAm0s= X-Received: by 10.200.35.172 with SMTP id q41mr38835608qtq.129.1498013328270; Tue, 20 Jun 2017 19:48:48 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:24 -0700 Message-Id: <20170621024831.26019-10-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PATCH 09/16] tcg: Use per-temp state data in liveness X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This avoids having to allocate external memory for each temporary. Signed-off-by: Richard Henderson --- tcg/tcg.c | 232 ++++++++++++++++++++++++++++++----------------------------= ---- tcg/tcg.h | 6 ++ 2 files changed, 120 insertions(+), 118 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 0d758e4..e78140b 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1399,42 +1399,54 @@ TCGOp *tcg_op_insert_after(TCGContext *s, TCGOp *ol= d_op, =20 /* liveness analysis: end of function: all temps are dead, and globals should be in memory. */ -static inline void tcg_la_func_end(TCGContext *s, uint8_t *temp_state) +static void tcg_la_func_end(TCGContext *s) { - memset(temp_state, TS_DEAD | TS_MEM, s->nb_globals); - memset(temp_state + s->nb_globals, TS_DEAD, s->nb_temps - s->nb_global= s); + int ng =3D s->nb_globals; + int nt =3D s->nb_temps; + int i; + + for (i =3D 0; i < ng; ++i) { + s->temps[i].state =3D TS_DEAD | TS_MEM; + } + for (i =3D ng; i < nt; ++i) { + s->temps[i].state =3D TS_DEAD; + } } =20 /* liveness analysis: end of basic block: all temps are dead, globals and local temps should be in memory. */ -static inline void tcg_la_bb_end(TCGContext *s, uint8_t *temp_state) +static void tcg_la_bb_end(TCGContext *s) { - int i, n; + int ng =3D s->nb_globals; + int nt =3D s->nb_temps; + int i; =20 - tcg_la_func_end(s, temp_state); - for (i =3D s->nb_globals, n =3D s->nb_temps; i < n; i++) { - if (s->temps[i].temp_local) { - temp_state[i] |=3D TS_MEM; - } + for (i =3D 0; i < ng; ++i) { + s->temps[i].state =3D TS_DEAD | TS_MEM; + } + for (i =3D ng; i < nt; ++i) { + s->temps[i].state =3D (s->temps[i].temp_local + ? TS_DEAD | TS_MEM + : TS_DEAD); } } =20 /* Liveness analysis : update the opc_arg_life array to tell if a given input arguments is dead. Instructions updating dead temporaries are removed. */ -static void liveness_pass_1(TCGContext *s, uint8_t *temp_state) +static void liveness_pass_1(TCGContext *s) { int nb_globals =3D s->nb_globals; int oi, oi_prev; =20 - tcg_la_func_end(s, temp_state); + tcg_la_func_end(s); =20 for (oi =3D s->gen_op_buf[0].prev; oi !=3D 0; oi =3D oi_prev) { int i, nb_iargs, nb_oargs; TCGOpcode opc_new, opc_new2; bool have_opc_new2; TCGLifeData arg_life =3D 0; - TCGArg arg; + TCGTemp *arg_ts; =20 TCGOp * const op =3D &s->gen_op_buf[oi]; TCGOpcode opc =3D op->opc; @@ -1454,8 +1466,8 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) /* pure functions can be removed if their result is unused= */ if (call_flags & TCG_CALL_NO_SIDE_EFFECTS) { for (i =3D 0; i < nb_oargs; i++) { - arg =3D op->args[i]; - if (temp_state[arg] !=3D TS_DEAD) { + arg_ts =3D arg_temp(op->args[i]); + if (arg_ts->state !=3D TS_DEAD) { goto do_not_remove_call; } } @@ -1465,41 +1477,41 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) =20 /* output args are dead */ for (i =3D 0; i < nb_oargs; i++) { - arg =3D op->args[i]; - if (temp_state[arg] & TS_DEAD) { + arg_ts =3D arg_temp(op->args[i]); + if (arg_ts->state & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } - if (temp_state[arg] & TS_MEM) { + if (arg_ts->state & TS_MEM) { arg_life |=3D SYNC_ARG << i; } - temp_state[arg] =3D TS_DEAD; + arg_ts->state =3D TS_DEAD; } =20 if (!(call_flags & (TCG_CALL_NO_WRITE_GLOBALS | TCG_CALL_NO_READ_GLOBALS))) { /* globals should go back to memory */ - memset(temp_state, TS_DEAD | TS_MEM, nb_globals); + for (i =3D 0; i < nb_globals; i++) { + s->temps[i].state =3D TS_DEAD | TS_MEM; + } } else if (!(call_flags & TCG_CALL_NO_READ_GLOBALS)) { /* globals should be synced to memory */ for (i =3D 0; i < nb_globals; i++) { - temp_state[i] |=3D TS_MEM; + s->temps[i].state |=3D TS_MEM; } } =20 /* record arguments that die in this helper */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D op->args[i]; - if (arg !=3D TCG_CALL_DUMMY_ARG) { - if (temp_state[arg] & TS_DEAD) { - arg_life |=3D DEAD_ARG << i; - } + arg_ts =3D arg_temp(op->args[i]); + if (arg_ts && arg_ts->state & TS_DEAD) { + arg_life |=3D DEAD_ARG << i; } } /* input arguments are live for preceding opcodes */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D op->args[i]; - if (arg !=3D TCG_CALL_DUMMY_ARG) { - temp_state[arg] &=3D ~TS_DEAD; + arg_ts =3D arg_temp(op->args[i]); + if (arg_ts) { + arg_ts->state &=3D ~TS_DEAD; } } } @@ -1509,7 +1521,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) break; case INDEX_op_discard: /* mark the temporary as dead */ - temp_state[op->args[0]] =3D TS_DEAD; + arg_temp(op->args[0])->state =3D TS_DEAD; break; =20 case INDEX_op_add2_i32: @@ -1530,8 +1542,8 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) the low part. The result can be optimized to a simple add or sub. This happens often for x86_64 guest when the cpu mode is set to 32 bit. */ - if (temp_state[op->args[1]] =3D=3D TS_DEAD) { - if (temp_state[op->args[0]] =3D=3D TS_DEAD) { + if (arg_temp(op->args[1])->state =3D=3D TS_DEAD) { + if (arg_temp(op->args[0])->state =3D=3D TS_DEAD) { goto do_remove; } /* Replace the opcode and adjust the args in place, @@ -1568,8 +1580,8 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) do_mul2: nb_iargs =3D 2; nb_oargs =3D 2; - if (temp_state[op->args[1]] =3D=3D TS_DEAD) { - if (temp_state[op->args[0]] =3D=3D TS_DEAD) { + if (arg_temp(op->args[1])->state =3D=3D TS_DEAD) { + if (arg_temp(op->args[0])->state =3D=3D TS_DEAD) { /* Both parts of the operation are dead. */ goto do_remove; } @@ -1577,7 +1589,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) op->opc =3D opc =3D opc_new; op->args[1] =3D op->args[2]; op->args[2] =3D op->args[3]; - } else if (temp_state[op->args[0]] =3D=3D TS_DEAD && have_opc_= new2) { + } else if (arg_temp(op->args[0])->state =3D=3D TS_DEAD && have= _opc_new2) { /* The low part of the operation is dead; generate the hig= h. */ op->opc =3D opc =3D opc_new2; op->args[0] =3D op->args[1]; @@ -1600,7 +1612,7 @@ static void liveness_pass_1(TCGContext *s, uint8_t *t= emp_state) implies side effects */ if (!(def->flags & TCG_OPF_SIDE_EFFECTS) && nb_oargs !=3D 0) { for (i =3D 0; i < nb_oargs; i++) { - if (temp_state[op->args[i]] !=3D TS_DEAD) { + if (arg_temp(op->args[i])->state !=3D TS_DEAD) { goto do_not_remove; } } @@ -1610,36 +1622,36 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) do_not_remove: /* output args are dead */ for (i =3D 0; i < nb_oargs; i++) { - arg =3D op->args[i]; - if (temp_state[arg] & TS_DEAD) { + arg_ts =3D arg_temp(op->args[i]); + if (arg_ts->state & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } - if (temp_state[arg] & TS_MEM) { + if (arg_ts->state & TS_MEM) { arg_life |=3D SYNC_ARG << i; } - temp_state[arg] =3D TS_DEAD; + arg_ts->state =3D TS_DEAD; } =20 /* if end of basic block, update */ if (def->flags & TCG_OPF_BB_END) { - tcg_la_bb_end(s, temp_state); + tcg_la_bb_end(s); } else if (def->flags & TCG_OPF_SIDE_EFFECTS) { /* globals should be synced to memory */ for (i =3D 0; i < nb_globals; i++) { - temp_state[i] |=3D TS_MEM; + s->temps[i].state |=3D TS_MEM; } } =20 /* record arguments that die in this opcode */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { - arg =3D op->args[i]; - if (temp_state[arg] & TS_DEAD) { + arg_ts =3D arg_temp(op->args[i]); + if (arg_ts->state & TS_DEAD) { arg_life |=3D DEAD_ARG << i; } } /* input arguments are live for preceding opcodes */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { - temp_state[op->args[i]] &=3D ~TS_DEAD; + arg_temp(op->args[i])->state &=3D ~TS_DEAD; } } break; @@ -1649,16 +1661,12 @@ static void liveness_pass_1(TCGContext *s, uint8_t = *temp_state) } =20 /* Liveness analysis: Convert indirect regs to direct temporaries. */ -static bool liveness_pass_2(TCGContext *s, uint8_t *temp_state) +static bool liveness_pass_2(TCGContext *s) { int nb_globals =3D s->nb_globals; - int16_t *dir_temps; int i, oi, oi_next; bool changes =3D false; =20 - dir_temps =3D tcg_malloc(nb_globals * sizeof(int16_t)); - memset(dir_temps, 0, nb_globals * sizeof(int16_t)); - /* Create a temporary for each indirect global. */ for (i =3D 0; i < nb_globals; ++i) { TCGTemp *its =3D &s->temps[i]; @@ -1666,19 +1674,19 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) TCGTemp *dts =3D tcg_temp_alloc(s); dts->type =3D its->type; dts->base_type =3D its->base_type; - dir_temps[i] =3D temp_idx(s, dts); + its->state_ptr =3D dts; } + /* All globals begin dead. */ + its->state =3D TS_DEAD; } =20 - memset(temp_state, TS_DEAD, nb_globals); - for (oi =3D s->gen_op_buf[0].next; oi !=3D 0; oi =3D oi_next) { TCGOp *op =3D &s->gen_op_buf[oi]; TCGOpcode opc =3D op->opc; const TCGOpDef *def =3D &tcg_op_defs[opc]; TCGLifeData arg_life =3D op->life; int nb_iargs, nb_oargs, call_flags; - TCGArg arg, dir; + TCGTemp *arg_ts, *dir_ts; =20 oi_next =3D op->next; =20 @@ -1706,24 +1714,20 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) =20 /* Make sure that input arguments are available. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D op->args[i]; - /* Note this unsigned test catches TCG_CALL_ARG_DUMMY too. */ - if (arg < nb_globals) { - dir =3D dir_temps[arg]; - if (dir !=3D 0 && temp_state[arg] =3D=3D TS_DEAD) { - TCGTemp *its =3D arg_temp(arg); - TCGOpcode lopc =3D (its->type =3D=3D TCG_TYPE_I32 - ? INDEX_op_ld_i32 - : INDEX_op_ld_i64); - TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); - - lop->args[0] =3D dir; - lop->args[1] =3D temp_arg(its->mem_base); - lop->args[2] =3D its->mem_offset; - - /* Loaded, but synced with memory. */ - temp_state[arg] =3D TS_MEM; - } + arg_ts =3D arg_temp(op->args[i]); + dir_ts =3D arg_ts->state_ptr; + if (dir_ts && arg_ts->state =3D=3D TS_DEAD) { + TCGOpcode lopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 + ? INDEX_op_ld_i32 + : INDEX_op_ld_i64); + TCGOp *lop =3D tcg_op_insert_before(s, op, lopc, 3); + + lop->args[0] =3D temp_arg(dir_ts); + lop->args[1] =3D temp_arg(arg_ts->mem_base); + lop->args[2] =3D arg_ts->mem_offset; + + /* Loaded, but synced with memory. */ + arg_ts->state =3D TS_MEM; } } =20 @@ -1731,15 +1735,13 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) No action is required except keeping temp_state up to date so that we reload when needed. */ for (i =3D nb_oargs; i < nb_iargs + nb_oargs; i++) { - arg =3D op->args[i]; - if (arg < nb_globals) { - dir =3D dir_temps[arg]; - if (dir !=3D 0) { - op->args[i] =3D dir; - changes =3D true; - if (IS_DEAD_ARG(i)) { - temp_state[arg] =3D TS_DEAD; - } + arg_ts =3D arg_temp(op->args[i]); + dir_ts =3D arg_ts->state_ptr; + if (dir_ts) { + op->args[i] =3D temp_arg(dir_ts); + changes =3D true; + if (IS_DEAD_ARG(i)) { + arg_ts->state =3D TS_DEAD; } } } @@ -1752,51 +1754,49 @@ static bool liveness_pass_2(TCGContext *s, uint8_t = *temp_state) for (i =3D 0; i < nb_globals; ++i) { /* Liveness should see that globals are synced back, that is, either TS_DEAD or TS_MEM. */ - tcg_debug_assert(dir_temps[i] =3D=3D 0 - || temp_state[i] !=3D 0); + arg_ts =3D &s->temps[i]; + tcg_debug_assert(arg_ts->state_ptr =3D=3D 0 + || arg_ts->state !=3D 0); } } else { for (i =3D 0; i < nb_globals; ++i) { /* Liveness should see that globals are saved back, that is, TS_DEAD, waiting to be reloaded. */ - tcg_debug_assert(dir_temps[i] =3D=3D 0 - || temp_state[i] =3D=3D TS_DEAD); + arg_ts =3D &s->temps[i]; + tcg_debug_assert(arg_ts->state_ptr =3D=3D 0 + || arg_ts->state =3D=3D TS_DEAD); } } =20 /* Outputs become available. */ for (i =3D 0; i < nb_oargs; i++) { - arg =3D op->args[i]; - if (arg >=3D nb_globals) { - continue; - } - dir =3D dir_temps[arg]; - if (dir =3D=3D 0) { + arg_ts =3D arg_temp(op->args[i]); + dir_ts =3D arg_ts->state_ptr; + if (!dir_ts) { continue; } - op->args[i] =3D dir; + op->args[i] =3D temp_arg(dir_ts); changes =3D true; =20 /* The output is now live and modified. */ - temp_state[arg] =3D 0; + arg_ts->state =3D 0; =20 /* Sync outputs upon their last write. */ if (NEED_SYNC_ARG(i)) { - TCGTemp *its =3D arg_temp(arg); - TCGOpcode sopc =3D (its->type =3D=3D TCG_TYPE_I32 + TCGOpcode sopc =3D (arg_ts->type =3D=3D TCG_TYPE_I32 ? INDEX_op_st_i32 : INDEX_op_st_i64); TCGOp *sop =3D tcg_op_insert_after(s, op, sopc, 3); =20 - sop->args[0] =3D dir; - sop->args[1] =3D temp_arg(its->mem_base); - sop->args[2] =3D its->mem_offset; + sop->args[0] =3D temp_arg(dir_ts); + sop->args[1] =3D temp_arg(arg_ts->mem_base); + sop->args[2] =3D arg_ts->mem_offset; =20 - temp_state[arg] =3D TS_MEM; + arg_ts->state =3D TS_MEM; } /* Drop outputs that are dead. */ if (IS_DEAD_ARG(i)) { - temp_state[arg] =3D TS_DEAD; + arg_ts->state =3D TS_DEAD; } } } @@ -2569,27 +2569,23 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *t= b) s->la_time -=3D profile_getclock(); #endif =20 - { - uint8_t *temp_state =3D tcg_malloc(s->nb_temps + s->nb_indirects); - - liveness_pass_1(s, temp_state); + liveness_pass_1(s); =20 - if (s->nb_indirects > 0) { + if (s->nb_indirects > 0) { #ifdef DEBUG_DISAS - if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_IND) - && qemu_log_in_addr_range(tb->pc))) { - qemu_log_lock(); - qemu_log("OP before indirect lowering:\n"); - tcg_dump_ops(s); - qemu_log("\n"); - qemu_log_unlock(); - } + if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP_IND) + && qemu_log_in_addr_range(tb->pc))) { + qemu_log_lock(); + qemu_log("OP before indirect lowering:\n"); + tcg_dump_ops(s); + qemu_log("\n"); + qemu_log_unlock(); + } #endif - /* Replace indirect temps with direct temps. */ - if (liveness_pass_2(s, temp_state)) { - /* If changes were made, re-run liveness. */ - liveness_pass_1(s, temp_state); - } + /* Replace indirect temps with direct temps. */ + if (liveness_pass_2(s)) { + /* If changes were made, re-run liveness. */ + liveness_pass_1(s); } } =20 diff --git a/tcg/tcg.h b/tcg/tcg.h index 80012b5..1eeeca5 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -599,6 +599,12 @@ typedef struct TCGTemp { struct TCGTemp *mem_base; intptr_t mem_offset; const char *name; + + /* Pass-specific information that can be stored for a temporary. + One word worth of integer data, and one pointer to data + allocated separately. */ + uintptr_t state; + void *state_ptr; } TCGTemp; =20 typedef struct TCGContext TCGContext; --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149801382100530.55759503592128; Tue, 20 Jun 2017 19:57:01 -0700 (PDT) Received: from localhost ([::1]:51565 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVpD-0004c8-OF for importer@patchew.org; Tue, 20 Jun 2017 22:56:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33933) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhL-0006We-8p for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhK-0002P4-D4 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:51 -0400 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:34443) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhK-0002Ox-9S for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:50 -0400 Received: by mail-qt0-x244.google.com with SMTP id o21so25678309qtb.1 for ; Tue, 20 Jun 2017 19:48:50 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.48 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:48 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=kzkHWUmkStrVqxM+9nWD+5txIc0RvI6rS3q3AGYPZkk=; b=YOXvD8cZ5PY+J3nnmebfqSgkPHDKkC/hX43QK38Uq7JCN/U2bbH9ObX+18IbAexSNh zjv+Evd0zOM2iQm7zoqATaapKH+M6doyE0hW61ggdRW622TsSS4dhuidWefaRyxsfShD PnvZ3Ukx6rUHNCroXIbqLUOlAK/rfid3prvQGf28vsZRDy20sqbLxYqUkWLw3coftC6A 7ZkkCtKLjXAbNMnRSSrl2PXVtfTpADYQB689BxQYwn1hMKf4PHPkCMGbY9wUsvm6BR84 z5ng58/rQCKMB/ryqYWiDk4aEHgtRDPuyAdSv1m5oQFENWDqMPQkGGXIbybFJ1+ncZiU MA4g== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=kzkHWUmkStrVqxM+9nWD+5txIc0RvI6rS3q3AGYPZkk=; b=r/DNY4Y1+537c2wjrPHkYZ9phGJj1cl5G4jQwsHhNWrF0LW/enw+s8Fa+ylD1jkRqW KMXUVExAxjCE51RD/Q79+Yvgfilv0fTQYHq0t7syTcH8ZAGhFNPePeCxZDOLwlEOYJsG DuJAW6Q31fN03zAPE8b8vlQ8ywBGSaW1xg8zQqpidiFMQ1WP5/kbv/NG3DU0D4wXM0W8 rCMDldIS8Zxvef7cF8dmCB7nGoneps2FX9KOKND3Q6Lg5jSKsuACSkPpn0gVIr97+nkT ZBjjWU3qTezCxOJJcBcVX4/Ceyjru0vnRftZfVnTj8GfJhwkyterB6VbKTwVK3U8/ktQ uBIw== X-Gm-Message-State: AKS2vOx/fuBWyKHmLgS6XVpT3pAK9y3JXpH0CxvHOtcAYQUHd0+gt+py Ssf7JtBUllj1+KHCWi0= X-Received: by 10.237.61.47 with SMTP id g44mr2685871qtf.60.1498013329567; Tue, 20 Jun 2017 19:48:49 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:25 -0700 Message-Id: <20170621024831.26019-11-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 10/16] tcg: Avoid loops against variable bounds X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Copy s->nb_globals or s->nb_temps to a local variable for the purposes of iteration. This should allow the compiler to use low-overhead looping constructs on some hosts. Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tcg.c | 27 ++++++++++----------------- 1 file changed, 10 insertions(+), 17 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index e78140b..c228f1e 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -943,23 +943,16 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, =20 static void tcg_reg_alloc_start(TCGContext *s) { - int i; + int i, n; TCGTemp *ts; - for(i =3D 0; i < s->nb_globals; i++) { + + for (i =3D 0, n =3D s->nb_globals; i < n; i++) { ts =3D &s->temps[i]; - if (ts->fixed_reg) { - ts->val_type =3D TEMP_VAL_REG; - } else { - ts->val_type =3D TEMP_VAL_MEM; - } + ts->val_type =3D (ts->fixed_reg ? TEMP_VAL_REG : TEMP_VAL_MEM); } - for(i =3D s->nb_globals; i < s->nb_temps; i++) { + for (n =3D s->nb_temps; i < n; i++) { ts =3D &s->temps[i]; - if (ts->temp_local) { - ts->val_type =3D TEMP_VAL_MEM; - } else { - ts->val_type =3D TEMP_VAL_DEAD; - } + ts->val_type =3D (ts->temp_local ? TEMP_VAL_MEM : TEMP_VAL_DEAD); ts->mem_allocated =3D 0; ts->fixed_reg =3D 0; } @@ -2050,9 +2043,9 @@ static void temp_save(TCGContext *s, TCGTemp *ts, TCG= RegSet allocated_regs) temporary registers needs to be allocated to store a constant. */ static void save_globals(TCGContext *s, TCGRegSet allocated_regs) { - int i; + int i, n; =20 - for (i =3D 0; i < s->nb_globals; i++) { + for (i =3D 0, n =3D s->nb_globals; i < n; i++) { temp_save(s, &s->temps[i], allocated_regs); } } @@ -2062,9 +2055,9 @@ static void save_globals(TCGContext *s, TCGRegSet all= ocated_regs) temporary registers needs to be allocated to store a constant. */ static void sync_globals(TCGContext *s, TCGRegSet allocated_regs) { - int i; + int i, n; =20 - for (i =3D 0; i < s->nb_globals; i++) { + for (i =3D 0, n =3D s->nb_globals; i < n; i++) { TCGTemp *ts =3D &s->temps[i]; tcg_debug_assert(ts->val_type !=3D TEMP_VAL_REG || ts->fixed_reg --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498014172297607.7849144545082; Tue, 20 Jun 2017 20:02:52 -0700 (PDT) Received: from localhost ([::1]:51590 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVut-000106-1h for importer@patchew.org; Tue, 20 Jun 2017 23:02:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33947) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhM-0006Xs-Er for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhL-0002QC-Nn for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:52 -0400 Received: from mail-qt0-x242.google.com ([2607:f8b0:400d:c0d::242]:36458) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhL-0002Pr-Jj for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:51 -0400 Received: by mail-qt0-x242.google.com with SMTP id s33so25676343qtg.3 for ; Tue, 20 Jun 2017 19:48:51 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.49 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:50 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=igMhVPX+FALQ6Jdvd7e2P1SeZZIxbi288g8JIBLHRA0=; b=rDfo82Qna+i9MTOoGUYfV+ygJyhLFgk+sYbBRaT06rO3qES0rkSmMyvpRdXc+iIZlW Sko4YS1jwbwzrhWCISzo8K0ClrPwiUhyBsrnmbxV6MGkYS42/OkCwMzL6CABVv66TNKv vTsUz7ksIXvozwEtJs3ACjINtdwRNzJT+52qgczjLKvwjRUyMklFIpOla8ymdXou2Goa vyOouaOhWXRUvmHNvHgMvnPenogo5WUiNyt0H5nlgePhibWe01CT8sPNCXn10sbFdWuQ jfYKUr68myky7HYjI46u4IDnQeln0khpLLPZQb+KkQg357IjtBBm6IpEsjEI/d0XwlQw P55A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=igMhVPX+FALQ6Jdvd7e2P1SeZZIxbi288g8JIBLHRA0=; b=Pn9L0cswmO8MLWYT25gnU3XrDyBgaVgRB8P8gBMe4bUqUKCwZpUmhbfv2Dzf9i9NZM temtcktD29x7s6s1a9LVm7nP8cY6sCYXGsfeNLUu6sLChChQPF8nLBQAV1Jvp8RCGUtG 2eNhnxzHF8y3uKEM9jtVy6Me/kyPShGxbCoxKAYlXvnn3Npt5C7hgefeTmdBOCuDHVEk OD+tByxB2yrdcnykJR+C3StpfdqowTlRD/4HEu937jsj302zBtiJ0ar6TzCtIVnuMvcd UCYsV8vtnZ+WQiKEpii2LjWlZu+QJFhbIh2Nc+QaDFsEoeoGmzyOU9kYtjrqLHOk9aIo YIiQ== X-Gm-Message-State: AKS2vOzRaOHyZ/PrtynQxL9jYyI0tZ+RlDi71PCRu4jbjKMPezi5HwFF ywNYH9Z9zfa3j1IB5Mo= X-Received: by 10.200.2.168 with SMTP id p40mr39579359qtg.34.1498013330792; Tue, 20 Jun 2017 19:48:50 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:26 -0700 Message-Id: <20170621024831.26019-12-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::242 Subject: [Qemu-devel] [PATCH 11/16] tcg: Change temp_allocate_frame arg to TCGTemp X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index c228f1e..f8d96fa 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -1869,10 +1869,8 @@ static void check_regs(TCGContext *s) } #endif =20 -static void temp_allocate_frame(TCGContext *s, int temp) +static void temp_allocate_frame(TCGContext *s, TCGTemp *ts) { - TCGTemp *ts; - ts =3D &s->temps[temp]; #if !(defined(__sparc__) && TCG_TARGET_REG_BITS =3D=3D 64) /* Sparc64 stack is accessed with offset of 2047 */ s->current_frame_offset =3D (s->current_frame_offset + @@ -1925,7 +1923,7 @@ static void temp_sync(TCGContext *s, TCGTemp *ts, } if (!ts->mem_coherent) { if (!ts->mem_allocated) { - temp_allocate_frame(s, temp_idx(s, ts)); + temp_allocate_frame(s, ts); } switch (ts->val_type) { case TEMP_VAL_CONST: @@ -2155,7 +2153,7 @@ static void tcg_reg_alloc_mov(TCGContext *s, const TC= GOp *op) liveness analysis disabled). */ tcg_debug_assert(NEED_SYNC_ARG(0)); if (!ots->mem_allocated) { - temp_allocate_frame(s, op->args[0]); + temp_allocate_frame(s, ots); } tcg_out_st(s, otype, ts->reg, ots->mem_base->reg, ots->mem_offset); if (IS_DEAD_ARG(1)) { --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013593411998.1413843206977; Tue, 20 Jun 2017 19:53:13 -0700 (PDT) Received: from localhost ([::1]:51547 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVlX-0001J6-SI for importer@patchew.org; Tue, 20 Jun 2017 22:53:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33962) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhN-0006Yt-Eo for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhM-0002QS-TX for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:53 -0400 Received: from mail-qk0-x244.google.com ([2607:f8b0:400d:c09::244]:33240) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhM-0002QI-Q2 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:52 -0400 Received: by mail-qk0-x244.google.com with SMTP id p21so1450159qke.0 for ; Tue, 20 Jun 2017 19:48:52 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.50 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:51 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=BzTgJRTA9w19GT5kw7YGtHkKAMz34lJIRO37WJCLQt0=; b=B9wxeQ+veFmGZvXpzQ8kUBpuGQOLtEJzi+5UjCgZ9ejoE6/fEVYuHJ7hkop/CQrk7W YZnazKvolUHl1UDUGR7h0w6/l7YK3pJG8jLC2YWRFiiGietPUtvALV6wQfzvcdCZU2HG N+VErVfkxWS5+fJk/ANaQX8jnOFkSpM2AC50caJq5Libfd0fG24Wea9vR+QuCUYdwXno b55E6OKi46HOIuAC+2wq0gLJBHMQFwpWR2kvH5dbz19qnk1Rxzzog9j4P0DktgZ5kYHG 8UQKouGlhMJ3QOgS0iNFZc1K948p+Uj4TWAxXin0132REYvmG1C6F8ErP1BuroGKrW3L HmJA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=BzTgJRTA9w19GT5kw7YGtHkKAMz34lJIRO37WJCLQt0=; b=UWEF3WDA4JOg+j32bFpQKoIzXyuXLmH6vGPBlQQjDi5C0zFww7OMyQhDfUuVh5nWIF 4FdsoBcvldpd0dCbJvJ7nGTXM29Sc89AiidBrVlsjN+fVpY6zl7ZF0SkPJXbCiToni0q bPRJpXJO8At79ub5pZcEzOuEwmEsw/uHWW/57JnVJF1ZSomdbEgxKWoFPJLMWQCthkEH eCcYRoS4Nl6Dr8IzSt21+RMlYTAD71nO2RcUhysuYa2kRojjBsVXi+uBAHq/+13t2ymk qRdjC8HuKzJ/jkj67DDubgmaGMitUaTMkM5RdJcd1ec9sZnSZCEA98J8KPW6m4MWrGr4 w+ng== X-Gm-Message-State: AKS2vOy5lXo/71MRQOApYmpY4aV5V021liDVP9Kl7PkW/h8Qsa3pNo4G udy6tUg83CuMvALahmg= X-Received: by 10.55.103.194 with SMTP id b185mr35236708qkc.55.1498013332033; Tue, 20 Jun 2017 19:48:52 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:27 -0700 Message-Id: <20170621024831.26019-13-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::244 Subject: [Qemu-devel] [PATCH 12/16] tcg: Remove unused TCG_CALL_DUMMY_TCGV X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson Reviewed-by: Alex Benn=C3=A9e --- tcg/tcg.h | 1 - 1 file changed, 1 deletion(-) diff --git a/tcg/tcg.h b/tcg/tcg.h index 1eeeca5..4f69d0c 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -503,7 +503,6 @@ static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCG= v_ptr t) #define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE) =20 /* used to align parameters */ -#define TCG_CALL_DUMMY_TCGV MAKE_TCGV_I32(-1) #define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) =20 /* Conditions. Note that these are laid out for easy manipulation by --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013924718336.1648413285932; Tue, 20 Jun 2017 19:58:44 -0700 (PDT) Received: from localhost ([::1]:51571 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVqt-0006Qi-7q for importer@patchew.org; Tue, 20 Jun 2017 22:58:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33973) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhO-0006aB-V5 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:58 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhO-0002Rs-0i for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:55 -0400 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:35658) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhN-0002RG-SB for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:53 -0400 Received: by mail-qk0-x241.google.com with SMTP id 16so8296120qkg.2 for ; Tue, 20 Jun 2017 19:48:53 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.52 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:52 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=VFsiWE7qm3LP5NgLRdLxLR0Z1k6LNrvfIzcyXiIC930=; b=YKYXN1BODsqJj8niiwChTsCmKAeLhGrU8HDRJ+IMMcFcKofQ8Y4GdpOSgiSwFttwCS qWNbzqdOZEBVc47tq2jl20ZIgAvQLafV1vPSBV1kpH4L8b/qQHI8DYArmpTpsDZ3YaOV M+m/7k9t92kXbgbMt/Xn7SqOnFWdBIPpLa03+czkXQQxYucjgasx6smz3mCT4bpdJzJe tTpK3olGztz9hrUK8as83lTb14Bh6UoqVzTAhv/1De6dtjEbhxbYX4Oz+ysU3x1QD2/X GWGlKiEWEZ3qMFKue8OfyzgQsmYZAYxNPy1oF3gAj4dgK8us0O4k7eTUDZvzvgFVVOLT onug== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=VFsiWE7qm3LP5NgLRdLxLR0Z1k6LNrvfIzcyXiIC930=; b=MWr+JzMRJBf96DxwtVnsQjLclHaaXJtVtmwstoeGsfEa3lRDmgH/nkpoQinES4PY62 rGwq/qYdAlB1Z6O8FIZU5Rivo/dv9KTay8KjPSLy4tOTT4ZSbH9xaknnXdJy07l86Doe 4hQ1mo2e1AvsaXpliNoQn5V0aGddNl8co82yGFEGpGsf92anIvc90qwHeCwkUqN0CmxI VbvNflIiRxfoyahu26KmMfzjMFeEknrCd5a9fOFNhb/h5bMn755F2W9gYW7Pyf94ibVr X9DfO0pNZlIx+KHnnAQsEom8Gisl2/61pq0YevhSn0L8XaPSBXX6fdVq2iE0zr1UIKeK iSDg== X-Gm-Message-State: AKS2vOyQ1WYTKTWqIeoQzbCeA40AHWbXJZYG1RZBZF3tUMCh7M5wr3EG +ZUJudm7IBhpUpdT3Nc= X-Received: by 10.55.8.139 with SMTP id 133mr39277563qki.22.1498013333140; Tue, 20 Jun 2017 19:48:53 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:28 -0700 Message-Id: <20170621024831.26019-14-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::241 Subject: [Qemu-devel] [PATCH 13/16] tcg: Export temp_idx X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" At the same time, drop the TCGContext argument and use tcg_ctx instead. Signed-off-by: Richard Henderson --- tcg/tcg.c | 15 ++++----------- tcg/tcg.h | 7 ++++++- 2 files changed, 10 insertions(+), 12 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index f8d96fa..26931a7 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -473,13 +473,6 @@ void tcg_func_start(TCGContext *s) s->be =3D tcg_malloc(sizeof(TCGBackendData)); } =20 -static inline int temp_idx(TCGContext *s, TCGTemp *ts) -{ - ptrdiff_t n =3D ts - s->temps; - tcg_debug_assert(n >=3D 0 && n < s->nb_temps); - return n; -} - static inline TCGTemp *tcg_temp_alloc(TCGContext *s) { int n =3D s->nb_temps++; @@ -516,7 +509,7 @@ static int tcg_global_reg_new_internal(TCGContext *s, T= CGType type, ts->name =3D name; tcg_regset_set_reg(s->reserved_regs, reg); =20 - return temp_idx(s, ts); + return temp_idx(ts); } =20 void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t siz= e) @@ -605,7 +598,7 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_ptr = base, ts->mem_offset =3D offset; ts->name =3D name; } - return temp_idx(s, ts); + return temp_idx(ts); } =20 static int tcg_temp_new_internal(TCGType type, int temp_local) @@ -645,7 +638,7 @@ static int tcg_temp_new_internal(TCGType type, int temp= _local) ts->temp_allocated =3D 1; ts->temp_local =3D temp_local; } - idx =3D temp_idx(s, ts); + idx =3D temp_idx(ts); } =20 #if defined(CONFIG_DEBUG_TCG) @@ -963,7 +956,7 @@ static void tcg_reg_alloc_start(TCGContext *s) static char *tcg_get_arg_str_ptr(TCGContext *s, char *buf, int buf_size, TCGTemp *ts) { - int idx =3D temp_idx(s, ts); + int idx =3D temp_idx(ts); =20 if (ts->temp_global) { pstrcpy(buf, buf_size, ts->name); diff --git a/tcg/tcg.h b/tcg/tcg.h index 4f69d0c..b75a745 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -733,13 +733,18 @@ struct TCGContext { extern TCGContext tcg_ctx; extern bool parallel_cpus; =20 -static inline TCGArg temp_arg(TCGTemp *ts) +static inline size_t temp_idx(TCGTemp *ts) { ptrdiff_t n =3D ts - tcg_ctx.temps; tcg_debug_assert(n >=3D 0 && n < tcg_ctx.nb_temps); return n; } =20 +static inline TCGArg temp_arg(TCGTemp *ts) +{ + return temp_idx(ts); +} + static inline TCGTemp *arg_temp(TCGArg a) { return a =3D=3D TCG_CALL_DUMMY_ARG ? NULL : &tcg_ctx.temps[a]; --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498014020179189.09977022078488; Tue, 20 Jun 2017 20:00:20 -0700 (PDT) Received: from localhost ([::1]:51577 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVsQ-0007Tq-I1 for importer@patchew.org; Tue, 20 Jun 2017 23:00:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34002) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhS-0006dy-Q0 for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:49:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhP-0002SL-Sz for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:58 -0400 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:34446) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhP-0002SD-LL for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:55 -0400 Received: by mail-qt0-x244.google.com with SMTP id o21so25678466qtb.1 for ; Tue, 20 Jun 2017 19:48:55 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.53 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:53 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=lPb0fPdDAUcj4lQB2aKdxKHqeegpDzIrXlltotQYDqM=; b=M9oB8RdDE3WhQZ87ZgddTaVU02ft/YurdYOofzUBnybTa/81LN1lF8KIpKBlYbOp2e 5Ysp1IQ9YzcZyDJW5ZggvN9lA3Tx20wnvS73OEkscvMh17z3dmEIF2HFkX/L1ycD379A pS2ywwVvtmbRP9VMURUsMWb5Auu3AzNSPWwyajw6RGxVLhHPkbdyFoUuuJotqVUJtTRk xS5qj0ez9RVWVvHewQYpcwLSRyzAPIkbToHzhqAXzJFdK9k/9dewHtGhDsLEHpPKyQOz ulkDL3vidcYhiaMuvwyEkOB33XIKorDO2tW5pxK8G/RYyoVUZdILgrgL8SSDgsw9vRbA tVrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=lPb0fPdDAUcj4lQB2aKdxKHqeegpDzIrXlltotQYDqM=; b=EONFl5S8FFTR0PZN/b3c8wPctCmZNprWlPPI1wm7pfQnAt1i4v/6z5S+OL6UJr0Us3 wv9O8CwCJJkjzj4KnhorVDT+AIiHmQIGwGsnn1prwoTxZHLGK92MCI5wCLYhC9FS26/a N2nw1XzEvEIOI/7pGLPtmhad+63n/TsjLDIlKFxMONJUNTI8ZHke7qC/OjSnJRJ8u2qD bV6JRoDLYhtF3vB5UVF0yX54CBPulLgT6kAwMvInRiA3EGO8irSK9g4OYfhgmaSAo2QE TmnaFw3Nj2AyHpW4o9Sn3RB5+TyOnA/lRHqYk17wwme+kfe7qcyvDP8Fc1QaSgtToTeq ApCg== X-Gm-Message-State: AKS2vOzVDficCkmlcqPLzRUvP26YimyrL0hzkOAzhW2I4S2I0qAQmS9a ECMm6M4F/xQiuduEkwg= X-Received: by 10.200.47.176 with SMTP id l45mr4666649qta.153.1498013334477; Tue, 20 Jun 2017 19:48:54 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:29 -0700 Message-Id: <20170621024831.26019-15-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 14/16] tcg: Use per-temp state data in optimize X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" While we're touching many of the lines anyway, adjust the naming of the functions to better distinguish when "TCGArg" vs "TCGTemp" should be used. Signed-off-by: Richard Henderson --- tcg/optimize.c | 424 +++++++++++++++++++++++++++++++++--------------------= ---- tcg/tcg.h | 5 + 2 files changed, 249 insertions(+), 180 deletions(-) diff --git a/tcg/optimize.c b/tcg/optimize.c index 55f9e83..eb09ae5 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -34,34 +34,63 @@ =20 struct tcg_temp_info { bool is_const; - uint16_t prev_copy; - uint16_t next_copy; + TCGTemp *prev_copy; + TCGTemp *next_copy; tcg_target_ulong val; tcg_target_ulong mask; }; =20 -static struct tcg_temp_info temps[TCG_MAX_TEMPS]; +static struct tcg_temp_info temps_[TCG_MAX_TEMPS]; static TCGTempSet temps_used; =20 -static inline bool temp_is_const(TCGArg arg) +static inline struct tcg_temp_info *ts_info(TCGTemp *ts) { - return temps[arg].is_const; + return ts->state_ptr; } =20 -static inline bool temp_is_copy(TCGArg arg) +static inline struct tcg_temp_info *arg_info(TCGArg arg) { - return temps[arg].next_copy !=3D arg; + return ts_info(arg_temp(arg)); +} + +static inline bool ts_is_const(TCGTemp *ts) +{ + return ts_info(ts)->is_const; +} + +static inline bool arg_is_const(TCGArg arg) +{ + return ts_is_const(arg_temp(arg)); +} + +static inline bool ts_is_copy(TCGTemp *ts) +{ + return ts_info(ts)->next_copy !=3D ts; +} + +static inline bool arg_is_copy(TCGArg arg) +{ + return ts_is_copy(arg_temp(arg)); } =20 /* Reset TEMP's state, possibly removing the temp for the list of copies. = */ -static void reset_temp(TCGArg temp) +static void reset_ts(TCGTemp *ts) { - temps[temps[temp].next_copy].prev_copy =3D temps[temp].prev_copy; - temps[temps[temp].prev_copy].next_copy =3D temps[temp].next_copy; - temps[temp].next_copy =3D temp; - temps[temp].prev_copy =3D temp; - temps[temp].is_const =3D false; - temps[temp].mask =3D -1; + struct tcg_temp_info *ti =3D ts_info(ts); + struct tcg_temp_info *pi =3D ts_info(ti->prev_copy); + struct tcg_temp_info *ni =3D ts_info(ti->next_copy); + + ni->prev_copy =3D ti->prev_copy; + pi->next_copy =3D ti->next_copy; + ti->next_copy =3D ts; + ti->prev_copy =3D ts; + ti->is_const =3D false; + ti->mask =3D -1; +} + +static void reset_temp(TCGArg arg) +{ + reset_ts(arg_temp(arg)); } =20 /* Reset all temporaries, given that there are NB_TEMPS of them. */ @@ -71,17 +100,26 @@ static void reset_all_temps(int nb_temps) } =20 /* Initialize and activate a temporary. */ -static void init_temp_info(TCGArg temp) +static void init_ts_info(TCGTemp *ts) { - if (!test_bit(temp, temps_used.l)) { - temps[temp].next_copy =3D temp; - temps[temp].prev_copy =3D temp; - temps[temp].is_const =3D false; - temps[temp].mask =3D -1; - set_bit(temp, temps_used.l); + size_t idx =3D temp_idx(ts); + if (!test_bit(idx, temps_used.l)) { + struct tcg_temp_info *ti =3D &temps_[idx]; + + ts->state_ptr =3D ti; + ti->next_copy =3D ts; + ti->prev_copy =3D ts; + ti->is_const =3D false; + ti->mask =3D -1; + set_bit(idx, temps_used.l); } } =20 +static void init_arg_info(TCGArg arg) +{ + init_ts_info(arg_temp(arg)); +} + static int op_bits(TCGOpcode op) { const TCGOpDef *def =3D &tcg_op_defs[op]; @@ -119,7 +157,7 @@ static TCGOpcode op_to_movi(TCGOpcode op) static TCGArg find_better_copy(TCGContext *s, TCGArg arg) { TCGTemp *ts =3D arg_temp(arg); - TCGArg i; + TCGTemp *i; =20 /* If this is already a global, we can't do better. */ if (ts->temp_global) { @@ -127,17 +165,17 @@ static TCGArg find_better_copy(TCGContext *s, TCGArg = arg) } =20 /* Search for a global first. */ - for (i =3D temps[arg].next_copy ; i !=3D arg; i =3D temps[i].next_copy= ) { - if (i < s->nb_globals) { - return i; + for (i =3D ts_info(ts)->next_copy; i !=3D ts; i =3D ts_info(i)->next_c= opy) { + if (i->temp_global) { + return temp_arg(i); } } =20 /* If it is a temp, search for a temp local. */ if (!ts->temp_local) { - for (i =3D temps[arg].next_copy ; i !=3D arg; i =3D temps[i].next_= copy) { - if (s->temps[i].temp_local) { - return i; + for (i =3D ts_info(ts)->next_copy; i !=3D ts; i =3D ts_info(i)->ne= xt_copy) { + if (ts->temp_local) { + return temp_arg(i); } } } @@ -146,20 +184,20 @@ static TCGArg find_better_copy(TCGContext *s, TCGArg = arg) return arg; } =20 -static bool temps_are_copies(TCGArg arg1, TCGArg arg2) +static bool ts_are_copies(TCGTemp *ts1, TCGTemp *ts2) { - TCGArg i; + TCGTemp *i; =20 - if (arg1 =3D=3D arg2) { + if (ts1 =3D=3D ts2) { return true; } =20 - if (!temp_is_copy(arg1) || !temp_is_copy(arg2)) { + if (!ts_is_copy(ts1) || !ts_is_copy(ts2)) { return false; } =20 - for (i =3D temps[arg1].next_copy ; i !=3D arg1 ; i =3D temps[i].next_c= opy) { - if (i =3D=3D arg2) { + for (i =3D ts_info(ts1)->next_copy; i !=3D ts1; i =3D ts_info(i)->next= _copy) { + if (i =3D=3D ts2) { return true; } } @@ -167,22 +205,28 @@ static bool temps_are_copies(TCGArg arg1, TCGArg arg2) return false; } =20 +static bool args_are_copies(TCGArg arg1, TCGArg arg2) +{ + return ts_are_copies(arg_temp(arg1), arg_temp(arg2)); +} + static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg = val) { TCGOpcode new_op =3D op_to_movi(op->opc); tcg_target_ulong mask; + struct tcg_temp_info *di =3D arg_info(dst); =20 op->opc =3D new_op; =20 reset_temp(dst); - temps[dst].is_const =3D true; - temps[dst].val =3D val; + di->is_const =3D true; + di->val =3D val; mask =3D val; if (TCG_TARGET_REG_BITS > 32 && new_op =3D=3D INDEX_op_movi_i32) { /* High bits of the destination are now garbage. */ mask |=3D ~0xffffffffull; } - temps[dst].mask =3D mask; + di->mask =3D mask; =20 op->args[0] =3D dst; op->args[1] =3D val; @@ -190,35 +234,44 @@ static void tcg_opt_gen_movi(TCGContext *s, TCGOp *op= , TCGArg dst, TCGArg val) =20 static void tcg_opt_gen_mov(TCGContext *s, TCGOp *op, TCGArg dst, TCGArg s= rc) { - if (temps_are_copies(dst, src)) { + TCGTemp *dst_ts =3D arg_temp(dst); + TCGTemp *src_ts =3D arg_temp(src); + struct tcg_temp_info *di; + struct tcg_temp_info *si; + tcg_target_ulong mask; + TCGOpcode new_op; + + if (ts_are_copies(dst_ts, src_ts)) { tcg_op_remove(s, op); return; } =20 - TCGOpcode new_op =3D op_to_mov(op->opc); - tcg_target_ulong mask; + reset_ts(dst_ts); + di =3D ts_info(dst_ts); + si =3D ts_info(src_ts); + new_op =3D op_to_mov(op->opc); =20 op->opc =3D new_op; + op->args[0] =3D dst; + op->args[1] =3D src; =20 - reset_temp(dst); - mask =3D temps[src].mask; + mask =3D si->mask; if (TCG_TARGET_REG_BITS > 32 && new_op =3D=3D INDEX_op_mov_i32) { /* High bits of the destination are now garbage. */ mask |=3D ~0xffffffffull; } - temps[dst].mask =3D mask; - - if (arg_temp(src)->type =3D=3D arg_temp(dst)->type) { - temps[dst].next_copy =3D temps[src].next_copy; - temps[dst].prev_copy =3D src; - temps[temps[dst].next_copy].prev_copy =3D dst; - temps[src].next_copy =3D dst; - temps[dst].is_const =3D temps[src].is_const; - temps[dst].val =3D temps[src].val; - } + di->mask =3D mask; =20 - op->args[0] =3D dst; - op->args[1] =3D src; + if (src_ts->type =3D=3D dst_ts->type) { + struct tcg_temp_info *ni =3D ts_info(si->next_copy); + + di->next_copy =3D si->next_copy; + di->prev_copy =3D src_ts; + ni->prev_copy =3D dst_ts; + si->next_copy =3D dst_ts; + di->is_const =3D si->is_const; + di->val =3D si->val; + } } =20 static TCGArg do_constant_folding_2(TCGOpcode op, TCGArg x, TCGArg y) @@ -465,18 +518,20 @@ static bool do_constant_folding_cond_eq(TCGCond c) static TCGArg do_constant_folding_cond(TCGOpcode op, TCGArg x, TCGArg y, TCGCond c) { - if (temp_is_const(x) && temp_is_const(y)) { + tcg_target_ulong xv =3D arg_info(x)->val; + tcg_target_ulong yv =3D arg_info(y)->val; + if (arg_is_const(x) && arg_is_const(y)) { switch (op_bits(op)) { case 32: - return do_constant_folding_cond_32(temps[x].val, temps[y].val,= c); + return do_constant_folding_cond_32(xv, yv, c); case 64: - return do_constant_folding_cond_64(temps[x].val, temps[y].val,= c); + return do_constant_folding_cond_64(xv, yv, c); default: tcg_abort(); } - } else if (temps_are_copies(x, y)) { + } else if (args_are_copies(x, y)) { return do_constant_folding_cond_eq(c); - } else if (temp_is_const(y) && temps[y].val =3D=3D 0) { + } else if (arg_is_const(y) && yv =3D=3D 0) { switch (c) { case TCG_COND_LTU: return 0; @@ -496,12 +551,15 @@ static TCGArg do_constant_folding_cond2(TCGArg *p1, T= CGArg *p2, TCGCond c) TCGArg al =3D p1[0], ah =3D p1[1]; TCGArg bl =3D p2[0], bh =3D p2[1]; =20 - if (temp_is_const(bl) && temp_is_const(bh)) { - uint64_t b =3D ((uint64_t)temps[bh].val << 32) | (uint32_t)temps[b= l].val; + if (arg_is_const(bl) && arg_is_const(bh)) { + tcg_target_ulong blv =3D arg_info(bl)->val; + tcg_target_ulong bhv =3D arg_info(bh)->val; + uint64_t b =3D deposit64(blv, 32, 32, bhv); =20 - if (temp_is_const(al) && temp_is_const(ah)) { - uint64_t a; - a =3D ((uint64_t)temps[ah].val << 32) | (uint32_t)temps[al].va= l; + if (arg_is_const(al) && arg_is_const(ah)) { + tcg_target_ulong alv =3D arg_info(al)->val; + tcg_target_ulong ahv =3D arg_info(ah)->val; + uint64_t a =3D deposit64(alv, 32, 32, ahv); return do_constant_folding_cond_64(a, b, c); } if (b =3D=3D 0) { @@ -515,7 +573,7 @@ static TCGArg do_constant_folding_cond2(TCGArg *p1, TCG= Arg *p2, TCGCond c) } } } - if (temps_are_copies(al, bl) && temps_are_copies(ah, bh)) { + if (args_are_copies(al, bl) && args_are_copies(ah, bh)) { return do_constant_folding_cond_eq(c); } return 2; @@ -525,8 +583,8 @@ static bool swap_commutative(TCGArg dest, TCGArg *p1, T= CGArg *p2) { TCGArg a1 =3D *p1, a2 =3D *p2; int sum =3D 0; - sum +=3D temp_is_const(a1); - sum -=3D temp_is_const(a2); + sum +=3D arg_is_const(a1); + sum -=3D arg_is_const(a2); =20 /* Prefer the constant in second argument, and then the form op a, a, b, which is better handled on non-RISC hosts. */ @@ -541,10 +599,10 @@ static bool swap_commutative(TCGArg dest, TCGArg *p1,= TCGArg *p2) static bool swap_commutative2(TCGArg *p1, TCGArg *p2) { int sum =3D 0; - sum +=3D temp_is_const(p1[0]); - sum +=3D temp_is_const(p1[1]); - sum -=3D temp_is_const(p2[0]); - sum -=3D temp_is_const(p2[1]); + sum +=3D arg_is_const(p1[0]); + sum +=3D arg_is_const(p1[1]); + sum -=3D arg_is_const(p2[0]); + sum -=3D arg_is_const(p2[1]); if (sum > 0) { TCGArg t; t =3D p1[0], p1[0] =3D p2[0], p2[0] =3D t; @@ -586,22 +644,22 @@ void tcg_optimize(TCGContext *s) nb_oargs =3D op->callo; nb_iargs =3D op->calli; for (i =3D 0; i < nb_oargs + nb_iargs; i++) { - tmp =3D op->args[i]; - if (tmp !=3D TCG_CALL_DUMMY_ARG) { - init_temp_info(tmp); + TCGTemp *ts =3D arg_temp(op->args[i]); + if (ts) { + init_ts_info(ts); } } } else { nb_oargs =3D def->nb_oargs; nb_iargs =3D def->nb_iargs; for (i =3D 0; i < nb_oargs + nb_iargs; i++) { - init_temp_info(op->args[i]); + init_arg_info(op->args[i]); } } =20 /* Do copy propagation */ for (i =3D nb_oargs; i < nb_oargs + nb_iargs; i++) { - if (temp_is_copy(op->args[i])) { + if (arg_is_copy(op->args[i])) { op->args[i] =3D find_better_copy(s, op->args[i]); } } @@ -671,7 +729,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(sar): CASE_OP_32_64(rotl): CASE_OP_32_64(rotr): - if (temp_is_const(op->args[1]) && temps[op->args[1]].val =3D= =3D 0) { + if (arg_is_const(op->args[1]) + && arg_info(op->args[1])->val =3D=3D 0) { tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } @@ -681,7 +740,7 @@ void tcg_optimize(TCGContext *s) TCGOpcode neg_op; bool have_neg; =20 - if (temp_is_const(op->args[2])) { + if (arg_is_const(op->args[2])) { /* Proceed with possible constant folding. */ break; } @@ -695,8 +754,8 @@ void tcg_optimize(TCGContext *s) if (!have_neg) { break; } - if (temp_is_const(op->args[1]) - && temps[op->args[1]].val =3D=3D 0) { + if (arg_is_const(op->args[1]) + && arg_info(op->args[1])->val =3D=3D 0) { op->opc =3D neg_op; reset_temp(op->args[0]); op->args[1] =3D op->args[2]; @@ -706,34 +765,34 @@ void tcg_optimize(TCGContext *s) break; CASE_OP_32_64(xor): CASE_OP_32_64(nand): - if (!temp_is_const(op->args[1]) - && temp_is_const(op->args[2]) - && temps[op->args[2]].val =3D=3D -1) { + if (!arg_is_const(op->args[1]) + && arg_is_const(op->args[2]) + && arg_info(op->args[2])->val =3D=3D -1) { i =3D 1; goto try_not; } break; CASE_OP_32_64(nor): - if (!temp_is_const(op->args[1]) - && temp_is_const(op->args[2]) - && temps[op->args[2]].val =3D=3D 0) { + if (!arg_is_const(op->args[1]) + && arg_is_const(op->args[2]) + && arg_info(op->args[2])->val =3D=3D 0) { i =3D 1; goto try_not; } break; CASE_OP_32_64(andc): - if (!temp_is_const(op->args[2]) - && temp_is_const(op->args[1]) - && temps[op->args[1]].val =3D=3D -1) { + if (!arg_is_const(op->args[2]) + && arg_is_const(op->args[1]) + && arg_info(op->args[1])->val =3D=3D -1) { i =3D 2; goto try_not; } break; CASE_OP_32_64(orc): CASE_OP_32_64(eqv): - if (!temp_is_const(op->args[2]) - && temp_is_const(op->args[1]) - && temps[op->args[1]].val =3D=3D 0) { + if (!arg_is_const(op->args[2]) + && arg_is_const(op->args[1]) + && arg_info(op->args[1])->val =3D=3D 0) { i =3D 2; goto try_not; } @@ -774,9 +833,9 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(or): CASE_OP_32_64(xor): CASE_OP_32_64(andc): - if (!temp_is_const(op->args[1]) - && temp_is_const(op->args[2]) - && temps[op->args[2]].val =3D=3D 0) { + if (!arg_is_const(op->args[1]) + && arg_is_const(op->args[2]) + && arg_info(op->args[2])->val =3D=3D 0) { tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } @@ -784,9 +843,9 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(and): CASE_OP_32_64(orc): CASE_OP_32_64(eqv): - if (!temp_is_const(op->args[1]) - && temp_is_const(op->args[2]) - && temps[op->args[2]].val =3D=3D -1) { + if (!arg_is_const(op->args[1]) + && arg_is_const(op->args[2]) + && arg_info(op->args[2])->val =3D=3D -1) { tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } @@ -801,21 +860,21 @@ void tcg_optimize(TCGContext *s) affected =3D -1; switch (opc) { CASE_OP_32_64(ext8s): - if ((temps[op->args[1]].mask & 0x80) !=3D 0) { + if ((arg_info(op->args[1])->mask & 0x80) !=3D 0) { break; } CASE_OP_32_64(ext8u): mask =3D 0xff; goto and_const; CASE_OP_32_64(ext16s): - if ((temps[op->args[1]].mask & 0x8000) !=3D 0) { + if ((arg_info(op->args[1])->mask & 0x8000) !=3D 0) { break; } CASE_OP_32_64(ext16u): mask =3D 0xffff; goto and_const; case INDEX_op_ext32s_i64: - if ((temps[op->args[1]].mask & 0x80000000) !=3D 0) { + if ((arg_info(op->args[1])->mask & 0x80000000) !=3D 0) { break; } case INDEX_op_ext32u_i64: @@ -823,111 +882,114 @@ void tcg_optimize(TCGContext *s) goto and_const; =20 CASE_OP_32_64(and): - mask =3D temps[op->args[2]].mask; - if (temp_is_const(op->args[2])) { + mask =3D arg_info(op->args[2])->mask; + if (arg_is_const(op->args[2])) { and_const: - affected =3D temps[op->args[1]].mask & ~mask; + affected =3D arg_info(op->args[1])->mask & ~mask; } - mask =3D temps[op->args[1]].mask & mask; + mask =3D arg_info(op->args[1])->mask & mask; break; =20 case INDEX_op_ext_i32_i64: - if ((temps[op->args[1]].mask & 0x80000000) !=3D 0) { + if ((arg_info(op->args[1])->mask & 0x80000000) !=3D 0) { break; } case INDEX_op_extu_i32_i64: /* We do not compute affected as it is a size changing op. */ - mask =3D (uint32_t)temps[op->args[1]].mask; + mask =3D (uint32_t)arg_info(op->args[1])->mask; break; =20 CASE_OP_32_64(andc): /* Known-zeros does not imply known-ones. Therefore unless op->args[2] is constant, we can't infer anything from it. = */ - if (temp_is_const(op->args[2])) { - mask =3D ~temps[op->args[2]].mask; + if (arg_is_const(op->args[2])) { + mask =3D ~arg_info(op->args[2])->mask; goto and_const; } - /* But we certainly know nothing outside op->args[1] may be se= t. */ - mask =3D temps[op->args[1]].mask; + /* But we certainly know nothing outside args[1] may be set. */ + mask =3D arg_info(op->args[1])->mask; break; =20 case INDEX_op_sar_i32: - if (temp_is_const(op->args[2])) { - tmp =3D temps[op->args[2]].val & 31; - mask =3D (int32_t)temps[op->args[1]].mask >> tmp; + if (arg_is_const(op->args[2])) { + tmp =3D arg_info(op->args[2])->val & 31; + mask =3D (int32_t)arg_info(op->args[1])->mask >> tmp; } break; case INDEX_op_sar_i64: - if (temp_is_const(op->args[2])) { - tmp =3D temps[op->args[2]].val & 63; - mask =3D (int64_t)temps[op->args[1]].mask >> tmp; + if (arg_is_const(op->args[2])) { + tmp =3D arg_info(op->args[2])->val & 63; + mask =3D (int64_t)arg_info(op->args[1])->mask >> tmp; } break; =20 case INDEX_op_shr_i32: - if (temp_is_const(op->args[2])) { - tmp =3D temps[op->args[2]].val & 31; - mask =3D (uint32_t)temps[op->args[1]].mask >> tmp; + if (arg_is_const(op->args[2])) { + tmp =3D arg_info(op->args[2])->val & 31; + mask =3D (uint32_t)arg_info(op->args[1])->mask >> tmp; } break; case INDEX_op_shr_i64: - if (temp_is_const(op->args[2])) { - tmp =3D temps[op->args[2]].val & 63; - mask =3D (uint64_t)temps[op->args[1]].mask >> tmp; + if (arg_is_const(op->args[2])) { + tmp =3D arg_info(op->args[2])->val & 63; + mask =3D (uint64_t)arg_info(op->args[1])->mask >> tmp; } break; =20 case INDEX_op_extrl_i64_i32: - mask =3D (uint32_t)temps[op->args[1]].mask; + mask =3D (uint32_t)arg_info(op->args[1])->mask; break; case INDEX_op_extrh_i64_i32: - mask =3D (uint64_t)temps[op->args[1]].mask >> 32; + mask =3D (uint64_t)arg_info(op->args[1])->mask >> 32; break; =20 CASE_OP_32_64(shl): - if (temp_is_const(op->args[2])) { - tmp =3D temps[op->args[2]].val & (TCG_TARGET_REG_BITS - 1); - mask =3D temps[op->args[1]].mask << tmp; + if (arg_is_const(op->args[2])) { + tmp =3D arg_info(op->args[2])->val & (TCG_TARGET_REG_BITS = - 1); + mask =3D arg_info(op->args[1])->mask << tmp; } break; =20 CASE_OP_32_64(neg): /* Set to 1 all bits to the left of the rightmost. */ - mask =3D -(temps[op->args[1]].mask & -temps[op->args[1]].mask); + mask =3D -(arg_info(op->args[1])->mask + & -arg_info(op->args[1])->mask); break; =20 CASE_OP_32_64(deposit): - mask =3D deposit64(temps[op->args[1]].mask, op->args[3], - op->args[4], temps[op->args[2]].mask); + mask =3D deposit64(arg_info(op->args[1])->mask, + op->args[3], op->args[4], + arg_info(op->args[2])->mask); break; =20 CASE_OP_32_64(extract): - mask =3D extract64(temps[op->args[1]].mask, op->args[2], op->a= rgs[3]); + mask =3D extract64(arg_info(op->args[1])->mask, + op->args[2], op->args[3]); if (op->args[2] =3D=3D 0) { - affected =3D temps[op->args[1]].mask & ~mask; + affected =3D arg_info(op->args[1])->mask & ~mask; } break; CASE_OP_32_64(sextract): - mask =3D sextract64(temps[op->args[1]].mask, + mask =3D sextract64(arg_info(op->args[1])->mask, op->args[2], op->args[3]); if (op->args[2] =3D=3D 0 && (tcg_target_long)mask >=3D 0) { - affected =3D temps[op->args[1]].mask & ~mask; + affected =3D arg_info(op->args[1])->mask & ~mask; } break; =20 CASE_OP_32_64(or): CASE_OP_32_64(xor): - mask =3D temps[op->args[1]].mask | temps[op->args[2]].mask; + mask =3D arg_info(op->args[1])->mask | arg_info(op->args[2])->= mask; break; =20 case INDEX_op_clz_i32: case INDEX_op_ctz_i32: - mask =3D temps[op->args[2]].mask | 31; + mask =3D arg_info(op->args[2])->mask | 31; break; =20 case INDEX_op_clz_i64: case INDEX_op_ctz_i64: - mask =3D temps[op->args[2]].mask | 63; + mask =3D arg_info(op->args[2])->mask | 63; break; =20 case INDEX_op_ctpop_i32: @@ -943,7 +1005,7 @@ void tcg_optimize(TCGContext *s) break; =20 CASE_OP_32_64(movcond): - mask =3D temps[op->args[3]].mask | temps[op->args[4]].mask; + mask =3D arg_info(op->args[3])->mask | arg_info(op->args[4])->= mask; break; =20 CASE_OP_32_64(ld8u): @@ -997,7 +1059,8 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(mul): CASE_OP_32_64(muluh): CASE_OP_32_64(mulsh): - if ((temp_is_const(op->args[2]) && temps[op->args[2]].val =3D= =3D 0)) { + if (arg_is_const(op->args[2]) + && arg_info(op->args[2])->val =3D=3D 0) { tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } @@ -1010,7 +1073,7 @@ void tcg_optimize(TCGContext *s) switch (opc) { CASE_OP_32_64(or): CASE_OP_32_64(and): - if (temps_are_copies(op->args[1], op->args[2])) { + if (args_are_copies(op->args[1], op->args[2])) { tcg_opt_gen_mov(s, op, op->args[0], op->args[1]); continue; } @@ -1024,7 +1087,7 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(andc): CASE_OP_32_64(sub): CASE_OP_32_64(xor): - if (temps_are_copies(op->args[1], op->args[2])) { + if (args_are_copies(op->args[1], op->args[2])) { tcg_opt_gen_movi(s, op, op->args[0], 0); continue; } @@ -1057,8 +1120,8 @@ void tcg_optimize(TCGContext *s) case INDEX_op_extu_i32_i64: case INDEX_op_extrl_i64_i32: case INDEX_op_extrh_i64_i32: - if (temp_is_const(op->args[1])) { - tmp =3D do_constant_folding(opc, temps[op->args[1]].val, 0= ); + if (arg_is_const(op->args[1])) { + tmp =3D do_constant_folding(opc, arg_info(op->args[1])->va= l, 0); tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } @@ -1086,9 +1149,9 @@ void tcg_optimize(TCGContext *s) CASE_OP_32_64(divu): CASE_OP_32_64(rem): CASE_OP_32_64(remu): - if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) { - tmp =3D do_constant_folding(opc, temps[op->args[1]].val, - temps[op->args[2]].val); + if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { + tmp =3D do_constant_folding(opc, arg_info(op->args[1])->va= l, + arg_info(op->args[2])->val); tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } @@ -1096,8 +1159,8 @@ void tcg_optimize(TCGContext *s) =20 CASE_OP_32_64(clz): CASE_OP_32_64(ctz): - if (temp_is_const(op->args[1])) { - TCGArg v =3D temps[op->args[1]].val; + if (arg_is_const(op->args[1])) { + TCGArg v =3D arg_info(op->args[1])->val; if (v !=3D 0) { tmp =3D do_constant_folding(opc, v, 0); tcg_opt_gen_movi(s, op, op->args[0], tmp); @@ -1109,17 +1172,18 @@ void tcg_optimize(TCGContext *s) goto do_default; =20 CASE_OP_32_64(deposit): - if (temp_is_const(op->args[1]) && temp_is_const(op->args[2])) { - tmp =3D deposit64(temps[op->args[1]].val, op->args[3], - op->args[4], temps[op->args[2]].val); + if (arg_is_const(op->args[1]) && arg_is_const(op->args[2])) { + tmp =3D deposit64(arg_info(op->args[1])->val, + op->args[3], op->args[4], + arg_info(op->args[2])->val); tcg_opt_gen_movi(s, op, op->args[0], tmp); break; } goto do_default; =20 CASE_OP_32_64(extract): - if (temp_is_const(op->args[1])) { - tmp =3D extract64(temps[op->args[1]].val, + if (arg_is_const(op->args[1])) { + tmp =3D extract64(arg_info(op->args[1])->val, op->args[2], op->args[3]); tcg_opt_gen_movi(s, op, op->args[0], tmp); break; @@ -1127,8 +1191,8 @@ void tcg_optimize(TCGContext *s) goto do_default; =20 CASE_OP_32_64(sextract): - if (temp_is_const(op->args[1])) { - tmp =3D sextract64(temps[op->args[1]].val, + if (arg_is_const(op->args[1])) { + tmp =3D sextract64(arg_info(op->args[1])->val, op->args[2], op->args[3]); tcg_opt_gen_movi(s, op, op->args[0], tmp); break; @@ -1166,9 +1230,9 @@ void tcg_optimize(TCGContext *s) tcg_opt_gen_mov(s, op, op->args[0], op->args[4-tmp]); break; } - if (temp_is_const(op->args[3]) && temp_is_const(op->args[4])) { - tcg_target_ulong tv =3D temps[op->args[3]].val; - tcg_target_ulong fv =3D temps[op->args[4]].val; + if (arg_is_const(op->args[3]) && arg_is_const(op->args[4])) { + tcg_target_ulong tv =3D arg_info(op->args[3])->val; + tcg_target_ulong fv =3D arg_info(op->args[4])->val; TCGCond cond =3D op->args[5]; if (fv =3D=3D 1 && tv =3D=3D 0) { cond =3D tcg_invert_cond(cond); @@ -1185,12 +1249,12 @@ void tcg_optimize(TCGContext *s) =20 case INDEX_op_add2_i32: case INDEX_op_sub2_i32: - if (temp_is_const(op->args[2]) && temp_is_const(op->args[3]) - && temp_is_const(op->args[4]) && temp_is_const(op->args[5]= )) { - uint32_t al =3D temps[op->args[2]].val; - uint32_t ah =3D temps[op->args[3]].val; - uint32_t bl =3D temps[op->args[4]].val; - uint32_t bh =3D temps[op->args[5]].val; + if (arg_is_const(op->args[2]) && arg_is_const(op->args[3]) + && arg_is_const(op->args[4]) && arg_is_const(op->args[5]))= { + uint32_t al =3D arg_info(op->args[2])->val; + uint32_t ah =3D arg_info(op->args[3])->val; + uint32_t bl =3D arg_info(op->args[4])->val; + uint32_t bh =3D arg_info(op->args[5])->val; uint64_t a =3D ((uint64_t)ah << 32) | al; uint64_t b =3D ((uint64_t)bh << 32) | bl; TCGArg rl, rh; @@ -1214,9 +1278,9 @@ void tcg_optimize(TCGContext *s) goto do_default; =20 case INDEX_op_mulu2_i32: - if (temp_is_const(op->args[2]) && temp_is_const(op->args[3])) { - uint32_t a =3D temps[op->args[2]].val; - uint32_t b =3D temps[op->args[3]].val; + if (arg_is_const(op->args[2]) && arg_is_const(op->args[3])) { + uint32_t a =3D arg_info(op->args[2])->val; + uint32_t b =3D arg_info(op->args[3])->val; uint64_t r =3D (uint64_t)a * b; TCGArg rl, rh; TCGOp *op2 =3D tcg_op_insert_before(s, op, INDEX_op_movi_i= 32, 2); @@ -1247,10 +1311,10 @@ void tcg_optimize(TCGContext *s) } } else if ((op->args[4] =3D=3D TCG_COND_LT || op->args[4] =3D=3D TCG_COND_GE) - && temp_is_const(op->args[2]) - && temps[op->args[2]].val =3D=3D 0 - && temp_is_const(op->args[3]) - && temps[op->args[3]].val =3D=3D 0) { + && arg_is_const(op->args[2]) + && arg_info(op->args[2])->val =3D=3D 0 + && arg_is_const(op->args[3]) + && arg_info(op->args[3])->val =3D=3D 0) { /* Simplify LT/GE comparisons vs zero to a single compare vs the high word of the input. */ do_brcond_high: @@ -1318,15 +1382,15 @@ void tcg_optimize(TCGContext *s) tcg_opt_gen_movi(s, op, op->args[0], tmp); } else if ((op->args[5] =3D=3D TCG_COND_LT || op->args[5] =3D=3D TCG_COND_GE) - && temp_is_const(op->args[3]) - && temps[op->args[3]].val =3D=3D 0 - && temp_is_const(op->args[4]) - && temps[op->args[4]].val =3D=3D 0) { + && arg_is_const(op->args[3]) + && arg_info(op->args[3])->val =3D=3D 0 + && arg_is_const(op->args[4]) + && arg_info(op->args[4])->val =3D=3D 0) { /* Simplify LT/GE comparisons vs zero to a single compare vs the high word of the input. */ do_setcond_high: reset_temp(op->args[0]); - temps[op->args[0]].mask =3D 1; + arg_info(op->args[0])->mask =3D 1; op->opc =3D INDEX_op_setcond_i32; op->args[1] =3D op->args[2]; op->args[2] =3D op->args[4]; @@ -1352,7 +1416,7 @@ void tcg_optimize(TCGContext *s) } do_setcond_low: reset_temp(op->args[0]); - temps[op->args[0]].mask =3D 1; + arg_info(op->args[0])->mask =3D 1; op->opc =3D INDEX_op_setcond_i32; op->args[2] =3D op->args[3]; op->args[3] =3D op->args[5]; @@ -1386,7 +1450,7 @@ void tcg_optimize(TCGContext *s) & (TCG_CALL_NO_READ_GLOBALS | TCG_CALL_NO_WRITE_GLOBALS)= )) { for (i =3D 0; i < nb_globals; i++) { if (test_bit(i, temps_used.l)) { - reset_temp(i); + reset_ts(&s->temps[i]); } } } @@ -1408,7 +1472,7 @@ void tcg_optimize(TCGContext *s) /* Save the corresponding known-zero bits mask for the first output argument (only one supported so far). = */ if (i =3D=3D 0) { - temps[op->args[i]].mask =3D mask; + arg_info(op->args[i])->mask =3D mask; } } } diff --git a/tcg/tcg.h b/tcg/tcg.h index b75a745..018c01c 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -750,6 +750,11 @@ static inline TCGTemp *arg_temp(TCGArg a) return a =3D=3D TCG_CALL_DUMMY_ARG ? NULL : &tcg_ctx.temps[a]; } =20 +static inline size_t arg_index(TCGArg a) +{ + return a; +} + static inline void tcg_set_insn_param(int op_idx, int arg, TCGArg v) { tcg_ctx.gen_op_buf[op_idx].args[arg] =3D v; --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013460811926.4392703302447; Tue, 20 Jun 2017 19:51:00 -0700 (PDT) Received: from localhost ([::1]:51537 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVjP-0007t8-3O for importer@patchew.org; Tue, 20 Jun 2017 22:50:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:33996) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVhS-0006dk-HJ for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:49:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dNVhQ-0002Sa-Po for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:58 -0400 Received: from mail-qt0-x244.google.com ([2607:f8b0:400d:c0d::244]:36461) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dNVhQ-0002SV-Kh for qemu-devel@nongnu.org; Tue, 20 Jun 2017 22:48:56 -0400 Received: by mail-qt0-x244.google.com with SMTP id s33so25676503qtg.3 for ; Tue, 20 Jun 2017 19:48:56 -0700 (PDT) Received: from bigtime.twiddle.net.com (97-113-165-157.tukw.qwest.net. [97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.54 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:55 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=ipjEnleujdF8dL+4L+YgtJt3V3V41kyI3+Mkv/YpSho=; b=d2lHuwPb6PaCKDL0VhsDZqWrYcXs+yX5l3eL4USgsDa/h1tu2FflQ4mmkOVwG5NwEG fHiiD5Nh/E2zIiyPmzCPfDgxQ9fUuLzBVtAFvFolzBY85WCF02eziZBkSrL9fwDYPrhY wzkNYNBFMrLTnlD4fK9z47P0k/pTzUK0FPnzgurEAwABHZWE2cJF06b4AWhD0Ptz5xvQ ZvpNnWAl+4o5nBTNGxQQ/Cdr4AyPk0OcpolHfO61LxEsapALLk3qIAFpZDW7Hq1xFOKV zXWkxQGHfZaR5q9o0gfpaK4hL8U4FZiF9vcqhBNcm23EO/9qzu7uLtNWFkFeY2aNLrRx TQgw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=ipjEnleujdF8dL+4L+YgtJt3V3V41kyI3+Mkv/YpSho=; b=BMSdUc2KCVuvgZ+UYv1kb5Lf9yOehg1uw1zqjwNyrFN6D++Mby+XlHjWl8BOvBkEL7 OW42SjPvyLHd2PZO/bF0tH9JXwkJyy32qG1uP7b36He+CBed1gGYqKE4I9slp309rsOJ tvIWFtFB/OBlrBNK6j6Q4ZunD0tWWXD9mNL/xQtoh+fzloXO+tCQPnK2ajVsFFVbGMeq 1HLMo45RWRtvyn0CVrogNOYaZAzI+QhJNxImrkSX28wAvuTF1BaaS2QMk97ZUq1yQPPX cQTQT7IYSZ+N3kkdUTmuEE2JAMZgptw8I7jHbZ8YHM6fM4NbILnGd0XXHuG8/6vAO0wP /iKA== X-Gm-Message-State: AKS2vOxbxev2U/up8Vug72AcvLdeQ24Fdzxk4N4h2bl/FoOBa62SiJSy E42iu1KXi5tBLdRI8aU= X-Received: by 10.237.58.102 with SMTP id n93mr37021878qte.76.1498013335784; Tue, 20 Jun 2017 19:48:55 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:30 -0700 Message-Id: <20170621024831.26019-16-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::244 Subject: [Qemu-devel] [PATCH 15/16] tcg: Define separate structures for TCGv_* X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Pointers that devolve to TCGTemp will tidy things up. At present, we continue to store indicies in TCGArg. Signed-off-by: Richard Henderson --- tcg/tcg.c | 67 +++++------------- tcg/tcg.h | 237 +++++++++++++++++++++++++++++++++-------------------------= ---- 2 files changed, 146 insertions(+), 158 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 26931a7..1ca1192 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -492,8 +492,8 @@ static inline TCGTemp *tcg_global_alloc(TCGContext *s) return ts; } =20 -static int tcg_global_reg_new_internal(TCGContext *s, TCGType type, - TCGReg reg, const char *name) +static TCGTemp *tcg_global_reg_new_internal(TCGContext *s, TCGType type, + TCGReg reg, const char *name) { TCGTemp *ts; =20 @@ -509,47 +509,45 @@ static int tcg_global_reg_new_internal(TCGContext *s,= TCGType type, ts->name =3D name; tcg_regset_set_reg(s->reserved_regs, reg); =20 - return temp_idx(ts); + return ts; } =20 void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t siz= e) { - int idx; s->frame_start =3D start; s->frame_end =3D start + size; - idx =3D tcg_global_reg_new_internal(s, TCG_TYPE_PTR, reg, "_frame"); - s->frame_temp =3D &s->temps[idx]; + s->frame_temp =3D tcg_global_reg_new_internal(s, TCG_TYPE_PTR, reg, "_= frame"); } =20 TCGv_i32 tcg_global_reg_new_i32(TCGReg reg, const char *name) { TCGContext *s =3D &tcg_ctx; - int idx; + TCGTemp *t; =20 if (tcg_regset_test_reg(s->reserved_regs, reg)) { tcg_abort(); } - idx =3D tcg_global_reg_new_internal(s, TCG_TYPE_I32, reg, name); - return MAKE_TCGV_I32(idx); + t =3D tcg_global_reg_new_internal(s, TCG_TYPE_I32, reg, name); + return (TCGv_i32)t; } =20 TCGv_i64 tcg_global_reg_new_i64(TCGReg reg, const char *name) { TCGContext *s =3D &tcg_ctx; - int idx; + TCGTemp *t; =20 if (tcg_regset_test_reg(s->reserved_regs, reg)) { tcg_abort(); } - idx =3D tcg_global_reg_new_internal(s, TCG_TYPE_I64, reg, name); - return MAKE_TCGV_I64(idx); + t =3D tcg_global_reg_new_internal(s, TCG_TYPE_I64, reg, name); + return (TCGv_i64)t; } =20 -int tcg_global_mem_new_internal(TCGType type, TCGv_ptr base, - intptr_t offset, const char *name) +TCGTemp *tcg_global_mem_new_internal(TCGType type, TCGv_ptr base, + intptr_t offset, const char *name) { TCGContext *s =3D &tcg_ctx; - TCGTemp *base_ts =3D &s->temps[GET_TCGV_PTR(base)]; + TCGTemp *base_ts =3D &base->impl; TCGTemp *ts =3D tcg_global_alloc(s); int indirect_reg =3D 0, bigendian =3D 0; #ifdef HOST_WORDS_BIGENDIAN @@ -598,10 +596,10 @@ int tcg_global_mem_new_internal(TCGType type, TCGv_pt= r base, ts->mem_offset =3D offset; ts->name =3D name; } - return temp_idx(ts); + return ts; } =20 -static int tcg_temp_new_internal(TCGType type, int temp_local) +TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local) { TCGContext *s =3D &tcg_ctx; TCGTemp *ts; @@ -638,36 +636,18 @@ static int tcg_temp_new_internal(TCGType type, int te= mp_local) ts->temp_allocated =3D 1; ts->temp_local =3D temp_local; } - idx =3D temp_idx(ts); } =20 #if defined(CONFIG_DEBUG_TCG) s->temps_in_use++; #endif - return idx; -} - -TCGv_i32 tcg_temp_new_internal_i32(int temp_local) -{ - int idx; - - idx =3D tcg_temp_new_internal(TCG_TYPE_I32, temp_local); - return MAKE_TCGV_I32(idx); -} - -TCGv_i64 tcg_temp_new_internal_i64(int temp_local) -{ - int idx; - - idx =3D tcg_temp_new_internal(TCG_TYPE_I64, temp_local); - return MAKE_TCGV_I64(idx); + return ts; } =20 -static void tcg_temp_free_internal(int idx) +void tcg_temp_free_internal(TCGTemp *ts) { TCGContext *s =3D &tcg_ctx; - TCGTemp *ts; - int k; + int k, idx =3D temp_idx(ts); =20 #if defined(CONFIG_DEBUG_TCG) s->temps_in_use--; @@ -677,7 +657,6 @@ static void tcg_temp_free_internal(int idx) #endif =20 tcg_debug_assert(idx >=3D s->nb_globals && idx < s->nb_temps); - ts =3D &s->temps[idx]; tcg_debug_assert(ts->temp_allocated !=3D 0); ts->temp_allocated =3D 0; =20 @@ -685,16 +664,6 @@ static void tcg_temp_free_internal(int idx) set_bit(idx, s->free_temps[k].l); } =20 -void tcg_temp_free_i32(TCGv_i32 arg) -{ - tcg_temp_free_internal(GET_TCGV_I32(arg)); -} - -void tcg_temp_free_i64(TCGv_i64 arg) -{ - tcg_temp_free_internal(GET_TCGV_I64(arg)); -} - TCGv_i32 tcg_const_i32(int32_t val) { TCGv_i32 t0; diff --git a/tcg/tcg.h b/tcg/tcg.h index 018c01c..a5a0412 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -395,6 +395,44 @@ static inline unsigned get_alignment_bits(TCGMemOp mem= op) =20 typedef tcg_target_ulong TCGArg; =20 +typedef enum TCGTempVal { + TEMP_VAL_DEAD, + TEMP_VAL_REG, + TEMP_VAL_MEM, + TEMP_VAL_CONST, +} TCGTempVal; + +typedef struct TCGTemp { + TCGReg reg:8; + TCGTempVal val_type:8; + TCGType base_type:8; + TCGType type:8; + unsigned int fixed_reg:1; + unsigned int indirect_reg:1; + unsigned int indirect_base:1; + unsigned int mem_coherent:1; + unsigned int mem_allocated:1; + /* If true, the temp is saved across both basic blocks and + translation blocks. */ + unsigned int temp_global:1; + /* If true, the temp is saved across basic blocks but dead + at the end of translation blocks. If false, the temp is + dead at the end of basic blocks. */ + unsigned int temp_local:1; + unsigned int temp_allocated:1; + + tcg_target_long val; + struct TCGTemp *mem_base; + intptr_t mem_offset; + const char *name; + + /* Pass-specific information that can be stored for a temporary. + One word worth of integer data, and one pointer to data + allocated separately. */ + uintptr_t state; + void *state_ptr; +} TCGTemp; + /* Define type and accessor macros for TCG variables. =20 TCG variables are the inputs and outputs of TCG ops, as described @@ -411,25 +449,34 @@ typedef tcg_target_ulong TCGArg; =20 Users of tcg_gen_* don't need to know about any of the internal details of these, and should treat them as opaque types. - You won't be able to look inside them in a debugger either. =20 Internal implementation details follow: =20 - Note that there is no definition of the structs TCGv_i32_d etc anywhere. - This is deliberate, because the values we store in variables of type - TCGv_i32 are not really pointers-to-structures. They're just small - integers, but keeping them in pointer types like this means that the - compiler will complain if you accidentally pass a TCGv_i32 to a - function which takes a TCGv_i64, and so on. Only the internals of - TCG need to care about the actual contents of the types, and they always - box and unbox via the MAKE_TCGV_* and GET_TCGV_* functions. - Converting to and from intptr_t rather than int reduces the number - of sign-extension instructions that get implied on 64-bit hosts. */ - -typedef struct TCGv_i32_d *TCGv_i32; -typedef struct TCGv_i64_d *TCGv_i64; -typedef struct TCGv_ptr_d *TCGv_ptr; + There is an array of TCGTemp structures which describe each variable. + For type checking purposes, we want to distinguish one TCGTemp pointer + from another. We do this by creating different structure types + (TCGv_i32_d, TCGv_i64_d, TCGv_ptr_d) that wrap TCGTemp or a pair of the= m. + We unwrap these within tcg-op.c when generating opcodes. After that + point we only have unpaired TCGTemp structures. */ + +typedef struct TCGv_i32_d { + TCGTemp impl; +} *TCGv_i32; + +typedef struct TCGv_i64_d { +#if TCG_TARGET_REG_BITS =3D=3D 32 + struct TCGv_i32_d lo, hi; +#else + TCGTemp impl; +#endif +} *TCGv_i64; + +typedef struct TCGv_ptr_d { + TCGTemp impl; +} *TCGv_ptr; + typedef TCGv_ptr TCGv_env; + #if TARGET_LONG_BITS =3D=3D 32 #define TCGv TCGv_i32 #elif TARGET_LONG_BITS =3D=3D 64 @@ -438,53 +485,23 @@ typedef TCGv_ptr TCGv_env; #error Unhandled TARGET_LONG_BITS value #endif =20 -static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(intptr_t i) -{ - return (TCGv_i32)i; -} - -static inline TCGv_i64 QEMU_ARTIFICIAL MAKE_TCGV_I64(intptr_t i) -{ - return (TCGv_i64)i; -} - -static inline TCGv_ptr QEMU_ARTIFICIAL MAKE_TCGV_PTR(intptr_t i) -{ - return (TCGv_ptr)i; -} - -static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I32(TCGv_i32 t) -{ - return (intptr_t)t; -} - -static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_I64(TCGv_i64 t) -{ - return (intptr_t)t; -} - -static inline intptr_t QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t) -{ - return (intptr_t)t; -} - #if TCG_TARGET_REG_BITS =3D=3D 32 -#define TCGV_LOW(t) MAKE_TCGV_I32(GET_TCGV_I64(t)) -#define TCGV_HIGH(t) MAKE_TCGV_I32(GET_TCGV_I64(t) + 1) +#define TCGV_LOW(t) (&(t)->lo) +#define TCGV_HIGH(t) (&(t)->hi) #endif =20 -#define TCGV_EQUAL_I32(a, b) (GET_TCGV_I32(a) =3D=3D GET_TCGV_I32(b)) -#define TCGV_EQUAL_I64(a, b) (GET_TCGV_I64(a) =3D=3D GET_TCGV_I64(b)) -#define TCGV_EQUAL_PTR(a, b) (GET_TCGV_PTR(a) =3D=3D GET_TCGV_PTR(b)) +#define TCGV_EQUAL_I32(a, b) ((a) =3D=3D (b)) +#define TCGV_EQUAL_I64(a, b) ((a) =3D=3D (b)) +#define TCGV_EQUAL_PTR(a, b) ((a) =3D=3D (b)) =20 /* Dummy definition to avoid compiler warnings. */ -#define TCGV_UNUSED_I32(x) x =3D MAKE_TCGV_I32(-1) -#define TCGV_UNUSED_I64(x) x =3D MAKE_TCGV_I64(-1) -#define TCGV_UNUSED_PTR(x) x =3D MAKE_TCGV_PTR(-1) +#define TCGV_UNUSED_I32(x) ((x) =3D NULL) +#define TCGV_UNUSED_I64(x) ((x) =3D NULL) +#define TCGV_UNUSED_PTR(x) ((x) =3D NULL) =20 -#define TCGV_IS_UNUSED_I32(x) (GET_TCGV_I32(x) =3D=3D -1) -#define TCGV_IS_UNUSED_I64(x) (GET_TCGV_I64(x) =3D=3D -1) -#define TCGV_IS_UNUSED_PTR(x) (GET_TCGV_PTR(x) =3D=3D -1) +#define TCGV_IS_UNUSED_I32(x) ((x) =3D=3D NULL) +#define TCGV_IS_UNUSED_I64(x) ((x) =3D=3D NULL) +#define TCGV_IS_UNUSED_PTR(x) ((x) =3D=3D NULL) =20 /* call flags */ /* Helper does not read globals (either directly or through an exception).= It @@ -568,44 +585,6 @@ static inline TCGCond tcg_high_cond(TCGCond c) } } =20 -typedef enum TCGTempVal { - TEMP_VAL_DEAD, - TEMP_VAL_REG, - TEMP_VAL_MEM, - TEMP_VAL_CONST, -} TCGTempVal; - -typedef struct TCGTemp { - TCGReg reg:8; - TCGTempVal val_type:8; - TCGType base_type:8; - TCGType type:8; - unsigned int fixed_reg:1; - unsigned int indirect_reg:1; - unsigned int indirect_base:1; - unsigned int mem_coherent:1; - unsigned int mem_allocated:1; - /* If true, the temp is saved across both basic blocks and - translation blocks. */ - unsigned int temp_global:1; - /* If true, the temp is saved across basic blocks but dead - at the end of translation blocks. If false, the temp is - dead at the end of basic blocks. */ - unsigned int temp_local:1; - unsigned int temp_allocated:1; - - tcg_target_long val; - struct TCGTemp *mem_base; - intptr_t mem_offset; - const char *name; - - /* Pass-specific information that can be stored for a temporary. - One word worth of integer data, and one pointer to data - allocated separately. */ - uintptr_t state; - void *state_ptr; -} TCGTemp; - typedef struct TCGContext TCGContext; =20 typedef struct TCGTempSet { @@ -755,6 +734,36 @@ static inline size_t arg_index(TCGArg a) return a; } =20 +static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(TCGArg i) +{ + return (TCGv_i32)arg_temp(i); +} + +static inline TCGv_i64 QEMU_ARTIFICIAL MAKE_TCGV_I64(TCGArg i) +{ + return (TCGv_i64)arg_temp(i); +} + +static inline TCGv_ptr QEMU_ARTIFICIAL MAKE_TCGV_PTR(TCGArg i) +{ + return (TCGv_ptr)arg_temp(i); +} + +static inline TCGArg QEMU_ARTIFICIAL GET_TCGV_I32(TCGv_i32 t) +{ + return temp_arg((TCGTemp *)t); +} + +static inline TCGArg QEMU_ARTIFICIAL GET_TCGV_I64(TCGv_i64 t) +{ + return temp_arg((TCGTemp *)t); +} + +static inline TCGArg QEMU_ARTIFICIAL GET_TCGV_PTR(TCGv_ptr t) +{ + return temp_arg((TCGTemp *)t); +} + static inline void tcg_set_insn_param(int op_idx, int arg, TCGArg v) { tcg_ctx.gen_op_buf[op_idx].args[arg] =3D v; @@ -807,49 +816,59 @@ int tcg_gen_code(TCGContext *s, TranslationBlock *tb); =20 void tcg_set_frame(TCGContext *s, TCGReg reg, intptr_t start, intptr_t siz= e); =20 -int tcg_global_mem_new_internal(TCGType, TCGv_ptr, intptr_t, const char *); +TCGTemp *tcg_global_mem_new_internal(TCGType, TCGv_ptr, intptr_t, const ch= ar *); +TCGTemp *tcg_temp_new_internal(TCGType type, bool temp_local); +void tcg_temp_free_internal(TCGTemp *ts); =20 TCGv_i32 tcg_global_reg_new_i32(TCGReg reg, const char *name); TCGv_i64 tcg_global_reg_new_i64(TCGReg reg, const char *name); =20 -TCGv_i32 tcg_temp_new_internal_i32(int temp_local); -TCGv_i64 tcg_temp_new_internal_i64(int temp_local); - -void tcg_temp_free_i32(TCGv_i32 arg); -void tcg_temp_free_i64(TCGv_i64 arg); - static inline TCGv_i32 tcg_global_mem_new_i32(TCGv_ptr reg, intptr_t offse= t, const char *name) { - int idx =3D tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, nam= e); - return MAKE_TCGV_I32(idx); + TCGTemp *t =3D tcg_global_mem_new_internal(TCG_TYPE_I32, reg, offset, = name); + return (TCGv_i32)t; } =20 static inline TCGv_i32 tcg_temp_new_i32(void) { - return tcg_temp_new_internal_i32(0); + TCGTemp *t =3D tcg_temp_new_internal(TCG_TYPE_I32, false); + return (TCGv_i32)t; } =20 static inline TCGv_i32 tcg_temp_local_new_i32(void) { - return tcg_temp_new_internal_i32(1); + TCGTemp *t =3D tcg_temp_new_internal(TCG_TYPE_I32, true); + return (TCGv_i32)t; } =20 static inline TCGv_i64 tcg_global_mem_new_i64(TCGv_ptr reg, intptr_t offse= t, const char *name) { - int idx =3D tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, nam= e); - return MAKE_TCGV_I64(idx); + TCGTemp *t =3D tcg_global_mem_new_internal(TCG_TYPE_I64, reg, offset, = name); + return (TCGv_i64)t; } =20 static inline TCGv_i64 tcg_temp_new_i64(void) { - return tcg_temp_new_internal_i64(0); + TCGTemp *t =3D tcg_temp_new_internal(TCG_TYPE_I64, false); + return (TCGv_i64)t; } =20 static inline TCGv_i64 tcg_temp_local_new_i64(void) { - return tcg_temp_new_internal_i64(1); + TCGTemp *t =3D tcg_temp_new_internal(TCG_TYPE_I64, true); + return (TCGv_i64)t; +} + +static inline void tcg_temp_free_i32(TCGv_i32 arg) +{ + tcg_temp_free_internal((TCGTemp *)arg); +} + +static inline void tcg_temp_free_i64(TCGv_i64 arg) +{ + tcg_temp_free_internal((TCGTemp *)arg); } =20 #if defined(CONFIG_DEBUG_TCG) --=20 2.9.4 From nobody Fri May 3 04:52:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1498013714626566.1152780302627; Tue, 20 Jun 2017 19:55:14 -0700 (PDT) Received: from localhost ([::1]:51554 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dNVnV-0003Cx-BL for importer@patchew.org; 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[97.113.165.157]) by smtp.gmail.com with ESMTPSA id l53sm2478939qta.56.2017.06.20.19.48.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 20 Jun 2017 19:48:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=kzcO9PX8ZKIkRWFTGTSRtLfppn1jE2K0gSt00uyVLnk=; b=OgD6Xj6URk3FCjyBSRAhxMppQ4vq8PIRbI+3S5XyGjlkDJGs8GWP+tYS2P8rUb6GmD h0kV6EhDkFxy1yUYLAr3rt55OVk8wB4KB+WE2xDXqwFsuj+dkcoL0FdUaZlimN6119kg DxiQcMKXyP7o3uSuGPTTTi4JpnVmPWxw7tSzpVaLmV6yxoo4wQ8ng5H+KV03sf0YaK63 Sl4bg56u99A/cXg5qdFGsPbJ3KsknD2O7v9SpWMFrtRGUmK4Up2o/krtkwQxEO+MSvZV X2bE7m0yeUZE14u2V0vDVIS5rtX2IHTnZUSpOC+ojd6lC/7Vjemvye/4vZXya9JbGUvF xlAw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=kzcO9PX8ZKIkRWFTGTSRtLfppn1jE2K0gSt00uyVLnk=; b=OG28+jCtFKCqLOD7N7bx8YBN5iZSylbYqO+hO9K2qR+8lTgUngmjEuZDiCyzas4xwa 0LaRC58X7RNwoqkSHF0nWKmZUXwPuitbjIntQ79v4vkoyYB4HxcNOSPR8NJlGSVaNC+v 5VJUdzH0Clf4h5miUAE+eELt8nVTfrTN9RTedHHg13VH2af25cAV3vE447dxoc/Urwlg gnajj6MC9+e7npP0Jhz3nlKW3DYnClXwS7X6zWzy08ggDpfehasFdTbpU9HZGbv5y00S Bp6JWSZho5wjfpAH4KofSaR5zaPv1APvD421uiUgZL3X6tTAP27ciy8LcQO4vYqIRfTx hjCA== X-Gm-Message-State: AKS2vOw8/JtMJILd6VcgR0WMYuhPsAvO9Hh1E7zadRaBYP+FPLcjXYhN bmjBXDcPBXGPv4ah2y4= X-Received: by 10.55.161.148 with SMTP id k142mr35380598qke.168.1498013337276; Tue, 20 Jun 2017 19:48:57 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Tue, 20 Jun 2017 19:48:31 -0700 Message-Id: <20170621024831.26019-17-rth@twiddle.net> X-Mailer: git-send-email 2.9.4 In-Reply-To: <20170621024831.26019-1-rth@twiddle.net> References: <20170621024831.26019-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::244 Subject: [Qemu-devel] [PATCH 16/16] tcg: Store pointers to temporaries directly in TCGArg X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: aurelien@aurel32.net Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Signed-off-by: Richard Henderson --- tcg/tcg.c | 8 ++++---- tcg/tcg.h | 14 ++++++++------ 2 files changed, 12 insertions(+), 10 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index 1ca1192..c25f455 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -810,11 +810,11 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, #else if (TCG_TARGET_REG_BITS < 64 && (sizemask & 1)) { #ifdef HOST_WORDS_BIGENDIAN - op->args[pi++] =3D ret + 1; + op->args[pi++] =3D ret + sizeof(TCGTemp); op->args[pi++] =3D ret; #else op->args[pi++] =3D ret; - op->args[pi++] =3D ret + 1; + op->args[pi++] =3D ret + sizeof(TCGTemp); #endif nb_rets =3D 2; } else { @@ -849,11 +849,11 @@ void tcg_gen_callN(TCGContext *s, void *func, TCGArg = ret, have to get more complicated to differentiate between stack arguments and register arguments. */ #if defined(HOST_WORDS_BIGENDIAN) !=3D defined(TCG_TARGET_STACK_GROWSUP) - op->args[pi++] =3D args[i] + 1; + op->args[pi++] =3D args[i] + sizeof(TCGTemp); op->args[pi++] =3D args[i]; #else op->args[pi++] =3D args[i]; - op->args[pi++] =3D args[i] + 1; + op->args[pi++] =3D args[i] + sizeof(TCGTemp); #endif real_args +=3D 2; continue; diff --git a/tcg/tcg.h b/tcg/tcg.h index a5a0412..df73b31 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -520,7 +520,7 @@ typedef TCGv_ptr TCGv_env; #define TCG_CALL_NO_WG_SE (TCG_CALL_NO_WG | TCG_CALL_NO_SE) =20 /* used to align parameters */ -#define TCG_CALL_DUMMY_ARG ((TCGArg)(-1)) +#define TCG_CALL_DUMMY_ARG 0 =20 /* Conditions. Note that these are laid out for easy manipulation by the functions below: @@ -714,24 +714,26 @@ extern bool parallel_cpus; =20 static inline size_t temp_idx(TCGTemp *ts) { - ptrdiff_t n =3D ts - tcg_ctx.temps; - tcg_debug_assert(n >=3D 0 && n < tcg_ctx.nb_temps); + size_t n =3D ts - tcg_ctx.temps; + tcg_debug_assert(n < tcg_ctx.nb_temps); return n; } =20 static inline TCGArg temp_arg(TCGTemp *ts) { - return temp_idx(ts); + size_t n =3D ts - tcg_ctx.temps; + tcg_debug_assert(n < tcg_ctx.nb_temps); + return (uintptr_t)ts; } =20 static inline TCGTemp *arg_temp(TCGArg a) { - return a =3D=3D TCG_CALL_DUMMY_ARG ? NULL : &tcg_ctx.temps[a]; + return (TCGTemp *)(uintptr_t)a; } =20 static inline size_t arg_index(TCGArg a) { - return a; + return temp_idx(arg_temp(a)); } =20 static inline TCGv_i32 QEMU_ARTIFICIAL MAKE_TCGV_I32(TCGArg i) --=20 2.9.4