From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495380729585333.5737678151705; Sun, 21 May 2017 08:32:09 -0700 (PDT) Received: from localhost ([::1]:38378 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSpz-0003VE-U9 for importer@patchew.org; Sun, 21 May 2017 11:32:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53504) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSo2-0002Fm-SJ for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:07 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSo1-00079q-SN for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:06 -0400 Received: from mail.kernel.org ([198.145.29.99]:49518) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSnx-00076e-IN; Sun, 21 May 2017 11:30:01 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 74523239B0; Sun, 21 May 2017 15:29:59 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 74523239B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:39 +0200 Message-Id: <20170521152949.15338-2-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 01/11] hw/intc/exynos4210_gic: Fix GIC memory mappings for secondary CPU X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Recent Linux kernel (tested next-20170224) was complaining about missing GIC mask and was unable to bring up secondary CPU: [ =C2=A0 =C2=A00.000000] NR_IRQS:16 nr_irqs:16 16 [ 0.000000] GIC CPU mask not found - kernel will fail to boot. ... [ =C2=A0 =C2=A00.400492] smp: Bringing up secondary CPUs ... [ =C2=A0 =C2=A01.413184] CPU1: failed to boot: -110 [ =C2=A0 =C2=A01.423981] smp: Brought up 1 node, 1 CPU In its instance_init() call, the Exynos GIC driver was setting GIC memory mappings for each CPU, from 1 up to "num-cpu" property. The Exynos4210 machine init call on the other hand, first created Exynos GIC device and then set the "num-cpu" property which was too late. The init already happened with default "num-cpu" value of 1 thus GIC mappings were created only for the first CPU. Split the Exynos GIC init code into realize function so the code will see updated "num-cpu" property. This fixes the warning and brings second CPU: [ 0.435780] CPU1: thread -1, cpu 1, socket 9, mpidr 80000901 [ 0.451838] smp: Brought up 1 node, 2 CPUs Additionally this fixes missing Software Generated Interrupts (except CPU wakeup, non of SGIs are coming) which are needed for example for IRQ work. Lack of IRQ work causes kernel to hang during system power off because cpufreq_dbs_governor_stop() waits for completion with irq_work_sync(). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peter Maydell --- hw/intc/exynos4210_gic.c | 21 ++++++++++++++------- 1 file changed, 14 insertions(+), 7 deletions(-) diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 2a55817b7660..222cfd6c6387 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -283,9 +283,20 @@ static void exynos4210_gic_set_irq(void *opaque, int i= rq, int level) =20 static void exynos4210_gic_init(Object *obj) { - DeviceState *dev =3D DEVICE(obj); Exynos4210GicState *s =3D EXYNOS4210_GIC(obj); - SysBusDevice *sbd =3D SYS_BUS_DEVICE(obj); + + memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container", + EXYNOS4210_EXT_GIC_CPU_REGION_SIZE); + memory_region_init(&s->dist_container, obj, "exynos4210-dist-container= ", + EXYNOS4210_EXT_GIC_DIST_REGION_SIZE); + +} + +static void exynos4210_gic_realize(DeviceState *dev, Error **errp) +{ + Exynos4210GicState *s =3D EXYNOS4210_GIC(dev); + SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); + Object *obj =3D OBJECT(dev); uint32_t i; const char cpu_prefix[] =3D "exynos4210-gic-alias_cpu"; const char dist_prefix[] =3D "exynos4210-gic-alias_dist"; @@ -306,11 +317,6 @@ static void exynos4210_gic_init(Object *obj) qdev_init_gpio_in(dev, exynos4210_gic_set_irq, EXYNOS4210_GIC_NIRQ - 32); =20 - memory_region_init(&s->cpu_container, obj, "exynos4210-cpu-container", - EXYNOS4210_EXT_GIC_CPU_REGION_SIZE); - memory_region_init(&s->dist_container, obj, "exynos4210-dist-container= ", - EXYNOS4210_EXT_GIC_DIST_REGION_SIZE); - for (i =3D 0; i < s->num_cpu; i++) { /* Map CPU interface per SMP Core */ sprintf(cpu_alias_name, "%s%x", cpu_prefix, i); @@ -346,6 +352,7 @@ static void exynos4210_gic_class_init(ObjectClass *klas= s, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); =20 + dc->realize =3D exynos4210_gic_realize; dc->props =3D exynos4210_gic_properties; } =20 --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495380748352455.74967532104233; Sun, 21 May 2017 08:32:28 -0700 (PDT) Received: from localhost ([::1]:38380 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSqI-0003gO-My for importer@patchew.org; Sun, 21 May 2017 11:32:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53508) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSo3-0002Gk-5I for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSo2-0007AG-An for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:07 -0400 Received: from mail.kernel.org ([198.145.29.99]:49556) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSnz-00077X-8u; Sun, 21 May 2017 11:30:03 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 27626239B6; Sun, 21 May 2017 15:30:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 27626239B6 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:40 +0200 Message-Id: <20170521152949.15338-3-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 02/11] hw/intc/exynos4210_gic: Use more meaningful name for local variable X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" There are to SysBusDevice variables in exynos4210_gic_realize() function: one for the device itself and second for arm_gic device. Add a prefix "gic" to the second one so it will be easier to understand the code. While at it, put local uninitialized 'i' variable at the end, next to other uninitialized ones. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peter Maydell --- hw/intc/exynos4210_gic.c | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 222cfd6c6387..9a2254f0b13c 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -297,21 +297,21 @@ static void exynos4210_gic_realize(DeviceState *dev, = Error **errp) Exynos4210GicState *s =3D EXYNOS4210_GIC(dev); SysBusDevice *sbd =3D SYS_BUS_DEVICE(dev); Object *obj =3D OBJECT(dev); - uint32_t i; const char cpu_prefix[] =3D "exynos4210-gic-alias_cpu"; const char dist_prefix[] =3D "exynos4210-gic-alias_dist"; char cpu_alias_name[sizeof(cpu_prefix) + 3]; char dist_alias_name[sizeof(cpu_prefix) + 3]; - SysBusDevice *busdev; + SysBusDevice *gicbusdev; + uint32_t i; =20 s->gic =3D qdev_create(NULL, "arm_gic"); qdev_prop_set_uint32(s->gic, "num-cpu", s->num_cpu); qdev_prop_set_uint32(s->gic, "num-irq", EXYNOS4210_GIC_NIRQ); qdev_init_nofail(s->gic); - busdev =3D SYS_BUS_DEVICE(s->gic); + gicbusdev =3D SYS_BUS_DEVICE(s->gic); =20 /* Pass through outbound IRQ lines from the GIC */ - sysbus_pass_irq(sbd, busdev); + sysbus_pass_irq(sbd, gicbusdev); =20 /* Pass through inbound GPIO lines to the GIC */ qdev_init_gpio_in(dev, exynos4210_gic_set_irq, @@ -322,7 +322,7 @@ static void exynos4210_gic_realize(DeviceState *dev, Er= ror **errp) sprintf(cpu_alias_name, "%s%x", cpu_prefix, i); memory_region_init_alias(&s->cpu_alias[i], obj, cpu_alias_name, - sysbus_mmio_get_region(busdev, 1), + sysbus_mmio_get_region(gicbusdev, 1), 0, EXYNOS4210_GIC_CPU_REGION_SIZE); memory_region_add_subregion(&s->cpu_container, @@ -332,7 +332,7 @@ static void exynos4210_gic_realize(DeviceState *dev, Er= ror **errp) sprintf(dist_alias_name, "%s%x", dist_prefix, i); memory_region_init_alias(&s->dist_alias[i], obj, dist_alias_name, - sysbus_mmio_get_region(busdev, 0), + sysbus_mmio_get_region(gicbusdev, 0), 0, EXYNOS4210_GIC_DIST_REGION_SIZE); memory_region_add_subregion(&s->dist_container, --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14953810251221009.5964941895124; Sun, 21 May 2017 08:37:05 -0700 (PDT) Received: from localhost ([::1]:38406 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSul-0007Ml-Sp for importer@patchew.org; Sun, 21 May 2017 11:37:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53535) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSo4-0002Hn-2s for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:08 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSo3-0007CN-86 for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:08 -0400 Received: from mail.kernel.org ([198.145.29.99]:49590) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSo0-00078z-VW; Sun, 21 May 2017 11:30:05 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D03D9239A1; Sun, 21 May 2017 15:30:02 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D03D9239A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:41 +0200 Message-Id: <20170521152949.15338-4-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 03/11] hw/timer/exynos4210_mct: Fix checkpatch style errors X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Fix checkpatch errors: 1. ERROR: spaces required around that '+' (ctx:VxV) 2. ERROR: spaces required around that '&' (ctx:VxV) No functional changes. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peter Maydell --- hw/timer/exynos4210_mct.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index a2ec3920f82e..2404fb737ac4 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -937,7 +937,7 @@ static void exynos4210_mct_update_freq(Exynos4210MCTSta= te *s) { uint32_t freq =3D s->freq; s->freq =3D 24000000 / - ((MCT_CFG_GET_PRESCALER(s->reg_mct_cfg)+1) * + ((MCT_CFG_GET_PRESCALER(s->reg_mct_cfg) + 1) * MCT_CFG_GET_DIVIDER(s->reg_mct_cfg)); =20 if (freq !=3D s->freq) { @@ -1162,7 +1162,7 @@ static void exynos4210_mct_write(void *opaque, hwaddr= offset, =20 DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift); =20 - if (offset&0x4) { + if (offset & 0x4) { s->g_timer.reg.wstat |=3D G_WSTAT_COMP_U(index); } else { s->g_timer.reg.wstat |=3D G_WSTAT_COMP_L(index); --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495381133449525.2410742137134; Sun, 21 May 2017 08:38:53 -0700 (PDT) Received: from localhost ([::1]:38411 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSwW-0000Hb-47 for importer@patchew.org; Sun, 21 May 2017 11:38:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53573) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSo6-0002NB-TB for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSo5-0007F7-Sc for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:10 -0400 Received: from mail.kernel.org ([198.145.29.99]:49636) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSo3-0007Bg-Cs; Sun, 21 May 2017 11:30:07 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 85E21239B0; Sun, 21 May 2017 15:30:04 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 85E21239B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:42 +0200 Message-Id: <20170521152949.15338-5-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 04/11] hw/timer/exynos4210_mct: Cleanup indentation and empty new lines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Statements under 'case' were in some places wrongly indented bringing confusion and making the code less readable. Remove also few unneeded blank lines. No functional changes. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peter Maydell --- hw/timer/exynos4210_mct.c | 45 ++++++++++++++++++++-----------------------= -- 1 file changed, 20 insertions(+), 25 deletions(-) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index 2404fb737ac4..ea5f99d9a41b 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -1016,9 +1016,9 @@ static uint64_t exynos4210_mct_read(void *opaque, hwa= ddr offset, =20 case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3): case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3): - index =3D GET_G_COMP_IDX(offset); - shift =3D 8 * (offset & 0x4); - value =3D UINT32_MAX & (s->g_timer.reg.comp[index] >> shift); + index =3D GET_G_COMP_IDX(offset); + shift =3D 8 * (offset & 0x4); + value =3D UINT32_MAX & (s->g_timer.reg.comp[index] >> shift); break; =20 case G_TCON: @@ -1067,7 +1067,6 @@ static uint64_t exynos4210_mct_read(void *opaque, hwa= ddr offset, lt_i =3D GET_L_TIMER_IDX(offset); =20 value =3D exynos4210_lfrc_get_count(&s->l_timer[lt_i]); - break; =20 case L0_TCON: case L1_TCON: @@ -1153,23 +1152,23 @@ static void exynos4210_mct_write(void *opaque, hwad= dr offset, =20 case G_COMP_L(0): case G_COMP_L(1): case G_COMP_L(2): case G_COMP_L(3): case G_COMP_U(0): case G_COMP_U(1): case G_COMP_U(2): case G_COMP_U(3): - index =3D GET_G_COMP_IDX(offset); - shift =3D 8 * (offset & 0x4); - s->g_timer.reg.comp[index] =3D - (s->g_timer.reg.comp[index] & - (((uint64_t)UINT32_MAX << 32) >> shift)) + - (value << shift); + index =3D GET_G_COMP_IDX(offset); + shift =3D 8 * (offset & 0x4); + s->g_timer.reg.comp[index] =3D + (s->g_timer.reg.comp[index] & + (((uint64_t)UINT32_MAX << 32) >> shift)) + + (value << shift); =20 - DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, shift); + DPRINTF("comparator %d write 0x%llx val << %d\n", index, value, sh= ift); =20 - if (offset & 0x4) { - s->g_timer.reg.wstat |=3D G_WSTAT_COMP_U(index); - } else { - s->g_timer.reg.wstat |=3D G_WSTAT_COMP_L(index); - } + if (offset & 0x4) { + s->g_timer.reg.wstat |=3D G_WSTAT_COMP_U(index); + } else { + s->g_timer.reg.wstat |=3D G_WSTAT_COMP_L(index); + } =20 - exynos4210_gfrc_restart(s); - break; + exynos4210_gfrc_restart(s); + break; =20 case G_TCON: old_val =3D s->g_timer.reg.tcon; @@ -1207,7 +1206,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr= offset, break; =20 case G_INT_ENB: - /* Raise IRQ if transition from disabled to enabled and CSTAT pend= ing */ for (i =3D 0; i < MCT_GT_CMP_NUM; i++) { if ((value & G_INT_ENABLE(i)) > (s->g_timer.reg.tcon & @@ -1288,7 +1286,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr= offset, break; =20 case L0_TCNTB: case L1_TCNTB: - lt_i =3D GET_L_TIMER_IDX(offset); index =3D GET_L_TIMER_CNT_REG_IDX(offset, lt_i); =20 @@ -1316,7 +1313,6 @@ static void exynos4210_mct_write(void *opaque, hwaddr= offset, break; =20 case L0_ICNTB: case L1_ICNTB: - lt_i =3D GET_L_TIMER_IDX(offset); index =3D GET_L_TIMER_CNT_REG_IDX(offset, lt_i); =20 @@ -1353,13 +1349,12 @@ static void exynos4210_mct_write(void *opaque, hwad= dr offset, if (icntb_max[lt_i] < value) { icntb_max[lt_i] =3D value; } -DPRINTF("local timer[%d] ICNTB write %llx; max=3D%x, min=3D%x\n\n", - lt_i, value, icntb_max[lt_i], icntb_min[lt_i]); + DPRINTF("local timer[%d] ICNTB write %llx; max=3D%x, min=3D%x\n\n", + lt_i, value, icntb_max[lt_i], icntb_min[lt_i]); #endif -break; + break; =20 case L0_FRCNTB: case L1_FRCNTB: - lt_i =3D GET_L_TIMER_IDX(offset); index =3D GET_L_TIMER_CNT_REG_IDX(offset, lt_i); =20 --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495380911177886.5081072510812; Sun, 21 May 2017 08:35:11 -0700 (PDT) Received: from localhost ([::1]:38393 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSsv-0005vx-QY for importer@patchew.org; Sun, 21 May 2017 11:35:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53662) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoD-0002SG-Qb for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoD-0007KP-4v for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:17 -0400 Received: from mail.kernel.org ([198.145.29.99]:49680) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSo5-0007Eq-OS; Sun, 21 May 2017 11:30:09 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 1CEB4239A1; Sun, 21 May 2017 15:30:06 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 1CEB4239A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:43 +0200 Message-Id: <20170521152949.15338-6-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 05/11] hw/timer/exynos4210_mct: Remove unused defines X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Remove defines not used anywhere. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Peter Maydell --- hw/timer/exynos4210_mct.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/hw/timer/exynos4210_mct.c b/hw/timer/exynos4210_mct.c index ea5f99d9a41b..e4ef4cfd3625 100644 --- a/hw/timer/exynos4210_mct.c +++ b/hw/timer/exynos4210_mct.c @@ -173,13 +173,10 @@ enum LocalTimerRegCntIndexes { L_REG_CNT_AMOUNT }; =20 -#define MCT_NIRQ 6 #define MCT_SFR_SIZE 0x444 =20 #define MCT_GT_CMP_NUM 4 =20 -#define MCT_GT_MAX_VAL UINT64_MAX - #define MCT_GT_COUNTER_STEP 0x100000000ULL #define MCT_LT_COUNTER_STEP 0x100000000ULL #define MCT_LT_CNT_LOW_LIMIT 0x100 --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149538126342880.39011878119629; Sun, 21 May 2017 08:41:03 -0700 (PDT) Received: from localhost ([::1]:38425 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSyc-0001ra-4R for importer@patchew.org; Sun, 21 May 2017 11:41:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53684) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoE-0002Sy-FO for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoD-0007KZ-65 for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:49724) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSo7-0007GO-TC; Sun, 21 May 2017 11:30:12 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 67D60239B0; Sun, 21 May 2017 15:30:09 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 67D60239B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:44 +0200 Message-Id: <20170521152949.15338-7-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 06/11] hw/arm/exynos: Move DRAM initialization next boards X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Before QOM-ifying the Exynos4 SoC model, move the DRAM initialization from exynos4210.c to exynos4_boards.c because DRAM is board specific, not SoC. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/exynos4210.c | 20 +----------------- hw/arm/exynos4_boards.c | 50 ++++++++++++++++++++++++++++++++++++++---= ---- include/hw/arm/exynos4210.h | 5 +---- 3 files changed, 45 insertions(+), 30 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 960f27e45a36..0da877f8db0a 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -160,13 +160,11 @@ static uint64_t exynos4210_calc_affinity(int cpu) return mp_affinity; } =20 -Exynos4210State *exynos4210_init(MemoryRegion *system_mem, - unsigned long ram_size) +Exynos4210State *exynos4210_init(MemoryRegion *system_mem) { int i, n; Exynos4210State *s =3D g_new(Exynos4210State, 1); qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; - unsigned long mem_size; DeviceState *dev; SysBusDevice *busdev; ObjectClass *cpu_oc; @@ -299,22 +297,6 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_= mem, memory_region_add_subregion(system_mem, EXYNOS4210_IRAM_BASE_ADDR, &s->iram_mem); =20 - /* DRAM */ - mem_size =3D ram_size; - if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { - memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", - mem_size - EXYNOS4210_DRAM_MAX_SIZE, &error_fatal); - vmstate_register_ram_global(&s->dram1_mem); - memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, - &s->dram1_mem); - mem_size =3D EXYNOS4210_DRAM_MAX_SIZE; - } - memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_si= ze, - &error_fatal); - vmstate_register_ram_global(&s->dram0_mem); - memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, - &s->dram0_mem); - /* PMU. * The only reason of existence at the moment is that secondary CPU boot * loader uses PMU INFORM5 register as a holding pen. diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 4853c318023c..6240b26839cd 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -22,6 +22,7 @@ */ =20 #include "qemu/osdep.h" +#include "qapi/error.h" #include "qemu/error-report.h" #include "qemu-common.h" #include "cpu.h" @@ -56,6 +57,12 @@ typedef enum Exynos4BoardType { EXYNOS4_NUM_OF_BOARDS } Exynos4BoardType; =20 +typedef struct Exynos4BoardState { + Exynos4210State *soc; + MemoryRegion dram0_mem; + MemoryRegion dram1_mem; +} Exynos4BoardState; + static int exynos4_board_id[EXYNOS4_NUM_OF_BOARDS] =3D { [EXYNOS4_BOARD_NURI] =3D 0xD33, [EXYNOS4_BOARD_SMDKC210] =3D 0xB16, @@ -96,9 +103,34 @@ static void lan9215_init(uint32_t base, qemu_irq irq) } } =20 -static Exynos4210State *exynos4_boards_init_common(MachineState *machine, - Exynos4BoardType board_= type) +static void exynos4_boards_init_ram(Exynos4BoardState *s, + MemoryRegion *system_mem, + unsigned long ram_size) +{ + unsigned long mem_size =3D ram_size; + + if (mem_size > EXYNOS4210_DRAM_MAX_SIZE) { + memory_region_init_ram(&s->dram1_mem, NULL, "exynos4210.dram1", + mem_size - EXYNOS4210_DRAM_MAX_SIZE, + &error_fatal); + vmstate_register_ram_global(&s->dram1_mem); + memory_region_add_subregion(system_mem, EXYNOS4210_DRAM1_BASE_ADDR, + &s->dram1_mem); + mem_size =3D EXYNOS4210_DRAM_MAX_SIZE; + } + + memory_region_init_ram(&s->dram0_mem, NULL, "exynos4210.dram0", mem_si= ze, + &error_fatal); + vmstate_register_ram_global(&s->dram0_mem); + memory_region_add_subregion(system_mem, EXYNOS4210_DRAM0_BASE_ADDR, + &s->dram0_mem); +} + +static Exynos4BoardState * +exynos4_boards_init_common(MachineState *machine, + Exynos4BoardType board_type) { + Exynos4BoardState *s =3D g_new(Exynos4BoardState, 1); MachineClass *mc =3D MACHINE_GET_CLASS(machine); =20 if (smp_cpus !=3D EXYNOS4210_NCPUS && !qtest_enabled()) { @@ -127,8 +159,12 @@ static Exynos4210State *exynos4_boards_init_common(Mac= hineState *machine, machine->kernel_cmdline, machine->initrd_filename); =20 - return exynos4210_init(get_system_memory(), - exynos4_board_ram_size[board_type]); + exynos4_boards_init_ram(s, get_system_memory(), + exynos4_board_ram_size[board_type]); + + s->soc =3D exynos4210_init(get_system_memory()); + + return s; } =20 static void nuri_init(MachineState *machine) @@ -140,11 +176,11 @@ static void nuri_init(MachineState *machine) =20 static void smdkc210_init(MachineState *machine) { - Exynos4210State *s =3D exynos4_boards_init_common(machine, - EXYNOS4_BOARD_SMDKC210= ); + Exynos4BoardState *s =3D exynos4_boards_init_common(machine, + EXYNOS4_BOARD_SMDKC2= 10); =20 lan9215_init(SMDK_LAN9118_BASE_ADDR, - qemu_irq_invert(s->irq_table[exynos4210_get_irq(37, 1)])); + qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)])); arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); } =20 diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index d9e08014d6ff..098a69ec73d3 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -93,8 +93,6 @@ typedef struct Exynos4210State { MemoryRegion iram_mem; MemoryRegion irom_mem; MemoryRegion irom_alias_mem; - MemoryRegion dram0_mem; - MemoryRegion dram1_mem; MemoryRegion boot_secondary; MemoryRegion bootreg_mem; I2CBus *i2c_if[EXYNOS4210_I2C_NUMBER]; @@ -103,8 +101,7 @@ typedef struct Exynos4210State { void exynos4210_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info); =20 -Exynos4210State *exynos4210_init(MemoryRegion *system_mem, - unsigned long ram_size); +Exynos4210State *exynos4210_init(MemoryRegion *system_mem); =20 /* Initialize exynos4210 IRQ subsystem stub */ qemu_irq *exynos4210_init_irq(Exynos4210Irq *env); --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149538079277716.798626869634973; Sun, 21 May 2017 08:33:12 -0700 (PDT) Received: from localhost ([::1]:38384 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSr1-0004RE-FH for importer@patchew.org; Sun, 21 May 2017 11:33:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53665) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoD-0002SM-UK for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoD-0007KJ-2p for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:17 -0400 Received: from mail.kernel.org ([198.145.29.99]:49750) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSo9-0007H8-Lw; Sun, 21 May 2017 11:30:13 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 7517C239A1; Sun, 21 May 2017 15:30:11 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 7517C239A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:45 +0200 Message-Id: <20170521152949.15338-8-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 07/11] hw/arm/exynos: Declare local variables in some order X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Bring some more readability by declaring local function variables: first initialized ones and then the rest (with reversed-christmas-tree order). Signed-off-by: Krzysztof Kozlowski Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/exynos4210.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 0da877f8db0a..27a7bf28a5a9 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -162,12 +162,12 @@ static uint64_t exynos4210_calc_affinity(int cpu) =20 Exynos4210State *exynos4210_init(MemoryRegion *system_mem) { - int i, n; Exynos4210State *s =3D g_new(Exynos4210State, 1); qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; - DeviceState *dev; SysBusDevice *busdev; ObjectClass *cpu_oc; + DeviceState *dev; + int i, n; =20 cpu_oc =3D cpu_class_by_name(TYPE_ARM_CPU, "cortex-a9"); assert(cpu_oc); --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495380842768669.2410858257876; Sun, 21 May 2017 08:34:02 -0700 (PDT) Received: from localhost ([::1]:38390 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSrp-00054A-3I for importer@patchew.org; Sun, 21 May 2017 11:34:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53691) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoE-0002TI-RO for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoD-0007Kz-Oz for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:18 -0400 Received: from mail.kernel.org ([198.145.29.99]:49784) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSoB-0007Il-AC; Sun, 21 May 2017 11:30:15 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 28BF5239B0; Sun, 21 May 2017 15:30:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 28BF5239B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:46 +0200 Message-Id: <20170521152949.15338-9-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 08/11] hw/arm/exynos: QOM-ify the SoC X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Convert the Exynos4210 SoC code into a QOM model which is a preferred approach instead of directly initializing SoC-related devices from the board file. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/exynos4210.c | 18 +++++++++++++++--- hw/arm/exynos4_boards.c | 9 ++++++--- include/hw/arm/exynos4210.h | 8 ++++++-- 3 files changed, 27 insertions(+), 8 deletions(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 27a7bf28a5a9..034fc8be9d76 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -160,9 +160,10 @@ static uint64_t exynos4210_calc_affinity(int cpu) return mp_affinity; } =20 -Exynos4210State *exynos4210_init(MemoryRegion *system_mem) +static void exynos4210_init(Object *obj) { - Exynos4210State *s =3D g_new(Exynos4210State, 1); + MemoryRegion *system_mem =3D get_system_memory(); + Exynos4210State *s =3D EXYNOS4210(obj); qemu_irq gate_irq[EXYNOS4210_NCPUS][EXYNOS4210_IRQ_GATE_NINPUTS]; SysBusDevice *busdev; ObjectClass *cpu_oc; @@ -402,6 +403,17 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_= mem) =20 sysbus_create_simple(TYPE_EXYNOS4210_EHCI, EXYNOS4210_EHCI_BASE_ADDR, s->irq_table[exynos4210_get_irq(28, 3)]); +} + +static const TypeInfo exynos4210_type_info =3D { + .name =3D TYPE_EXYNOS4210, + .parent =3D TYPE_DEVICE, + .instance_size =3D sizeof(Exynos4210State), + .instance_init =3D exynos4210_init, +}; =20 - return s; +static void exynos4210_register_types(void) +{ + type_register_static(&exynos4210_type_info); } +type_init(exynos4210_register_types) diff --git a/hw/arm/exynos4_boards.c b/hw/arm/exynos4_boards.c index 6240b26839cd..5e7c6b562ae2 100644 --- a/hw/arm/exynos4_boards.c +++ b/hw/arm/exynos4_boards.c @@ -58,7 +58,7 @@ typedef enum Exynos4BoardType { } Exynos4BoardType; =20 typedef struct Exynos4BoardState { - Exynos4210State *soc; + Exynos4210State soc; MemoryRegion dram0_mem; MemoryRegion dram1_mem; } Exynos4BoardState; @@ -162,7 +162,10 @@ exynos4_boards_init_common(MachineState *machine, exynos4_boards_init_ram(s, get_system_memory(), exynos4_board_ram_size[board_type]); =20 - s->soc =3D exynos4210_init(get_system_memory()); + object_initialize(&s->soc, sizeof(s->soc), TYPE_EXYNOS4210); + object_property_add_child(OBJECT(machine), "soc", OBJECT(&s->soc), + &error_abort); + object_property_set_bool(OBJECT(&s->soc), true, "realized", &error_fat= al); =20 return s; } @@ -180,7 +183,7 @@ static void smdkc210_init(MachineState *machine) EXYNOS4_BOARD_SMDKC2= 10); =20 lan9215_init(SMDK_LAN9118_BASE_ADDR, - qemu_irq_invert(s->soc->irq_table[exynos4210_get_irq(37, 1)])); + qemu_irq_invert(s->soc.irq_table[exynos4210_get_irq(37, 1)])); arm_load_kernel(ARM_CPU(first_cpu), &exynos4_board_binfo); } =20 diff --git a/include/hw/arm/exynos4210.h b/include/hw/arm/exynos4210.h index 098a69ec73d3..116eae62756b 100644 --- a/include/hw/arm/exynos4210.h +++ b/include/hw/arm/exynos4210.h @@ -29,6 +29,10 @@ #include "exec/memory.h" #include "target/arm/cpu-qom.h" =20 +#define TYPE_EXYNOS4210 "exynos4210" +#define EXYNOS4210(obj) \ + OBJECT_CHECK(Exynos4210State, (obj), TYPE_EXYNOS4210) + #define EXYNOS4210_NCPUS 2 =20 #define EXYNOS4210_DRAM0_BASE_ADDR 0x40000000 @@ -85,6 +89,8 @@ typedef struct Exynos4210Irq { } Exynos4210Irq; =20 typedef struct Exynos4210State { + DeviceState parent_obj; + ARMCPU *cpu[EXYNOS4210_NCPUS]; Exynos4210Irq irqs; qemu_irq *irq_table; @@ -101,8 +107,6 @@ typedef struct Exynos4210State { void exynos4210_write_secondary(ARMCPU *cpu, const struct arm_boot_info *info); =20 -Exynos4210State *exynos4210_init(MemoryRegion *system_mem); - /* Initialize exynos4210 IRQ subsystem stub */ qemu_irq *exynos4210_init_irq(Exynos4210Irq *env); =20 --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495381051027144.88723086308448; Sun, 21 May 2017 08:37:31 -0700 (PDT) Received: from localhost ([::1]:38408 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSvB-0007sQ-Qf for importer@patchew.org; Sun, 21 May 2017 11:37:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53723) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoI-0002Xn-3L for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoF-0007Ll-4x for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:22 -0400 Received: from mail.kernel.org ([198.145.29.99]:49822) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSoC-0007Jo-Vb; Sun, 21 May 2017 11:30:17 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id D355D239A1; Sun, 21 May 2017 15:30:14 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org D355D239A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:47 +0200 Message-Id: <20170521152949.15338-10-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 09/11] hw/arm/exynos: Use type define instead of hard-coded a9mpcore_priv string X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Use a define for a9mpcore_priv device type name instead of hard-coded string. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/arm/exynos4210.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 034fc8be9d76..a9e221c5b7fe 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -26,6 +26,7 @@ #include "qemu-common.h" #include "qemu/log.h" #include "cpu.h" +#include "hw/cpu/a9mpcore.h" #include "hw/boards.h" #include "sysemu/sysemu.h" #include "hw/sysbus.h" @@ -212,7 +213,7 @@ static void exynos4210_init(Object *obj) } =20 /* Private memory region and Internal GIC */ - dev =3D qdev_create(NULL, "a9mpcore_priv"); + dev =3D qdev_create(NULL, TYPE_A9MPCORE_PRIV); qdev_prop_set_uint32(dev, "num-cpu", EXYNOS4210_NCPUS); qdev_init_nofail(dev); busdev =3D SYS_BUS_DEVICE(dev); --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14953811575371008.4855128679977; Sun, 21 May 2017 08:39:17 -0700 (PDT) Received: from localhost ([::1]:38412 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSwt-0000W3-J4 for importer@patchew.org; Sun, 21 May 2017 11:39:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53759) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoK-0002Zz-2N for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoJ-0007NO-4w for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:49856) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSoE-0007LK-Lo; Sun, 21 May 2017 11:30:18 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 88395239B0; Sun, 21 May 2017 15:30:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 88395239B0 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:48 +0200 Message-Id: <20170521152949.15338-11-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> MIME-Version: 1.0 Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 10/11] hw/intc/exynos4210_gic: Constify array of combiner interrupts X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" The static array of interrupt combiner mappings is not modified so it can be made const for code safeness. Signed-off-by: Krzysztof Kozlowski Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- hw/intc/exynos4210_gic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/intc/exynos4210_gic.c b/hw/intc/exynos4210_gic.c index 9a2254f0b13c..d79b4cfcc7c9 100644 --- a/hw/intc/exynos4210_gic.c +++ b/hw/intc/exynos4210_gic.c @@ -116,7 +116,7 @@ enum ExtInt { * which is INTG16 in Internal Interrupt Combiner. */ =20 -static uint32_t +static const uint32_t combiner_grp_to_gic_id[64-EXYNOS4210_MAX_EXT_COMBINER_OUT_IRQ][8] =3D { /* int combiner groups 16-19 */ { }, { }, { }, { }, --=20 2.9.3 From nobody Sat Apr 27 16:18:05 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1495380987801282.662900786205; Sun, 21 May 2017 08:36:27 -0700 (PDT) Received: from localhost ([::1]:38405 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSuA-0006uL-61 for importer@patchew.org; Sun, 21 May 2017 11:36:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:53765) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dCSoK-0002aV-DL for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:25 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dCSoJ-0007NV-Du for qemu-devel@nongnu.org; Sun, 21 May 2017 11:30:24 -0400 Received: from mail.kernel.org ([198.145.29.99]:49892) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dCSoG-0007Lw-Et; Sun, 21 May 2017 11:30:20 -0400 Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 3C1E7239A1; Sun, 21 May 2017 15:30:18 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 3C1E7239A1 Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=kernel.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=krzk@kernel.org From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sun, 21 May 2017 17:29:49 +0200 Message-Id: <20170521152949.15338-12-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170521152949.15338-1-krzk@kernel.org> References: <20170521152949.15338-1-krzk@kernel.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 198.145.29.99 Subject: [Qemu-devel] [PATCH v3 11/11] hw/misc/exynos4210_pmu: Add support for system poweroff X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: =?UTF-8?q?Philippe=20Mathieu-Daud=C3=A9?= , Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" On all Exynos-based boards, the system powers down itself by driving PS_HOLD signal low - eight bit in PS_HOLD_CONTROL register of PMU. Handle writing to respective PMU register to fix power off failure: reboot: Power down Unable to poweroff system shutdown: 31 output lines suppressed due to ratelimiting Kernel panic - not syncing: Attempted to kill init! exitcode=3D0x000000= 00 CPU: 0 PID: 1 Comm: shutdown Not tainted 4.11.0-rc8 #846 Hardware name: SAMSUNG EXYNOS (Flattened Device Tree) [] (unwind_backtrace) from [] (show_stack+0x10/0x14) [] (show_stack) from [] (dump_stack+0x88/0x9c) [] (dump_stack) from [] (panic+0xdc/0x268) [] (panic) from [] (do_exit+0xa90/0xab4) [] (do_exit) from [] (SyS_reboot+0x164/0x1d0) [] (SyS_reboot) from [] (ret_fast_syscall+0x0/0x3c) Additionally the initial value of PS_HOLD has to be changed because recent Linux kernel (v4.12-rc1) uses regmap cache for this access. When the register is kept at reset value, the kernel will not issue a write to it. Usually the bootloader sets the eight bit of PS_HOLD high so mimic its existence here. Signed-off-by: Krzysztof Kozlowski --- hw/misc/exynos4210_pmu.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/hw/misc/exynos4210_pmu.c b/hw/misc/exynos4210_pmu.c index 63a8ccd35559..f3f96b1f4889 100644 --- a/hw/misc/exynos4210_pmu.c +++ b/hw/misc/exynos4210_pmu.c @@ -26,6 +26,7 @@ =20 #include "qemu/osdep.h" #include "hw/sysbus.h" +#include "sysemu/sysemu.h" =20 #ifndef DEBUG_PMU #define DEBUG_PMU 0 @@ -350,7 +351,11 @@ static const Exynos4210PmuReg exynos4210_pmu_regs[] = =3D { {"PAD_RETENTION_MMCB_OPTION", PAD_RETENTION_MMCB_OPTION, 0x00000000}, {"PAD_RETENTION_EBIA_OPTION", PAD_RETENTION_EBIA_OPTION, 0x00000000}, {"PAD_RETENTION_EBIB_OPTION", PAD_RETENTION_EBIB_OPTION, 0x00000000}, - {"PS_HOLD_CONTROL", PS_HOLD_CONTROL, 0x00005200}, + /* + * PS_HOLD_CONTROL: reset value and manually toggle high the DATA bit. + * DATA bit high, set usually by bootloader, keeps system on. + */ + {"PS_HOLD_CONTROL", PS_HOLD_CONTROL, 0x00005200 | BIT(8)}, {"XUSBXTI_CONFIGURATION", XUSBXTI_CONFIGURATION, 0x00000001}, {"XUSBXTI_STATUS", XUSBXTI_STATUS, 0x00000001}, {"XUSBXTI_DURATION", XUSBXTI_DURATION, 0xFFF00000}, @@ -397,6 +402,12 @@ typedef struct Exynos4210PmuState { uint32_t reg[PMU_NUM_OF_REGISTERS]; } Exynos4210PmuState; =20 +static void exynos4210_pmu_poweroff(void) +{ + PRINT_DEBUG("QEMU PMU: PS_HOLD bit down, powering off\n"); + qemu_system_shutdown_request(); +} + static uint64_t exynos4210_pmu_read(void *opaque, hwaddr offset, unsigned size) { @@ -428,6 +439,13 @@ static void exynos4210_pmu_write(void *opaque, hwaddr = offset, PRINT_DEBUG_EXTEND("%s <0x%04x> <- 0x%04x\n", reg_p->name, (uint32_t)offset, (uint32_t)val); s->reg[i] =3D val; + if ((offset =3D=3D PS_HOLD_CONTROL) && ((val & BIT(8)) =3D=3D = 0)) { + /* + * We are interested only in setting data bit + * of PS_HOLD_CONTROL register to indicate power off reque= st. + */ + exynos4210_pmu_poweroff(); + } return; } reg_p++; --=20 2.9.3