From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494632728471645.8140275531699; Fri, 12 May 2017 16:45:28 -0700 (PDT) Received: from localhost ([::1]:55709 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KFS-0005j3-QE for importer@patchew.org; Fri, 12 May 2017 19:45:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45510) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAT-0001AE-TY for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:19 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAS-0003we-B6 for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:17 -0400 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:34921) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAS-0003wH-6q for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:16 -0400 Received: by mail-qk0-x241.google.com with SMTP id k74so9846031qke.2 for ; Fri, 12 May 2017 16:40:16 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:14 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=74Pvf32q5aNdiQFL+uFXMb1/k7BcTev+69cVO5MKEiE=; b=YPQP9tDC9zcRKtGfaPiDBVLtkyii6a8GQ9gMemBQ6qH+W7sOQyS6d9yE2Okot0YxKs SFzfSvKhq5auuFcoj2npmPG199hW/Nmktcs6Lng2hVvwZJ9E8ILgm+RJEtkWbEeQoHL8 dcxXDJsQ2pJJ0Y+DByh43uarZczs3wCFTmb5DF7beHAHRnyPmG4mB585O4Itdv9jeN3t JJQLxkWLt3wBa8Zyi46bGQXyVNvfE0yhfj+fV0Lr2kl7FL5JmJcCSKUaOUolH3XcHxGY o6Z4AuiV9qZw80YiORnskKhkwUDKI023qU7BXKumJrG0Z7tGkF3HvHuFt44asU4UsQJz X8Cg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=74Pvf32q5aNdiQFL+uFXMb1/k7BcTev+69cVO5MKEiE=; b=oGFFMoiVaGqMutq93LnmgpoTSOiZs2HE1vE36UTPfgOp4BelQVHT1bbvosO07d0m+A tya8hUC5d5zLbqU8obMvYM/IC3GKUXVTI6gnY/TZYSraXmrIG154pDZgNqjmXaJeuqtq dOIQqC6IBWQRzb4rJE9Ts6zafgaKeF/eBND945hoKQBpWRHFkKWJgschu0o9PRN/oWd9 ioqAuEAtRh8Nvknk1dYZpqf7pqt0VkXTfpRUbxwu19LOTME2KekGCcWyHGpiibd9Nws+ OJugJN3d9mieMQK+R5XPvuk+Ff1slsbsSgxM17JBIxU6az3xe3LqIrrZeZqTNfWT7bQs 0QYw== X-Gm-Message-State: AODbwcBehcXfZeSBPOtQVjtH960ZbUFdKNyWaV8upP6WyQub7PVM28pJ ih5wjCRjC4Ak5g== X-Received: by 10.55.209.144 with SMTP id o16mr5690477qkl.188.1494632415592; Fri, 12 May 2017 16:40:15 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:01 -0700 Message-Id: <20170512234009.32557-2-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::241 Subject: [Qemu-devel] [PULL 1/9] target/s390x: Implement STORE FACILITIES LIST EXTENDED X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" At the same time, improve STORE FACILITIES LIST so that we don't hard-code the list for all cpus. Signed-off-by: Richard Henderson --- target/s390x/helper.h | 2 ++ target/s390x/insn-data.def | 2 ++ target/s390x/misc_helper.c | 59 ++++++++++++++++++++++++++++++++++++++++++= ++++ target/s390x/translate.c | 17 ++++++------- 4 files changed, 72 insertions(+), 8 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 9102071..01adb50 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -83,6 +83,8 @@ DEF_HELPER_FLAGS_5(calc_cc, TCG_CALL_NO_RWG_SE, i32, env,= i32, i64, i64, i64) DEF_HELPER_FLAGS_2(sfpc, TCG_CALL_NO_RWG, void, env, i64) DEF_HELPER_FLAGS_2(sfas, TCG_CALL_NO_WG, void, env, i64) DEF_HELPER_FLAGS_1(popcnt, TCG_CALL_NO_RWG_SE, i64, i64) +DEF_HELPER_FLAGS_1(stfl, TCG_CALL_NO_RWG, void, env) +DEF_HELPER_2(stfle, i32, env, i64) =20 #ifndef CONFIG_USER_ONLY DEF_HELPER_3(servc, i32, env, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 075ff59..b6702da 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -747,6 +747,8 @@ C(0xe33e, STRV, RXY_a, Z, la2, r1_32u, new, m1_32, rev32, 0) C(0xe32f, STRVG, RXY_a, Z, la2, r1_o, new, m1_64, rev64, 0) =20 +/* STORE FACILITY LIST EXTENDED */ + C(0xb2b0, STFLE, S, SFLE, 0, a2, 0, 0, stfle, 0) /* STORE FPC */ C(0xb29c, STFPC, S, Z, 0, a2, new, m2_32, efpc, 0) =20 diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index eca8244..bd94242 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -678,3 +678,62 @@ void HELPER(per_ifetch)(CPUS390XState *env, uint64_t a= ddr) } } #endif + +/* The maximum bit defined at the moment is 129. */ +#define MAX_STFL_WORDS 3 + +/* Canonicalize the current cpu's features into the 64-bit words required + by STFLE. Return the index-1 of the max word that is non-zero. */ +static unsigned do_stfle(CPUS390XState *env, uint64_t words[MAX_STFL_WORDS= ]) +{ + S390CPU *cpu =3D s390_env_get_cpu(env); + const unsigned long *features =3D cpu->model->features; + unsigned max_bit =3D 0; + S390Feat feat; + + memset(words, 0, sizeof(uint64_t) * MAX_STFL_WORDS); + + if (test_bit(S390_FEAT_ZARCH, features)) { + /* z/Architecture is always active if around */ + words[0] =3D 1ull << (63 - 2); + } + + for (feat =3D find_first_bit(features, S390_FEAT_MAX); + feat < S390_FEAT_MAX; + feat =3D find_next_bit(features, S390_FEAT_MAX, feat + 1)) { + const S390FeatDef *def =3D s390_feat_def(feat); + if (def->type =3D=3D S390_FEAT_TYPE_STFL) { + unsigned bit =3D def->bit; + if (bit > max_bit) { + max_bit =3D bit; + } + assert(bit / 64 < MAX_STFL_WORDS); + words[bit / 64] |=3D 1ULL << (63 - bit % 64); + } + } + + return max_bit / 64; +} + +void HELPER(stfl)(CPUS390XState *env) +{ + uint64_t words[MAX_STFL_WORDS]; + + do_stfle(env, words); + cpu_stl_data(env, 200, words[0] >> 32); +} + +uint32_t HELPER(stfle)(CPUS390XState *env, uint64_t addr) +{ + uint64_t words[MAX_STFL_WORDS]; + unsigned count_m1 =3D env->regs[0] & 0xff; + unsigned max_m1 =3D do_stfle(env, words); + unsigned i; + + for (i =3D 0; i <=3D count_m1; ++i) { + cpu_stq_data(env, addr + 8 * i, words[i]); + } + + env->regs[0] =3D deposit64(env->regs[0], 0, 8, max_m1); + return (count_m1 >=3D max_m1 ? 0 : 3); +} diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 01c6217..69940e3 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3628,15 +3628,8 @@ static ExitStatus op_spt(DisasContext *s, DisasOps *= o) =20 static ExitStatus op_stfl(DisasContext *s, DisasOps *o) { - TCGv_i64 f, a; - /* We really ought to have more complete indication of facilities - that we implement. Address this when STFLE is implemented. */ check_privileged(s); - f =3D tcg_const_i64(0xc0000000); - a =3D tcg_const_i64(200); - tcg_gen_qemu_st32(f, a, get_mem_index(s)); - tcg_temp_free_i64(f); - tcg_temp_free_i64(a); + gen_helper_stfl(cpu_env); return NO_EXIT; } =20 @@ -3802,6 +3795,14 @@ static ExitStatus op_sturg(DisasContext *s, DisasOps= *o) } #endif =20 +static ExitStatus op_stfle(DisasContext *s, DisasOps *o) +{ + potential_page_fault(s); + gen_helper_stfle(cc_op, cpu_env, o->in2); + set_cc_static(s); + return NO_EXIT; +} + static ExitStatus op_st8(DisasContext *s, DisasOps *o) { tcg_gen_qemu_st8(o->in1, o->in2, get_mem_index(s)); --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494632952895924.1872017272632; Fri, 12 May 2017 16:49:12 -0700 (PDT) Received: from localhost ([::1]:55726 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KJ5-0000AF-40 for importer@patchew.org; Fri, 12 May 2017 19:49:11 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45566) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAV-0001BR-7k for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAT-0003yE-Sd for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:19 -0400 Received: from mail-qk0-x243.google.com ([2607:f8b0:400d:c09::243]:34179) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAT-0003xO-OS for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:17 -0400 Received: by mail-qk0-x243.google.com with SMTP id u75so9817189qka.1 for ; Fri, 12 May 2017 16:40:17 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.15 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=qVQkIxN0sRGkzow83YmpumN2aQib2tJGseOAo4+y2ZQ=; b=fEwDfPpfjusaC3n+4uHVjNa/FNu2h3H9bfbvaGOl2/Cttz3ehVRTwL550/XXEGgT86 I4IEaGN4R49S2IVamE7TqeoztEYUscxfVbjANcH9mnQJRnG9R2wPWfR2+/LFIssti7eT e/X/xj9QusgoVQaaeMhp7SfJgJdnvniClmJIvW7CJVPAbndQwblCHsJIFZEZpefVsnLd 8yBGio68fF0RExaoettE034Zr1u1JdhhHbAD6om0HeZTChZctFvkHZZ5X7HnUVv9W1+s /lCj2B7I14O57drlljUF4tsPbQh5/HoxAspE7wgghVMZSC6+S9ksBm5wwPAGY9vyN4Y6 ptrQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=qVQkIxN0sRGkzow83YmpumN2aQib2tJGseOAo4+y2ZQ=; b=H7gBoQ48WzWcIASTUhaLT6Z3bVmxvEozUcCXO2pPrjPoJz68odGy9u63FDQGNLBeAs 4ayHzCnVNQUB7T/opX/IeIPcLKBFZgdhRzydet0k9NPX3vy+WqkjUC3MbtuKlp1+gm34 D8uZX2zfF+a0svqL1cJZmlJgILIPZf6r0v9FpDDToowZdoxZawjSwOCvUIRor4E6emOU mwkmLcmcEUt5gPN6jpDG2YinfEAydtWRM2sbxTA3I8YWYl3Uu9lzaqeERr9FwewCVshN 8HQ02XjGHRb0tXB+mHFED6JF2aSoAH+H6xYghhhjLu91HiHh/ipG9jvK1C+WJoLyl+1j ddZw== X-Gm-Message-State: AODbwcBMbTbCjLaR9FqfA88zfQ/zXd019vKJzIK9joP/GPGlToyR9lIO FaaDNk+i9ij8Hcf6FI0= X-Received: by 10.55.108.196 with SMTP id h187mr2025464qkc.40.1494632416891; Fri, 12 May 2017 16:40:16 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:02 -0700 Message-Id: <20170512234009.32557-3-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PULL 2/9] target/s390x: Implement LOAD PROGRAM PARAMETER X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Miroslav Benes , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Miroslav Benes Linux arch/s390/kernel/head(64).S uses LPP instruction if it is available in facilities list provided by stfl/stfle instruction. This is the case of newer z/System generations and their qemu definition. The description of LPP is at http://www-01.ibm.com/support/docview.wss?uid=3Disg26fcd1cc32246f4c8852574c= e0044734a Reviewed-by: Aurelien Jarno Signed-off-by: Miroslav Benes Message-Id: <20170227085353.20787-1-mbenes@suse.cz> Signed-off-by: Richard Henderson --- target/s390x/insn-data.def | 2 ++ target/s390x/translate.c | 9 +++++++++ 2 files changed, 11 insertions(+) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index b6702da..43c5707 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -845,6 +845,8 @@ /* LOAD CONTROL */ C(0xb700, LCTL, RS_a, Z, 0, a2, 0, 0, lctl, 0) C(0xeb2f, LCTLG, RSY_a, Z, 0, a2, 0, 0, lctlg, 0) +/* LOAD PROGRAM PARAMETER */ + C(0xb280, LPP, S, LPP, 0, m2_64, 0, 0, lpp, 0) /* LOAD PSW */ C(0x8200, LPSW, S, Z, 0, a2, 0, 0, lpsw, 0) /* LOAD PSW EXTENDED */ diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 69940e3..2b66a4e 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -1194,6 +1194,7 @@ typedef enum DisasFacility { FAC_SCF, /* store clock fast */ FAC_SFLE, /* store facility list extended */ FAC_ILA, /* interlocked access facility 1 */ + FAC_LPP, /* load-program-parameter */ } DisasFacility; =20 struct DisasInsn { @@ -2567,6 +2568,14 @@ static ExitStatus op_lra(DisasContext *s, DisasOps *= o) return NO_EXIT; } =20 +static ExitStatus op_lpp(DisasContext *s, DisasOps *o) +{ + check_privileged(s); + + tcg_gen_st_i64(o->in2, cpu_env, offsetof(CPUS390XState, pp)); + return NO_EXIT; +} + static ExitStatus op_lpsw(DisasContext *s, DisasOps *o) { TCGv_i64 t1, t2; --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494632632380717.7112740612866; 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Fri, 12 May 2017 16:40:18 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:03 -0700 Message-Id: <20170512234009.32557-4-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::243 Subject: [Qemu-devel] [PULL 3/9] target/s390x: Diagnose specification exception for atomics X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" All of the interlocked access facility instructions raise a specification exception for unaligned accesses. Do this by using the (previously unused) unaligned_access hook. Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- target/s390x/cpu.c | 1 + target/s390x/cpu.h | 3 +++ target/s390x/helper.c | 16 ++++++++++++++++ 3 files changed, 20 insertions(+) diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index 066dcd1..a1bf2ba 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -430,6 +430,7 @@ static void s390_cpu_class_init(ObjectClass *oc, void *= data) cc->write_elf64_note =3D s390_cpu_write_elf64_note; cc->cpu_exec_interrupt =3D s390_cpu_exec_interrupt; cc->debug_excp_handler =3D s390x_cpu_debug_excp_handler; + cc->do_unaligned_access =3D s390x_cpu_do_unaligned_access; #endif cc->disas_set_info =3D s390_cpu_disas_set_info; =20 diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index 058ddad..bbed320 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -480,6 +480,9 @@ int s390_cpu_handle_mmu_fault(CPUState *cpu, vaddr addr= ess, int rw, =20 #ifndef CONFIG_USER_ONLY void do_restart_interrupt(CPUS390XState *env); +void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr); =20 static inline hwaddr decode_basedisp_s(CPUS390XState *env, uint32_t ipb, uint8_t *ar) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index 68bd2f9..9978490 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -718,4 +718,20 @@ void s390x_cpu_debug_excp_handler(CPUState *cs) cpu_loop_exit_noexc(cs); } } + +/* Unaligned accesses are only diagnosed with MO_ALIGN. At the moment, + this is only for the atomic operations, for which we want to raise a + specification exception. */ +void s390x_cpu_do_unaligned_access(CPUState *cs, vaddr addr, + MMUAccessType access_type, + int mmu_idx, uintptr_t retaddr) +{ + S390CPU *cpu =3D S390_CPU(cs); + CPUS390XState *env =3D &cpu->env; + + if (retaddr) { + cpu_restore_state(cs, retaddr); + } + program_interrupt(env, PGM_SPECIFICATION, ILEN_LATER); +} #endif /* CONFIG_USER_ONLY */ --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494632748819755.9027850405873; Fri, 12 May 2017 16:45:48 -0700 (PDT) Received: from localhost ([::1]:55711 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KFn-00064Y-IG for importer@patchew.org; Fri, 12 May 2017 19:45:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45621) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAX-0001Em-DO for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:22 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAW-000429-9v for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:21 -0400 Received: from mail-qk0-x241.google.com ([2607:f8b0:400d:c09::241]:36697) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAW-00041I-6L for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:20 -0400 Received: by mail-qk0-x241.google.com with SMTP id y128so9824539qka.3 for ; Fri, 12 May 2017 16:40:20 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.18 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:18 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=FetVDBL2kCMh5gCMiBA8wV0QsE1eF71QfEVOHyx4lsA=; b=jisoWmvkfwezLqo93lqfaiaYLP3Py8rPh9HQwFudjw3WXUaDcsj4zI6bk0uMh/rwJC cJCOgBo//CqOFfpiQh950A82IjfR0rahXUsn5M8QpQ4BDyWtcM2urTBfYDQ977ujfaP4 zn0uuP13d7xu9NOaBLt8Dnqc/vWdsi1MlUGptcgU0gCCXsyHa/PCFrIQVWJ4LePgmNFz RZB04DtIun9YJZrd4HN6mxj065La56hRQ/orx7uxqAF9KeAqQE9S+BbKY+HgvlJK8/k8 jRKZsk6mvzpWj6gAZsPHMXJIjR4SxOEmjTWMJNX4nDOPvfkpgi+1Ry9SaGqTM+RVmLHE p+pw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=FetVDBL2kCMh5gCMiBA8wV0QsE1eF71QfEVOHyx4lsA=; b=ba39f5hUBAEqRoxRlCg795fnwJl3ipACZStpanam8fICJjijGDeKCLus4zQm3M/bWM HrFP7Ori8ki5sGgSUUtrKWIovj0sBeEBLKIZFXdeR5nW1NoM+pAPd/Na3JOVCCqPDzFF 6aGSf7cin6HUo+0zBq83VcBhwZHJbJ8nyZ6FpI66u7jwOkM59W4Nrv0Uhm9EfKoiwdif onyE7FQkK8imSRDcZ15O5zw7MEU/najGtm4SI5u1ZGuKJaPK/bFoGDt+0jZHe7RAQGVx dh8e05fUG4HdU7Mt5Fle5mUrEdjf77TUKZR1jLxQ9wbopCOQrI4tQE2Znnyon5cWNEFa YbFQ== X-Gm-Message-State: AODbwcDT8b31XLKOisOolp8XYHuuniDD6Dj01uZqu3pqadj+AanE90An t9EJV3wvh4WSWg== X-Received: by 10.55.119.2 with SMTP id s2mr5844295qkc.219.1494632419676; Fri, 12 May 2017 16:40:19 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:04 -0700 Message-Id: <20170512234009.32557-5-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::241 Subject: [Qemu-devel] [PULL 4/9] target/s390x: Implement LOAD PAIR DISJOINT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Eric Bischoff , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Eric Bischoff Reviewed-by: Aurelien Jarno Signed-off-by: Eric Bischoff Message-Id: <20170228120134.7921-1-ebischoff@suse.com> [rth: Combine the two via insn->data; free the address temps.] Signed-off-by: Richard Henderson --- target/s390x/insn-data.def | 4 +++- target/s390x/translate.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 2 files changed, 45 insertions(+), 1 deletion(-) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 43c5707..0909060 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -504,7 +504,9 @@ C(0xb9e2, LOCGR, RRF_c, LOC, r1, r2, r1, 0, loc, 0) C(0xebf2, LOC, RSY_b, LOC, r1, m2_32u, new, r1_32, loc, 0) C(0xebe2, LOCG, RSY_b, LOC, r1, m2_64, r1, 0, loc, 0) -/* LOAD PAIR DISJOINT TODO */ +/* LOAD PAIR DISJOINT */ + D(0xc804, LPD, SSF, ILA, 0, 0, new_P, r3_P32, lpd, 0, MO_TEUL) + D(0xc805, LPDG, SSF, ILA, 0, 0, new_P, r3_P64, lpd, 0, MO_TEQ) /* LOAD POSITIVE */ C(0x1000, LPR, RR_a, Z, 0, r2_32s, new, r1_32, abs, abs32) C(0xb900, LPGR, RRE, Z, 0, r2, r1, 0, abs, abs64) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 2b66a4e..522a5e3 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2559,6 +2559,7 @@ static ExitStatus op_lctlg(DisasContext *s, DisasOps = *o) tcg_temp_free_i32(r3); return NO_EXIT; } + static ExitStatus op_lra(DisasContext *s, DisasOps *o) { check_privileged(s); @@ -2759,6 +2760,31 @@ static ExitStatus op_lm64(DisasContext *s, DisasOps = *o) return NO_EXIT; } =20 +static ExitStatus op_lpd(DisasContext *s, DisasOps *o) +{ + TCGv_i64 a1, a2; + TCGMemOp mop =3D s->insn->data; + + /* In a parallel context, stop the world and single step. */ + if (parallel_cpus) { + potential_page_fault(s); + gen_exception(EXCP_ATOMIC); + return EXIT_NORETURN; + } + + /* In a serial context, perform the two loads ... */ + a1 =3D get_address(s, 0, get_field(s->fields, b1), get_field(s->fields= , d1)); + a2 =3D get_address(s, 0, get_field(s->fields, b2), get_field(s->fields= , d2)); + tcg_gen_qemu_ld_i64(o->out, a1, get_mem_index(s), mop | MO_ALIGN); + tcg_gen_qemu_ld_i64(o->out2, a2, get_mem_index(s), mop | MO_ALIGN); + tcg_temp_free_i64(a1); + tcg_temp_free_i64(a2); + + /* ... and indicate that we performed them while interlocked. */ + gen_op_movi_cc(s, 0); + return NO_EXIT; +} + #ifndef CONFIG_USER_ONLY static ExitStatus op_lura(DisasContext *s, DisasOps *o) { @@ -4430,6 +4456,22 @@ static void wout_r1_D32(DisasContext *s, DisasFields= *f, DisasOps *o) } #define SPEC_wout_r1_D32 SPEC_r1_even =20 +static void wout_r3_P32(DisasContext *s, DisasFields *f, DisasOps *o) +{ + int r3 =3D get_field(f, r3); + store_reg32_i64(r3, o->out); + store_reg32_i64(r3 + 1, o->out2); +} +#define SPEC_wout_r3_P32 SPEC_r3_even + +static void wout_r3_P64(DisasContext *s, DisasFields *f, DisasOps *o) +{ + int r3 =3D get_field(f, r3); + store_reg(r3, o->out); + store_reg(r3 + 1, o->out2); +} +#define SPEC_wout_r3_P64 SPEC_r3_even + static void wout_e1(DisasContext *s, DisasFields *f, DisasOps *o) { store_freg32_i64(get_field(f, r1), o->out); --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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X-Received-From: 2607:f8b0:400d:c09::241 Subject: [Qemu-devel] [PULL 5/9] target/s390x: Use atomic operations for COMPARE SWAP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- target/s390x/helper.h | 1 + target/s390x/insn-data.def | 10 +++--- target/s390x/mem_helper.c | 40 ++++++++++++++++++++++ target/s390x/translate.c | 83 ++++++++----------------------------------= ---- 4 files changed, 60 insertions(+), 74 deletions(-) diff --git a/target/s390x/helper.h b/target/s390x/helper.h index 01adb50..0b70770 100644 --- a/target/s390x/helper.h +++ b/target/s390x/helper.h @@ -25,6 +25,7 @@ DEF_HELPER_3(cxgb, i64, env, s64, i32) DEF_HELPER_3(celgb, i64, env, i64, i32) DEF_HELPER_3(cdlgb, i64, env, i64, i32) DEF_HELPER_3(cxlgb, i64, env, i64, i32) +DEF_HELPER_4(cdsg, void, env, i64, i32, i32) DEF_HELPER_FLAGS_3(aeb, TCG_CALL_NO_WG, i64, env, i64, i64) DEF_HELPER_FLAGS_3(adb, TCG_CALL_NO_WG, i64, env, i64, i64) DEF_HELPER_FLAGS_5(axb, TCG_CALL_NO_WG, i64, env, i64, i64, i64, i64) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 0909060..5e5fcc5 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -239,12 +239,12 @@ D(0xec7d, CLGIJ, RIE_c, GIE, r1_o, i2_8u, 0, 0, cj, 0, 1) =20 /* COMPARE AND SWAP */ - D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, 0) - D(0xeb14, CSY, RSY_a, LD, r3_32u, r1_32u, new, r1_32, cs, 0, 0) - D(0xeb30, CSG, RSY_a, Z, r3_o, r1_o, new, r1, cs, 0, 1) + D(0xba00, CS, RS_a, Z, r3_32u, r1_32u, new, r1_32, cs, 0, MO_T= EUL) + D(0xeb14, CSY, RSY_a, LD, r3_32u, r1_32u, new, r1_32, cs, 0, MO_T= EUL) + D(0xeb30, CSG, RSY_a, Z, r3_o, r1_o, new, r1, cs, 0, MO_TEQ) /* COMPARE DOUBLE AND SWAP */ - D(0xbb00, CDS, RS_a, Z, r3_D32, r1_D32, new, r1_D32, cs, 0, 1) - D(0xeb31, CDSY, RSY_a, LD, r3_D32, r1_D32, new, r1_D32, cs, 0, 1) + D(0xbb00, CDS, RS_a, Z, r3_D32, r1_D32, new, r1_D32, cs, 0, MO_= TEQ) + D(0xeb31, CDSY, RSY_a, LD, r3_D32, r1_D32, new, r1_D32, cs, 0, MO_= TEQ) C(0xeb3e, CDSG, RSY_a, Z, 0, 0, 0, 0, cdsg, 0) =20 /* COMPARE AND TRAP */ diff --git a/target/s390x/mem_helper.c b/target/s390x/mem_helper.c index 675aba2..f6e5bce 100644 --- a/target/s390x/mem_helper.c +++ b/target/s390x/mem_helper.c @@ -23,6 +23,7 @@ #include "exec/helper-proto.h" #include "exec/exec-all.h" #include "exec/cpu_ldst.h" +#include "qemu/int128.h" =20 #if !defined(CONFIG_USER_ONLY) #include "hw/s390x/storage-keys.h" @@ -844,6 +845,45 @@ uint32_t HELPER(trt)(CPUS390XState *env, uint32_t len,= uint64_t array, return cc; } =20 +void HELPER(cdsg)(CPUS390XState *env, uint64_t addr, + uint32_t r1, uint32_t r3) +{ + uintptr_t ra =3D GETPC(); + Int128 cmpv =3D int128_make128(env->regs[r1 + 1], env->regs[r1]); + Int128 newv =3D int128_make128(env->regs[r3 + 1], env->regs[r3]); + Int128 oldv; + bool fail; + + if (parallel_cpus) { +#ifndef CONFIG_ATOMIC128 + cpu_loop_exit_atomic(ENV_GET_CPU(env), ra); +#else + int mem_idx =3D cpu_mmu_index(env, false); + TCGMemOpIdx oi =3D make_memop_idx(MO_TEQ | MO_ALIGN_16, mem_idx); + oldv =3D helper_atomic_cmpxchgo_be_mmu(env, addr, cmpv, newv, oi, = ra); + fail =3D !int128_eq(oldv, cmpv); +#endif + } else { + uint64_t oldh, oldl; + + oldh =3D cpu_ldq_data_ra(env, addr + 0, ra); + oldl =3D cpu_ldq_data_ra(env, addr + 8, ra); + + oldv =3D int128_make128(oldl, oldh); + fail =3D !int128_eq(oldv, cmpv); + if (fail) { + newv =3D oldv; + } + + cpu_stq_data_ra(env, addr + 0, int128_gethi(newv), ra); + cpu_stq_data_ra(env, addr + 8, int128_getlo(newv), ra); + } + + env->cc_op =3D fail; + env->regs[r1] =3D int128_gethi(oldv); + env->regs[r1 + 1] =3D int128_getlo(oldv); +} + #if !defined(CONFIG_USER_ONLY) void HELPER(lctlg)(CPUS390XState *env, uint32_t r1, uint64_t a2, uint32_t = r3) { diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 522a5e3..f23b705 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -1943,102 +1943,47 @@ static ExitStatus op_cps(DisasContext *s, DisasOps= *o) =20 static ExitStatus op_cs(DisasContext *s, DisasOps *o) { - /* FIXME: needs an atomic solution for CONFIG_USER_ONLY. */ int d2 =3D get_field(s->fields, d2); int b2 =3D get_field(s->fields, b2); - int is_64 =3D s->insn->data; - TCGv_i64 addr, mem, cc, z; + TCGv_i64 addr, cc; =20 /* Note that in1 =3D R3 (new value) and in2 =3D (zero-extended) R1 (expected value). */ =20 - /* Load the memory into the (temporary) output. While the PoO only ta= lks - about moving the memory to R1 on inequality, if we include equality= it - means that R1 is equal to the memory in all conditions. */ addr =3D get_address(s, 0, b2, d2); - if (is_64) { - tcg_gen_qemu_ld64(o->out, addr, get_mem_index(s)); - } else { - tcg_gen_qemu_ld32u(o->out, addr, get_mem_index(s)); - } + tcg_gen_atomic_cmpxchg_i64(o->out, addr, o->in2, o->in1, + get_mem_index(s), s->insn->data | MO_ALIGN); + tcg_temp_free_i64(addr); =20 /* Are the memory and expected values (un)equal? Note that this setco= nd produces the output CC value, thus the NE sense of the test. */ cc =3D tcg_temp_new_i64(); tcg_gen_setcond_i64(TCG_COND_NE, cc, o->in2, o->out); - - /* If the memory and expected values are equal (CC=3D=3D0), copy R3 to= MEM. - Recall that we are allowed to unconditionally issue the store (and - thus any possible write trap), so (re-)store the original contents - of MEM in case of inequality. */ - z =3D tcg_const_i64(0); - mem =3D tcg_temp_new_i64(); - tcg_gen_movcond_i64(TCG_COND_EQ, mem, cc, z, o->in1, o->out); - if (is_64) { - tcg_gen_qemu_st64(mem, addr, get_mem_index(s)); - } else { - tcg_gen_qemu_st32(mem, addr, get_mem_index(s)); - } - tcg_temp_free_i64(z); - tcg_temp_free_i64(mem); - tcg_temp_free_i64(addr); - - /* Store CC back to cc_op. Wait until after the store so that any - exception gets the old cc_op value. */ tcg_gen_extrl_i64_i32(cc_op, cc); tcg_temp_free_i64(cc); set_cc_static(s); + return NO_EXIT; } =20 static ExitStatus op_cdsg(DisasContext *s, DisasOps *o) { - /* FIXME: needs an atomic solution for CONFIG_USER_ONLY. */ int r1 =3D get_field(s->fields, r1); int r3 =3D get_field(s->fields, r3); int d2 =3D get_field(s->fields, d2); int b2 =3D get_field(s->fields, b2); - TCGv_i64 addrh, addrl, memh, meml, outh, outl, cc, z; + TCGv_i64 addr; + TCGv_i32 t_r1, t_r3; =20 /* Note that R1:R1+1 =3D expected value and R3:R3+1 =3D new value. */ + addr =3D get_address(s, 0, b2, d2); + t_r1 =3D tcg_const_i32(r1); + t_r3 =3D tcg_const_i32(r3); + gen_helper_cdsg(cpu_env, addr, t_r1, t_r3); + tcg_temp_free_i64(addr); + tcg_temp_free_i32(t_r1); + tcg_temp_free_i32(t_r3); =20 - addrh =3D get_address(s, 0, b2, d2); - addrl =3D get_address(s, 0, b2, d2 + 8); - outh =3D tcg_temp_new_i64(); - outl =3D tcg_temp_new_i64(); - - tcg_gen_qemu_ld64(outh, addrh, get_mem_index(s)); - tcg_gen_qemu_ld64(outl, addrl, get_mem_index(s)); - - /* Fold the double-word compare with arithmetic. */ - cc =3D tcg_temp_new_i64(); - z =3D tcg_temp_new_i64(); - tcg_gen_xor_i64(cc, outh, regs[r1]); - tcg_gen_xor_i64(z, outl, regs[r1 + 1]); - tcg_gen_or_i64(cc, cc, z); - tcg_gen_movi_i64(z, 0); - tcg_gen_setcond_i64(TCG_COND_NE, cc, cc, z); - - memh =3D tcg_temp_new_i64(); - meml =3D tcg_temp_new_i64(); - tcg_gen_movcond_i64(TCG_COND_EQ, memh, cc, z, regs[r3], outh); - tcg_gen_movcond_i64(TCG_COND_EQ, meml, cc, z, regs[r3 + 1], outl); - tcg_temp_free_i64(z); - - tcg_gen_qemu_st64(memh, addrh, get_mem_index(s)); - tcg_gen_qemu_st64(meml, addrl, get_mem_index(s)); - tcg_temp_free_i64(memh); - tcg_temp_free_i64(meml); - tcg_temp_free_i64(addrh); - tcg_temp_free_i64(addrl); - - /* Save back state now that we've passed all exceptions. */ - tcg_gen_mov_i64(regs[r1], outh); - tcg_gen_mov_i64(regs[r1 + 1], outl); - tcg_gen_extrl_i64_i32(cc_op, cc); - tcg_temp_free_i64(outh); - tcg_temp_free_i64(outl); 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Fri, 12 May 2017 16:40:22 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:06 -0700 Message-Id: <20170512234009.32557-7-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::242 Subject: [Qemu-devel] [PULL 6/9] target/s390x: Use atomic operations for LOAD AND OP X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Reviewed-by: Aurelien Jarno Signed-off-by: Richard Henderson --- target/s390x/insn-data.def | 20 ++++++------ target/s390x/translate.c | 78 +++++++++++++++++++++++++++++-------------= ---- 2 files changed, 60 insertions(+), 38 deletions(-) diff --git a/target/s390x/insn-data.def b/target/s390x/insn-data.def index 5e5fcc5..55a7c52 100644 --- a/target/s390x/insn-data.def +++ b/target/s390x/insn-data.def @@ -390,20 +390,20 @@ /* LOAD ADDRESS RELATIVE LONG */ C(0xc000, LARL, RIL_b, Z, 0, ri2, 0, r1, mov2, 0) /* LOAD AND ADD */ - C(0xebf8, LAA, RSY_a, ILA, r3_32s, m2_32s_atomic, new, m2_32_r1_at= omic, add, adds32) - C(0xebe8, LAAG, RSY_a, ILA, r3, m2_64_atomic, new, m2_64_r1_atomic,= add, adds64) + D(0xebf8, LAA, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, laa, adds32= , MO_TESL) + D(0xebe8, LAAG, RSY_a, ILA, r3, a2, new, in2_r1, laa, adds64, MO_TE= Q) /* LOAD AND ADD LOGICAL */ - C(0xebfa, LAAL, RSY_a, ILA, r3_32s, m2_32s_atomic, new, m2_32_r1_at= omic, add, addu32) - C(0xebea, LAALG, RSY_a, ILA, r3, m2_64_atomic, new, m2_64_r1_atomic,= add, addu64) + D(0xebfa, LAAL, RSY_a, ILA, r3_32u, a2, new, in2_r1_32, laa, addu32= , MO_TEUL) + D(0xebea, LAALG, RSY_a, ILA, r3, a2, new, in2_r1, laa, addu64, MO_TE= Q) /* LOAD AND AND */ - C(0xebf4, LAN, RSY_a, ILA, r3_32s, m2_32s_atomic, new, m2_32_r1_at= omic, and, nz32) - C(0xebe4, LANG, RSY_a, ILA, r3, m2_64_atomic, new, m2_64_r1_atomic,= and, nz64) + D(0xebf4, LAN, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, lan, nz32, = MO_TESL) + D(0xebe4, LANG, RSY_a, ILA, r3, a2, new, in2_r1, lan, nz64, MO_TEQ) /* LOAD AND EXCLUSIVE OR */ - C(0xebf7, LAX, RSY_a, ILA, r3_32s, m2_32s_atomic, new, m2_32_r1_at= omic, xor, nz32) - C(0xebe7, LAXG, RSY_a, ILA, r3, m2_64_atomic, new, m2_64_r1_atomic,= xor, nz64) + D(0xebf7, LAX, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, lax, nz32, = MO_TESL) + D(0xebe7, LAXG, RSY_a, ILA, r3, a2, new, in2_r1, lax, nz64, MO_TEQ) /* LOAD AND OR */ - C(0xebf6, LAO, RSY_a, ILA, r3_32s, m2_32s_atomic, new, m2_32_r1_at= omic, or, nz32) - C(0xebe6, LAOG, RSY_a, ILA, r3, m2_64_atomic, new, m2_64_r1_atomic,= or, nz64) + D(0xebf6, LAO, RSY_a, ILA, r3_32s, a2, new, in2_r1_32, lao, nz32, = MO_TESL) + D(0xebe6, LAOG, RSY_a, ILA, r3, a2, new, in2_r1, lao, nz64, MO_TEQ) /* LOAD AND TEST */ C(0x1200, LTR, RR_a, Z, 0, r2_o, 0, cond_r1r2_32, mov2, s32) C(0xb902, LTGR, RRE, Z, 0, r2_o, 0, r1, mov2, s64) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index f23b705..19276cc 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -2309,6 +2309,50 @@ static ExitStatus op_iske(DisasContext *s, DisasOps = *o) } #endif =20 +static ExitStatus op_laa(DisasContext *s, DisasOps *o) +{ + /* The real output is indeed the original value in memory; + recompute the addition for the computation of CC. */ + tcg_gen_atomic_fetch_add_i64(o->in2, o->in2, o->in1, get_mem_index(s), + s->insn->data | MO_ALIGN); + /* However, we need to recompute the addition for setting CC. */ + tcg_gen_add_i64(o->out, o->in1, o->in2); + return NO_EXIT; +} + +static ExitStatus op_lan(DisasContext *s, DisasOps *o) +{ + /* The real output is indeed the original value in memory; + recompute the addition for the computation of CC. */ + tcg_gen_atomic_fetch_and_i64(o->in2, o->in2, o->in1, get_mem_index(s), + s->insn->data | MO_ALIGN); + /* However, we need to recompute the operation for setting CC. */ + tcg_gen_and_i64(o->out, o->in1, o->in2); + return NO_EXIT; +} + +static ExitStatus op_lao(DisasContext *s, DisasOps *o) +{ + /* The real output is indeed the original value in memory; + recompute the addition for the computation of CC. */ + tcg_gen_atomic_fetch_or_i64(o->in2, o->in2, o->in1, get_mem_index(s), + s->insn->data | MO_ALIGN); + /* However, we need to recompute the operation for setting CC. */ + tcg_gen_or_i64(o->out, o->in1, o->in2); + return NO_EXIT; +} + +static ExitStatus op_lax(DisasContext *s, DisasOps *o) +{ + /* The real output is indeed the original value in memory; + recompute the addition for the computation of CC. */ + tcg_gen_atomic_fetch_xor_i64(o->in2, o->in2, o->in1, get_mem_index(s), + s->insn->data | MO_ALIGN); + /* However, we need to recompute the operation for setting CC. */ + tcg_gen_xor_i64(o->out, o->in1, o->in2); + return NO_EXIT; +} + static ExitStatus op_ldeb(DisasContext *s, DisasOps *o) { gen_helper_ldeb(o->out, cpu_env, o->in2); @@ -4483,21 +4527,17 @@ static void wout_m2_32(DisasContext *s, DisasFields= *f, DisasOps *o) } #define SPEC_wout_m2_32 0 =20 -static void wout_m2_32_r1_atomic(DisasContext *s, DisasFields *f, DisasOps= *o) +static void wout_in2_r1(DisasContext *s, DisasFields *f, DisasOps *o) { - /* XXX release reservation */ - tcg_gen_qemu_st32(o->out, o->addr1, get_mem_index(s)); - store_reg32_i64(get_field(f, r1), o->in2); + store_reg(get_field(f, r1), o->in2); } -#define SPEC_wout_m2_32_r1_atomic 0 +#define SPEC_wout_in2_r1 0 =20 -static void wout_m2_64_r1_atomic(DisasContext *s, DisasFields *f, DisasOps= *o) +static void wout_in2_r1_32(DisasContext *s, DisasFields *f, DisasOps *o) { - /* XXX release reservation */ - tcg_gen_qemu_st64(o->out, o->addr1, get_mem_index(s)); - store_reg(get_field(f, r1), o->in2); + store_reg32_i64(get_field(f, r1), o->in2); } -#define SPEC_wout_m2_64_r1_atomic 0 +#define SPEC_wout_in2_r1_32 0 =20 /* =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D= =3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D=3D */ /* The "INput 1" generators. These load the first operand to an insn. */ @@ -4941,24 +4981,6 @@ static void in2_mri2_64(DisasContext *s, DisasFields= *f, DisasOps *o) } #define SPEC_in2_mri2_64 0 =20 -static void in2_m2_32s_atomic(DisasContext *s, DisasFields *f, DisasOps *o) -{ - /* XXX should reserve the address */ - in1_la2(s, f, o); - o->in2 =3D tcg_temp_new_i64(); - tcg_gen_qemu_ld32s(o->in2, o->addr1, get_mem_index(s)); -} -#define SPEC_in2_m2_32s_atomic 0 - -static void in2_m2_64_atomic(DisasContext *s, DisasFields *f, DisasOps *o) -{ - /* XXX should reserve the address */ - in1_la2(s, f, o); - o->in2 =3D tcg_temp_new_i64(); - tcg_gen_qemu_ld64(o->in2, o->addr1, get_mem_index(s)); -} -#define SPEC_in2_m2_64_atomic 0 - static void in2_i2(DisasContext *s, DisasFields *f, DisasOps *o) { o->in2 =3D tcg_const_i64(get_field(f, i2)); --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494632978808213.2511979936029; Fri, 12 May 2017 16:49:38 -0700 (PDT) Received: from localhost ([::1]:55728 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KJV-0000Wz-HW for importer@patchew.org; Fri, 12 May 2017 19:49:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45683) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAb-0001IK-68 for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAa-00047X-4n for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:25 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:36694) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAa-00047E-07 for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:24 -0400 Received: by mail-qt0-x243.google.com with SMTP id j13so8690782qta.3 for ; Fri, 12 May 2017 16:40:23 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.22 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:22 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references :mime-version:content-transfer-encoding; bh=sBlDVLVppMWuZZxcgc3BxAhJoss1w49H2tpxDO/51Kg=; b=mAB8VawoR+gMnehFve5kbWTGk9/IH0hOlMsjMlz2imZJ5Nouxl6/wZwFu4GVv8q6D8 JZ/tRfzK5rmHMOaGgcBcYKLYrrM7o9H/sZlC7BTfXh8FI+03axQ5Bg6QA8+4IJUBgLsN y+OYdE2xs1sGfnYDPi7tFu73di1YCyEBti4qQZTO6095MWPttCGgjo6DaLidXpcdEC1s AMdKgnTQ2OlT6mPOeyuQodLeinV17ISlMqWfwL9GHB/qjbmyMplISZLiw3JwDn3T1v0X zMIN2e2YV0P0S+izjz2u26qlmFKXWQySUmYBh8yg6fgNKA8VsYnMRnlVBUWcVibWpQvN 2RJw== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references:mime-version:content-transfer-encoding; bh=sBlDVLVppMWuZZxcgc3BxAhJoss1w49H2tpxDO/51Kg=; b=frqXWHjQBfUR/0Pen0hYsGVSsblyqv9OXu/YUAS2fyWi9qKFn/9jKFYPtrfczB8chj Ym6sXhgummPRC7tepaFRNLHJCYGgwwWjbwJd0Ns2C3+6TildbTtNiihpHvxysFZeTEFa G0sLmv6fkmPT+RUAc1yZkdJMGV5LTXCPYdO4hEPw0viyOeBa0+pICTMYbd4+xu/EJO2z d2Kcl7B8aWohy/130s4s4wLcVzSBk5sj/qgPy7kpyd9iNByUz3ZmkWlN3FNyUl1+2p1R fJeY0KsLxyFIM6hmN1J3aScfypHvjjywWtlED/OBI/qVK0eMZ9RLJpOqO5JIfNbyBK2/ QsbA== X-Gm-Message-State: AODbwcCPXrmiXryBMVuFGjkaLR0H3zL8fqLB23X40say01/5RiT4DdR8 MvuKkvsxiE6PvA== X-Received: by 10.237.37.209 with SMTP id y17mr6870188qtc.140.1494632423457; Fri, 12 May 2017 16:40:23 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:07 -0700 Message-Id: <20170512234009.32557-8-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PULL 7/9] target/s390x: mask the SIGP order_code using SIGP_ORDER_MASK X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 From: Aurelien Jarno For that move the definition from kvm.c to cpu.h Reviewed-by: Thomas Huth Reviewed-by: Cornelia Huck Reviewed-by: Philippe Mathieu-Daud=C3=A9 Signed-off-by: Aurelien Jarno Message-Id: <20170509082800.10756-2-aurelien@aurel32.net> Signed-off-by: Richard Henderson --- target/s390x/cpu.h | 3 +++ target/s390x/kvm.c | 2 -- target/s390x/misc_helper.c | 3 +-- 3 files changed, 4 insertions(+), 4 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index bbed320..240b8a5 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -1078,6 +1078,9 @@ struct sysib_322 { #define SIGP_MODE_Z_ARCH_TRANS_ALL_PSW 1 #define SIGP_MODE_Z_ARCH_TRANS_CUR_PSW 2 =20 +/* SIGP order code mask corresponding to bit positions 56-63 */ +#define SIGP_ORDER_MASK 0x000000ff + void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr); int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t= asc, target_ulong *raddr, int *flags, bool exc); diff --git a/target/s390x/kvm.c b/target/s390x/kvm.c index 1a249d8..fb10542 100644 --- a/target/s390x/kvm.c +++ b/target/s390x/kvm.c @@ -1764,8 +1764,6 @@ static int sigp_set_architecture(S390CPU *cpu, uint32= _t param, return SIGP_CC_ORDER_CODE_ACCEPTED; } =20 -#define SIGP_ORDER_MASK 0x000000ff - static int handle_sigp(S390CPU *cpu, struct kvm_run *run, uint8_t ipa1) { CPUS390XState *env =3D &cpu->env; diff --git a/target/s390x/misc_helper.c b/target/s390x/misc_helper.c index bd94242..23ec52c 100644 --- a/target/s390x/misc_helper.c +++ b/target/s390x/misc_helper.c @@ -517,8 +517,7 @@ uint32_t HELPER(sigp)(CPUS390XState *env, uint64_t orde= r_code, uint32_t r1, /* Remember: Use "R1 or R1 + 1, whichever is the odd-numbered register" as parameter (input). Status (output) is always R1. */ =20 - /* sigp contains the order code in bit positions 56-63, mask it here. = */ - switch (order_code & 0xff) { + switch (order_code & SIGP_ORDER_MASK) { case SIGP_SET_ARCH: /* switch arch */ break; --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149463318771350.72140830943192; Fri, 12 May 2017 16:53:07 -0700 (PDT) Received: from localhost ([::1]:55746 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KMs-0003U0-HP for importer@patchew.org; Fri, 12 May 2017 19:53:06 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45710) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAc-0001Jf-Il for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:27 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAb-00049C-Nh for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:26 -0400 Received: from mail-qt0-x243.google.com ([2607:f8b0:400d:c0d::243]:33613) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAb-000493-Jw for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:25 -0400 Received: by mail-qt0-x243.google.com with SMTP id a46so8699876qte.0 for ; Fri, 12 May 2017 16:40:25 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.23 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:24 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=Tp+wq3Q9L1AawAcI8aPSKjYe30QqeiEsBStiDVzW7E0=; b=rJ5NKn3qnqCxzQ+XOUG6oUV21jT2Yb3XH+zla4HEmDnMf204d8u9tKQvhl4exDlSrl wvvv/6AQFFOeuYVrsB/QebVJrrv/GTC8JCBLTKcZI/L9f4uf2BCXWEy3KoAQkl1ppUPG hTaucJiw1/n1iEFTilrinoqNx7Ysh92D6qEDhSU9VHq38iETmWfj7H6SE8ka1o9EK9NT w62uEUhjEAFv3c+vVWP91cIvyqb8s46rQfU3s86oxDQFMnVRp+hQ9WMZIO9pk4F7C8y2 APnstPXYegNOOk2YHR6CtJIZpfWJzqmPWbYxy54sr0eDG0RrJupES11yLtRtP4pTTWGC wWyA== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=Tp+wq3Q9L1AawAcI8aPSKjYe30QqeiEsBStiDVzW7E0=; b=V2LuI8si6PMYsUJ+6E0AAcMV38RcuSWgzQ9CuR05/ARmNVoi26a0aEpec3XLVJ6nvl +IZWW5gTtuiXcIgbliePID2dulxPbOqjfocotdbfHcOisGZBH5eUfUDvsUziiKp5UYxp WvpOLmiPA2GwhUlxfJJVgtTeAoYG6jBIv3Y4/nuYYJfCoj8dVKndKaPKaBHiGQiDLT/3 hqhOESzdnQd3NlxDGOARM7vg2BMTazJFNw1GUIlW+ghGC/YAXdy12sT6HHbpVkHyK3Qs 6Rh2FBgCOCCQq0gPM01DyUEDnwrcbcIT8R8V3miOyzmzSAFrBHvnsUS6t3ALbCNYdV7/ 8tFw== X-Gm-Message-State: AODbwcCw4NwHBX9Ql26h7Jlc1K7OzIabfa8m6YerKaAD66EJW9PUp77h b20ahLJ0E/D1e34wsrY= X-Received: by 10.200.48.196 with SMTP id w4mr6160877qta.226.1494632424936; Fri, 12 May 2017 16:40:24 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:08 -0700 Message-Id: <20170512234009.32557-9-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c0d::243 Subject: [Qemu-devel] [PULL 8/9] target/s390x: fix SIGNAL PROCESSOR return value X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aurelien Jarno The SIGNAL PROCESSOR helper returns its value through the CC register. set_cc_static should be called just after the helper. Signed-off-by: Aurelien Jarno Message-Id: <20170509082800.10756-3-aurelien@aurel32.net> Signed-off-by: Richard Henderson --- target/s390x/translate.c | 1 + 1 file changed, 1 insertion(+) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 19276cc..3a0a3ee 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -3406,6 +3406,7 @@ static ExitStatus op_sigp(DisasContext *s, DisasOps *= o) check_privileged(s); potential_page_fault(s); gen_helper_sigp(cc_op, cpu_env, o->in2, r1, o->in1); + set_cc_static(s); tcg_temp_free_i32(r1); return NO_EXIT; } --=20 2.9.3 From nobody Tue Apr 30 05:48:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; dkim=fail spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494633097645447.1891729928054; Fri, 12 May 2017 16:51:37 -0700 (PDT) Received: from localhost ([::1]:55741 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KLQ-0002AZ-D8 for importer@patchew.org; Fri, 12 May 2017 19:51:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:45734) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d9KAd-0001Kw-K5 for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d9KAc-0004BL-Tp for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:27 -0400 Received: from mail-qk0-x244.google.com ([2607:f8b0:400d:c09::244]:34928) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1d9KAc-0004AE-Qo for qemu-devel@nongnu.org; Fri, 12 May 2017 19:40:26 -0400 Received: by mail-qk0-x244.google.com with SMTP id k74so9846470qke.2 for ; Fri, 12 May 2017 16:40:26 -0700 (PDT) Received: from bigtime.twiddle.net.com ([2602:47:d954:1500:5e51:4fff:fe40:9c64]) by smtp.gmail.com with ESMTPSA id z65sm3367460qkz.29.2017.05.12.16.40.25 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 12 May 2017 16:40:25 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=sender:from:to:cc:subject:date:message-id:in-reply-to:references; bh=NxdctVyPY/KqfObTtvzwDgva8OuL9qLzmr5PIk9y/TA=; b=et33vdbZuHQcJsHTr7Tk8NIEZBJWdsCaIWYXCNjGttTtj3Bp9iSApeGZX3eF/1GAP9 AaUPzjspDeBxy7sL60oTuGxNn5RTXR9XeJ+CYhlMd9xun+fnJanxrYmdlyw1GewSqXRB ZEjT0m9mIO/orxpdBd5PF3plM4pU/geVWXxv6Pi++RUA0LVPPu5JcR7w/l2tJPcgf49B hlCFBO0Mus9w4E8YwGyJHIMWeLRARhZ2+ENBWIpahOj/Co7mU2QQ6yBeCE5SLXEbyCjR 7zoF0eR93jV4W+DdzNfhsdPpxI3iqOx5NH3X3bB2Ouk5DKltC9mrqAn7DcUPSCPNTYcD k29A== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:sender:from:to:cc:subject:date:message-id :in-reply-to:references; bh=NxdctVyPY/KqfObTtvzwDgva8OuL9qLzmr5PIk9y/TA=; b=eTC2hqcKenhiQvY8NDYbTGm4EOSMXmnw+uPtDNUXixqT8GWw7GIzG4zTaHKrFZ5yPi QGA4RO+DNW7fOggq10Y9zwAyH/P/UahGugi7nK6482xI18U58ICnOjJ2Zpj+lz4X0tot SyFcwuG/4+26L5umVQgnrZ7YLZHFUcN2wQ86GzS7VEzvrvyfjQ3FwAv6R7N+rAo9MUK4 M277+BptQmIljG1MNfIpgga+wqOM2sud18BX+e3kM14OYPfji82YvKxFthuT0RnI7wDY YBmFobyi7wPe4uq/4kCRj4I4+Dsgrqw/dhkh0H2mJYvY3s9vGQF/98CrTYGrMbSMBAE0 WBFQ== X-Gm-Message-State: AODbwcCjuLaZToyiElE0I4FRJPig7tMjiyhwgoTyYpeCTWhG6GCu1QVq YLK5zeTVd1z2gQ== X-Received: by 10.55.52.13 with SMTP id b13mr6990560qka.28.1494632426285; Fri, 12 May 2017 16:40:26 -0700 (PDT) From: Richard Henderson To: qemu-devel@nongnu.org Date: Fri, 12 May 2017 16:40:09 -0700 Message-Id: <20170512234009.32557-10-rth@twiddle.net> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170512234009.32557-1-rth@twiddle.net> References: <20170512234009.32557-1-rth@twiddle.net> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400d:c09::244 Subject: [Qemu-devel] [PULL 9/9] target/s390x: implement serialization in BRANCH CONDITION X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Aurelien Jarno , stefanha@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Aurelien Jarno Signed-off-by: Aurelien Jarno Message-Id: <20170509082800.10756-4-aurelien@aurel32.net> Signed-off-by: Richard Henderson --- target/s390x/translate.c | 15 +++++++++++++++ 1 file changed, 15 insertions(+) diff --git a/target/s390x/translate.c b/target/s390x/translate.c index 3a0a3ee..4c48c59 100644 --- a/target/s390x/translate.c +++ b/target/s390x/translate.c @@ -1518,6 +1518,21 @@ static ExitStatus op_bc(DisasContext *s, DisasOps *o) int imm =3D is_imm ? get_field(s->fields, i2) : 0; DisasCompare c; =20 + /* BCR with R2 =3D 0 causes no branching */ + if (have_field(s->fields, r2) && get_field(s->fields, r2) =3D=3D 0) { + if (m1 =3D=3D 14) { + /* Perform serialization */ + /* FIXME: check for fast-BCR-serialization facility */ + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); + } + if (m1 =3D=3D 15) { + /* Perform serialization */ + /* FIXME: perform checkpoint-synchronisation */ + tcg_gen_mb(TCG_MO_ALL | TCG_BAR_SC); + } + return NO_EXIT; + } + disas_jcc(s, &c, m1); return help_branch(s, &c, is_imm, imm, o->in2); } --=20 2.9.3