From nobody Tue Apr 30 17:21:04 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1492888110987299.95328731644827; Sat, 22 Apr 2017 12:08:30 -0700 (PDT) Received: from localhost ([::1]:36605 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d20OP-0008RE-CA for importer@patchew.org; Sat, 22 Apr 2017 15:08:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:47487) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d20NR-00080Z-KV for qemu-devel@nongnu.org; Sat, 22 Apr 2017 15:07:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d20NQ-0006xK-MJ for qemu-devel@nongnu.org; Sat, 22 Apr 2017 15:07:25 -0400 Received: from mail.kernel.org ([198.145.29.136]:50162) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d20NL-0006ur-8F; Sat, 22 Apr 2017 15:07:19 -0400 Received: from mail.kernel.org (localhost [127.0.0.1]) by mail.kernel.org (Postfix) with ESMTP id BBE422011E; Sat, 22 Apr 2017 19:07:16 +0000 (UTC) Received: from kozik-lap.dzcmts001-cpe-001.datazug.ch (pub082136089155.dh-hfc.datazug.ch [82.136.89.155]) (using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPSA id 86A6120117; Sat, 22 Apr 2017 19:07:13 +0000 (UTC) From: Krzysztof Kozlowski To: Igor Mitsyanko , Peter Maydell , qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Sat, 22 Apr 2017 21:07:09 +0200 Message-Id: <20170422190709.8676-1-krzk@kernel.org> X-Mailer: git-send-email 2.9.3 X-Virus-Scanned: ClamAV using ClamSMTP X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 198.145.29.136 Subject: [Qemu-devel] [PATCH v2] hw/arm/exynos: Add generic SDHCI devices X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Krzysztof Kozlowski Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Exynos4210 has four SD/MMC controllers supporting: - SD Standard Host Specification Version 2.0, - MMC Specification Version 4.3, - SDIO Card Specification Version 2.0, - DMA and ADMA. Add emulation of SDHCI devices which allows accessing storage through SD cards. Differences from real hardware: - Devices are shipped with eMMC memory, not SD card. - The Exynos4210 SDHCI has few more registers, e.g. for controlling the clocks, additional status (0x80, 0x84, 0x8c). These are not implemented. Testing on smdkc210 machine with "-drive file=3DFILE,if=3Dsd,bus=3D0,index= =3D2". Signed-off-by: Krzysztof Kozlowski --- Changes since v1: 1. Fixes after Peter's review. --- hw/arm/exynos4210.c | 29 +++++++++++++++++++++++++++++ 1 file changed, 29 insertions(+) diff --git a/hw/arm/exynos4210.c b/hw/arm/exynos4210.c index 0ec4250f0c05..5a622cfedfc8 100644 --- a/hw/arm/exynos4210.c +++ b/hw/arm/exynos4210.c @@ -32,6 +32,7 @@ #include "hw/arm/arm.h" #include "hw/loader.h" #include "hw/arm/exynos4210.h" +#include "hw/sd/sd.h" #include "hw/usb/hcd-ehci.h" =20 #define EXYNOS4210_CHIPID_ADDR 0x10000000 @@ -72,6 +73,13 @@ #define EXYNOS4210_EXT_COMBINER_BASE_ADDR 0x10440000 #define EXYNOS4210_INT_COMBINER_BASE_ADDR 0x10448000 =20 +/* SD/MMC host controllers */ +#define EXYNOS4210_SDHCI_CAPABILITIES 0x05E80080 +#define EXYNOS4210_SDHCI_BASE_ADDR 0x12510000 +#define EXYNOS4210_SDHCI_ADDR(n) (EXYNOS4210_SDHCI_BASE_ADDR + \ + 0x00010000 * (n)) +#define EXYNOS4210_SDHCI_NUMBER 4 + /* PMU SFR base address */ #define EXYNOS4210_PMU_BASE_ADDR 0x10020000 =20 @@ -386,6 +394,27 @@ Exynos4210State *exynos4210_init(MemoryRegion *system_= mem, EXYNOS4210_UART3_FIFO_SIZE, 3, NULL, s->irq_table[exynos4210_get_irq(EXYNOS4210_UART_INT_GRP,= 3)]); =20 + /*** SD/MMC host controllers ***/ + for (n =3D 0; n < EXYNOS4210_SDHCI_NUMBER; n++) { + DeviceState *carddev; + BlockBackend *blk; + DriveInfo *di; + + dev =3D qdev_create(NULL, "generic-sdhci"); + qdev_prop_set_uint32(dev, "capareg", EXYNOS4210_SDHCI_CAPABILITIES= ); + qdev_init_nofail(dev); + + busdev =3D SYS_BUS_DEVICE(dev); + sysbus_mmio_map(busdev, 0, EXYNOS4210_SDHCI_ADDR(n)); + sysbus_connect_irq(busdev, 0, s->irq_table[exynos4210_get_irq(29, = n)]); + + di =3D drive_get(IF_SD, 0, n); + blk =3D di ? blk_by_legacy_dinfo(di) : NULL; + carddev =3D qdev_create(qdev_get_child_bus(dev, "sd-bus"), TYPE_SD= _CARD); + qdev_prop_set_drive(carddev, "drive", blk, &error_abort); + qdev_init_nofail(carddev); + } + /*** Display controller (FIMD) ***/ sysbus_create_varargs("exynos4210.fimd", EXYNOS4210_FIMD0_BASE_ADDR, s->irq_table[exynos4210_get_irq(11, 0)], --=20 2.9.3