From nobody Wed May 1 11:33:58 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1490907827808258.69932951159274; Thu, 30 Mar 2017 14:03:47 -0700 (PDT) Received: from localhost ([::1]:37661 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cthEP-0005Fe-RH for importer@patchew.org; Thu, 30 Mar 2017 17:03:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:34324) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cthDE-0004ZF-Hy for qemu-devel@nongnu.org; Thu, 30 Mar 2017 17:02:33 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cthDA-0002Iu-Gp for qemu-devel@nongnu.org; Thu, 30 Mar 2017 17:02:32 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42544) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cthDA-0002IQ-8v for qemu-devel@nongnu.org; Thu, 30 Mar 2017 17:02:28 -0400 Received: from smtp.corp.redhat.com (int-mx02.intmail.prod.int.phx2.redhat.com [10.5.11.12]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0A73E80464 for ; Thu, 30 Mar 2017 21:02:27 +0000 (UTC) Received: from localhost (ovpn-116-7.gru2.redhat.com [10.97.116.7]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1982678DBD; Thu, 30 Mar 2017 21:02:22 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 0A73E80464 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=ehabkost@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 0A73E80464 From: Eduardo Habkost To: qemu-devel@nongnu.org Date: Thu, 30 Mar 2017 18:01:05 -0300 Message-Id: <20170330210105.32434-1-ehabkost@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.12 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Thu, 30 Mar 2017 21:02:27 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RHEL-7.4 qemu-kvm PATCH] target-i386: get/set/migrate XSAVES state X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Paolo Bonzini , Bandan Das , plai@redhat.com, David Hildenbrand Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Wanpeng Li Bugzilla: https://bugzilla.redhat.com/show_bug.cgi?id=3D1327593 Brew: https://brewweb.engineering.redhat.com/brew/taskinfo?taskID=3D12913269 Add xsaves related definition, it also adds corresponding part to kvm_get/put, and vmstate. Backport notes: * As we didn't have unmigratable_flags yet, our backport of upstream commit 0bb0b2d2fe7f645ddaf1f0ff40ac669c9feb4aa1 (commit 5fcaf5176d7545518c76f3aa8ea7ce6fb063c62d) didn't include "xsaves" cpuid_xsave_feature_name[]. This patch now adds "xsave" to cpuid_xsave_feature_name[]. Signed-off-by: Wanpeng Li Signed-off-by: Paolo Bonzini (cherry picked from commit 18cd2c17b5370369a886155c001da0a7f54bbcca) Signed-off-by: Eduardo Habkost --- target-i386/cpu.h | 2 ++ target-i386/cpu.c | 2 +- target-i386/kvm.c | 15 +++++++++++++++ target-i386/machine.c | 21 +++++++++++++++++++++ 4 files changed, 39 insertions(+), 1 deletion(-) diff --git a/target-i386/cpu.h b/target-i386/cpu.h index f04deb411d..ac60309b25 100644 --- a/target-i386/cpu.h +++ b/target-i386/cpu.h @@ -384,6 +384,7 @@ #define MSR_VM_HSAVE_PA 0xc0010117 =20 #define MSR_IA32_BNDCFGS 0x00000d90 +#define MSR_IA32_XSS 0x00000da0 =20 #define XSTATE_FP (1ULL << 0) #define XSTATE_SSE (1ULL << 1) @@ -1026,6 +1027,7 @@ typedef struct CPUX86State { uint64_t xstate_bv; =20 uint64_t xcr0; + uint64_t xss; =20 TPRAccess tpr_access_type; } CPUX86State; diff --git a/target-i386/cpu.c b/target-i386/cpu.c index 33f0997c49..ae56995beb 100644 --- a/target-i386/cpu.c +++ b/target-i386/cpu.c @@ -177,7 +177,7 @@ static const char *cpuid_7_0_edx_feature_name[] =3D { }; =20 static const char *cpuid_xsave_feature_name[] =3D { - "xsaveopt", "xsavec", "xgetbv1", NULL, + "xsaveopt", "xsavec", "xgetbv1", "xsaves", NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL, diff --git a/target-i386/kvm.c b/target-i386/kvm.c index e1b0ca2f6d..6a479f46c3 100644 --- a/target-i386/kvm.c +++ b/target-i386/kvm.c @@ -76,6 +76,7 @@ static bool has_msr_hv_hypercall; static bool has_msr_hv_vapic; static bool has_msr_hv_tsc; static bool has_msr_mtrr; +static bool has_msr_xss; =20 static bool has_msr_architectural_pmu; static uint32_t num_architectural_pmu_counters; @@ -795,6 +796,10 @@ static int kvm_get_supported_msrs(KVMState *s) has_msr_bndcfgs =3D true; continue; } + if (kvm_msr_list->indices[i] =3D=3D MSR_IA32_XSS) { + has_msr_xss =3D true; + continue; + } } } =20 @@ -1177,6 +1182,9 @@ static int kvm_put_msrs(X86CPU *cpu, int level) if (has_msr_bndcfgs) { kvm_msr_entry_set(&msrs[n++], MSR_IA32_BNDCFGS, env->msr_bndcfgs); } + if (has_msr_xss) { + kvm_msr_entry_set(&msrs[n++], MSR_IA32_XSS, env->xss); + } #ifdef TARGET_X86_64 if (lm_capable_kernel) { kvm_msr_entry_set(&msrs[n++], MSR_CSTAR, env->cstar); @@ -1530,6 +1538,10 @@ static int kvm_get_msrs(X86CPU *cpu) if (has_msr_bndcfgs) { msrs[n++].index =3D MSR_IA32_BNDCFGS; } + if (has_msr_xss) { + msrs[n++].index =3D MSR_IA32_XSS; + } + =20 if (!env->tsc_valid) { msrs[n++].index =3D MSR_IA32_TSC; @@ -1677,6 +1689,9 @@ static int kvm_get_msrs(X86CPU *cpu) case MSR_IA32_BNDCFGS: env->msr_bndcfgs =3D msrs[i].data; break; + case MSR_IA32_XSS: + env->xss =3D msrs[i].data; + break; default: if (msrs[i].index >=3D MSR_MC0_CTL && msrs[i].index < MSR_MC0_CTL + (env->mcg_cap & 0xff) * 4) { diff --git a/target-i386/machine.c b/target-i386/machine.c index 2c970024ac..ce7fcd3996 100644 --- a/target-i386/machine.c +++ b/target-i386/machine.c @@ -704,6 +704,24 @@ static const VMStateDescription vmstate_avx512 =3D { } }; =20 +static bool xss_needed(void *opaque) +{ + X86CPU *cpu =3D opaque; + CPUX86State *env =3D &cpu->env; + + return env->xss !=3D 0; +} + +static const VMStateDescription vmstate_xss =3D { + .name =3D "cpu/xss", + .version_id =3D 1, + .minimum_version_id =3D 1, + .fields =3D (VMStateField[]) { + VMSTATE_UINT64(env.xss, X86CPU), + VMSTATE_END_OF_LIST() + } +}; + const VMStateDescription vmstate_x86_cpu =3D { .name =3D "cpu", .version_id =3D 12, @@ -850,6 +868,9 @@ const VMStateDescription vmstate_x86_cpu =3D { }, { .vmsd =3D &vmstate_avx512, .needed =3D avx512_needed, + }, { + .vmsd =3D &vmstate_xss, + .needed =3D xss_needed, } , { /* empty */ } --=20 2.11.0.259.g40922b1