Enable a few new cpu features including UMONITOR, UMWAIT, TPAUSE, MOVDIRI and MOVDIR64B. UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions. MOVDIRI moves doubleword or quadword from register to memory through direct store. MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity. The bits definition: CPUID.(EAX=7,ECX=0):ECX[bit 05] WAITPKG CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B The release document ref below link: https://software.intel.com/sites/default/files/managed/c5/15/\ architecture-instruction-set-extensions-programming-reference.pdf Jingqi Liu (3): x86/cpu: Enable UMONITOR/UMWAIT/TPAUSE cpu features x86/cpu: Enable MOVDIRI cpu feature x86/cpu: Enable MOVDIR64B cpu feature target/i386/cpu.c | 6 +++--- target/i386/cpu.h | 3 +++ 2 files changed, 6 insertions(+), 3 deletions(-) -- 1.8.3.1
On 10/07/2018 10:57, Jingqi Liu wrote: > Enable a few new cpu features including UMONITOR, UMWAIT, TPAUSE, > MOVDIRI and MOVDIR64B. > > UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions. > MOVDIRI moves doubleword or quadword from register to memory through > direct store. > MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity. Do you have corresponding KVM changes? Paolo > The bits definition: > CPUID.(EAX=7,ECX=0):ECX[bit 05] WAITPKG > CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI > CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B > > The release document ref below link: > https://software.intel.com/sites/default/files/managed/c5/15/\ > architecture-instruction-set-extensions-programming-reference.pdf > > Jingqi Liu (3): > x86/cpu: Enable UMONITOR/UMWAIT/TPAUSE cpu features > x86/cpu: Enable MOVDIRI cpu feature > x86/cpu: Enable MOVDIR64B cpu feature > > target/i386/cpu.c | 6 +++--- > target/i386/cpu.h | 3 +++ > 2 files changed, 6 insertions(+), 3 deletions(-) >
On 7/16/2018 10:59 PM, Paolo Bonzini wrote: > On 10/07/2018 10:57, Jingqi Liu wrote: >> Enable a few new cpu features including UMONITOR, UMWAIT, TPAUSE, >> MOVDIRI and MOVDIR64B. >> >> UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions. >> MOVDIRI moves doubleword or quadword from register to memory through >> direct store. >> MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity. > Do you have corresponding KVM changes? Yes, the corresponding links are listed as below. https://www.spinics.net/lists/kvm/msg171563.html https://www.spinics.net/lists/kernel/msg2850965.html The patches had been sent for your review also. Thanks Jingqi Liu > > Paolo > >> The bits definition: >> CPUID.(EAX=7,ECX=0):ECX[bit 05] WAITPKG >> CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI >> CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B >> >> The release document ref below link: >> https://software.intel.com/sites/default/files/managed/c5/15/\ >> architecture-instruction-set-extensions-programming-reference.pdf >> >> Jingqi Liu (3): >> x86/cpu: Enable UMONITOR/UMWAIT/TPAUSE cpu features >> x86/cpu: Enable MOVDIRI cpu feature >> x86/cpu: Enable MOVDIR64B cpu feature >> >> target/i386/cpu.c | 6 +++--- >> target/i386/cpu.h | 3 +++ >> 2 files changed, 6 insertions(+), 3 deletions(-) >>
Hi Paolo & Eduardo, Do you have any comments for the series ? Thanks On 7/16/2018 10:59 PM, Paolo Bonzini wrote: > On 10/07/2018 10:57, Jingqi Liu wrote: >> Enable a few new cpu features including UMONITOR, UMWAIT, TPAUSE, >> MOVDIRI and MOVDIR64B. >> >> UMONITOR, UMWAIT, and TPAUSE are a set of user wait instructions. >> MOVDIRI moves doubleword or quadword from register to memory through >> direct store. >> MOVDIR64B moves 64-bytes as direct-store with 64-bytes write atomicity. > Do you have corresponding KVM changes? > > Paolo > >> The bits definition: >> CPUID.(EAX=7,ECX=0):ECX[bit 05] WAITPKG >> CPUID.(EAX=7,ECX=0):ECX[bit 27] MOVDIRI >> CPUID.(EAX=7,ECX=0):ECX[bit 28] MOVDIR64B >> >> The release document ref below link: >> https://software.intel.com/sites/default/files/managed/c5/15/\ >> architecture-instruction-set-extensions-programming-reference.pdf >> >> Jingqi Liu (3): >> x86/cpu: Enable UMONITOR/UMWAIT/TPAUSE cpu features >> x86/cpu: Enable MOVDIRI cpu feature >> x86/cpu: Enable MOVDIR64B cpu feature >> >> target/i386/cpu.c | 6 +++--- >> target/i386/cpu.h | 3 +++ >> 2 files changed, 6 insertions(+), 3 deletions(-) >>
On 06/08/2018 10:21, Liu, Jingqi wrote: > Hi Paolo & Eduardo, > > Do you have any comments for the series ? > Thanks > Hi, QEMU is currently in feature freeze. We will look at the series soon after QEMU 3.0 is released. Paolo
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