From nobody Sun Apr 28 00:42:40 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1529689610620364.2790556139465; Fri, 22 Jun 2018 10:46:50 -0700 (PDT) Received: from localhost ([::1]:35454 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWQ8u-000360-Hi for importer@patchew.org; Fri, 22 Jun 2018 13:46:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:56478) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1fWQ7s-0002mb-TX for qemu-devel@nongnu.org; Fri, 22 Jun 2018 13:45:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1fWQ7p-0004XH-QF for qemu-devel@nongnu.org; Fri, 22 Jun 2018 13:45:36 -0400 Received: from out2-smtp.messagingengine.com ([66.111.4.26]:49005) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1fWQ7p-0004X7-J9 for qemu-devel@nongnu.org; Fri, 22 Jun 2018 13:45:33 -0400 Received: from compute4.internal (compute4.nyi.internal [10.202.2.44]) by mailout.nyi.internal (Postfix) with ESMTP id BC7A220DF7; Fri, 22 Jun 2018 13:45:32 -0400 (EDT) Received: from mailfrontend2 ([10.202.2.163]) by compute4.internal (MEProxy); Fri, 22 Jun 2018 13:45:32 -0400 Received: from localhost (flamenco.cs.columbia.edu [128.59.20.216]) by mail.messagingengine.com (Postfix) with ESMTPA id 57ECA10252; Fri, 22 Jun 2018 13:45:32 -0400 (EDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=braap.org; h=cc :date:from:message-id:subject:to:x-me-sender:x-me-sender :x-sasl-enc; s=mesmtp; bh=EKVlq3/6JCRYddLbwJjwoFKaSXnI1g9i2dzWw5 CkAUA=; b=B6g3uh3d2dwpWIrFwFE0cvQDXa+mxhEiQQaoXEcF43sY/pYXLI/Um7 6NC7OJ6zwWrbsbHZuyzbanbd1E1aUOu70JzxtQoCbCmcXJs3OVb6gfM2tV6eCL91 ejOeyT0Wz0OtCcN7gw4oRECEDZH7xSlrsFMbWtmttWWmJpJVtGXr8= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d= messagingengine.com; h=cc:date:from:message-id:subject:to :x-me-sender:x-me-sender:x-sasl-enc; s=fm3; bh=EKVlq3/6JCRYddLbw JjwoFKaSXnI1g9i2dzWw5CkAUA=; b=ObHR8FQ8+WHcfNiJqGCiW8yLKh8x5O9aT WZ8DU+d6MLO0yHYP3kABVHD3KH3ssJw9XmK+Ebcvdm0592htuPbaq96ZAAmvHFsB fZTyYYzN8SfoGfpiWJNc0t2MlBzgTlavHXfFRRebF2hS+VXUoAjyVO3v8F0JiJ6k BnaBuqEWc1VX+zvhAs1d2ArGRojRsx8GWrKnjRHNGaWVq8Kpje50f98cBDlhHHnF x1XKF7kGSP4DigmOHhN/ivuZK64g+rG1NkFwpvR42Er/OAZ724UENepwHqb3bhM6 lSRBhgrJnQ/d45EvynQbLlyeCjCCIBqLVIBpby1zitBnePxLyQD7g== X-ME-Proxy: X-ME-Sender: From: "Emilio G. Cota" To: qemu-devel@nongnu.org Date: Fri, 22 Jun 2018 13:45:31 -0400 Message-Id: <1529689531-4024-1-git-send-email-cota@braap.org> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 66.111.4.26 Subject: [Qemu-devel] [PATCH] tcg: fix --disable-tcg build breakage X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Fix the --disable-tcg breakage introduced by tb_lock's removal by relying on the fact that tcg_enabled() is set to 0 at compile-time under --disable-tcg. While at it, add further asserts to fix builds that enable both --disable-tcg and --enable-debug, which were broken even before tb_lock's removal. Tested to build x86_64-softmmu and i386-softmmu targets. Reported-by: Peter Maydell Signed-off-by: Emilio G. Cota Reviewed-by: Richard Henderson --- accel/stubs/tcg-stub.c | 4 ---- cpus.c | 4 ++++ exec.c | 3 +++ 3 files changed, 7 insertions(+), 4 deletions(-) diff --git a/accel/stubs/tcg-stub.c b/accel/stubs/tcg-stub.c index ee575a8..76ae461 100644 --- a/accel/stubs/tcg-stub.c +++ b/accel/stubs/tcg-stub.c @@ -21,10 +21,6 @@ void tb_flush(CPUState *cpu) { } =20 -void tb_unlock(void) -{ -} - void tlb_set_dirty(CPUState *cpu, target_ulong vaddr) { } diff --git a/cpus.c b/cpus.c index d1f1629..8cd552e 100644 --- a/cpus.c +++ b/cpus.c @@ -1355,6 +1355,7 @@ static int tcg_cpu_exec(CPUState *cpu) int64_t ti; #endif =20 + assert(tcg_enabled()); #ifdef CONFIG_PROFILER ti =3D profile_getclock(); #endif @@ -1397,6 +1398,7 @@ static void *qemu_tcg_rr_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; =20 + assert(tcg_enabled()); rcu_register_thread(); tcg_register_thread(); =20 @@ -1631,6 +1633,7 @@ static void *qemu_tcg_cpu_thread_fn(void *arg) { CPUState *cpu =3D arg; =20 + assert(tcg_enabled()); g_assert(!use_icount); =20 rcu_register_thread(); @@ -1854,6 +1857,7 @@ static void qemu_tcg_init_vcpu(CPUState *cpu) static QemuThread *single_tcg_cpu_thread; static int tcg_region_inited; =20 + assert(tcg_enabled()); /* * Initialize TCG regions--once. Now is a good time, because: * (1) TCG's init context, prologue and target globals have been set u= p. diff --git a/exec.c b/exec.c index 28f9bdc..88edb59 100644 --- a/exec.c +++ b/exec.c @@ -1323,6 +1323,7 @@ static void tlb_reset_dirty_range_all(ram_addr_t star= t, ram_addr_t length) RAMBlock *block; ram_addr_t end; =20 + assert(tcg_enabled()); end =3D TARGET_PAGE_ALIGN(start + length); start &=3D TARGET_PAGE_MASK; =20 @@ -2655,6 +2656,7 @@ void memory_notdirty_write_prepare(NotDirtyInfo *ndi, void memory_notdirty_write_complete(NotDirtyInfo *ndi) { if (ndi->pages) { + assert(tcg_enabled()); page_collection_unlock(ndi->pages); ndi->pages =3D NULL; } @@ -3046,6 +3048,7 @@ static void tcg_commit(MemoryListener *listener) CPUAddressSpace *cpuas; AddressSpaceDispatch *d; =20 + assert(tcg_enabled()); /* since each CPU stores ram addresses in its TLB cache, we must reset the modified entries */ cpuas =3D container_of(listener, CPUAddressSpace, tcg_as_listener); --=20 2.7.4