From nobody Mon Apr 29 04:48:44 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1513080613304242.60071497665933; Tue, 12 Dec 2017 04:10:13 -0800 (PST) Received: from localhost ([::1]:57849 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eOjNt-0005aO-UA for importer@patchew.org; Tue, 12 Dec 2017 07:10:05 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:55243) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eOjMR-0004vB-27 for qemu-devel@nongnu.org; Tue, 12 Dec 2017 07:08:40 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eOjMP-0004CP-V3 for qemu-devel@nongnu.org; Tue, 12 Dec 2017 07:08:35 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:39022) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eOjMM-00048z-Vq; Tue, 12 Dec 2017 07:08:31 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.89) (envelope-from ) id 1eOjMK-0005gw-66; Tue, 12 Dec 2017 12:08:28 +0000 From: Peter Maydell To: qemu-arm@nongnu.org, qemu-devel@nongnu.org Date: Tue, 12 Dec 2017 12:08:26 +0000 Message-Id: <1513080506-17703-1-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PATCH] target/arm: Make disas_thumb2_insn() generate its own UNDEF exceptions X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Richard Henderson , patches@linaro.org Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Refactor disas_thumb2_insn() so that it generates the code for raising an UNDEF exception for invalid insns, rather than returning a flag which the caller must check to see if it needs to generate the UNDEF code. This brings the function in to line with the behaviour of disas_thumb_insn() and disas_arm_insn(). Signed-off-by: Peter Maydell Reviewed-by: Richard Henderson --- This fixes the odd asymmetry of API that caused the bug fixed in commit 7472e2efb... --- target/arm/translate.c | 23 ++++++++++------------- 1 file changed, 10 insertions(+), 13 deletions(-) diff --git a/target/arm/translate.c b/target/arm/translate.c index f120932..89ee353 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -9771,9 +9771,8 @@ gen_thumb2_data_op(DisasContext *s, int op, int conds= , uint32_t shifter_out, return 0; } =20 -/* Translate a 32-bit thumb instruction. Returns nonzero if the instructi= on - is not legal. */ -static int disas_thumb2_insn(DisasContext *s, uint32_t insn) +/* Translate a 32-bit thumb instruction. */ +static void disas_thumb2_insn(DisasContext *s, uint32_t insn) { uint32_t imm, shift, offset; uint32_t rd, rn, rm, rs; @@ -10985,16 +10984,16 @@ static int disas_thumb2_insn(DisasContext *s, uin= t32_t insn) /* UNPREDICTABLE, unallocated hint or * PLD/PLDW/PLI (literal) */ - return 0; + return; } if (op1 & 1) { - return 0; /* PLD/PLDW/PLI or unallocated hint */ + return; /* PLD/PLDW/PLI or unallocated hint */ } if ((op2 =3D=3D 0) || ((op2 & 0x3c) =3D=3D 0x30)) { - return 0; /* PLD/PLDW/PLI or unallocated hint */ + return; /* PLD/PLDW/PLI or unallocated hint */ } /* UNDEF space, or an UNPREDICTABLE */ - return 1; + goto illegal_op; } } memidx =3D get_mem_index(s); @@ -11120,9 +11119,10 @@ static int disas_thumb2_insn(DisasContext *s, uint= 32_t insn) default: goto illegal_op; } - return 0; + return; illegal_op: - return 1; + gen_exception_insn(s, 4, EXCP_UDEF, syn_uncategorized(), + default_exception_el(s)); } =20 static void disas_thumb_insn(DisasContext *s, uint32_t insn) @@ -12245,10 +12245,7 @@ static void thumb_tr_translate_insn(DisasContextBa= se *dcbase, CPUState *cpu) if (is_16bit) { disas_thumb_insn(dc, insn); } else { - if (disas_thumb2_insn(dc, insn)) { - gen_exception_insn(dc, 4, EXCP_UDEF, syn_uncategorized(), - default_exception_el(dc)); - } + disas_thumb2_insn(dc, insn); } =20 /* Advance the Thumb condexec condition. */ --=20 2.7.4