From nobody Sun Apr 28 22:05:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510900068266433.94129482120263; Thu, 16 Nov 2017 22:27:48 -0800 (PST) Received: from localhost ([::1]:44097 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFa7l-00027U-Fs for importer@patchew.org; Fri, 17 Nov 2017 01:27:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57239) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFa6X-00018P-K4 for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:22 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eFa6V-00013i-Si for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:21 -0500 Received: from mga11.intel.com ([192.55.52.93]:62640) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eFa6V-0000tS-Jq for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:19 -0500 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Nov 2017 22:26:19 -0800 Received: from skl-4s-chao.sh.intel.com ([10.239.48.9]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2017 22:26:17 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,407,1505804400"; d="scan'208";a="2622209" From: Chao Gao To: qemu-devel@nongnu.org Date: Fri, 17 Nov 2017 14:24:23 +0800 Message-Id: <1510899865-40323-2-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1510899865-40323-1-git-send-email-chao.gao@intel.com> References: <1510899865-40323-1-git-send-email-chao.gao@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Subject: [Qemu-devel] [PATCH v3 1/3] i386/msi: Correct mask of destination ID in MSI address X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anthony Perard , Lan Tianyu , "Michael S. Tsirkin" , Peter Xu , Chao Gao Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" According to SDM 10.11.1, only [19:12] bits of MSI address are Destination ID, change the mask to avoid ambiguity for VT-d spec has used the bit 4 to indicate a remappable interrupt request. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu Reviewed-by: Anthony PERARD Reviewed-by: Peter Xu Reviewed-by: Michael S. Tsirkin --- include/hw/i386/apic-msidef.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/hw/i386/apic-msidef.h b/include/hw/i386/apic-msidef.h index 8b4d4cc..420b411 100644 --- a/include/hw/i386/apic-msidef.h +++ b/include/hw/i386/apic-msidef.h @@ -26,6 +26,6 @@ =20 #define MSI_ADDR_DEST_ID_SHIFT 12 #define MSI_ADDR_DEST_IDX_SHIFT 4 -#define MSI_ADDR_DEST_ID_MASK 0x00ffff0 +#define MSI_ADDR_DEST_ID_MASK 0x000ff000 =20 #endif /* HW_APIC_MSIDEF_H */ --=20 1.8.3.1 From nobody Sun Apr 28 22:05:49 2024 Delivered-To: importer@patchew.org Received-SPF: temperror (zoho.com: Error in retrieving data from DNS) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=temperror (zoho.com: Error in retrieving data from DNS) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (208.118.235.17 [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510900073326759.7470513691588; Thu, 16 Nov 2017 22:27:53 -0800 (PST) Received: from localhost ([::1]:44098 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFa7m-00028U-FX for importer@patchew.org; Fri, 17 Nov 2017 01:27:38 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57265) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFa6Z-00018b-Ez for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:24 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eFa6Y-0001AP-C3 for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:23 -0500 Received: from mga11.intel.com ([192.55.52.93]:62640) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eFa6Y-0000tS-08 for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:22 -0500 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Nov 2017 22:26:21 -0800 Received: from skl-4s-chao.sh.intel.com ([10.239.48.9]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2017 22:26:20 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,407,1505804400"; d="scan'208";a="2622217" From: Chao Gao To: qemu-devel@nongnu.org Date: Fri, 17 Nov 2017 14:24:24 +0800 Message-Id: <1510899865-40323-3-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1510899865-40323-1-git-send-email-chao.gao@intel.com> References: <1510899865-40323-1-git-send-email-chao.gao@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Subject: [Qemu-devel] [PATCH v3 2/3] xen/pt: Pass the whole msi addr/data to Xen X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Anthony Perard , xen-devel@lists.xenproject.org, Stefano Stabellini , Lan Tianyu , Chao Gao Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_6 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Previously, some fields (reserved or unalterable) are filtered by Qemu. This fields are useless for the legacy interrupt format. However, these fields are may meaningful (for intel platform) for the interrupt of remapping format. It is better to pass the whole msi addr/data to Xen without any filtering. The main reason why we want this is QEMU doesn't have the knowledge to decide the interrupt format after we introduce vIOMMU inside Xen. Passing the whole msi message down and let arch-specific vIOMMU to decide the interrupt format. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- v3: - new --- hw/xen/xen_pt_msi.c | 47 ++++++++++++----------------------------------- 1 file changed, 12 insertions(+), 35 deletions(-) diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index 6d1e3bd..f7d6e76 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -47,25 +47,6 @@ static inline uint32_t msi_ext_dest_id(uint32_t addr_hi) return addr_hi & 0xffffff00; } =20 -static uint32_t msi_gflags(uint32_t data, uint64_t addr) -{ - uint32_t result =3D 0; - int rh, dm, dest_id, deliv_mode, trig_mode; - - rh =3D (addr >> MSI_ADDR_REDIRECTION_SHIFT) & 0x1; - dm =3D (addr >> MSI_ADDR_DEST_MODE_SHIFT) & 0x1; - dest_id =3D msi_dest_id(addr); - deliv_mode =3D (data >> MSI_DATA_DELIVERY_MODE_SHIFT) & 0x7; - trig_mode =3D (data >> MSI_DATA_TRIGGER_SHIFT) & 0x1; - - result =3D dest_id | (rh << XEN_PT_GFLAGS_SHIFT_RH) - | (dm << XEN_PT_GFLAGS_SHIFT_DM) - | (deliv_mode << XEN_PT_GFLAGSSHIFT_DELIV_MODE) - | (trig_mode << XEN_PT_GFLAGSSHIFT_TRG_MODE); - - return result; -} - static inline uint64_t msi_addr64(XenPTMSI *msi) { return (uint64_t)msi->addr_hi << 32 | msi->addr_lo; @@ -160,23 +141,20 @@ static int msi_msix_update(XenPCIPassthroughState *s, bool masked) { PCIDevice *d =3D &s->dev; - uint8_t gvec =3D msi_vector(data); - uint32_t gflags =3D msi_gflags(data, addr); + uint32_t gflags =3D masked ? 0 : (1u << XEN_PT_GFLAGSSHIFT_UNMASKED); int rc =3D 0; uint64_t table_addr =3D 0; =20 - XEN_PT_LOG(d, "Updating MSI%s with pirq %d gvec %#x gflags %#x" - " (entry: %#x)\n", - is_msix ? "-X" : "", pirq, gvec, gflags, msix_entry); + XEN_PT_LOG(d, "Updating MSI%s with pirq %d gvec %#x addr %"PRIx64 + " data %#x gflags %#x (entry: %#x)\n", + is_msix ? "-X" : "", pirq, addr, data, gflags, msix_entry); =20 if (is_msix) { table_addr =3D s->msix->mmio_base_addr; } =20 - gflags |=3D masked ? 0 : (1u << XEN_PT_GFLAGSSHIFT_UNMASKED); - - rc =3D xc_domain_update_msi_irq(xen_xc, xen_domid, gvec, - pirq, gflags, table_addr); + rc =3D xc_domain_update_msi_irq(xen_xc, xen_domid, pirq, addr, + data, gflags, table_addr); =20 if (rc) { XEN_PT_ERR(d, "Updating of MSI%s failed. (err: %d)\n", @@ -199,8 +177,6 @@ static int msi_msix_disable(XenPCIPassthroughState *s, bool is_binded) { PCIDevice *d =3D &s->dev; - uint8_t gvec =3D msi_vector(data); - uint32_t gflags =3D msi_gflags(data, addr); int rc =3D 0; =20 if (pirq =3D=3D XEN_PT_UNASSIGNED_PIRQ) { @@ -208,12 +184,13 @@ static int msi_msix_disable(XenPCIPassthroughState *s, } =20 if (is_binded) { - XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, gvec %#x\n", - is_msix ? "-X" : "", pirq, gvec); - rc =3D xc_domain_unbind_msi_irq(xen_xc, xen_domid, gvec, pirq, gfl= ags); + XEN_PT_LOG(d, "Unbind MSI%s with pirq %d, addr %"PRIx64", data %#x= \n", + is_msix ? "-X" : "", pirq, addr, data); + rc =3D xc_domain_unbind_msi_irq(xen_xc, xen_domid, pirq, addr, dat= a); if (rc) { - XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, = gvec: %#x)\n", - is_msix ? "-X" : "", errno, pirq, gvec); + XEN_PT_ERR(d, "Unbinding of MSI%s failed. (err: %d, pirq: %d, " + "addr: %"PRIx64", data: %#x)\n", + is_msix ? "-X" : "", errno, pirq, addr, data); return rc; } } --=20 1.8.3.1 From nobody Sun Apr 28 22:05:49 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1510900242448238.6016064869184; Thu, 16 Nov 2017 22:30:42 -0800 (PST) Received: from localhost ([::1]:44112 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFaAU-0003nj-KK for importer@patchew.org; Fri, 17 Nov 2017 01:30:26 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57277) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1eFa6c-0001AY-EH for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:27 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1eFa6b-0001Iq-9V for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:26 -0500 Received: from mga11.intel.com ([192.55.52.93]:62640) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1eFa6a-0000tS-TO for qemu-devel@nongnu.org; Fri, 17 Nov 2017 01:26:25 -0500 Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 16 Nov 2017 22:26:24 -0800 Received: from skl-4s-chao.sh.intel.com ([10.239.48.9]) by fmsmga004.fm.intel.com with ESMTP; 16 Nov 2017 22:26:22 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.44,407,1505804400"; d="scan'208";a="2622234" From: Chao Gao To: qemu-devel@nongnu.org Date: Fri, 17 Nov 2017 14:24:25 +0800 Message-Id: <1510899865-40323-4-git-send-email-chao.gao@intel.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1510899865-40323-1-git-send-email-chao.gao@intel.com> References: <1510899865-40323-1-git-send-email-chao.gao@intel.com> X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 192.55.52.93 Subject: [Qemu-devel] [PATCH v3 3/3] msi: Handle remappable format interrupt request X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , Stefano Stabellini , Eduardo Habkost , "Michael S. Tsirkin" , Anthony Perard , Paolo Bonzini , Marcel Apfelbaum , xen-devel@lists.xenproject.org, Chao Gao , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" According to VT-d spec Interrupt Remapping and Interrupt Posting -> Interrupt Remapping -> Interrupt Request Formats On Intel 64 Platforms, fields of MSI data register have changed. This patch avoids wrongly regarding a remappable format interrupt request as an interrupt binded with a pirq. Signed-off-by: Chao Gao Signed-off-by: Lan Tianyu --- v3: - clarify the interrupt format bit is Intel-specific, then it is improper to define MSI_ADDR_IF_MASK in a common header. --- hw/i386/xen/xen-hvm.c | 10 +++++++++- hw/pci/msi.c | 5 +++-- hw/pci/msix.c | 4 +++- hw/xen/xen_pt_msi.c | 2 +- include/hw/xen/xen.h | 2 +- stubs/xen-hvm.c | 2 +- 6 files changed, 18 insertions(+), 7 deletions(-) diff --git a/hw/i386/xen/xen-hvm.c b/hw/i386/xen/xen-hvm.c index 8028bed..52dc8af 100644 --- a/hw/i386/xen/xen-hvm.c +++ b/hw/i386/xen/xen-hvm.c @@ -145,8 +145,16 @@ void xen_piix_pci_write_config_client(uint32_t address= , uint32_t val, int len) } } =20 -int xen_is_pirq_msi(uint32_t msi_data) +int xen_is_pirq_msi(uint32_t msi_addr_lo, uint32_t msi_data) { + /* If the MSI address is configured in remapping format, the MSI will = not + * be remapped into a pirq. This 'if' test excludes Intel-specific + * remappable msi. + */ +#define MSI_ADDR_IF_MASK 0x00000010 + if (msi_addr_lo & MSI_ADDR_IF_MASK) { + return 0; + } /* If vector is 0, the msi is remapped into a pirq, passed as * dest_id. */ diff --git a/hw/pci/msi.c b/hw/pci/msi.c index 5e05ce5..d05c876 100644 --- a/hw/pci/msi.c +++ b/hw/pci/msi.c @@ -289,7 +289,7 @@ void msi_reset(PCIDevice *dev) static bool msi_is_masked(const PCIDevice *dev, unsigned int vector) { uint16_t flags =3D pci_get_word(dev->config + msi_flags_off(dev)); - uint32_t mask, data; + uint32_t mask, data, addr_lo; bool msi64bit =3D flags & PCI_MSI_FLAGS_64BIT; assert(vector < PCI_MSI_VECTORS_MAX); =20 @@ -298,7 +298,8 @@ static bool msi_is_masked(const PCIDevice *dev, unsigne= d int vector) } =20 data =3D pci_get_word(dev->config + msi_data_off(dev, msi64bit)); - if (xen_is_pirq_msi(data)) { + addr_lo =3D pci_get_long(dev->config + msi_address_lo_off(dev)); + if (xen_is_pirq_msi(addr_lo, data)) { return false; } =20 diff --git a/hw/pci/msix.c b/hw/pci/msix.c index c944c02..4cb01db 100644 --- a/hw/pci/msix.c +++ b/hw/pci/msix.c @@ -83,9 +83,11 @@ static bool msix_vector_masked(PCIDevice *dev, unsigned = int vector, bool fmask) { unsigned offset =3D vector * PCI_MSIX_ENTRY_SIZE; uint8_t *data =3D &dev->msix_table[offset + PCI_MSIX_ENTRY_DATA]; + uint8_t *addr_lo =3D &dev->msix_table[offset + PCI_MSIX_ENTRY_LOWER_AD= DR]; /* MSIs on Xen can be remapped into pirqs. In those cases, masking * and unmasking go through the PV evtchn path. */ - if (xen_enabled() && xen_is_pirq_msi(pci_get_long(data))) { + if (xen_enabled() && xen_is_pirq_msi(pci_get_long(addr_lo), + pci_get_long(data))) { return false; } return fmask || dev->msix_table[offset + PCI_MSIX_ENTRY_VECTOR_CTRL] & diff --git a/hw/xen/xen_pt_msi.c b/hw/xen/xen_pt_msi.c index f7d6e76..0e5bf83 100644 --- a/hw/xen/xen_pt_msi.c +++ b/hw/xen/xen_pt_msi.c @@ -96,7 +96,7 @@ static int msi_msix_setup(XenPCIPassthroughState *s, =20 assert((!is_msix && msix_entry =3D=3D 0) || is_msix); =20 - if (xen_is_pirq_msi(data)) { + if (xen_is_pirq_msi(addr, data)) { *ppirq =3D msi_ext_dest_id(addr >> 32) | msi_dest_id(addr); if (!*ppirq) { /* this probably identifies an misconfiguration of the guest, diff --git a/include/hw/xen/xen.h b/include/hw/xen/xen.h index 7efcdaa..0d6c83e 100644 --- a/include/hw/xen/xen.h +++ b/include/hw/xen/xen.h @@ -34,7 +34,7 @@ int xen_pci_slot_get_pirq(PCIDevice *pci_dev, int irq_num= ); void xen_piix3_set_irq(void *opaque, int irq_num, int level); void xen_piix_pci_write_config_client(uint32_t address, uint32_t val, int = len); void xen_hvm_inject_msi(uint64_t addr, uint32_t data); -int xen_is_pirq_msi(uint32_t msi_data); +int xen_is_pirq_msi(uint32_t msi_addr_lo, uint32_t msi_data); =20 qemu_irq *xen_interrupt_controller_init(void); =20 diff --git a/stubs/xen-hvm.c b/stubs/xen-hvm.c index 3ca6c51..aeb1592 100644 --- a/stubs/xen-hvm.c +++ b/stubs/xen-hvm.c @@ -31,7 +31,7 @@ void xen_hvm_inject_msi(uint64_t addr, uint32_t data) { } =20 -int xen_is_pirq_msi(uint32_t msi_data) +int xen_is_pirq_msi(uint32_t msi_addr_lo, uint32_t msi_data) { return 0; } --=20 1.8.3.1