From nobody Mon Apr 29 10:17:19 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1506513098519896.065572709606; Wed, 27 Sep 2017 04:51:38 -0700 (PDT) Received: from localhost ([::1]:54185 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dxAsH-0006gm-Jc for importer@patchew.org; Wed, 27 Sep 2017 07:51:33 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60362) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dxAqD-0005Wa-8L for qemu-devel@nongnu.org; Wed, 27 Sep 2017 07:49:26 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dxAqC-0008Df-2G for qemu-devel@nongnu.org; Wed, 27 Sep 2017 07:49:25 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37416) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dxAqB-0008DI-PH for qemu-devel@nongnu.org; Wed, 27 Sep 2017 07:49:23 -0400 Received: from smtp.corp.redhat.com (int-mx01.intmail.prod.int.phx2.redhat.com [10.5.11.11]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6FE98C058EA1; Wed, 27 Sep 2017 11:49:22 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4B2017F761; Wed, 27 Sep 2017 11:49:21 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 6FE98C058EA1 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=fail smtp.mailfrom=imammedo@redhat.com From: Igor Mammedov To: qemu-devel@nongnu.org Date: Wed, 27 Sep 2017 13:49:17 +0200 Message-Id: <1506512957-196068-1-git-send-email-imammedo@redhat.com> In-Reply-To: <20170927062143.GN12504@umbus> References: <20170927062143.GN12504@umbus> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.11 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 27 Sep 2017 11:49:22 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [RFC] ppc: define spapr core types statically X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: groug@kaod.org, david@gibson.dropbear.id.au Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" -- patch does 3 things at the same time and should be split but it has 'host' consolidation is it as well to demonstrate idea -- spapr core type definition doesn't have any fields that require it to be defined at runtime. So replace code that fills in TypeInfo at runtime with static TypeInfo array that does the same at complie time. And replace sPAPRCPUCoreClass::cpu_class with cpu type name since were used just to get that at points it were accessed. While at that, consolidate move 'host' core type registration into spapr_cpu_core.c, similar like it's done in x86 target. Signed-off-by: Igor Mammedov --- include/hw/ppc/spapr_cpu_core.h | 5 ++- hw/ppc/spapr.c | 6 +-- hw/ppc/spapr_cpu_core.c | 93 ++++++++++++++++---------------------= ---- target/ppc/kvm.c | 11 ----- 4 files changed, 41 insertions(+), 74 deletions(-) diff --git a/include/hw/ppc/spapr_cpu_core.h b/include/hw/ppc/spapr_cpu_cor= e.h index 93051e9..42765de 100644 --- a/include/hw/ppc/spapr_cpu_core.h +++ b/include/hw/ppc/spapr_cpu_core.h @@ -21,6 +21,8 @@ #define SPAPR_CPU_CORE_GET_CLASS(obj) \ OBJECT_GET_CLASS(sPAPRCPUCoreClass, (obj), TYPE_SPAPR_CPU_CORE) =20 +#define SPAPR_CPU_CORE_TYPE_NAME(model) model "-" TYPE_SPAPR_CPU_CORE + typedef struct sPAPRCPUCore { /*< private >*/ CPUCore parent_obj; @@ -32,9 +34,8 @@ typedef struct sPAPRCPUCore { =20 typedef struct sPAPRCPUCoreClass { DeviceClass parent_class; - ObjectClass *cpu_class; + const char *cpu_type; } sPAPRCPUCoreClass; =20 char *spapr_get_cpu_core_type(const char *model); -void spapr_cpu_core_class_init(ObjectClass *oc, void *data); #endif diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 8c1a437..00cfe9a 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3125,8 +3125,7 @@ void spapr_core_release(DeviceState *dev) if (smc->pre_2_10_has_unused_icps) { sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); - const char *typename =3D object_class_get_name(scc->cpu_class); - size_t size =3D object_type_get_instance_size(typename); + size_t size =3D object_type_get_instance_size(scc->cpu_type); int i; =20 for (i =3D 0; i < cc->nr_threads; i++) { @@ -3222,8 +3221,7 @@ static void spapr_core_plug(HotplugHandler *hotplug_d= ev, DeviceState *dev, =20 if (smc->pre_2_10_has_unused_icps) { sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(cc)); - const char *typename =3D object_class_get_name(scc->cpu_class); - size_t size =3D object_type_get_instance_size(typename); + size_t size =3D object_type_get_instance_size(scc->cpu_type); int i; =20 for (i =3D 0; i < cc->nr_threads; i++) { diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 5bea4c9..8a18eaf 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -104,8 +104,7 @@ static void spapr_cpu_core_unrealizefn(DeviceState *dev= , Error **errp) { sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); - const char *typename =3D object_class_get_name(scc->cpu_class); - size_t size =3D object_type_get_instance_size(typename); + size_t size =3D object_type_get_instance_size(scc->cpu_type); CPUCore *cc =3D CPU_CORE(dev); int i; =20 @@ -166,8 +165,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Er= ror **errp) sPAPRCPUCore *sc =3D SPAPR_CPU_CORE(OBJECT(dev)); sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_GET_CLASS(OBJECT(dev)); CPUCore *cc =3D CPU_CORE(OBJECT(dev)); - const char *typename =3D object_class_get_name(scc->cpu_class); - size_t size =3D object_type_get_instance_size(typename); + size_t size =3D object_type_get_instance_size(scc->cpu_type); Error *local_err =3D NULL; void *obj; int i, j; @@ -186,7 +184,7 @@ static void spapr_cpu_core_realize(DeviceState *dev, Er= ror **errp) =20 obj =3D sc->threads + i * size; =20 - object_initialize(obj, size, typename); + object_initialize(obj, size, scc->cpu_type); cs =3D CPU(obj); cpu =3D POWERPC_CPU(cs); cs->cpu_index =3D cc->core_id + i; @@ -231,42 +229,12 @@ err: error_propagate(errp, local_err); } =20 -static const char *spapr_core_models[] =3D { - /* 970 */ - "970_v2.2", - - /* 970MP variants */ - "970mp_v1.0", - "970mp_v1.1", - - /* POWER5+ */ - "power5+_v2.1", - - /* POWER7 */ - "power7_v2.3", - - /* POWER7+ */ - "power7+_v2.1", - - /* POWER8 */ - "power8_v2.0", - - /* POWER8E */ - "power8e_v2.1", - - /* POWER8NVL */ - "power8nvl_v1.0", - - /* POWER9 */ - "power9_v1.0", -}; - static Property spapr_cpu_core_properties[] =3D { DEFINE_PROP_INT32("node-id", sPAPRCPUCore, node_id, CPU_UNSET_NUMA_NOD= E_ID), DEFINE_PROP_END_OF_LIST() }; =20 -void spapr_cpu_core_class_init(ObjectClass *oc, void *data) +static void spapr_cpu_core_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); sPAPRCPUCoreClass *scc =3D SPAPR_CPU_CORE_CLASS(oc); @@ -274,36 +242,47 @@ void spapr_cpu_core_class_init(ObjectClass *oc, void = *data) dc->realize =3D spapr_cpu_core_realize; dc->unrealize =3D spapr_cpu_core_unrealizefn; dc->props =3D spapr_cpu_core_properties; - scc->cpu_class =3D cpu_class_by_name(TYPE_POWERPC_CPU, data); - g_assert(scc->cpu_class); + scc->cpu_type =3D data; } =20 -static const TypeInfo spapr_cpu_core_type_info =3D { - .name =3D TYPE_SPAPR_CPU_CORE, - .parent =3D TYPE_CPU_CORE, - .abstract =3D true, - .instance_size =3D sizeof(sPAPRCPUCore), - .class_size =3D sizeof(sPAPRCPUCoreClass), +#define DEFINE_SPAPR_CPU_CORE_TYPE(cpu_model) \ + { \ + .parent =3D TYPE_SPAPR_CPU_CORE, \ + .class_data =3D (void *) POWERPC_CPU_TYPE_NAME(cpu_model), \ + .class_init =3D spapr_cpu_core_class_init, \ + .name =3D SPAPR_CPU_CORE_TYPE_NAME(cpu_model), \ + } + +static const TypeInfo spapr_cpu_core_type_infos[] =3D { + { + .name =3D TYPE_SPAPR_CPU_CORE, + .parent =3D TYPE_CPU_CORE, + .abstract =3D true, + .instance_size =3D sizeof(sPAPRCPUCore), + .class_size =3D sizeof(sPAPRCPUCoreClass), + }, + DEFINE_SPAPR_CPU_CORE_TYPE("970_v2.2"), + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("970mp_v1.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power5+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7_v2.3"), + DEFINE_SPAPR_CPU_CORE_TYPE("power7+_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8_v2.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8e_v2.1"), + DEFINE_SPAPR_CPU_CORE_TYPE("power8nvl_v1.0"), + DEFINE_SPAPR_CPU_CORE_TYPE("power9_v1.0"), +#ifdef CONFIG_KVM + DEFINE_SPAPR_CPU_CORE_TYPE("host"), +#endif }; =20 static void spapr_cpu_core_register_types(void) { int i; =20 - type_register_static(&spapr_cpu_core_type_info); - - for (i =3D 0; i < ARRAY_SIZE(spapr_core_models); i++) { - TypeInfo type_info =3D { - .parent =3D TYPE_SPAPR_CPU_CORE, - .instance_size =3D sizeof(sPAPRCPUCore), - .class_init =3D spapr_cpu_core_class_init, - .class_data =3D (void *) spapr_core_models[i], - }; =20 - type_info.name =3D g_strdup_printf("%s-" TYPE_SPAPR_CPU_CORE, - spapr_core_models[i]); - type_register(&type_info); - g_free((void *)type_info.name); + for (i =3D 0; i < ARRAY_SIZE(spapr_cpu_core_type_infos); i++) { + type_register_static(&spapr_cpu_core_type_infos[i]); } } =20 diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c index 1deaf10..7e5c041 100644 --- a/target/ppc/kvm.c +++ b/target/ppc/kvm.c @@ -2507,17 +2507,6 @@ static int kvm_ppc_register_host_cpu_type(void) oc =3D object_class_by_name(type_info.name); g_assert(oc); =20 -#if defined(TARGET_PPC64) - type_info.name =3D g_strdup_printf("%s-"TYPE_SPAPR_CPU_CORE, "host"); - type_info.parent =3D TYPE_SPAPR_CPU_CORE, - type_info.instance_size =3D sizeof(sPAPRCPUCore); - type_info.instance_init =3D NULL; - type_info.class_init =3D spapr_cpu_core_class_init; - type_info.class_data =3D (void *) "host"; - type_register(&type_info); - g_free((void *)type_info.name); -#endif - /* * Update generic CPU family class alias (e.g. on a POWER8NVL host, * we want "POWER8" to be a "family" alias that points to the current --=20 2.7.4