From nobody Mon May 6 14:31:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; dkim=fail; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1506295387328516.5732502237474; Sun, 24 Sep 2017 16:23:07 -0700 (PDT) Received: from localhost ([::1]:39859 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dwGEn-0007i5-9v for importer@patchew.org; Sun, 24 Sep 2017 19:23:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:36297) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dwGDx-0007P3-Mb for qemu-devel@nongnu.org; Sun, 24 Sep 2017 19:22:10 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dwGDu-00048j-HP for qemu-devel@nongnu.org; Sun, 24 Sep 2017 19:22:09 -0400 Received: from mail-wr0-x242.google.com ([2a00:1450:400c:c0c::242]:32771) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1dwGDu-000482-Aj for qemu-devel@nongnu.org; Sun, 24 Sep 2017 19:22:06 -0400 Received: by mail-wr0-x242.google.com with SMTP id b9so570014wra.0 for ; Sun, 24 Sep 2017 16:22:05 -0700 (PDT) Received: from localhost.localdomain (broadband-95-84-133-170.moscow.rt.ru. [95.84.133.170]) by smtp.gmail.com with ESMTPSA id q70sm1153311lje.58.2017.09.24.16.22.02 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sun, 24 Sep 2017 16:22:02 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id; bh=5ZDPq0scF1dDmiRruWWz2yydhhyCbeapV8sZBQLnzeo=; b=n3FlHzQkEvn4Iqvyoq8MhGGG6qelo4WNSDu12KbI6vz+ZmqLS24tE4Lkg+rG1f8nn8 Tv1Bvgg8T8LVktVWofkja7sICZ5Tql3uhtvRq12ChnRAZ5QSorxSgyGUV3p2y9andiaQ 2G9EAyjq9xsN/+5bo62Csv771l3mFoFQkO4hr2PRsM6kW+8qL5ItlShq6r8IguNkPiM/ OVvouEhfhF7tOUJomkkj0lP/MP85RhiWhJeoIazdS4pJyWdjiuVOHv5Afo3V58b6cISw jqBealppSRUNNAta6kUaSoTUck8SBOZyT6OmQn337QycnO1qVvPy2IGZkFAjXN28rmQX cYeQ== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id; bh=5ZDPq0scF1dDmiRruWWz2yydhhyCbeapV8sZBQLnzeo=; b=J96q+JOk3RtcDQEvVlVXl7xD+lxdspdQUnQniZpVQUv80OYBEuT7vyVufUaPK9Dmk2 0D+Jz6jEdlvXsQp4Fu3W1sL+cvApGraokkQq4fRMG+571R0wvZXOH33z8v8j3nAhGx5W MiH38pnWlJBzBj/CzJoJxPRV2Py9q1scGOV4gu6osHARbXpUQMRRycY9JAhS2SmzSaZ5 y9HUC7zJthdrMMsmzstWTRUIwwFS/znL9SXfpgBCGHrH2IAGN36m1+O72aRirH+IczDJ ErjA6C8zwFm8Ox6J2fAtlu8KjhRi2BZ4KIgnLLJk+a346B7AdjlRntcKFYU33v1j4j1R QsEw== X-Gm-Message-State: AHPjjUhtSIjMH4r0FZ5rvTZrtuCy3PDhegRBDhoKGUMG1USoXx7pRkxg c8210RLQGcNpj0kvkS+QCrR1jQ== X-Google-Smtp-Source: AOwi7QC92jBA/WIaBhjgdIh5vWPMDQTVcrJw3zqFtJfgCFDL46vXhDXjSx9nqp3gv2a5+CpNQeaSVg== X-Received: by 10.46.21.84 with SMTP id 20mr1697542ljv.168.1506295323700; Sun, 24 Sep 2017 16:22:03 -0700 (PDT) From: Aleksandr Bezzubikov To: qemu-devel@nongnu.org Date: Mon, 25 Sep 2017 02:21:58 +0300 Message-Id: <1506295318-10479-1-git-send-email-zuban32s@gmail.com> X-Mailer: git-send-email 2.7.4 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2a00:1450:400c:c0c::242 Subject: [Qemu-devel] [PATCH v2] hw/pci-bridge/pcie_pci_bridge: properly handle MSI unavailability case X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: marcel@redhat.com, Aleksandr Bezzubikov , ehabkost@redhat.com, mst@redhat.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail-DKIM: fail (Header signature does not verify) X-ZohoMail: RDKM_2 RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" QEMU with the pcie-pci-bridge device crashes if the guest board doesn't sup= port MSI, e.g. 'qemu-system-ppc64 -M prep -device pcie-pci-bridge'. This is caused by wrong pcie-pci-bridge instantiation error handling. This = patch fixes this issue by falling back to legacy INTx if MSI is not available. Also set the bridge's 'msi' property default value to 'auto' in order to tr= igger errors=20 only when user explicitly set msi=3Don. v2: rewrite the commit message Reported-by: Eduardo Habkost Signed-off-by: Aleksandr Bezzubikov Reviewed-by: Marcel Apfelbaum Tested-by: Thomas Huth --- hw/pci-bridge/pcie_pci_bridge.c | 24 ++++++++++++++++++------ 1 file changed, 18 insertions(+), 6 deletions(-) diff --git a/hw/pci-bridge/pcie_pci_bridge.c b/hw/pci-bridge/pcie_pci_bridg= e.c index 9aa5cc3..da562fe 100644 --- a/hw/pci-bridge/pcie_pci_bridge.c +++ b/hw/pci-bridge/pcie_pci_bridge.c @@ -65,10 +65,18 @@ static void pcie_pci_bridge_realize(PCIDevice *d, Error= **errp) goto aer_error; } =20 + Error *local_err =3D NULL; if (pcie_br->msi !=3D ON_OFF_AUTO_OFF) { - rc =3D msi_init(d, 0, 1, true, true, errp); + rc =3D msi_init(d, 0, 1, true, true, &local_err); if (rc < 0) { - goto msi_error; + assert(rc =3D=3D -ENOTSUP); + if (pcie_br->msi !=3D ON_OFF_AUTO_ON) { + error_free(local_err); + } else { + /* failed to satisfy user's explicit request for MSI */ + error_propagate(errp, local_err); + goto msi_error; + } } } pci_register_bar(d, 0, PCI_BASE_ADDRESS_SPACE_MEMORY | @@ -81,7 +89,7 @@ aer_error: pm_error: pcie_cap_exit(d); cap_error: - shpc_free(d); + shpc_cleanup(d, &pcie_br->shpc_bar); error: pci_bridge_exitfn(d); } @@ -98,7 +106,9 @@ static void pcie_pci_bridge_reset(DeviceState *qdev) { PCIDevice *d =3D PCI_DEVICE(qdev); pci_bridge_reset(qdev); - msi_reset(d); + if (msi_present(d)) { + msi_reset(d); + } shpc_reset(d); } =20 @@ -106,12 +116,14 @@ static void pcie_pci_bridge_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { pci_bridge_write_config(d, address, val, len); - msi_write_config(d, address, val, len); + if (msi_present(d)) { + msi_write_config(d, address, val, len); + } shpc_cap_write_config(d, address, val, len); } =20 static Property pcie_pci_bridge_dev_properties[] =3D { - DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_ON), + DEFINE_PROP_ON_OFF_AUTO("msi", PCIEPCIBridge, msi, ON_OFF_AUTO_AUT= O), DEFINE_PROP_END_OF_LIST(), }; =20 --=20 2.7.4