From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040546539788.5446979338076; Fri, 14 Jul 2017 06:55:46 -0700 (PDT) Received: from localhost ([::1]:38138 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW14I-0004e7-3z for importer@patchew.org; Fri, 14 Jul 2017 09:55:42 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41073) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11H-0001Bw-0n for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11F-00017a-BC for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42526) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11F-00017M-24 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:33 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E685F7CE1D; Fri, 14 Jul 2017 13:52:31 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id D890B6BF68; Fri, 14 Jul 2017 13:52:28 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E685F7CE1D Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com E685F7CE1D From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:52 +0200 Message-Id: <1500040339-119465-2-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:52:32 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 01/28] mips: cpu: move mmu/fpu/mvp_init to realize time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yongbok Kim , Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it will help to replace custom cpu_mips_init() with cpu_generic_init(). Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- CC: Aurelien Jarno CC: Yongbok Kim --- target/mips/cpu.h | 3 +++ target/mips/cpu.c | 9 +++++++++ target/mips/translate.c | 7 ------- target/mips/translate_init.c | 6 +++--- 4 files changed, 15 insertions(+), 10 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 4a4747a..9c32228 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -1070,4 +1070,7 @@ static inline void QEMU_NORETURN do_raise_exception(C= PUMIPSState *env, do_raise_exception_err(env, exception, 0, pc); } =20 +void mips_cpu_mmu_init(CPUMIPSState *env, const mips_def_t *def); +void mips_cpu_fpu_init(CPUMIPSState *env, const mips_def_t *def); +void mips_cpu_mvp_init(CPUMIPSState *env, const mips_def_t *def); #endif /* MIPS_CPU_H */ diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 1bb66b7..82afdaa 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -122,9 +122,18 @@ static void mips_cpu_disas_set_info(CPUState *s, disas= semble_info *info) { static void mips_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); + MIPSCPU *cpu =3D MIPS_CPU(dev); + CPUMIPSState *env =3D &cpu->env; MIPSCPUClass *mcc =3D MIPS_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 + env->exception_base =3D (int32_t)0xBFC00000; +#ifndef CONFIG_USER_ONLY + mips_cpu_mmu_init(env, env->cpu_model); +#endif + mips_cpu_fpu_init(env, env->cpu_model); + mips_cpu_mvp_init(env, env->cpu_model); + cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); diff --git a/target/mips/translate.c b/target/mips/translate.c index 559f8fe..7b3ae81 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20203,13 +20203,6 @@ MIPSCPU *cpu_mips_init(const char *cpu_model) cpu =3D MIPS_CPU(object_new(TYPE_MIPS_CPU)); env =3D &cpu->env; env->cpu_model =3D def; - env->exception_base =3D (int32_t)0xBFC00000; - -#ifndef CONFIG_USER_ONLY - mmu_init(env, def); -#endif - fpu_init(env, def); - mvp_init(env, def); =20 object_property_set_bool(OBJECT(cpu), true, "realized", NULL); =20 diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c index 6ae23e4..c771ff1 100644 --- a/target/mips/translate_init.c +++ b/target/mips/translate_init.c @@ -851,7 +851,7 @@ static void r4k_mmu_init (CPUMIPSState *env, const mips= _def_t *def) env->tlb->helper_tlbinvf =3D r4k_helper_tlbinvf; } =20 -static void mmu_init (CPUMIPSState *env, const mips_def_t *def) +void mips_cpu_mmu_init(CPUMIPSState *env, const mips_def_t *def) { MIPSCPU *cpu =3D mips_env_get_cpu(env); =20 @@ -876,7 +876,7 @@ static void mmu_init (CPUMIPSState *env, const mips_def= _t *def) } #endif /* CONFIG_USER_ONLY */ =20 -static void fpu_init (CPUMIPSState *env, const mips_def_t *def) +void mips_cpu_fpu_init(CPUMIPSState *env, const mips_def_t *def) { int i; =20 @@ -886,7 +886,7 @@ static void fpu_init (CPUMIPSState *env, const mips_def= _t *def) memcpy(&env->active_fpu, &env->fpus[0], sizeof(env->active_fpu)); } =20 -static void mvp_init (CPUMIPSState *env, const mips_def_t *def) +void mips_cpu_mvp_init(CPUMIPSState *env, const mips_def_t *def) { env->mvp =3D g_malloc0(sizeof(CPUMIPSMVPContext)); =20 --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040578220509.2577083872675; Fri, 14 Jul 2017 06:56:18 -0700 (PDT) Received: from localhost ([::1]:38141 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW14p-00056R-1G for importer@patchew.org; Fri, 14 Jul 2017 09:56:15 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41092) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11K-0001GW-Ta for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:40 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11J-00018f-M2 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:38 -0400 Received: from mx1.redhat.com ([209.132.183.28]:28729) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11J-00018P-D4 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:37 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3F61D80480; Fri, 14 Jul 2017 13:52:36 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 37CFC60608; Fri, 14 Jul 2017 13:52:32 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 3F61D80480 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 3F61D80480 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:53 +0200 Message-Id: <1500040339-119465-3-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:52:36 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 02/28] mips: MIPSCPU model subclasses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Yongbok Kim , Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Register separate QOM types for each mips cpu model, so it would be possible to reuse generic CPU creation routines. Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- CC: Aurelien Jarno CC: Yongbok Kim --- target/mips/cpu-qom.h | 2 ++ target/mips/cpu.h | 57 ++++++++++++++++++++++++++++++++++++++++= +++- target/mips/cpu.c | 51 +++++++++++++++++++++++++++++++++++++++ target/mips/translate.c | 13 +++++----- target/mips/translate_init.c | 57 ++--------------------------------------= ---- 5 files changed, 117 insertions(+), 63 deletions(-) diff --git a/target/mips/cpu-qom.h b/target/mips/cpu-qom.h index 3f5bf23..4b32401 100644 --- a/target/mips/cpu-qom.h +++ b/target/mips/cpu-qom.h @@ -35,6 +35,7 @@ #define MIPS_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(MIPSCPUClass, (obj), TYPE_MIPS_CPU) =20 +typedef struct mips_def_t mips_def_t; /** * MIPSCPUClass: * @parent_realize: The parent class' realize handler. @@ -49,6 +50,7 @@ typedef struct MIPSCPUClass { =20 DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); + const mips_def_t *cpu_def; } MIPSCPUClass; =20 typedef struct MIPSCPU MIPSCPU; diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 9c32228..7c2e0bf 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -161,7 +161,62 @@ struct CPUMIPSMVPContext { #define CP0MVPC1_PCP1 0 }; =20 -typedef struct mips_def_t mips_def_t; +/* MMU types, the first four entries have the same layout as the + CP0C0_MT field. */ +enum mips_mmu_types { + MMU_TYPE_NONE, + MMU_TYPE_R4000, + MMU_TYPE_RESERVED, + MMU_TYPE_FMT, + MMU_TYPE_R3000, + MMU_TYPE_R6000, + MMU_TYPE_R8000 +}; + +struct mips_def_t { + const char *name; + int32_t CP0_PRid; + int32_t CP0_Config0; + int32_t CP0_Config1; + int32_t CP0_Config2; + int32_t CP0_Config3; + int32_t CP0_Config4; + int32_t CP0_Config4_rw_bitmask; + int32_t CP0_Config5; + int32_t CP0_Config5_rw_bitmask; + int32_t CP0_Config6; + int32_t CP0_Config7; + target_ulong CP0_LLAddr_rw_bitmask; + int CP0_LLAddr_shift; + int32_t SYNCI_Step; + int32_t CCRes; + int32_t CP0_Status_rw_bitmask; + int32_t CP0_TCStatus_rw_bitmask; + int32_t CP0_SRSCtl; + int32_t CP1_fcr0; + int32_t CP1_fcr31_rw_bitmask; + int32_t CP1_fcr31; + int32_t MSAIR; + int32_t SEGBITS; + int32_t PABITS; + int32_t CP0_SRSConf0_rw_bitmask; + int32_t CP0_SRSConf0; + int32_t CP0_SRSConf1_rw_bitmask; + int32_t CP0_SRSConf1; + int32_t CP0_SRSConf2_rw_bitmask; + int32_t CP0_SRSConf2; + int32_t CP0_SRSConf3_rw_bitmask; + int32_t CP0_SRSConf3; + int32_t CP0_SRSConf4_rw_bitmask; + int32_t CP0_SRSConf4; + int32_t CP0_PageGrain_rw_bitmask; + int32_t CP0_PageGrain; + int insn_flags; + enum mips_mmu_types mmu_type; +}; + +extern const struct mips_def_t mips_defs[]; +extern const int mips_defs_number; =20 #define MIPS_SHADOW_SET_MAX 16 #define MIPS_TC_MAX 5 diff --git a/target/mips/cpu.c b/target/mips/cpu.c index 82afdaa..111b5ae 100644 --- a/target/mips/cpu.c +++ b/target/mips/cpu.c @@ -151,12 +151,37 @@ static void mips_cpu_initfn(Object *obj) CPUState *cs =3D CPU(obj); MIPSCPU *cpu =3D MIPS_CPU(obj); CPUMIPSState *env =3D &cpu->env; + MIPSCPUClass *mcc =3D MIPS_CPU_GET_CLASS(obj); =20 cs->env_ptr =3D env; =20 if (tcg_enabled()) { mips_tcg_init(); } + + if (mcc->cpu_def) { + env->cpu_model =3D mcc->cpu_def; + } +} + +static char *mips_cpu_type_name(const char *cpu_model) +{ + return g_strdup_printf("%s-" TYPE_MIPS_CPU, cpu_model); +} + +static ObjectClass *mips_cpu_class_by_name(const char *cpu_model) +{ + ObjectClass *oc; + char *typename; + + if (cpu_model =3D=3D NULL) { + return NULL; + } + + typename =3D mips_cpu_type_name(cpu_model); + oc =3D object_class_by_name(typename); + g_free(typename); + return oc; } =20 static void mips_cpu_class_init(ObjectClass *c, void *data) @@ -171,6 +196,7 @@ static void mips_cpu_class_init(ObjectClass *c, void *d= ata) mcc->parent_reset =3D cc->reset; cc->reset =3D mips_cpu_reset; =20 + cc->class_by_name =3D mips_cpu_class_by_name; cc->has_work =3D mips_cpu_has_work; cc->do_interrupt =3D mips_cpu_do_interrupt; cc->cpu_exec_interrupt =3D mips_cpu_exec_interrupt; @@ -203,9 +229,34 @@ static const TypeInfo mips_cpu_type_info =3D { .class_init =3D mips_cpu_class_init, }; =20 +static void mips_cpu_cpudef_class_init(ObjectClass *oc, void *data) +{ + MIPSCPUClass *mcc =3D MIPS_CPU_CLASS(oc); + mcc->cpu_def =3D data; +} + +static void mips_register_cpudef_type(const struct mips_def_t *def) +{ + char *typename =3D mips_cpu_type_name(def->name); + TypeInfo ti =3D { + .name =3D typename, + .parent =3D TYPE_MIPS_CPU, + .class_init =3D mips_cpu_cpudef_class_init, + .class_data =3D (void *)def, + }; + + type_register(&ti); + g_free(typename); +} + static void mips_cpu_register_types(void) { + int i; + type_register_static(&mips_cpu_type_info); + for (i =3D 0; i < mips_defs_number; i++) { + mips_register_cpudef_type(&mips_defs[i]); + } } =20 type_init(mips_cpu_register_types) diff --git a/target/mips/translate.c b/target/mips/translate.c index 7b3ae81..ae7ca80 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20193,16 +20193,15 @@ void mips_tcg_init(void) =20 MIPSCPU *cpu_mips_init(const char *cpu_model) { + ObjectClass *oc; MIPSCPU *cpu; - CPUMIPSState *env; - const mips_def_t *def; =20 - def =3D cpu_mips_find_by_name(cpu_model); - if (!def) + oc =3D cpu_class_by_name(TYPE_MIPS_CPU, cpu_model); + if (oc =3D=3D NULL) { return NULL; - cpu =3D MIPS_CPU(object_new(TYPE_MIPS_CPU)); - env =3D &cpu->env; - env->cpu_model =3D def; + } + + cpu =3D MIPS_CPU(object_new(object_class_get_name(oc))); =20 object_property_set_bool(OBJECT(cpu), true, "realized", NULL); =20 diff --git a/target/mips/translate_init.c b/target/mips/translate_init.c index c771ff1..16c214b 100644 --- a/target/mips/translate_init.c +++ b/target/mips/translate_init.c @@ -51,63 +51,9 @@ #define MIPS_CONFIG5 \ ((0 << CP0C5_M)) =20 -/* MMU types, the first four entries have the same layout as the - CP0C0_MT field. */ -enum mips_mmu_types { - MMU_TYPE_NONE, - MMU_TYPE_R4000, - MMU_TYPE_RESERVED, - MMU_TYPE_FMT, - MMU_TYPE_R3000, - MMU_TYPE_R6000, - MMU_TYPE_R8000 -}; - -struct mips_def_t { - const char *name; - int32_t CP0_PRid; - int32_t CP0_Config0; - int32_t CP0_Config1; - int32_t CP0_Config2; - int32_t CP0_Config3; - int32_t CP0_Config4; - int32_t CP0_Config4_rw_bitmask; - int32_t CP0_Config5; - int32_t CP0_Config5_rw_bitmask; - int32_t CP0_Config6; - int32_t CP0_Config7; - target_ulong CP0_LLAddr_rw_bitmask; - int CP0_LLAddr_shift; - int32_t SYNCI_Step; - int32_t CCRes; - int32_t CP0_Status_rw_bitmask; - int32_t CP0_TCStatus_rw_bitmask; - int32_t CP0_SRSCtl; - int32_t CP1_fcr0; - int32_t CP1_fcr31_rw_bitmask; - int32_t CP1_fcr31; - int32_t MSAIR; - int32_t SEGBITS; - int32_t PABITS; - int32_t CP0_SRSConf0_rw_bitmask; - int32_t CP0_SRSConf0; - int32_t CP0_SRSConf1_rw_bitmask; - int32_t CP0_SRSConf1; - int32_t CP0_SRSConf2_rw_bitmask; - int32_t CP0_SRSConf2; - int32_t CP0_SRSConf3_rw_bitmask; - int32_t CP0_SRSConf3; - int32_t CP0_SRSConf4_rw_bitmask; - int32_t CP0_SRSConf4; - int32_t CP0_PageGrain_rw_bitmask; - int32_t CP0_PageGrain; - int insn_flags; - enum mips_mmu_types mmu_type; -}; - /*************************************************************************= ****/ /* MIPS CPU definitions */ -static const mips_def_t mips_defs[] =3D +const mips_def_t mips_defs[] =3D { { .name =3D "4Kc", @@ -803,6 +749,7 @@ static const mips_def_t mips_defs[] =3D =20 #endif }; +const int mips_defs_number =3D ARRAY_SIZE(mips_defs); =20 static const mips_def_t *cpu_mips_find_by_name (const char *name) { --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040721329601.2561201849888; Fri, 14 Jul 2017 06:58:41 -0700 (PDT) Received: from localhost ([::1]:38149 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW17A-0007BY-0A for importer@patchew.org; Fri, 14 Jul 2017 09:58:40 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41139) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11S-0001MV-BB for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11O-0001BN-Et for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44662) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11O-0001Ac-5O for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:42 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id E64CB7DCC4; Fri, 14 Jul 2017 13:52:40 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7F90260608; Fri, 14 Jul 2017 13:52:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com E64CB7DCC4 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com E64CB7DCC4 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:54 +0200 Message-Id: <1500040339-119465-4-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Fri, 14 Jul 2017 13:52:41 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 03/28] mips: replace cpu_mips_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , Yongbok Kim , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" now cpu_mips_init() reimplements subset of cpu_generic_init() tasks, so just drop it and use cpu_generic_init() directly. Signed-off-by: Igor Mammedov Reviewed-by: Herv=C3=A9 Poussineau Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- CC: Aurelien Jarno CC: Yongbok Kim CC: "Herv=C3=A9 Poussineau" --- target/mips/cpu.h | 3 +-- hw/mips/cps.c | 2 +- hw/mips/mips_fulong2e.c | 2 +- hw/mips/mips_jazz.c | 2 +- hw/mips/mips_malta.c | 2 +- hw/mips/mips_mipssim.c | 2 +- hw/mips/mips_r4k.c | 2 +- target/mips/translate.c | 17 ----------------- 8 files changed, 7 insertions(+), 25 deletions(-) diff --git a/target/mips/cpu.h b/target/mips/cpu.h index 7c2e0bf..efc8025 100644 --- a/target/mips/cpu.h +++ b/target/mips/cpu.h @@ -865,10 +865,9 @@ enum { #define CPU_INTERRUPT_WAKE CPU_INTERRUPT_TGT_INT_0 =20 void mips_tcg_init(void); -MIPSCPU *cpu_mips_init(const char *cpu_model); int cpu_mips_signal_handler(int host_signum, void *pinfo, void *puc); =20 -#define cpu_init(cpu_model) CPU(cpu_mips_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MIPS_CPU, cpu_model) bool cpu_supports_cps_smp(const char *cpu_model); bool cpu_supports_isa(const char *cpu_model, unsigned int isa); void cpu_set_exception_base(int vp_index, target_ulong address); diff --git a/hw/mips/cps.c b/hw/mips/cps.c index 4ef337d..708899c 100644 --- a/hw/mips/cps.c +++ b/hw/mips/cps.c @@ -71,7 +71,7 @@ static void mips_cps_realize(DeviceState *dev, Error **er= rp) bool itu_present =3D false; =20 for (i =3D 0; i < s->num_vp; i++) { - cpu =3D cpu_mips_init(s->cpu_model); + cpu =3D MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, s->cpu_model)); if (cpu =3D=3D NULL) { error_setg(errp, "%s: CPU initialization failed", __func__); return; diff --git a/hw/mips/mips_fulong2e.c b/hw/mips/mips_fulong2e.c index dbe2805..02a1712 100644 --- a/hw/mips/mips_fulong2e.c +++ b/hw/mips/mips_fulong2e.c @@ -277,7 +277,7 @@ static void mips_fulong2e_init(MachineState *machine) if (cpu_model =3D=3D NULL) { cpu_model =3D "Loongson-2E"; } - cpu =3D cpu_mips_init(cpu_model); + cpu =3D MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/mips/mips_jazz.c b/hw/mips/mips_jazz.c index 1cef581..ee58c44 100644 --- a/hw/mips/mips_jazz.c +++ b/hw/mips/mips_jazz.c @@ -151,7 +151,7 @@ static void mips_jazz_init(MachineState *machine, if (cpu_model =3D=3D NULL) { cpu_model =3D "R4000"; } - cpu =3D cpu_mips_init(cpu_model); + cpu =3D MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/mips/mips_malta.c b/hw/mips/mips_malta.c index 95cdabb..21dd2c3 100644 --- a/hw/mips/mips_malta.c +++ b/hw/mips/mips_malta.c @@ -928,7 +928,7 @@ static void create_cpu_without_cps(const char *cpu_mode= l, int i; =20 for (i =3D 0; i < smp_cpus; i++) { - cpu =3D cpu_mips_init(cpu_model); + cpu =3D MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/mips/mips_mipssim.c b/hw/mips/mips_mipssim.c index 1b91195..80e2bab 100644 --- a/hw/mips/mips_mipssim.c +++ b/hw/mips/mips_mipssim.c @@ -162,7 +162,7 @@ mips_mipssim_init(MachineState *machine) cpu_model =3D "24Kf"; #endif } - cpu =3D cpu_mips_init(cpu_model); + cpu =3D MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/mips/mips_r4k.c b/hw/mips/mips_r4k.c index f4de9fc..81dba5e 100644 --- a/hw/mips/mips_r4k.c +++ b/hw/mips/mips_r4k.c @@ -191,7 +191,7 @@ void mips_r4k_init(MachineState *machine) cpu_model =3D "24Kf"; #endif } - cpu =3D cpu_mips_init(cpu_model); + cpu =3D MIPS_CPU(cpu_generic_init(TYPE_MIPS_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/target/mips/translate.c b/target/mips/translate.c index ae7ca80..ad4242f 100644 --- a/target/mips/translate.c +++ b/target/mips/translate.c @@ -20191,23 +20191,6 @@ void mips_tcg_init(void) =20 #include "translate_init.c" =20 -MIPSCPU *cpu_mips_init(const char *cpu_model) -{ - ObjectClass *oc; - MIPSCPU *cpu; - - oc =3D cpu_class_by_name(TYPE_MIPS_CPU, cpu_model); - if (oc =3D=3D NULL) { - return NULL; - } - - cpu =3D MIPS_CPU(object_new(object_class_get_name(oc))); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; -} - bool cpu_supports_cps_smp(const char *cpu_model) { const mips_def_t *def =3D cpu_mips_find_by_name(cpu_model); --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040693344612.6795794613979; Fri, 14 Jul 2017 06:58:13 -0700 (PDT) Received: from localhost ([::1]:38146 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW16e-0006kB-6m for importer@patchew.org; Fri, 14 Jul 2017 09:58:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41166) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11T-0001Nh-Q6 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:49 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11S-0001DV-AL for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:47 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49578) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11R-0001CI-W6 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:46 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id A44FC7F407; Fri, 14 Jul 2017 13:52:44 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 39AC46BF71; Fri, 14 Jul 2017 13:52:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com A44FC7F407 Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com A44FC7F407 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:55 +0200 Message-Id: <1500040339-119465-5-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Fri, 14 Jul 2017 13:52:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 04/28] sparc: convert cpu models to SPARC cpu subclasses X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Mark Cave-Ayland , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" QOMfy cpu models handling introducing propper cpu types for each cpu model. Signed-off-by: Igor Mammedov --- with this and conversion of features to properties, it would be possible to replace cpu_sparc_init() with cpu_generic_init() and reuse common -cpu handling infrastructure. CC: Mark Cave-Ayland CC: Artyom Tarasenko --- target/sparc/cpu-qom.h | 2 + target/sparc/cpu.c | 119 +++++++++++++++++++++++++++++++++------------= ---- 2 files changed, 83 insertions(+), 38 deletions(-) diff --git a/target/sparc/cpu-qom.h b/target/sparc/cpu-qom.h index f63af72..af6d57a 100644 --- a/target/sparc/cpu-qom.h +++ b/target/sparc/cpu-qom.h @@ -35,6 +35,7 @@ #define SPARC_CPU_GET_CLASS(obj) \ OBJECT_GET_CLASS(SPARCCPUClass, (obj), TYPE_SPARC_CPU) =20 +typedef struct sparc_def_t sparc_def_t; /** * SPARCCPUClass: * @parent_realize: The parent class' realize handler. @@ -49,6 +50,7 @@ typedef struct SPARCCPUClass { =20 DeviceRealize parent_realize; void (*parent_reset)(CPUState *cpu); + sparc_def_t *cpu_def; } SPARCCPUClass; =20 typedef struct SPARCCPU SPARCCPU; diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index d606eb5..f8cf751 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -25,8 +25,6 @@ =20 //#define DEBUG_FEATURES =20 -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *cpu_mo= del); - /* CPUClass::reset() */ static void sparc_cpu_reset(CPUState *s) { @@ -111,17 +109,9 @@ static int cpu_sparc_register(SPARCCPU *cpu, const cha= r *cpu_model) { CPUSPARCState *env =3D &cpu->env; char *s =3D g_strdup(cpu_model); - char *featurestr, *name =3D strtok(s, ","); - sparc_def_t def1, *def =3D &def1; + char *featurestr =3D strtok(s, ","); Error *err =3D NULL; =20 - if (cpu_sparc_find_by_name(def, name) < 0) { - g_free(s); - return -1; - } - - env->def =3D g_memdup(def, sizeof(*def)); - featurestr =3D strtok(NULL, ","); sparc_cpu_parse_features(CPU(cpu), featurestr, &err); g_free(s); @@ -130,18 +120,18 @@ static int cpu_sparc_register(SPARCCPU *cpu, const ch= ar *cpu_model) return -1; } =20 - env->version =3D def->iu_version; - env->fsr =3D def->fpu_version; - env->nwindows =3D def->nwindows; + env->version =3D env->def->iu_version; + env->fsr =3D env->def->fpu_version; + env->nwindows =3D env->def->nwindows; #if !defined(TARGET_SPARC64) - env->mmuregs[0] |=3D def->mmu_version; + env->mmuregs[0] |=3D env->def->mmu_version; cpu_sparc_set_id(env, 0); - env->mxccregs[7] |=3D def->mxcc_version; + env->mxccregs[7] |=3D env->def->mxcc_version; #else - env->mmu_version =3D def->mmu_version; - env->maxtl =3D def->maxtl; - env->version |=3D def->maxtl << 8; - env->version |=3D def->nwindows - 1; + env->mmu_version =3D env->def->mmu_version; + env->maxtl =3D env->def->maxtl; + env->version |=3D env->def->maxtl << 8; + env->version |=3D env->def->nwindows - 1; #endif return 0; } @@ -149,8 +139,19 @@ static int cpu_sparc_register(SPARCCPU *cpu, const cha= r *cpu_model) SPARCCPU *cpu_sparc_init(const char *cpu_model) { SPARCCPU *cpu; + ObjectClass *oc; + char *str, *name; + + str =3D g_strdup(cpu_model); + name =3D strtok(str, ","); + oc =3D cpu_class_by_name(TYPE_SPARC_CPU, name); + if (oc =3D=3D NULL) { + g_free(str); + return NULL; + } + g_free(str); =20 - cpu =3D SPARC_CPU(object_new(TYPE_SPARC_CPU)); + cpu =3D SPARC_CPU(object_new(object_class_get_name(oc))); =20 if (cpu_sparc_register(cpu, cpu_model) < 0) { object_unref(OBJECT(cpu)); @@ -553,23 +554,6 @@ static void add_flagname_to_bitmaps(const char *flagna= me, uint32_t *features) error_report("CPU feature %s not found", flagname); } =20 -static int cpu_sparc_find_by_name(sparc_def_t *cpu_def, const char *name) -{ - unsigned int i; - const sparc_def_t *def =3D NULL; - - for (i =3D 0; i < ARRAY_SIZE(sparc_defs); i++) { - if (strcasecmp(name, sparc_defs[i].name) =3D=3D 0) { - def =3D &sparc_defs[i]; - } - } - if (!def) { - return -1; - } - memcpy(cpu_def, def, sizeof(*def)); - return 0; -} - static void sparc_cpu_parse_features(CPUState *cs, char *features, Error **errp) { @@ -796,6 +780,36 @@ static bool sparc_cpu_has_work(CPUState *cs) cpu_interrupts_enabled(env); } =20 +static char *sparc_cpu_type_name(const char *cpu_model) +{ + char *name =3D g_strdup_printf("%s-" TYPE_SPARC_CPU, cpu_model); + char *s =3D name; + + /* SPARC cpu model names happen to have whitespaces, + * as type names shouldn't have spaces replace them with '-' + */ + while ((s =3D strchr(s, ' '))) { + *s =3D '-'; + } + + return name; +} + +static ObjectClass *sparc_cpu_class_by_name(const char *cpu_model) +{ + ObjectClass *oc; + char *typename; + + if (cpu_model =3D=3D NULL) { + return NULL; + } + + typename =3D sparc_cpu_type_name(cpu_model); + oc =3D object_class_by_name(typename); + g_free(typename); + return oc; +} + static void sparc_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); @@ -825,6 +839,7 @@ static void sparc_cpu_initfn(Object *obj) { CPUState *cs =3D CPU(obj); SPARCCPU *cpu =3D SPARC_CPU(obj); + SPARCCPUClass *scc =3D SPARC_CPU_GET_CLASS(obj); CPUSPARCState *env =3D &cpu->env; =20 cs->env_ptr =3D env; @@ -832,6 +847,8 @@ static void sparc_cpu_initfn(Object *obj) if (tcg_enabled()) { gen_intermediate_code_init(env); } + + env->def =3D g_memdup(scc->cpu_def, sizeof(*scc->cpu_def)); } =20 static void sparc_cpu_uninitfn(Object *obj) @@ -854,6 +871,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) scc->parent_reset =3D cc->reset; cc->reset =3D sparc_cpu_reset; =20 + cc->class_by_name =3D sparc_cpu_class_by_name; cc->has_work =3D sparc_cpu_has_work; cc->do_interrupt =3D sparc_cpu_do_interrupt; cc->cpu_exec_interrupt =3D sparc_cpu_exec_interrupt; @@ -893,9 +911,34 @@ static const TypeInfo sparc_cpu_type_info =3D { .class_init =3D sparc_cpu_class_init, }; =20 +static void sparc_cpu_cpudef_class_init(ObjectClass *oc, void *data) +{ + SPARCCPUClass *scc =3D SPARC_CPU_CLASS(oc); + scc->cpu_def =3D data; +} + +static void sparc_register_cpudef_type(const struct sparc_def_t *def) +{ + char *typename =3D sparc_cpu_type_name(def->name); + TypeInfo ti =3D { + .name =3D typename, + .parent =3D TYPE_SPARC_CPU, + .class_init =3D sparc_cpu_cpudef_class_init, + .class_data =3D (void *)def, + }; + + type_register(&ti); + g_free(typename); +} + static void sparc_cpu_register_types(void) { + int i; + type_register_static(&sparc_cpu_type_info); + for (i =3D 0; i < ARRAY_SIZE(sparc_defs); i++) { + sparc_register_cpudef_type(&sparc_defs[i]); + } } =20 type_init(sparc_cpu_register_types) --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040482493467.09148900144487; Fri, 14 Jul 2017 06:54:42 -0700 (PDT) Received: from localhost ([::1]:38128 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW13H-0003IU-04 for importer@patchew.org; Fri, 14 Jul 2017 09:54:39 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41182) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11X-0001Qv-Gj for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:53 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11V-0001FY-OH for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:32894) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11V-0001EX-Fx for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:52:49 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3662CC0587E7; Fri, 14 Jul 2017 13:52:48 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id E9DA860632; Fri, 14 Jul 2017 13:52:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 3662CC0587E7 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 3662CC0587E7 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:56 +0200 Message-Id: <1500040339-119465-6-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 14 Jul 2017 13:52:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 05/28] sparc: embed sparc_def_t into CPUSPARCState X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Riku Voipio , Mark Cave-Ayland , Laurent Vivier , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Make CPUSPARCState::def embedded so it would be allocated as part of cpu instance and we won't have to worry about cleaning def pointer up mannualy on cpu destruction. Signed-off-by: Igor Mammedov --- Embedded CPUSPARCState::def also needed for follow up patch to use its fields with static qdev properties. CC: Riku Voipio CC: Laurent Vivier CC: Mark Cave-Ayland CC: Artyom Tarasenko --- linux-user/sparc/target_syscall.h | 2 +- target/sparc/cpu.h | 8 ++++---- target/sparc/cpu.c | 39 ++++++++++++++++-------------------= ---- target/sparc/int32_helper.c | 2 +- target/sparc/int64_helper.c | 2 +- target/sparc/ldst_helper.c | 14 +++++++------- target/sparc/mmu_helper.c | 2 +- target/sparc/translate.c | 2 +- target/sparc/win_helper.c | 4 ++-- 9 files changed, 34 insertions(+), 41 deletions(-) diff --git a/linux-user/sparc/target_syscall.h b/linux-user/sparc/target_sy= scall.h index f97aa6b..5f09abf 100644 --- a/linux-user/sparc/target_syscall.h +++ b/linux-user/sparc/target_syscall.h @@ -31,7 +31,7 @@ struct target_pt_regs { =20 static inline abi_ulong target_shmlba(CPUSPARCState *env) { - if (!(env->def->features & CPU_FEATURE_FLUSH)) { + if (!(env->def.features & CPU_FEATURE_FLUSH)) { return 64 * 1024; } else { return 256 * 1024; diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 95a36a4..0e41916 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -529,7 +529,7 @@ struct CPUSPARCState { #define SOFTINT_INTRMASK (0xFFFE) #define SOFTINT_REG_MASK (SOFTINT_STIMER|SOFTINT_INTRMASK|SOFTINT_TIMER) #endif - sparc_def_t *def; + sparc_def_t def; =20 void *irq_manager; void (*qemu_irq_ack)(CPUSPARCState *env, void *irq_manager, int intno); @@ -679,7 +679,7 @@ int cpu_sparc_signal_handler(int host_signum, void *pin= fo, void *puc); #if defined (TARGET_SPARC64) static inline int cpu_has_hypervisor(CPUSPARCState *env1) { - return env1->def->features & CPU_FEATURE_HYPV; + return env1->def.features & CPU_FEATURE_HYPV; } =20 static inline int cpu_hypervisor_mode(CPUSPARCState *env1) @@ -788,14 +788,14 @@ static inline void cpu_get_tb_cpu_state(CPUSPARCState= *env, target_ulong *pc, if (env->pstate & PS_AM) { flags |=3D TB_FLAG_AM_ENABLED; } - if ((env->def->features & CPU_FEATURE_FLOAT) + if ((env->def.features & CPU_FEATURE_FLOAT) && (env->pstate & PS_PEF) && (env->fprs & FPRS_FEF)) { flags |=3D TB_FLAG_FPU_ENABLED; } flags |=3D env->asi << TB_FLAG_ASI_SHIFT; #else - if ((env->def->features & CPU_FEATURE_FLOAT) && env->psref) { + if ((env->def.features & CPU_FEATURE_FLOAT) && env->psref) { flags |=3D TB_FLAG_FPU_ENABLED; } #endif diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index f8cf751..110a5cd 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -66,7 +66,7 @@ static void sparc_cpu_reset(CPUState *s) env->lsu =3D 0; #else env->mmuregs[0] &=3D ~(MMU_E | MMU_NF); - env->mmuregs[0] |=3D env->def->mmu_bm; + env->mmuregs[0] |=3D env->def.mmu_bm; #endif env->pc =3D 0; env->npc =3D env->pc + 4; @@ -120,18 +120,18 @@ static int cpu_sparc_register(SPARCCPU *cpu, const ch= ar *cpu_model) return -1; } =20 - env->version =3D env->def->iu_version; - env->fsr =3D env->def->fpu_version; - env->nwindows =3D env->def->nwindows; + env->version =3D env->def.iu_version; + env->fsr =3D env->def.fpu_version; + env->nwindows =3D env->def.nwindows; #if !defined(TARGET_SPARC64) - env->mmuregs[0] |=3D env->def->mmu_version; + env->mmuregs[0] |=3D env->def.mmu_version; cpu_sparc_set_id(env, 0); - env->mxccregs[7] |=3D env->def->mxcc_version; + env->mxccregs[7] |=3D env->def.mxcc_version; #else - env->mmu_version =3D env->def->mmu_version; - env->maxtl =3D env->def->maxtl; - env->version |=3D env->def->maxtl << 8; - env->version |=3D env->def->nwindows - 1; + env->mmu_version =3D env->def.mmu_version; + env->maxtl =3D env->def.maxtl; + env->version |=3D env->def.maxtl << 8; + env->version |=3D env->def.nwindows - 1; #endif return 0; } @@ -558,7 +558,7 @@ static void sparc_cpu_parse_features(CPUState *cs, char= *features, Error **errp) { SPARCCPU *cpu =3D SPARC_CPU(cs); - sparc_def_t *cpu_def =3D cpu->env.def; + sparc_def_t *cpu_def =3D &cpu->env.def; char *featurestr; uint32_t plus_features =3D 0; uint32_t minus_features =3D 0; @@ -819,8 +819,8 @@ static void sparc_cpu_realizefn(DeviceState *dev, Error= **errp) SPARCCPU *cpu =3D SPARC_CPU(dev); CPUSPARCState *env =3D &cpu->env; =20 - if ((env->def->features & CPU_FEATURE_FLOAT)) { - env->def->features |=3D CPU_FEATURE_FLOAT128; + if ((env->def.features & CPU_FEATURE_FLOAT)) { + env->def.features |=3D CPU_FEATURE_FLOAT128; } #endif =20 @@ -848,15 +848,9 @@ static void sparc_cpu_initfn(Object *obj) gen_intermediate_code_init(env); } =20 - env->def =3D g_memdup(scc->cpu_def, sizeof(*scc->cpu_def)); -} - -static void sparc_cpu_uninitfn(Object *obj) -{ - SPARCCPU *cpu =3D SPARC_CPU(obj); - CPUSPARCState *env =3D &cpu->env; - - g_free(env->def); + if (scc->cpu_def) { + env->def =3D *scc->cpu_def; + } } =20 static void sparc_cpu_class_init(ObjectClass *oc, void *data) @@ -905,7 +899,6 @@ static const TypeInfo sparc_cpu_type_info =3D { .parent =3D TYPE_CPU, .instance_size =3D sizeof(SPARCCPU), .instance_init =3D sparc_cpu_initfn, - .instance_finalize =3D sparc_cpu_uninitfn, .abstract =3D false, .class_size =3D sizeof(SPARCCPUClass), .class_init =3D sparc_cpu_class_init, diff --git a/target/sparc/int32_helper.c b/target/sparc/int32_helper.c index eec9a4d..c772492 100644 --- a/target/sparc/int32_helper.c +++ b/target/sparc/int32_helper.c @@ -108,7 +108,7 @@ void sparc_cpu_do_interrupt(CPUState *cs) #if !defined(CONFIG_USER_ONLY) if (env->psret =3D=3D 0) { if (cs->exception_index =3D=3D 0x80 && - env->def->features & CPU_FEATURE_TA0_SHUTDOWN) { + env->def.features & CPU_FEATURE_TA0_SHUTDOWN) { qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); } else { cpu_abort(cs, "Trap 0x%02x while interrupts disabled, Error st= ate", diff --git a/target/sparc/int64_helper.c b/target/sparc/int64_helper.c index f942973..f3e7f32 100644 --- a/target/sparc/int64_helper.c +++ b/target/sparc/int64_helper.c @@ -147,7 +147,7 @@ void sparc_cpu_do_interrupt(CPUState *cs) } } =20 - if (env->def->features & CPU_FEATURE_GL) { + if (env->def.features & CPU_FEATURE_GL) { tsptr->tstate |=3D (env->gl & 7ULL) << 40; cpu_gl_switch_gregs(env, env->gl + 1); env->gl++; diff --git a/target/sparc/ldst_helper.c b/target/sparc/ldst_helper.c index 57968d9..fb489cb 100644 --- a/target/sparc/ldst_helper.c +++ b/target/sparc/ldst_helper.c @@ -513,7 +513,7 @@ uint64_t helper_ld_asi(CPUSPARCState *env, target_ulong= addr, case 0x00: /* Leon3 Cache Control */ case 0x08: /* Leon3 Instruction Cache config */ case 0x0C: /* Leon3 Date Cache config */ - if (env->def->features & CPU_FEATURE_CACHE_CTRL) { + if (env->def.features & CPU_FEATURE_CACHE_CTRL) { ret =3D leon3_cache_control_ld(env, addr, size); } break; @@ -736,7 +736,7 @@ void helper_st_asi(CPUSPARCState *env, target_ulong add= r, uint64_t val, case 0x00: /* Leon3 Cache Control */ case 0x08: /* Leon3 Instruction Cache config */ case 0x0C: /* Leon3 Date Cache config */ - if (env->def->features & CPU_FEATURE_CACHE_CTRL) { + if (env->def.features & CPU_FEATURE_CACHE_CTRL) { leon3_cache_control_st(env, addr, val, size); } break; @@ -904,15 +904,15 @@ void helper_st_asi(CPUSPARCState *env, target_ulong a= ddr, uint64_t val, /* Mappings generated during no-fault mode are invalid in normal mode. */ if ((oldreg ^ env->mmuregs[reg]) - & (MMU_NF | env->def->mmu_bm)) { + & (MMU_NF | env->def.mmu_bm)) { tlb_flush(CPU(cpu)); } break; case 1: /* Context Table Pointer Register */ - env->mmuregs[reg] =3D val & env->def->mmu_ctpr_mask; + env->mmuregs[reg] =3D val & env->def.mmu_ctpr_mask; break; case 2: /* Context Register */ - env->mmuregs[reg] =3D val & env->def->mmu_cxr_mask; + env->mmuregs[reg] =3D val & env->def.mmu_cxr_mask; if (oldreg !=3D env->mmuregs[reg]) { /* we flush when the MMU context changes because QEMU has no MMU context support */ @@ -923,11 +923,11 @@ void helper_st_asi(CPUSPARCState *env, target_ulong a= ddr, uint64_t val, case 4: /* Synchronous Fault Address Register */ break; case 0x10: /* TLB Replacement Control Register */ - env->mmuregs[reg] =3D val & env->def->mmu_trcr_mask; + env->mmuregs[reg] =3D val & env->def.mmu_trcr_mask; break; case 0x13: /* Synchronous Fault Status Register with Read and Clear */ - env->mmuregs[3] =3D val & env->def->mmu_sfsr_mask; + env->mmuregs[3] =3D val & env->def.mmu_sfsr_mask; break; case 0x14: /* Synchronous Fault Address Register */ env->mmuregs[4] =3D val; diff --git a/target/sparc/mmu_helper.c b/target/sparc/mmu_helper.c index 8b4664d..126ea5e 100644 --- a/target/sparc/mmu_helper.c +++ b/target/sparc/mmu_helper.c @@ -95,7 +95,7 @@ static int get_physical_address(CPUSPARCState *env, hwadd= r *physical, if (mmu_idx =3D=3D MMU_PHYS_IDX) { *page_size =3D TARGET_PAGE_SIZE; /* Boot mode: instruction fetches are taken from PROM */ - if (rw =3D=3D 2 && (env->mmuregs[0] & env->def->mmu_bm)) { + if (rw =3D=3D 2 && (env->mmuregs[0] & env->def.mmu_bm)) { *physical =3D env->prom_addr | (address & 0x7ffffULL); *prot =3D PAGE_READ | PAGE_EXEC; return 0; diff --git a/target/sparc/translate.c b/target/sparc/translate.c index aa6734d..5641931 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -5765,7 +5765,7 @@ void gen_intermediate_code(CPUSPARCState * env, Trans= lationBlock * tb) dc->npc =3D (target_ulong) tb->cs_base; dc->cc_op =3D CC_OP_DYNAMIC; dc->mem_idx =3D tb->flags & TB_FLAG_MMU_MASK; - dc->def =3D env->def; + dc->def =3D &env->def; dc->fpu_enabled =3D tb_fpu_enabled(tb->flags); dc->address_mask_32bit =3D tb_am_enabled(tb->flags); dc->singlestep =3D (cs->singlestep_enabled || singlestep); diff --git a/target/sparc/win_helper.c b/target/sparc/win_helper.c index 154279e..8290a21 100644 --- a/target/sparc/win_helper.c +++ b/target/sparc/win_helper.c @@ -295,7 +295,7 @@ void helper_wrcwp(CPUSPARCState *env, target_ulong new_= cwp) =20 static inline uint64_t *get_gregset(CPUSPARCState *env, uint32_t pstate) { - if (env->def->features & CPU_FEATURE_GL) { + if (env->def.features & CPU_FEATURE_GL) { return env->glregs + (env->gl & 7) * 8; } =20 @@ -343,7 +343,7 @@ void cpu_change_pstate(CPUSPARCState *env, uint32_t new= _pstate) uint32_t pstate_regs, new_pstate_regs; uint64_t *src, *dst; =20 - if (env->def->features & CPU_FEATURE_GL) { + if (env->def.features & CPU_FEATURE_GL) { /* PS_AG, IG and MG are not implemented in this case */ new_pstate &=3D ~(PS_AG | PS_IG | PS_MG); env->pstate =3D new_pstate; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040638591319.44555912271176; Fri, 14 Jul 2017 06:57:18 -0700 (PDT) Received: from localhost ([::1]:38144 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW15p-00060O-Ah for importer@patchew.org; Fri, 14 Jul 2017 09:57:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41265) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11l-0001c7-7I for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11h-0001NT-97 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:54668) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11h-0001N2-0R for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:01 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id DA8F431CD56; Fri, 14 Jul 2017 13:52:59 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7C0CC60608; Fri, 14 Jul 2017 13:52:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com DA8F431CD56 Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com DA8F431CD56 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:57 +0200 Message-Id: <1500040339-119465-7-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Fri, 14 Jul 2017 13:53:00 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 06/28] sparc: convert cpu features to qdev properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Mark Cave-Ayland , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" SPARC is the last target that uses legacy way of parsing and initializing cpu features, drop legacy approach and convert features to properties so that SPARC could as minimum benefit from generic cpu_generic_init(), common with x86 +-feat parser PS: the main purpose is to remove legacy way of cpu creation as a blocker for unifying cpu creation code across targets. Signed-off-by: Igor Mammedov --- CC: Mark Cave-Ayland CC: Artyom Tarasenko --- target/sparc/cpu.c | 66 ++++++++++++++++++++++++++++++++++++++++++++++++++= ++++ 1 file changed, 66 insertions(+) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 110a5cd..cc89abc 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -22,6 +22,8 @@ #include "cpu.h" #include "qemu/error-report.h" #include "exec/exec-all.h" +#include "hw/qdev-properties.h" +#include "qapi/visitor.h" =20 //#define DEBUG_FEATURES =20 @@ -853,6 +855,69 @@ static void sparc_cpu_initfn(Object *obj) } } =20 +static void sparc_get_nwindows(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + SPARCCPU *cpu =3D SPARC_CPU(obj); + int64_t value =3D cpu->env.def.nwindows; + + visit_type_int(v, name, &value, errp); +} + +static void sparc_set_nwindows(Object *obj, Visitor *v, const char *name, + void *opaque, Error **errp) +{ + const int64_t min =3D MIN_NWINDOWS; + const int64_t max =3D MAX_NWINDOWS; + SPARCCPU *cpu =3D SPARC_CPU(obj); + Error *err =3D NULL; + int64_t value; + + visit_type_int(v, name, &value, &err); + if (err) { + error_propagate(errp, err); + return; + } + + if (value < min || value > max) { + error_setg(errp, "Property %s.%s doesn't take value %" PRId64 + " (minimum: %" PRId64 ", maximum: %" PRId64 ")", + object_get_typename(obj), name ? name : "null", + value, min, max); + return; + } + cpu->env.def.nwindows =3D value; +} + +static PropertyInfo qdev_prop_nwindows =3D { + .name =3D "int", + .get =3D sparc_get_nwindows, + .set =3D sparc_set_nwindows, +}; + +static Property sparc_cpu_properties[] =3D { + DEFINE_PROP_BIT("float", SPARCCPU, env.def.features, 0, false), + DEFINE_PROP_BIT("float128", SPARCCPU, env.def.features, 1, false), + DEFINE_PROP_BIT("swap", SPARCCPU, env.def.features, 2, false), + DEFINE_PROP_BIT("mul", SPARCCPU, env.def.features, 3, false), + DEFINE_PROP_BIT("div", SPARCCPU, env.def.features, 4, false), + DEFINE_PROP_BIT("flush", SPARCCPU, env.def.features, 5, false), + DEFINE_PROP_BIT("fsqrt", SPARCCPU, env.def.features, 6, false), + DEFINE_PROP_BIT("fmul", SPARCCPU, env.def.features, 7, false), + DEFINE_PROP_BIT("vis1", SPARCCPU, env.def.features, 8, false), + DEFINE_PROP_BIT("vis2", SPARCCPU, env.def.features, 9, false), + DEFINE_PROP_BIT("fsmuld", SPARCCPU, env.def.features, 10, false), + DEFINE_PROP_BIT("hypv", SPARCCPU, env.def.features, 11, false), + DEFINE_PROP_BIT("cmt", SPARCCPU, env.def.features, 12, false), + DEFINE_PROP_BIT("gl", SPARCCPU, env.def.features, 13, false), + DEFINE_PROP_UNSIGNED("iu-version", SPARCCPU, env.def.iu_version, 0, + qdev_prop_uint64, target_ulong), + DEFINE_PROP_UINT32("fpu-version", SPARCCPU, env.def.fpu_version, 0), + DEFINE_PROP_UINT32("mmu-version", SPARCCPU, env.def.mmu_version, 0), + { .name =3D "nwindows", .info =3D &qdev_prop_nwindows }, + DEFINE_PROP_END_OF_LIST() +}; + static void sparc_cpu_class_init(ObjectClass *oc, void *data) { SPARCCPUClass *scc =3D SPARC_CPU_CLASS(oc); @@ -861,6 +926,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) =20 scc->parent_realize =3D dc->realize; dc->realize =3D sparc_cpu_realizefn; + dc->props =3D sparc_cpu_properties; =20 scc->parent_reset =3D cc->reset; cc->reset =3D sparc_cpu_reset; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040831828333.0762640277841; Fri, 14 Jul 2017 07:00:31 -0700 (PDT) Received: from localhost ([::1]:38159 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW18w-0001GE-Jv for importer@patchew.org; Fri, 14 Jul 2017 10:00:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41269) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11l-0001cQ-Jf for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11k-0001QQ-OA for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:05 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38510) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11k-0001Pk-FN for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:04 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5A4937D0D4; Fri, 14 Jul 2017 13:53:03 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2CDBC6062B; Fri, 14 Jul 2017 13:53:00 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 5A4937D0D4 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 5A4937D0D4 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:58 +0200 Message-Id: <1500040339-119465-8-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 14 Jul 2017 13:53:03 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 07/28] sparc: move adhoc CPUSPARCState initialization to realize time X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Mark Cave-Ayland , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" SPARCCPU::env was initialized from previosuly set properties (with help of sparc_cpu_parse_features) in cpu_sparc_register(). However there is not reason to keep it there as this task is typically done at realize time. So move post properties initialization into sparc_cpu_realizefn, which brings cpu_sparc_init() closer to cpu_generic_init(). Signed-off-by: Igor Mammedov --- CC: Mark Cave-Ayland CC: Artyom Tarasenko --- target/sparc/cpu.c | 30 +++++++++++++++--------------- 1 file changed, 15 insertions(+), 15 deletions(-) diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index cc89abc..cb13540 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -109,7 +109,6 @@ static void sparc_cpu_parse_features(CPUState *cs, char= *features, =20 static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model) { - CPUSPARCState *env =3D &cpu->env; char *s =3D g_strdup(cpu_model); char *featurestr =3D strtok(s, ","); Error *err =3D NULL; @@ -122,19 +121,6 @@ static int cpu_sparc_register(SPARCCPU *cpu, const cha= r *cpu_model) return -1; } =20 - env->version =3D env->def.iu_version; - env->fsr =3D env->def.fpu_version; - env->nwindows =3D env->def.nwindows; -#if !defined(TARGET_SPARC64) - env->mmuregs[0] |=3D env->def.mmu_version; - cpu_sparc_set_id(env, 0); - env->mxccregs[7] |=3D env->def.mxcc_version; -#else - env->mmu_version =3D env->def.mmu_version; - env->maxtl =3D env->def.maxtl; - env->version |=3D env->def.maxtl << 8; - env->version |=3D env->def.nwindows - 1; -#endif return 0; } =20 @@ -817,15 +803,29 @@ static void sparc_cpu_realizefn(DeviceState *dev, Err= or **errp) CPUState *cs =3D CPU(dev); SPARCCPUClass *scc =3D SPARC_CPU_GET_CLASS(dev); Error *local_err =3D NULL; -#if defined(CONFIG_USER_ONLY) SPARCCPU *cpu =3D SPARC_CPU(dev); CPUSPARCState *env =3D &cpu->env; =20 +#if defined(CONFIG_USER_ONLY) if ((env->def.features & CPU_FEATURE_FLOAT)) { env->def.features |=3D CPU_FEATURE_FLOAT128; } #endif =20 + env->version =3D env->def.iu_version; + env->fsr =3D env->def.fpu_version; + env->nwindows =3D env->def.nwindows; +#if !defined(TARGET_SPARC64) + env->mmuregs[0] |=3D env->def.mmu_version; + cpu_sparc_set_id(env, 0); + env->mxccregs[7] |=3D env->def.mxcc_version; +#else + env->mmu_version =3D env->def.mmu_version; + env->maxtl =3D env->def.maxtl; + env->version |=3D env->def.maxtl << 8; + env->version |=3D env->def.nwindows - 1; +#endif + cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040878714598.0578683999037; Fri, 14 Jul 2017 07:01:18 -0700 (PDT) Received: from localhost ([::1]:38165 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW19c-0001uC-QE for importer@patchew.org; Fri, 14 Jul 2017 10:01:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41304) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11v-0001kL-DQ for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:17 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11r-0001Yr-Md for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:15 -0400 Received: from mx1.redhat.com ([209.132.183.28]:24666) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11r-0001Xg-Cs for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:11 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 3F88180478; Fri, 14 Jul 2017 13:53:10 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9E4B96062B; Fri, 14 Jul 2017 13:53:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 3F88180478 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 3F88180478 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:51:59 +0200 Message-Id: <1500040339-119465-9-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:53:10 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 08/28] x86: extract legacy cpu features format parser X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Riku Voipio , Laurent Vivier , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Move cpu_model +-feat parsing into a separate file so that it could be reused later for parsing similar format of sparc target Signed-off-by: Igor Mammedov --- CC: Riku Voipio CC: Laurent Vivier CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost --- include/qom/cpu.h | 6 ++ default-configs/i386-bsd-user.mak | 1 + default-configs/i386-linux-user.mak | 1 + default-configs/i386-softmmu.mak | 1 + default-configs/x86_64-bsd-user.mak | 1 + default-configs/x86_64-linux-user.mak | 1 + default-configs/x86_64-softmmu.mak | 1 + target/i386/cpu.c | 124 ++------------------------- util/Makefile.objs | 1 + util/legacy_cpu_features_parser.c | 153 ++++++++++++++++++++++++++++++= ++++ 10 files changed, 172 insertions(+), 118 deletions(-) create mode 100644 util/legacy_cpu_features_parser.c diff --git a/include/qom/cpu.h b/include/qom/cpu.h index 7bfd50c..60aea03 100644 --- a/include/qom/cpu.h +++ b/include/qom/cpu.h @@ -1039,4 +1039,10 @@ extern const struct VMStateDescription vmstate_cpu_c= ommon; =20 #define UNASSIGNED_CPU_INDEX -1 =20 +int cpu_legacy_apply_features(Object *obj, GList *features, bool enable, + Error **errp); + +void cpu_legacy_parse_featurestr(const char *typename, char *features, + GList **plus_features, GList **minus_feat= ures, + Error **errp); #endif diff --git a/default-configs/i386-bsd-user.mak b/default-configs/i386-bsd-u= ser.mak index af1b31a..b28a05f 100644 --- a/default-configs/i386-bsd-user.mak +++ b/default-configs/i386-bsd-user.mak @@ -1 +1,2 @@ # Default configuration for i386-bsd-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/i386-linux-user.mak b/default-configs/i386-lin= ux-user.mak index 8657e68..c136967 100644 --- a/default-configs/i386-linux-user.mak +++ b/default-configs/i386-linux-user.mak @@ -1 +1,2 @@ # Default configuration for i386-linux-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/i386-softmmu.mak b/default-configs/i386-softmm= u.mak index d2ab2f6..e3e7c0e 100644 --- a/default-configs/i386-softmmu.mak +++ b/default-configs/i386-softmmu.mak @@ -59,3 +59,4 @@ CONFIG_SMBIOS=3Dy CONFIG_HYPERV_TESTDEV=3D$(CONFIG_KVM) CONFIG_PXB=3Dy CONFIG_ACPI_VMGENID=3Dy +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/x86_64-bsd-user.mak b/default-configs/x86_64-b= sd-user.mak index 73e5d34..952323c 100644 --- a/default-configs/x86_64-bsd-user.mak +++ b/default-configs/x86_64-bsd-user.mak @@ -1 +1,2 @@ # Default configuration for x86_64-bsd-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/x86_64-linux-user.mak b/default-configs/x86_64= -linux-user.mak index bec1d9e..b513ef2 100644 --- a/default-configs/x86_64-linux-user.mak +++ b/default-configs/x86_64-linux-user.mak @@ -1 +1,2 @@ # Default configuration for x86_64-linux-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/x86_64-softmmu.mak b/default-configs/x86_64-so= ftmmu.mak index 9bde2f1..6594ddf 100644 --- a/default-configs/x86_64-softmmu.mak +++ b/default-configs/x86_64-softmmu.mak @@ -59,3 +59,4 @@ CONFIG_SMBIOS=3Dy CONFIG_HYPERV_TESTDEV=3D$(CONFIG_KVM) CONFIG_PXB=3Dy CONFIG_ACPI_VMGENID=3Dy +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/target/i386/cpu.c b/target/i386/cpu.c index c571772..91d3684 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -17,7 +17,6 @@ * License along with this library; if not, see . */ #include "qemu/osdep.h" -#include "qemu/cutils.h" =20 #include "cpu.h" #include "exec/exec-all.h" @@ -1970,13 +1969,6 @@ static PropertyInfo qdev_prop_spinlocks =3D { /* Convert all '_' in a feature string option name to '-', to make feature * name conform to QOM property naming rule, which uses '-' instead of '_'. */ -static inline void feat2prop(char *s) -{ - while ((s =3D strchr(s, '_'))) { - *s =3D '-'; - } -} - /* Return the feature property name for a feature flag bit */ static const char *x86_cpu_feature_name(FeatureWord w, int bitnr) { @@ -2005,100 +1997,11 @@ static const char *x86_cpu_feature_name(FeatureWor= d w, int bitnr) */ static GList *plus_features, *minus_features; =20 -static gint compare_string(gconstpointer a, gconstpointer b) -{ - return g_strcmp0(a, b); -} - -/* Parse "+feature,-feature,feature=3Dfoo" CPU feature string - */ static void x86_cpu_parse_featurestr(const char *typename, char *features, Error **errp) { - char *featurestr; /* Single 'key=3Dvalue" string being parsed */ - static bool cpu_globals_initialized; - bool ambiguous =3D false; - - if (cpu_globals_initialized) { - return; - } - cpu_globals_initialized =3D true; - - if (!features) { - return; - } - - for (featurestr =3D strtok(features, ","); - featurestr; - featurestr =3D strtok(NULL, ",")) { - const char *name; - const char *val =3D NULL; - char *eq =3D NULL; - char num[32]; - GlobalProperty *prop; - - /* Compatibility syntax: */ - if (featurestr[0] =3D=3D '+') { - plus_features =3D g_list_append(plus_features, - g_strdup(featurestr + 1)); - continue; - } else if (featurestr[0] =3D=3D '-') { - minus_features =3D g_list_append(minus_features, - g_strdup(featurestr + 1)); - continue; - } - - eq =3D strchr(featurestr, '=3D'); - if (eq) { - *eq++ =3D 0; - val =3D eq; - } else { - val =3D "on"; - } - - feat2prop(featurestr); - name =3D featurestr; - - if (g_list_find_custom(plus_features, name, compare_string)) { - error_report("warning: Ambiguous CPU model string. " - "Don't mix both \"+%s\" and \"%s=3D%s\"", - name, name, val); - ambiguous =3D true; - } - if (g_list_find_custom(minus_features, name, compare_string)) { - error_report("warning: Ambiguous CPU model string. " - "Don't mix both \"-%s\" and \"%s=3D%s\"", - name, name, val); - ambiguous =3D true; - } - - /* Special case: */ - if (!strcmp(name, "tsc-freq")) { - int ret; - uint64_t tsc_freq; - - ret =3D qemu_strtosz_metric(val, NULL, &tsc_freq); - if (ret < 0 || tsc_freq > INT64_MAX) { - error_setg(errp, "bad numerical value %s", val); - return; - } - snprintf(num, sizeof(num), "%" PRId64, tsc_freq); - val =3D num; - name =3D "tsc-frequency"; - } - - prop =3D g_new0(typeof(*prop), 1); - prop->driver =3D typename; - prop->property =3D g_strdup(name); - prop->value =3D g_strdup(val); - prop->errp =3D &error_fatal; - qdev_prop_register_global(prop); - } - - if (ambiguous) { - error_report("warning: Compatibility of ambiguous CPU model " - "strings won't be kept on future QEMU versions"); - } + cpu_legacy_parse_featurestr(typename, features, + &plus_features, &minus_features, errp); } =20 static void x86_cpu_expand_features(X86CPU *cpu, Error **errp); @@ -3370,8 +3273,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Erro= r **errp) { CPUX86State *env =3D &cpu->env; FeatureWord w; - GList *l; - Error *local_err =3D NULL; =20 /*TODO: Now cpu->max_features doesn't overwrite features * set using QOM properties, and we can convert @@ -3389,20 +3290,12 @@ static void x86_cpu_expand_features(X86CPU *cpu, Er= ror **errp) } } =20 - for (l =3D plus_features; l; l =3D l->next) { - const char *prop =3D l->data; - object_property_set_bool(OBJECT(cpu), true, prop, &local_err); - if (local_err) { - goto out; - } + if (cpu_legacy_apply_features(OBJECT(cpu), plus_features, true, errp))= { + return; } =20 - for (l =3D minus_features; l; l =3D l->next) { - const char *prop =3D l->data; - object_property_set_bool(OBJECT(cpu), false, prop, &local_err); - if (local_err) { - goto out; - } + if (cpu_legacy_apply_features(OBJECT(cpu), minus_features, false, errp= )) { + return; } =20 if (!kvm_enabled() || !cpu->expose_kvm) { @@ -3440,11 +3333,6 @@ static void x86_cpu_expand_features(X86CPU *cpu, Err= or **errp) if (env->cpuid_xlevel2 =3D=3D UINT32_MAX) { env->cpuid_xlevel2 =3D env->cpuid_min_xlevel2; } - -out: - if (local_err !=3D NULL) { - error_propagate(errp, local_err); - } } =20 /* diff --git a/util/Makefile.objs b/util/Makefile.objs index 50a55ec..14e28f7 100644 --- a/util/Makefile.objs +++ b/util/Makefile.objs @@ -45,3 +45,4 @@ util-obj-y +=3D qht.o util-obj-y +=3D range.o util-obj-y +=3D stats64.o util-obj-y +=3D systemd.o +util-obj-$(CONFIG_LEGACY_CPU_FEATURES) +=3D legacy_cpu_features_parser.o diff --git a/util/legacy_cpu_features_parser.c b/util/legacy_cpu_features_p= arser.c new file mode 100644 index 0000000..f2e3b81 --- /dev/null +++ b/util/legacy_cpu_features_parser.c @@ -0,0 +1,153 @@ +/* Support for legacy -cpu cpu,features CLI option with +-feat syntax, + * used by x86/sparc targets + * + * Author: Andreas F=C3=A4rber + * Author: Andre Przywara + * Author: Eduardo Habkost + * Author: Igor Mammedov + * Author: Paolo Bonzini + * Author: Markus Armbruster + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + + * You should have received a copy of the GNU General Public License along + * with this program; if not, see . + */ + +#include "qemu/osdep.h" +#include "qapi/error.h" +#include "qemu/cutils.h" +#include "qom/cpu.h" +#include "qemu/error-report.h" +#include "hw/qdev-properties.h" + +/* DO NOT USE WITH NEW CODE */ +int cpu_legacy_apply_features(Object *obj, GList *features, bool enable, + Error **errp) +{ + GList *l; + Error *local_err =3D NULL; + + for (l =3D features; l; l =3D l->next) { + const char *prop =3D l->data; + object_property_set_bool(obj, enable, prop, &local_err); + if (local_err) { + error_propagate(errp, local_err); + return 1; + } + } + return 0; +} + +static inline void feat2prop(char *s) +{ + while ((s =3D strchr(s, '_'))) { + *s =3D '-'; + } +} + +static gint compare_string(gconstpointer a, gconstpointer b) +{ + return g_strcmp0(a, b); +} + +/* DO NOT USE WITH NEW CODE + * Parse "+feature,-feature,feature=3Dfoo" CPU feature string + */ +void cpu_legacy_parse_featurestr(const char *typename, char *features, + GList **plus_features, GList **minus_feat= ures, + Error **errp) +{ + char *featurestr; /* Single 'key=3Dvalue" string being parsed */ + static bool cpu_globals_initialized; + bool ambiguous =3D false; + + if (cpu_globals_initialized) { + return; + } + cpu_globals_initialized =3D true; + + if (!features) { + return; + } + + for (featurestr =3D strtok(features, ","); + featurestr; + featurestr =3D strtok(NULL, ",")) { + const char *name; + const char *val =3D NULL; + char *eq =3D NULL; + char num[32]; + GlobalProperty *prop; + + /* Compatibility syntax: */ + if (featurestr[0] =3D=3D '+') { + *plus_features =3D g_list_append(*plus_features, + g_strdup(featurestr + 1)); + continue; + } else if (featurestr[0] =3D=3D '-') { + *minus_features =3D g_list_append(*minus_features, + g_strdup(featurestr + 1)); + continue; + } + + eq =3D strchr(featurestr, '=3D'); + if (eq) { + *eq++ =3D 0; + val =3D eq; + } else { + val =3D "on"; + } + + feat2prop(featurestr); + name =3D featurestr; + + if (g_list_find_custom(*plus_features, name, compare_string)) { + error_report("warning: Ambiguous CPU model string. " + "Don't mix both \"+%s\" and \"%s=3D%s\"", + name, name, val); + ambiguous =3D true; + } + if (g_list_find_custom(*minus_features, name, compare_string)) { + error_report("warning: Ambiguous CPU model string. " + "Don't mix both \"-%s\" and \"%s=3D%s\"", + name, name, val); + ambiguous =3D true; + } + + /* Special case: */ + if (!strcmp(name, "tsc-freq")) { + int ret; + uint64_t tsc_freq; + + ret =3D qemu_strtosz_metric(val, NULL, &tsc_freq); + if (ret < 0 || tsc_freq > INT64_MAX) { + error_setg(errp, "bad numerical value %s", val); + return; + } + snprintf(num, sizeof(num), "%" PRId64, tsc_freq); + val =3D num; + name =3D "tsc-frequency"; + } + + prop =3D g_new0(typeof(*prop), 1); + prop->driver =3D typename; + prop->property =3D g_strdup(name); + prop->value =3D g_strdup(val); + prop->errp =3D &error_fatal; + qdev_prop_register_global(prop); + } + + if (ambiguous) { + error_report("warning: Compatibility of ambiguous CPU model " + "strings won't be kept on future QEMU versions"); + } +} --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041002540663.4827496349324; Fri, 14 Jul 2017 07:03:22 -0700 (PDT) Received: from localhost ([::1]:38171 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1Bc-0003T5-Tq for importer@patchew.org; Fri, 14 Jul 2017 10:03:17 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41311) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11w-0001lG-LL for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:18 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11v-0001ag-6m for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:16 -0400 Received: from mx1.redhat.com ([209.132.183.28]:35480) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11u-0001aJ-U5 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:15 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id C16C1C0587E7; Fri, 14 Jul 2017 13:53:13 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8483F6062B; Fri, 14 Jul 2017 13:53:10 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com C16C1C0587E7 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com C16C1C0587E7 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:00 +0200 Message-Id: <1500040339-119465-10-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 14 Jul 2017 13:53:14 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 09/28] sparc: replace custom cpu feature parsing with cpu_legacy_parse_featurestr() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Riku Voipio , Mark Cave-Ayland , Laurent Vivier , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" with features converted to properties we can reuse shared with x86 cpu_legacy_parse_featurestr() for features parsing and drop legacy parser that manipulated CPU directly. With that in place and sparc_cpu_parse_features() providing generic CPUClass::parse_features callback, the cpu_sparc_init() will do the same job as cpu_generic_init() so replace content of cpu_sparc_init() with it. Signed-off-by: Igor Mammedov --- CC: Riku Voipio CC: Laurent Vivier CC: Mark Cave-Ayland CC: Artyom Tarasenko --- default-configs/sparc-bsd-user.mak | 1 + default-configs/sparc-linux-user.mak | 1 + default-configs/sparc-softmmu.mak | 1 + default-configs/sparc32plus-linux-user.mak | 1 + default-configs/sparc64-bsd-user.mak | 1 + default-configs/sparc64-linux-user.mak | 1 + default-configs/sparc64-softmmu.mak | 1 + target/sparc/cpu.c | 160 ++++---------------------= ---- 8 files changed, 27 insertions(+), 140 deletions(-) diff --git a/default-configs/sparc-bsd-user.mak b/default-configs/sparc-bsd= -user.mak index 21e0950..caea9ea 100644 --- a/default-configs/sparc-bsd-user.mak +++ b/default-configs/sparc-bsd-user.mak @@ -1 +1,2 @@ # Default configuration for sparc-bsd-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/sparc-linux-user.mak b/default-configs/sparc-l= inux-user.mak index 9c716d1..0f23504 100644 --- a/default-configs/sparc-linux-user.mak +++ b/default-configs/sparc-linux-user.mak @@ -1 +1,2 @@ # Default configuration for sparc-linux-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/sparc-softmmu.mak b/default-configs/sparc-soft= mmu.mak index 004b0f4..d8fa9fd 100644 --- a/default-configs/sparc-softmmu.mak +++ b/default-configs/sparc-softmmu.mak @@ -18,3 +18,4 @@ CONFIG_GRLIB=3Dy CONFIG_STP2000=3Dy CONFIG_ECCMEMCTL=3Dy CONFIG_SUN4M=3Dy +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/sparc32plus-linux-user.mak b/default-configs/s= parc32plus-linux-user.mak index 432e880..e3cc16b 100644 --- a/default-configs/sparc32plus-linux-user.mak +++ b/default-configs/sparc32plus-linux-user.mak @@ -1 +1,2 @@ # Default configuration for sparc32plus-linux-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/sparc64-bsd-user.mak b/default-configs/sparc64= -bsd-user.mak index b8b9eea..25bfa1f 100644 --- a/default-configs/sparc64-bsd-user.mak +++ b/default-configs/sparc64-bsd-user.mak @@ -1 +1,2 @@ # Default configuration for sparc64-bsd-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/sparc64-linux-user.mak b/default-configs/sparc= 64-linux-user.mak index bf1bdd6..7c8a9f0 100644 --- a/default-configs/sparc64-linux-user.mak +++ b/default-configs/sparc64-linux-user.mak @@ -1 +1,2 @@ # Default configuration for sparc64-linux-user +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/default-configs/sparc64-softmmu.mak b/default-configs/sparc64-= softmmu.mak index d07876a..658546a 100644 --- a/default-configs/sparc64-softmmu.mak +++ b/default-configs/sparc64-softmmu.mak @@ -16,3 +16,4 @@ CONFIG_MC146818RTC=3Dy CONFIG_ISA_TESTDEV=3Dy CONFIG_EMPTY_SLOT=3Dy CONFIG_SUN4V_RTC=3Dy +CONFIG_LEGACY_CPU_FEATURES=3Dy diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index cb13540..1271b7f 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -104,51 +104,23 @@ static void cpu_sparc_disas_set_info(CPUState *cpu, d= isassemble_info *info) #endif } =20 -static void sparc_cpu_parse_features(CPUState *cs, char *features, - Error **errp); +/* Compatibily hack to maintain legacy +-feat semantic, + * where +-feat overwrites any feature set by + * feat=3Don|feat even if the later is parsed after +-feat + * (i.e. "-float,float=3Don" will result in "float" disabled) + */ +static GList *plus_features, *minus_features; =20 -static int cpu_sparc_register(SPARCCPU *cpu, const char *cpu_model) +static void sparc_cpu_parse_features(const char *typename, char *features, + Error **errp) { - char *s =3D g_strdup(cpu_model); - char *featurestr =3D strtok(s, ","); - Error *err =3D NULL; - - featurestr =3D strtok(NULL, ","); - sparc_cpu_parse_features(CPU(cpu), featurestr, &err); - g_free(s); - if (err) { - error_report_err(err); - return -1; - } - - return 0; + cpu_legacy_parse_featurestr(typename, features, + &plus_features, &minus_features, errp); } =20 SPARCCPU *cpu_sparc_init(const char *cpu_model) { - SPARCCPU *cpu; - ObjectClass *oc; - char *str, *name; - - str =3D g_strdup(cpu_model); - name =3D strtok(str, ","); - oc =3D cpu_class_by_name(TYPE_SPARC_CPU, name); - if (oc =3D=3D NULL) { - g_free(str); - return NULL; - } - g_free(str); - - cpu =3D SPARC_CPU(object_new(object_class_get_name(oc))); - - if (cpu_sparc_register(cpu, cpu_model) < 0) { - object_unref(OBJECT(cpu)); - return NULL; - } - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; + return SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model)); } =20 void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu) @@ -529,107 +501,6 @@ static void print_features(FILE *f, fprintf_function = cpu_fprintf, } } =20 -static void add_flagname_to_bitmaps(const char *flagname, uint32_t *featur= es) -{ - unsigned int i; - - for (i =3D 0; i < ARRAY_SIZE(feature_name); i++) { - if (feature_name[i] && !strcmp(flagname, feature_name[i])) { - *features |=3D 1 << i; - return; - } - } - error_report("CPU feature %s not found", flagname); -} - -static void sparc_cpu_parse_features(CPUState *cs, char *features, - Error **errp) -{ - SPARCCPU *cpu =3D SPARC_CPU(cs); - sparc_def_t *cpu_def =3D &cpu->env.def; - char *featurestr; - uint32_t plus_features =3D 0; - uint32_t minus_features =3D 0; - uint64_t iu_version; - uint32_t fpu_version, mmu_version, nwindows; - - featurestr =3D features ? strtok(features, ",") : NULL; - while (featurestr) { - char *val; - - if (featurestr[0] =3D=3D '+') { - add_flagname_to_bitmaps(featurestr + 1, &plus_features); - } else if (featurestr[0] =3D=3D '-') { - add_flagname_to_bitmaps(featurestr + 1, &minus_features); - } else if ((val =3D strchr(featurestr, '=3D'))) { - *val =3D 0; val++; - if (!strcmp(featurestr, "iu_version")) { - char *err; - - iu_version =3D strtoll(val, &err, 0); - if (!*val || *err) { - error_setg(errp, "bad numerical value %s", val); - return; - } - cpu_def->iu_version =3D iu_version; -#ifdef DEBUG_FEATURES - fprintf(stderr, "iu_version %" PRIx64 "\n", iu_version); -#endif - } else if (!strcmp(featurestr, "fpu_version")) { - char *err; - - fpu_version =3D strtol(val, &err, 0); - if (!*val || *err) { - error_setg(errp, "bad numerical value %s", val); - return; - } - cpu_def->fpu_version =3D fpu_version; -#ifdef DEBUG_FEATURES - fprintf(stderr, "fpu_version %x\n", fpu_version); -#endif - } else if (!strcmp(featurestr, "mmu_version")) { - char *err; - - mmu_version =3D strtol(val, &err, 0); - if (!*val || *err) { - error_setg(errp, "bad numerical value %s", val); - return; - } - cpu_def->mmu_version =3D mmu_version; -#ifdef DEBUG_FEATURES - fprintf(stderr, "mmu_version %x\n", mmu_version); -#endif - } else if (!strcmp(featurestr, "nwindows")) { - char *err; - - nwindows =3D strtol(val, &err, 0); - if (!*val || *err || nwindows > MAX_NWINDOWS || - nwindows < MIN_NWINDOWS) { - error_setg(errp, "bad numerical value %s", val); - return; - } - cpu_def->nwindows =3D nwindows; -#ifdef DEBUG_FEATURES - fprintf(stderr, "nwindows %d\n", nwindows); -#endif - } else { - error_setg(errp, "unrecognized feature %s", featurestr); - return; - } - } else { - error_setg(errp, "feature string `%s' not in format " - "(+feature|-feature|feature=3Dxyz)", features= tr); - return; - } - featurestr =3D strtok(NULL, ","); - } - cpu_def->features |=3D plus_features; - cpu_def->features &=3D ~minus_features; -#ifdef DEBUG_FEATURES - print_features(stderr, fprintf, cpu_def->features, NULL); -#endif -} - void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf) { unsigned int i; @@ -806,6 +677,14 @@ static void sparc_cpu_realizefn(DeviceState *dev, Erro= r **errp) SPARCCPU *cpu =3D SPARC_CPU(dev); CPUSPARCState *env =3D &cpu->env; =20 + if (cpu_legacy_apply_features(OBJECT(cpu), plus_features, true, errp))= { + return; + } + + if (cpu_legacy_apply_features(OBJECT(cpu), minus_features, false, errp= )) { + return; + } + #if defined(CONFIG_USER_ONLY) if ((env->def.features & CPU_FEATURE_FLOAT)) { env->def.features |=3D CPU_FEATURE_FLOAT128; @@ -932,6 +811,7 @@ static void sparc_cpu_class_init(ObjectClass *oc, void = *data) cc->reset =3D sparc_cpu_reset; =20 cc->class_by_name =3D sparc_cpu_class_by_name; + cc->parse_features =3D sparc_cpu_parse_features; cc->has_work =3D sparc_cpu_has_work; cc->do_interrupt =3D sparc_cpu_do_interrupt; cc->cpu_exec_interrupt =3D sparc_cpu_exec_interrupt; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041156968848.5009776146586; Fri, 14 Jul 2017 07:05:56 -0700 (PDT) Received: from localhost ([::1]:38184 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1E8-0006aG-JM for importer@patchew.org; Fri, 14 Jul 2017 10:05:52 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41329) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW11z-0001o1-Ki for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:20 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW11y-0001c9-HA for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:10725) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW11y-0001bk-8Q for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:18 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id CCCC763144; Fri, 14 Jul 2017 13:53:16 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1390C6062B; Fri, 14 Jul 2017 13:53:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com CCCC763144 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com CCCC763144 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:01 +0200 Message-Id: <1500040339-119465-11-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 14 Jul 2017 13:53:17 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 10/28] sparc: replace cpu_sparc_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Mark Cave-Ayland , Fabien Chouteau , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Artyom Tarasenko Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov --- CC: Fabien Chouteau CC: Mark Cave-Ayland CC: Artyom Tarasenko --- target/sparc/cpu.h | 3 +-- hw/sparc/leon3.c | 2 +- hw/sparc/sun4m.c | 2 +- hw/sparc64/sparc64.c | 2 +- target/sparc/cpu.c | 5 ----- 5 files changed, 4 insertions(+), 10 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 0e41916..b45cfb4 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -579,7 +579,6 @@ void cpu_raise_exception_ra(CPUSPARCState *, int, uintp= tr_t) QEMU_NORETURN; =20 #ifndef NO_CPU_IO_DEFS /* cpu_init.c */ -SPARCCPU *cpu_sparc_init(const char *cpu_model); void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu); void sparc_cpu_list(FILE *f, fprintf_function cpu_fprintf); /* mmu_helper.c */ @@ -656,7 +655,7 @@ hwaddr cpu_get_phys_page_nofault(CPUSPARCState *env, ta= rget_ulong addr, int cpu_sparc_signal_handler(int host_signum, void *pinfo, void *puc); =20 #ifndef NO_CPU_IO_DEFS -#define cpu_init(cpu_model) CPU(cpu_sparc_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_SPARC_CPU, cpu_model) #endif =20 #define cpu_signal_handler cpu_sparc_signal_handler diff --git a/hw/sparc/leon3.c b/hw/sparc/leon3.c index f415997..fb4faee 100644 --- a/hw/sparc/leon3.c +++ b/hw/sparc/leon3.c @@ -126,7 +126,7 @@ static void leon3_generic_hw_init(MachineState *machine) cpu_model =3D "LEON3"; } =20 - cpu =3D cpu_sparc_init(cpu_model); + cpu =3D SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n"); exit(1); diff --git a/hw/sparc/sun4m.c b/hw/sparc/sun4m.c index 0faff46..74b3534 100644 --- a/hw/sparc/sun4m.c +++ b/hw/sparc/sun4m.c @@ -797,7 +797,7 @@ static void cpu_devinit(const char *cpu_model, unsigned= int id, SPARCCPU *cpu; CPUSPARCState *env; =20 - cpu =3D cpu_sparc_init(cpu_model); + cpu =3D SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "qemu: Unable to find Sparc CPU definition\n"); exit(1); diff --git a/hw/sparc64/sparc64.c b/hw/sparc64/sparc64.c index 4e4fdab..ecf38a4 100644 --- a/hw/sparc64/sparc64.c +++ b/hw/sparc64/sparc64.c @@ -353,7 +353,7 @@ SPARCCPU *sparc64_cpu_devinit(const char *cpu_model, if (cpu_model =3D=3D NULL) { cpu_model =3D default_cpu_model; } - cpu =3D cpu_sparc_init(cpu_model); + cpu =3D SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find Sparc CPU definition\n"); exit(1); diff --git a/target/sparc/cpu.c b/target/sparc/cpu.c index 1271b7f..722bd48 100644 --- a/target/sparc/cpu.c +++ b/target/sparc/cpu.c @@ -118,11 +118,6 @@ static void sparc_cpu_parse_features(const char *typen= ame, char *features, &plus_features, &minus_features, errp); } =20 -SPARCCPU *cpu_sparc_init(const char *cpu_model) -{ - return SPARC_CPU(cpu_generic_init(TYPE_SPARC_CPU, cpu_model)); -} - void cpu_sparc_set_id(CPUSPARCState *env, unsigned int cpu) { #if !defined(TARGET_SPARC64) --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041308635976.4260356400135; Fri, 14 Jul 2017 07:08:28 -0700 (PDT) Received: from localhost ([::1]:38197 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1GW-0000Cs-R5 for importer@patchew.org; Fri, 14 Jul 2017 10:08:20 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41369) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12A-0001xp-Bu for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:31 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW126-0001fp-FV for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:30 -0400 Received: from mx1.redhat.com ([209.132.183.28]:42490) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW126-0001ek-6H for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:26 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 0B64210E7C2; Fri, 14 Jul 2017 13:53:25 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 20EC360629; Fri, 14 Jul 2017 13:53:16 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 0B64210E7C2 Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 0B64210E7C2 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:02 +0200 Message-Id: <1500040339-119465-12-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 14 Jul 2017 13:53:25 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 11/28] s390x: replace cpu_s390x_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Thomas Huth , Eduardo Habkost , Cornelia Huck , Alexander Graf , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_s390x_init() is used only *-user targets indirectly via cpu_init() macro and has a hack to assign ids to created cpus (I'm not sure if 'id' really matters to *-user emulation). So to on safe side, instead of having custom wrapper to do numbering replace it with cpu_generic_init() and use S390CPUClass::next_cpu_id which could serve the same purpose as static variable and move cpu->id initialization to s390_cpu_initfn for CONFIG_USER_ONLY use-case. PS: ifdef is ugly but it allows us to hide s390x detail that isn't set by *-user targets and reuse generic cpu creation utility for btoh machine and user emulation. Signed-off-by: Igor Mammedov Acked-by: Cornelia Huck --- perhaps cpu->id isn't need by CONFIG_USER_ONLY but I'd leave to it s390x maintainers to deal with it. CC: Richard Henderson CC: Alexander Graf CC: Cornelia Huck CC: Thomas Huth --- target/s390x/cpu.h | 3 +-- target/s390x/cpu.c | 7 +++++++ target/s390x/helper.c | 14 -------------- 3 files changed, 8 insertions(+), 16 deletions(-) diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index bdb9bdb..b6d25c6 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -477,7 +477,6 @@ static inline bool get_per_in_range(CPUS390XState *env,= uint64_t addr) void trigger_pgm_exception(CPUS390XState *env, uint32_t code, uint32_t ile= n); #endif =20 -S390CPU *cpu_s390x_init(const char *cpu_model); S390CPU *s390x_new_cpu(const char *cpu_model, int64_t id, Error **errp); S390CPU *cpu_s390x_create(const char *cpu_model, Error **errp); void s390x_translate_init(void); @@ -641,7 +640,7 @@ static inline unsigned int s390_cpu_set_state(uint8_t c= pu_state, S390CPU *cpu) =20 extern void subsystem_reset(void); =20 -#define cpu_init(model) CPU(cpu_s390x_init(model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_S390_CPU, cpu_model) #define cpu_signal_handler cpu_s390x_signal_handler =20 void s390_cpu_list(FILE *f, fprintf_function cpu_fprintf); diff --git a/target/s390x/cpu.c b/target/s390x/cpu.c index accef03..e40a26f 100644 --- a/target/s390x/cpu.c +++ b/target/s390x/cpu.c @@ -303,6 +303,13 @@ static void s390_cpu_initfn(Object *obj) inited =3D true; s390x_translate_init(); } + +#if defined(CONFIG_USER_ONLY) + { + S390CPUClass *scc =3D S390_CPU_GET_CLASS(obj); + cpu->id =3D scc->next_cpu_id; + } +#endif } =20 static void s390_cpu_finalize(Object *obj) diff --git a/target/s390x/helper.c b/target/s390x/helper.c index aef09e1..632b030 100644 --- a/target/s390x/helper.c +++ b/target/s390x/helper.c @@ -129,20 +129,6 @@ out: return cpu; } =20 -S390CPU *cpu_s390x_init(const char *cpu_model) -{ - Error *err =3D NULL; - S390CPU *cpu; - /* Use to track CPU ID for linux-user only */ - static int64_t next_cpu_id; - - cpu =3D s390x_new_cpu(cpu_model, next_cpu_id++, &err); - if (err) { - error_report_err(err); - } - return cpu; -} - #if defined(CONFIG_USER_ONLY) =20 void s390_cpu_do_interrupt(CPUState *cs) --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041047383483.1587011805285; Fri, 14 Jul 2017 07:04:07 -0700 (PDT) Received: from localhost ([::1]:38174 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1CK-00046V-Vd for importer@patchew.org; Fri, 14 Jul 2017 10:04:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41385) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12C-000218-W2 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12B-0001jT-Vd for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:34226) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12B-0001jH-MP for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:31 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 8C8353D945; Fri, 14 Jul 2017 13:53:30 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 3B26360607; Fri, 14 Jul 2017 13:53:25 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 8C8353D945 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 8C8353D945 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:03 +0200 Message-Id: <1500040339-119465-13-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 14 Jul 2017 13:53:30 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 12/28] alpha: replace cpu_alpha_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Riku Voipio , Laurent Vivier , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_alpha_init() used to provide default fallback if invalid (i.e. non existent) cpu_model were provided. dp264 machine provides its own default so sole user of fallback is [bsd|linux]-user targets which specifies 'any' cpu model that fallbacks to "ev67" in cpu_alpha_init(). Push fallback handling into alpha_cpu_class_by_name() and replace cpu_alpha_init() with cpu_generic_init(). Signed-off-by: Igor Mammedov Acked-by: Richard Henderson --- PS: tested only linux-user as I don't have bsd box to test on CC: Richard Henderson CC: Riku Voipio CC: Laurent Vivier --- target/alpha/cpu.h | 4 +--- hw/alpha/dp264.c | 8 ++++++-- target/alpha/cpu.c | 20 +++++--------------- 3 files changed, 12 insertions(+), 20 deletions(-) diff --git a/target/alpha/cpu.h b/target/alpha/cpu.h index 691ac00..a390b82 100644 --- a/target/alpha/cpu.h +++ b/target/alpha/cpu.h @@ -457,9 +457,7 @@ enum { =20 void alpha_translate_init(void); =20 -AlphaCPU *cpu_alpha_init(const char *cpu_model); - -#define cpu_init(cpu_model) CPU(cpu_alpha_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_ALPHA_CPU, cpu_model) =20 void alpha_cpu_list(FILE *f, fprintf_function cpu_fprintf); /* you can call this signal handler from your SIGBUS and SIGSEGV diff --git a/hw/alpha/dp264.c b/hw/alpha/dp264.c index 85405da..2a85593 100644 --- a/hw/alpha/dp264.c +++ b/hw/alpha/dp264.c @@ -51,7 +51,7 @@ static int clipper_pci_map_irq(PCIDevice *d, int irq_num) static void clipper_init(MachineState *machine) { ram_addr_t ram_size =3D machine->ram_size; - const char *cpu_model =3D machine->cpu_model; + const char *cpu_model =3D machine->cpu_model ? machine->cpu_model : "e= v67"; const char *kernel_filename =3D machine->kernel_filename; const char *kernel_cmdline =3D machine->kernel_cmdline; const char *initrd_filename =3D machine->initrd_filename; @@ -67,7 +67,11 @@ static void clipper_init(MachineState *machine) /* Create up to 4 cpus. */ memset(cpus, 0, sizeof(cpus)); for (i =3D 0; i < smp_cpus; ++i) { - cpus[i] =3D cpu_alpha_init(cpu_model ? cpu_model : "ev67"); + cpus[i] =3D ALPHA_CPU(cpu_generic_init(TYPE_ALPHA_CPU, cpu_model)); + if (!cpus[i]) { + error_report("Unable to find CPU definition"); + exit(1); + } } =20 cpus[0]->env.trap_arg0 =3D ram_size; diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c index 8186c9d..ff18e1a 100644 --- a/target/alpha/cpu.c +++ b/target/alpha/cpu.c @@ -155,24 +155,14 @@ static ObjectClass *alpha_cpu_class_by_name(const cha= r *cpu_model) if (oc !=3D NULL && object_class_is_abstract(oc)) { oc =3D NULL; } - return oc; -} - -AlphaCPU *cpu_alpha_init(const char *cpu_model) -{ - AlphaCPU *cpu; - ObjectClass *cpu_class; =20 - cpu_class =3D alpha_cpu_class_by_name(cpu_model); - if (cpu_class =3D=3D NULL) { - /* Default to ev67; no reason not to emulate insns by default. */ - cpu_class =3D object_class_by_name(TYPE("ev67")); + /* TODO: remove match everything nonsense */ + /* Default to ev67; no reason not to emulate insns by default. */ + if (!oc) { + oc =3D object_class_by_name(TYPE("ev67")); } - cpu =3D ALPHA_CPU(object_new(object_class_get_name(cpu_class))); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); =20 - return cpu; + return oc; } =20 static void ev4_cpu_initfn(Object *obj) --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041412935469.1599865100062; Fri, 14 Jul 2017 07:10:12 -0700 (PDT) Received: from localhost ([::1]:38206 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1IH-00024u-NE for importer@patchew.org; Fri, 14 Jul 2017 10:10:09 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41404) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12F-00024B-BI for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:36 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12E-0001ld-K4 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:35 -0400 Received: from mx1.redhat.com ([209.132.183.28]:47282) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12E-0001ki-Ep for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:34 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 48F6F7A164; Fri, 14 Jul 2017 13:53:33 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id CF50F60607; Fri, 14 Jul 2017 13:53:30 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 48F6F7A164 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 48F6F7A164 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:04 +0200 Message-Id: <1500040339-119465-14-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:53:33 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 13/28] hppa: replace cpu_hppa_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" drop custom cpu_hppa_init() in favor of cpu_generic_init(), to make cpu_generic_init() work all we need is to provide cc->class_by_name callback that would resolve any cpu_model to the sole TYPE_HPPA_CPU to match current behaviour. Signed-off-by: Igor Mammedov Acked-by: Richard Henderson --- CC: Richard Henderson tested with linux-user --- target/hppa/cpu.h | 4 +--- target/hppa/cpu.c | 11 +++-------- 2 files changed, 4 insertions(+), 11 deletions(-) diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h index 4cf4ac6..8d14077 100644 --- a/target/hppa/cpu.h +++ b/target/hppa/cpu.h @@ -112,9 +112,7 @@ static inline int cpu_mmu_index(CPUHPPAState *env, bool= ifetch) =20 void hppa_translate_init(void); =20 -HPPACPU *cpu_hppa_init(const char *cpu_model); - -#define cpu_init(cpu_model) CPU(cpu_hppa_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_HPPA_CPU, cpu_model) =20 void hppa_cpu_list(FILE *f, fprintf_function cpu_fprintf); =20 diff --git a/target/hppa/cpu.c b/target/hppa/cpu.c index 30299e9..a477b45 100644 --- a/target/hppa/cpu.c +++ b/target/hppa/cpu.c @@ -112,15 +112,9 @@ static void hppa_cpu_initfn(Object *obj) hppa_translate_init(); } =20 -HPPACPU *cpu_hppa_init(const char *cpu_model) +static ObjectClass *hppa_cpu_class_by_name(const char *cpu_model) { - HPPACPU *cpu; - - cpu =3D HPPA_CPU(object_new(TYPE_HPPA_CPU)); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; + return object_class_by_name(TYPE_HPPA_CPU); } =20 static void hppa_cpu_class_init(ObjectClass *oc, void *data) @@ -132,6 +126,7 @@ static void hppa_cpu_class_init(ObjectClass *oc, void *= data) acc->parent_realize =3D dc->realize; dc->realize =3D hppa_cpu_realizefn; =20 + cc->class_by_name =3D hppa_cpu_class_by_name; cc->do_interrupt =3D hppa_cpu_do_interrupt; cc->cpu_exec_interrupt =3D hppa_cpu_exec_interrupt; cc->dump_state =3D hppa_cpu_dump_state; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040626561820.5093407359789; Fri, 14 Jul 2017 06:57:06 -0700 (PDT) Received: from localhost ([::1]:38143 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW15b-0005nk-9z for importer@patchew.org; Fri, 14 Jul 2017 09:57:03 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41441) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12K-0002EJ-Ug for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12H-0001mT-2N for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:38938) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12G-0001mF-PV for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:36 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 944C7C059721; Fri, 14 Jul 2017 13:53:35 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8E93460607; Fri, 14 Jul 2017 13:53:33 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 944C7C059721 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 944C7C059721 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:05 +0200 Message-Id: <1500040339-119465-15-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 14 Jul 2017 13:53:35 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 14/28] m68k: replace cpu_m68k_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Thomas Huth , Peter Maydell , Laurent Vivier , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" call register_m68k_insns() at realize time which makes cpu_m68k_init() typical object creation function. As result we can replace it with cpu_generic_init() which does the same job, reducing code duplication a bit. Signed-off-by: Igor Mammedov Acked-by: Laurent Vivier Tested-by: Thomas Huth --- CC: Thomas Huth CC: Laurent Vivier --- target/m68k/cpu.h | 3 +-- hw/m68k/an5206.c | 2 +- hw/m68k/mcf5208.c | 2 +- target/m68k/cpu.c | 2 ++ target/m68k/helper.c | 20 -------------------- 5 files changed, 5 insertions(+), 24 deletions(-) diff --git a/target/m68k/cpu.h b/target/m68k/cpu.h index 38a7e11..d936547 100644 --- a/target/m68k/cpu.h +++ b/target/m68k/cpu.h @@ -163,7 +163,6 @@ int m68k_cpu_gdb_write_register(CPUState *cpu, uint8_t = *buf, int reg); =20 void m68k_tcg_init(void); void m68k_cpu_init_gdb(M68kCPU *cpu); -M68kCPU *cpu_m68k_init(const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -322,7 +321,7 @@ void register_m68k_insns (CPUM68KState *env); #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) CPU(cpu_m68k_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_M68K_CPU, cpu_model) =20 #define cpu_signal_handler cpu_m68k_signal_handler #define cpu_list m68k_cpu_list diff --git a/hw/m68k/an5206.c b/hw/m68k/an5206.c index 142bab9..23c23df 100644 --- a/hw/m68k/an5206.c +++ b/hw/m68k/an5206.c @@ -42,7 +42,7 @@ static void an5206_init(MachineState *machine) if (!cpu_model) { cpu_model =3D "m5206"; } - cpu =3D cpu_m68k_init(cpu_model); + cpu =3D M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model)); if (!cpu) { error_report("Unable to find m68k CPU definition"); exit(1); diff --git a/hw/m68k/mcf5208.c b/hw/m68k/mcf5208.c index 6563518..cca2e73 100644 --- a/hw/m68k/mcf5208.c +++ b/hw/m68k/mcf5208.c @@ -232,7 +232,7 @@ static void mcf5208evb_init(MachineState *machine) if (!cpu_model) { cpu_model =3D "m5208"; } - cpu =3D cpu_m68k_init(cpu_model); + cpu =3D M68K_CPU(cpu_generic_init(TYPE_M68K_CPU, cpu_model)); if (!cpu) { fprintf(stderr, "Unable to find m68k CPU definition\n"); exit(1); diff --git a/target/m68k/cpu.c b/target/m68k/cpu.c index a14b6dd..55bf24b 100644 --- a/target/m68k/cpu.c +++ b/target/m68k/cpu.c @@ -230,6 +230,8 @@ static void m68k_cpu_realizefn(DeviceState *dev, Error = **errp) M68kCPUClass *mcc =3D M68K_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 + register_m68k_insns(&cpu->env); + cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); diff --git a/target/m68k/helper.c b/target/m68k/helper.c index caae291..7e50ff5 100644 --- a/target/m68k/helper.c +++ b/target/m68k/helper.c @@ -156,26 +156,6 @@ static int m68k_fpu_gdb_set_reg(CPUM68KState *env, uin= t8_t *mem_buf, int n) return 0; } =20 -M68kCPU *cpu_m68k_init(const char *cpu_model) -{ - M68kCPU *cpu; - CPUM68KState *env; - ObjectClass *oc; - - oc =3D cpu_class_by_name(TYPE_M68K_CPU, cpu_model); - if (oc =3D=3D NULL) { - return NULL; - } - cpu =3D M68K_CPU(object_new(object_class_get_name(oc))); - env =3D &cpu->env; - - register_m68k_insns(env); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; -} - void m68k_cpu_init_gdb(M68kCPU *cpu) { CPUState *cs =3D CPU(cpu); --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041200462465.0828259529935; Fri, 14 Jul 2017 07:06:40 -0700 (PDT) Received: from localhost ([::1]:38188 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1Eq-0007BS-Q6 for importer@patchew.org; Fri, 14 Jul 2017 10:06:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41442) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12K-0002EN-V6 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:42 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12I-0001mq-EF for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:41 -0400 Received: from mx1.redhat.com ([209.132.183.28]:57892) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12I-0001mg-5P for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:38 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 07D902E97CD; Fri, 14 Jul 2017 13:53:37 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id D2B5A60607; Fri, 14 Jul 2017 13:53:35 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 07D902E97CD Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 07D902E97CD From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:06 +0200 Message-Id: <1500040339-119465-16-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Fri, 14 Jul 2017 13:53:37 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 15/28] microblaze: replace cpu_mb_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_mb_init() always falls back to TYPE_MICROBLAZE_CPU object regardless of cpu_model. Put fallback logic into mb_cpu_class_by_name() which would translate any cpu_model into TYPE_MICROBLAZE_CPU class and replace cpu_mb_init() with cpu_generic_init(). Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- CC: "Edgar E. Iglesias" --- target/microblaze/cpu.h | 3 +-- target/microblaze/cpu.c | 6 ++++++ target/microblaze/translate.c | 11 ----------- 3 files changed, 7 insertions(+), 13 deletions(-) diff --git a/target/microblaze/cpu.h b/target/microblaze/cpu.h index 5ce4c82..52b6b6a 100644 --- a/target/microblaze/cpu.h +++ b/target/microblaze/cpu.h @@ -331,7 +331,6 @@ int mb_cpu_gdb_read_register(CPUState *cpu, uint8_t *bu= f, int reg); int mb_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); =20 void mb_tcg_init(void); -MicroBlazeCPU *cpu_mb_init(const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -344,7 +343,7 @@ int cpu_mb_signal_handler(int host_signum, void *pinfo, #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) CPU(cpu_mb_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MICROBLAZE_CPU, cpu_mode= l) =20 #define cpu_signal_handler cpu_mb_signal_handler =20 diff --git a/target/microblaze/cpu.c b/target/microblaze/cpu.c index f85ff01..ddffe86 100644 --- a/target/microblaze/cpu.c +++ b/target/microblaze/cpu.c @@ -253,6 +253,11 @@ static Property mb_properties[] =3D { DEFINE_PROP_END_OF_LIST(), }; =20 +static ObjectClass *mb_cpu_class_by_name(const char *cpu_model) +{ + return object_class_by_name(TYPE_MICROBLAZE_CPU); +} + static void mb_cpu_class_init(ObjectClass *oc, void *data) { DeviceClass *dc =3D DEVICE_CLASS(oc); @@ -265,6 +270,7 @@ static void mb_cpu_class_init(ObjectClass *oc, void *da= ta) mcc->parent_reset =3D cc->reset; cc->reset =3D mb_cpu_reset; =20 + cc->class_by_name =3D mb_cpu_class_by_name; cc->has_work =3D mb_cpu_has_work; cc->do_interrupt =3D mb_cpu_do_interrupt; cc->cpu_exec_interrupt =3D mb_cpu_exec_interrupt; diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index cb65d1e..c97c9d8 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -1845,17 +1845,6 @@ void mb_cpu_dump_state(CPUState *cs, FILE *f, fprint= f_function cpu_fprintf, cpu_fprintf(f, "\n\n"); } =20 -MicroBlazeCPU *cpu_mb_init(const char *cpu_model) -{ - MicroBlazeCPU *cpu; - - cpu =3D MICROBLAZE_CPU(object_new(TYPE_MICROBLAZE_CPU)); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; -} - void mb_tcg_init(void) { int i; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040769020300.43601077576045; Fri, 14 Jul 2017 06:59:29 -0700 (PDT) Received: from localhost ([::1]:38152 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW17t-000071-Ld for importer@patchew.org; Fri, 14 Jul 2017 09:59:25 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41473) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12M-0002I6-CK for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:43 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12K-0001op-Rp for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:42 -0400 Received: from mx1.redhat.com ([209.132.183.28]:39350) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12K-0001oe-IG for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:40 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 6FE24C0587E6; Fri, 14 Jul 2017 13:53:39 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 4F5DA60607; Fri, 14 Jul 2017 13:53:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 6FE24C0587E6 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 6FE24C0587E6 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:07 +0200 Message-Id: <1500040339-119465-17-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Fri, 14 Jul 2017 13:53:39 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 16/28] nios2: replace cpu_nios2_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Marek Vasut , Peter Maydell , Chris Wulff , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_nios2_init() always falls back to TYPE_NIOS2_CPU object regardless of cpu_model. Put fallback logic into nios2_cpu_class_by_name() which would translate any cpu_model into TYPE_NIOS2_CPU class and replace cpu_nios2_init() with cpu_generic_init() Signed-off-by: Igor Mammedov Reviewed-by: Philippe Mathieu-Daud=C3=A9 --- CC: Chris Wulff CC: Marek Vasut --- target/nios2/cpu.h | 3 +-- hw/nios2/10m50_devboard.c | 2 +- target/nios2/cpu.c | 9 +++------ 3 files changed, 5 insertions(+), 9 deletions(-) diff --git a/target/nios2/cpu.h b/target/nios2/cpu.h index 13931f3..50d803a 100644 --- a/target/nios2/cpu.h +++ b/target/nios2/cpu.h @@ -212,7 +212,6 @@ static inline Nios2CPU *nios2_env_get_cpu(CPUNios2State= *env) #define ENV_OFFSET offsetof(Nios2CPU, env) =20 void nios2_tcg_init(void); -Nios2CPU *cpu_nios2_init(const char *cpu_model); void nios2_cpu_do_interrupt(CPUState *cs); int cpu_nios2_signal_handler(int host_signum, void *pinfo, void *puc); void dump_mmu(FILE *f, fprintf_function cpu_fprintf, CPUNios2State *env); @@ -229,7 +228,7 @@ void nios2_check_interrupts(CPUNios2State *env); #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) CPU(cpu_nios2_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_NIOS2_CPU, cpu_model) =20 #define cpu_gen_code cpu_nios2_gen_code #define cpu_signal_handler cpu_nios2_signal_handler diff --git a/hw/nios2/10m50_devboard.c b/hw/nios2/10m50_devboard.c index 051be73..c8aa116 100644 --- a/hw/nios2/10m50_devboard.c +++ b/hw/nios2/10m50_devboard.c @@ -75,7 +75,7 @@ static void nios2_10m50_ghrd_init(MachineState *machine) phys_ram_alias); =20 /* Create CPU -- FIXME */ - cpu =3D cpu_nios2_init("nios2"); + cpu =3D NIOS2_CPU(cpu_generic_init(TYPE_NIOS2_CPU, "nios2")); =20 /* Register: CPU interrupt controller (PIC) */ cpu_irq =3D nios2_cpu_pic_init(cpu); diff --git a/target/nios2/cpu.c b/target/nios2/cpu.c index d56bb72..5b02fb6 100644 --- a/target/nios2/cpu.c +++ b/target/nios2/cpu.c @@ -83,13 +83,9 @@ static void nios2_cpu_initfn(Object *obj) } } =20 -Nios2CPU *cpu_nios2_init(const char *cpu_model) +static ObjectClass *nios2_cpu_class_by_name(const char *cpu_model) { - Nios2CPU *cpu =3D NIOS2_CPU(object_new(TYPE_NIOS2_CPU)); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; + return object_class_by_name(TYPE_NIOS2_CPU); } =20 static void nios2_cpu_realizefn(DeviceState *dev, Error **errp) @@ -203,6 +199,7 @@ static void nios2_cpu_class_init(ObjectClass *oc, void = *data) ncc->parent_reset =3D cc->reset; cc->reset =3D nios2_cpu_reset; =20 + cc->class_by_name =3D nios2_cpu_class_by_name; cc->has_work =3D nios2_cpu_has_work; cc->do_interrupt =3D nios2_cpu_do_interrupt; cc->cpu_exec_interrupt =3D nios2_cpu_exec_interrupt; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500040840724665.3397724123205; Fri, 14 Jul 2017 07:00:40 -0700 (PDT) Received: from localhost ([::1]:38162 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW193-0001QR-CV for importer@patchew.org; Fri, 14 Jul 2017 10:00:37 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41501) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12O-0002Lh-Tn for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:46 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12N-0001q4-Vu for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:45 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58588) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12N-0001pi-Pn for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:43 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 55DE931CD6C; Fri, 14 Jul 2017 13:53:42 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id B50B360629; Fri, 14 Jul 2017 13:53:39 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 55DE931CD6C Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx05.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 55DE931CD6C From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:08 +0200 Message-Id: <1500040339-119465-18-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.29]); Fri, 14 Jul 2017 13:53:42 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 17/28] tilegx: replace cpu_tilegx_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , Laurent Vivier , David Gibson , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Richard Henderson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" cpu_tilegx_init() always falls back to TYPE_TILEGX_CPU object regardless of cpu_model. Put fallback logic into tilegx_cpu_class_by_name() which would translate any cpu_model into TYPE_TILEGX_CPU class and replace cpu_tilegx_init() with cpu_generic_init(). Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: David Gibson CC: Eduardo Habkost CC: Laurent Vivier CC: Richard Henderson --- target/tilegx/cpu.h | 4 +--- target/tilegx/cpu.c | 11 +++-------- 2 files changed, 4 insertions(+), 11 deletions(-) diff --git a/target/tilegx/cpu.h b/target/tilegx/cpu.h index f32be49..71cea04 100644 --- a/target/tilegx/cpu.h +++ b/target/tilegx/cpu.h @@ -164,9 +164,7 @@ static inline TileGXCPU *tilegx_env_get_cpu(CPUTLGState= *env) void tilegx_tcg_init(void); int cpu_tilegx_signal_handler(int host_signum, void *pinfo, void *puc); =20 -TileGXCPU *cpu_tilegx_init(const char *cpu_model); - -#define cpu_init(cpu_model) CPU(cpu_tilegx_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_TILEGX_CPU, cpu_model) =20 #define cpu_signal_handler cpu_tilegx_signal_handler =20 diff --git a/target/tilegx/cpu.c b/target/tilegx/cpu.c index 4532639..7345f5a 100644 --- a/target/tilegx/cpu.c +++ b/target/tilegx/cpu.c @@ -52,15 +52,9 @@ static void tilegx_cpu_dump_state(CPUState *cs, FILE *f, env->pc, env->spregs[TILEGX_SPR_CMPEXCH]); } =20 -TileGXCPU *cpu_tilegx_init(const char *cpu_model) +static ObjectClass *tilegx_cpu_class_by_name(const char *cpu_model) { - TileGXCPU *cpu; - - cpu =3D TILEGX_CPU(object_new(TYPE_TILEGX_CPU)); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; + return object_class_by_name(TYPE_TILEGX_CPU); } =20 static void tilegx_cpu_set_pc(CPUState *cs, vaddr value) @@ -159,6 +153,7 @@ static void tilegx_cpu_class_init(ObjectClass *oc, void= *data) tcc->parent_reset =3D cc->reset; cc->reset =3D tilegx_cpu_reset; =20 + cc->class_by_name =3D tilegx_cpu_class_by_name; cc->has_work =3D tilegx_cpu_has_work; cc->do_interrupt =3D tilegx_cpu_do_interrupt; cc->cpu_exec_interrupt =3D tilegx_cpu_exec_interrupt; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150004092182119.67688788232465; Fri, 14 Jul 2017 07:02:01 -0700 (PDT) Received: from localhost ([::1]:38169 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1AO-0002WY-L4 for importer@patchew.org; Fri, 14 Jul 2017 10:02:00 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41533) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12Q-0002Q0-EO for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12P-0001r8-Jh for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44550) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12P-0001qH-BL for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:45 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 357E29D40A; Fri, 14 Jul 2017 13:53:44 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9A5776060C; Fri, 14 Jul 2017 13:53:42 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 357E29D40A Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 357E29D40A From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:09 +0200 Message-Id: <1500040339-119465-19-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Fri, 14 Jul 2017 13:53:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 18/28] xtensa: replace cpu_xtensa_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Max Filippov , Peter Maydell , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" call xtensa_irq_init() at realize time which makes cpu_xtensa_init() like generic cpu creation function. As result we can replace it with cpu_generic_init() which does the same job, reducing code duplication a bit. Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: Max Filippov --- target/xtensa/cpu.h | 4 +--- hw/xtensa/sim.c | 2 +- hw/xtensa/xtfpga.c | 2 +- target/xtensa/cpu.c | 3 +++ target/xtensa/helper.c | 22 ---------------------- 5 files changed, 6 insertions(+), 27 deletions(-) diff --git a/target/xtensa/cpu.h b/target/xtensa/cpu.h index ee29fb1..4803331 100644 --- a/target/xtensa/cpu.h +++ b/target/xtensa/cpu.h @@ -475,9 +475,7 @@ void xtensa_cpu_do_unaligned_access(CPUState *cpu, vadd= r addr, #define XTENSA_DEFAULT_CPU_MODEL "dc232b" #endif =20 -XtensaCPU *cpu_xtensa_init(const char *cpu_model); - -#define cpu_init(cpu_model) CPU(cpu_xtensa_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_XTENSA_CPU, cpu_model) =20 void xtensa_translate_init(void); void xtensa_breakpoint_handler(CPUState *cs); diff --git a/hw/xtensa/sim.c b/hw/xtensa/sim.c index 5521e91..bf1f729 100644 --- a/hw/xtensa/sim.c +++ b/hw/xtensa/sim.c @@ -86,7 +86,7 @@ static void xtensa_sim_init(MachineState *machine) } =20 for (n =3D 0; n < smp_cpus; n++) { - cpu =3D cpu_xtensa_init(cpu_model); + cpu =3D XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)); if (cpu =3D=3D NULL) { error_report("unable to find CPU definition '%s'", cpu_model); diff --git a/hw/xtensa/xtfpga.c b/hw/xtensa/xtfpga.c index d5ac080..b656660 100644 --- a/hw/xtensa/xtfpga.c +++ b/hw/xtensa/xtfpga.c @@ -232,7 +232,7 @@ static void lx_init(const LxBoardDesc *board, MachineSt= ate *machine) } =20 for (n =3D 0; n < smp_cpus; n++) { - cpu =3D cpu_xtensa_init(cpu_model); + cpu =3D XTENSA_CPU(cpu_generic_init(TYPE_XTENSA_CPU, cpu_model)); if (cpu =3D=3D NULL) { error_report("unable to find CPU definition '%s'", cpu_model); diff --git a/target/xtensa/cpu.c b/target/xtensa/cpu.c index cd7f958..85897df 100644 --- a/target/xtensa/cpu.c +++ b/target/xtensa/cpu.c @@ -100,9 +100,12 @@ static ObjectClass *xtensa_cpu_class_by_name(const cha= r *cpu_model) static void xtensa_cpu_realizefn(DeviceState *dev, Error **errp) { CPUState *cs =3D CPU(dev); + XtensaCPU *cpu =3D XTENSA_CPU(dev); XtensaCPUClass *xcc =3D XTENSA_CPU_GET_CLASS(dev); Error *local_err =3D NULL; =20 + xtensa_irq_init(&cpu->env); + cpu_exec_realizefn(cs, &local_err); if (local_err !=3D NULL) { error_propagate(errp, local_err); diff --git a/target/xtensa/helper.c b/target/xtensa/helper.c index bcd0b77..e8fba20 100644 --- a/target/xtensa/helper.c +++ b/target/xtensa/helper.c @@ -113,28 +113,6 @@ void xtensa_breakpoint_handler(CPUState *cs) } } =20 -XtensaCPU *cpu_xtensa_init(const char *cpu_model) -{ - ObjectClass *oc; - XtensaCPU *cpu; - CPUXtensaState *env; - - oc =3D cpu_class_by_name(TYPE_XTENSA_CPU, cpu_model); - if (oc =3D=3D NULL) { - return NULL; - } - - cpu =3D XTENSA_CPU(object_new(object_class_get_name(oc))); - env =3D &cpu->env; - - xtensa_irq_init(env); - - object_property_set_bool(OBJECT(cpu), true, "realized", NULL); - - return cpu; -} - - void xtensa_cpu_list(FILE *f, fprintf_function cpu_fprintf) { XtensaConfigList *core =3D xtensa_cores; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041090511479.0191578063931; Fri, 14 Jul 2017 07:04:50 -0700 (PDT) Received: from localhost ([::1]:38178 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1D1-0004zp-9g for importer@patchew.org; Fri, 14 Jul 2017 10:04:43 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41583) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12V-0002Xy-QJ for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12R-0001tF-U3 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50352) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12R-0001sN-NA for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:47 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4818C8B125; Fri, 14 Jul 2017 13:53:46 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7ABF660627; Fri, 14 Jul 2017 13:53:44 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4818C8B125 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 4818C8B125 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:10 +0200 Message-Id: <1500040339-119465-20-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:53:46 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 19/28] tricore: replace cpu_tricore_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Bastian Koppelmann , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: Bastian Koppelmann --- target/tricore/cpu.h | 4 +--- hw/tricore/tricore_testboard.c | 2 +- target/tricore/helper.c | 5 ----- 3 files changed, 2 insertions(+), 9 deletions(-) diff --git a/target/tricore/cpu.h b/target/tricore/cpu.h index a3493a1..bc53c40 100644 --- a/target/tricore/cpu.h +++ b/target/tricore/cpu.h @@ -411,9 +411,7 @@ static inline void cpu_get_tb_cpu_state(CPUTriCoreState= *env, target_ulong *pc, *flags =3D 0; } =20 -TriCoreCPU *cpu_tricore_init(const char *cpu_model); - -#define cpu_init(cpu_model) CPU(cpu_tricore_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_TRICORE_CPU, cpu_model) =20 =20 /* helpers.c */ diff --git a/hw/tricore/tricore_testboard.c b/hw/tricore/tricore_testboard.c index 8910bf0..599c508 100644 --- a/hw/tricore/tricore_testboard.c +++ b/hw/tricore/tricore_testboard.c @@ -74,7 +74,7 @@ static void tricore_testboard_init(MachineState *machine,= int board_id) if (!machine->cpu_model) { machine->cpu_model =3D "tc1796"; } - cpu =3D cpu_tricore_init(machine->cpu_model); + cpu =3D TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, machine->cpu_mo= del)); if (!cpu) { error_report("Unable to find CPU definition"); exit(1); diff --git a/target/tricore/helper.c b/target/tricore/helper.c index 3118905..378c2a4 100644 --- a/target/tricore/helper.c +++ b/target/tricore/helper.c @@ -78,11 +78,6 @@ int cpu_tricore_handle_mmu_fault(CPUState *cs, target_ul= ong address, return ret; } =20 -TriCoreCPU *cpu_tricore_init(const char *cpu_model) -{ - return TRICORE_CPU(cpu_generic_init(TYPE_TRICORE_CPU, cpu_model)); -} - static void tricore_cpu_list_entry(gpointer data, gpointer user_data) { ObjectClass *oc =3D data; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041344403155.81106813119573; Fri, 14 Jul 2017 07:09:04 -0700 (PDT) Received: from localhost ([::1]:38198 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1H9-0000kr-2d for importer@patchew.org; Fri, 14 Jul 2017 10:08:59 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41580) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12V-0002Xv-PW for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12T-0001ui-Hx for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:51 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36382) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12T-0001uR-8K for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:49 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 187A87A16F; Fri, 14 Jul 2017 13:53:48 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 8202660608; Fri, 14 Jul 2017 13:53:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 187A87A16F Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 187A87A16F From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:11 +0200 Message-Id: <1500040339-119465-21-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:53:48 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 20/28] sh4: replace cpu_sh4_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Magnus Damm , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Aurelien Jarno , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: Magnus Damm CC: Aurelien Jarno --- target/sh4/cpu.h | 3 +-- hw/sh4/r2d.c | 2 +- hw/sh4/shix.c | 2 +- target/sh4/cpu.c | 5 ----- 4 files changed, 3 insertions(+), 9 deletions(-) diff --git a/target/sh4/cpu.h b/target/sh4/cpu.h index ffb9168..9b66c63 100644 --- a/target/sh4/cpu.h +++ b/target/sh4/cpu.h @@ -223,7 +223,6 @@ void superh_cpu_do_unaligned_access(CPUState *cpu, vadd= r addr, int mmu_idx, uintptr_t retaddr); =20 void sh4_translate_init(void); -SuperHCPU *cpu_sh4_init(const char *cpu_model); int cpu_sh4_signal_handler(int host_signum, void *pinfo, void *puc); int superh_cpu_handle_mmu_fault(CPUState *cpu, vaddr address, int rw, @@ -254,7 +253,7 @@ int cpu_sh4_is_cached(CPUSH4State * env, target_ulong a= ddr); =20 void cpu_load_tlb(CPUSH4State * env); =20 -#define cpu_init(cpu_model) CPU(cpu_sh4_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_SUPERH_CPU, cpu_model) =20 #define cpu_signal_handler cpu_sh4_signal_handler #define cpu_list sh4_cpu_list diff --git a/hw/sh4/r2d.c b/hw/sh4/r2d.c index e6fc74e..b3d6869 100644 --- a/hw/sh4/r2d.c +++ b/hw/sh4/r2d.c @@ -246,7 +246,7 @@ static void r2d_init(MachineState *machine) cpu_model =3D "SH7751R"; } =20 - cpu =3D cpu_sh4_init(cpu_model); + cpu =3D SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/sh4/shix.c b/hw/sh4/shix.c index fd00cc5..3deba6c 100644 --- a/hw/sh4/shix.c +++ b/hw/sh4/shix.c @@ -56,7 +56,7 @@ static void shix_init(MachineState *machine) if (!cpu_model) cpu_model =3D "any"; =20 - cpu =3D cpu_sh4_init(cpu_model); + cpu =3D SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c index 9da7e1e..88043ba 100644 --- a/target/sh4/cpu.c +++ b/target/sh4/cpu.c @@ -156,11 +156,6 @@ static ObjectClass *superh_cpu_class_by_name(const cha= r *cpu_model) return oc; } =20 -SuperHCPU *cpu_sh4_init(const char *cpu_model) -{ - return SUPERH_CPU(cpu_generic_init(TYPE_SUPERH_CPU, cpu_model)); -} - static void sh7750r_cpu_initfn(Object *obj) { SuperHCPU *cpu =3D SUPERH_CPU(obj); --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041516435986.3726921428839; Fri, 14 Jul 2017 07:11:56 -0700 (PDT) Received: from localhost ([::1]:38220 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1Jv-0003hd-HG for importer@patchew.org; Fri, 14 Jul 2017 10:11:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12Z-0002gx-Bp for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:56 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12X-0001yI-Sz for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:36318) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12V-0001v0-0G; Fri, 14 Jul 2017 09:53:51 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D0CB4267D4; Fri, 14 Jul 2017 13:53:49 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 5639B60608; Fri, 14 Jul 2017 13:53:48 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D0CB4267D4 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D0CB4267D4 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:12 +0200 Message-Id: <1500040339-119465-22-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 14 Jul 2017 13:53:50 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 21/28] arm: replace cpu_arm_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , qemu-arm@nongnu.org, Jan Kiszka , =?UTF-8?q?Andreas=20F=C3=A4rber?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Andrew Jones --- CC: Jan Kiszka CC: Peter Maydell CC: Andrzej Zaborowski CC: qemu-arm@nongnu.org --- target/arm/cpu.h | 3 +-- hw/arm/musicpal.c | 2 +- hw/arm/omap1.c | 2 +- hw/arm/omap2.c | 2 +- hw/arm/pxa2xx.c | 4 ++-- hw/arm/strongarm.c | 2 +- target/arm/helper.c | 5 ----- 7 files changed, 7 insertions(+), 13 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 16a1e59..c9be0ac 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -746,7 +746,6 @@ int aarch64_cpu_gdb_read_register(CPUState *cpu, uint8_= t *buf, int reg); int aarch64_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); #endif =20 -ARMCPU *cpu_arm_init(const char *cpu_model); target_ulong do_arm_semihosting(CPUARMState *env); void aarch64_sync_32_to_64(CPUARMState *env); void aarch64_sync_64_to_32(CPUARMState *env); @@ -1999,7 +1998,7 @@ static inline bool arm_excp_unmasked(CPUState *cs, un= signed int excp_idx, return unmasked || pstate_unmasked; } =20 -#define cpu_init(cpu_model) CPU(cpu_arm_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_ARM_CPU, cpu_model) =20 #define cpu_signal_handler cpu_arm_signal_handler #define cpu_list arm_cpu_list diff --git a/hw/arm/musicpal.c b/hw/arm/musicpal.c index 9c710f7..0d519f9 100644 --- a/hw/arm/musicpal.c +++ b/hw/arm/musicpal.c @@ -1593,7 +1593,7 @@ static void musicpal_init(MachineState *machine) if (!cpu_model) { cpu_model =3D "arm926"; } - cpu =3D cpu_arm_init(cpu_model); + cpu =3D ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model)); if (!cpu) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/arm/omap1.c b/hw/arm/omap1.c index 54582bd..391eb28 100644 --- a/hw/arm/omap1.c +++ b/hw/arm/omap1.c @@ -3863,7 +3863,7 @@ struct omap_mpu_state_s *omap310_mpu_init(MemoryRegio= n *system_memory, =20 /* Core */ s->mpu_model =3D omap310; - s->cpu =3D cpu_arm_init(core); + s->cpu =3D ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core)); if (s->cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/arm/omap2.c b/hw/arm/omap2.c index 91f5733..a20bb1f 100644 --- a/hw/arm/omap2.c +++ b/hw/arm/omap2.c @@ -2261,7 +2261,7 @@ struct omap_mpu_state_s *omap2420_mpu_init(MemoryRegi= on *sysmem, =20 /* Core */ s->mpu_model =3D omap2420; - s->cpu =3D cpu_arm_init(core ?: "arm1136-r2"); + s->cpu =3D ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, core ?: "arm1136-r2"= )); if (s->cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/arm/pxa2xx.c b/hw/arm/pxa2xx.c index 629e6c6..2f1c141 100644 --- a/hw/arm/pxa2xx.c +++ b/hw/arm/pxa2xx.c @@ -2065,7 +2065,7 @@ PXA2xxState *pxa270_init(MemoryRegion *address_space, if (!revision) revision =3D "pxa270"; =20 - s->cpu =3D cpu_arm_init(revision); + s->cpu =3D ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, revision)); if (s->cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); @@ -2197,7 +2197,7 @@ PXA2xxState *pxa255_init(MemoryRegion *address_space,= unsigned int sdram_size) =20 s =3D g_new0(PXA2xxState, 1); =20 - s->cpu =3D cpu_arm_init("pxa255"); + s->cpu =3D ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, "pxa255")); if (s->cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 7683edc..a27d7c8 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -1597,7 +1597,7 @@ StrongARMState *sa1110_init(MemoryRegion *sysmem, exit(1); } =20 - s->cpu =3D cpu_arm_init(rev); + s->cpu =3D ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, rev)); =20 if (!s->cpu) { error_report("Unable to find CPU definition"); diff --git a/target/arm/helper.c b/target/arm/helper.c index 2594faa..86e69a6 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -5237,11 +5237,6 @@ void register_cp_regs_for_features(ARMCPU *cpu) } } =20 -ARMCPU *cpu_arm_init(const char *cpu_model) -{ - return ARM_CPU(cpu_generic_init(TYPE_ARM_CPU, cpu_model)); -} - void arm_cpu_register_gdb_regs_for_features(ARMCPU *cpu) { CPUState *cs =3D CPU(cpu); --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041442979331.5931737250039; Fri, 14 Jul 2017 07:10:42 -0700 (PDT) Received: from localhost ([::1]:38213 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1Ii-0002rz-Ms for importer@patchew.org; Fri, 14 Jul 2017 10:10:36 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41621) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12X-0002be-Iq for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:54 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12W-0001xU-Mm for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:53 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37504) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12W-0001wt-G2 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:52 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 67B2E65874; Fri, 14 Jul 2017 13:53:51 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 2493D60608; Fri, 14 Jul 2017 13:53:49 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 67B2E65874 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 67B2E65874 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:13 +0200 Message-Id: <1500040339-119465-23-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Fri, 14 Jul 2017 13:53:51 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 22/28] cris: replace cpu_cris_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: "Edgar E. Iglesias" --- target/cris/cpu.h | 3 +-- hw/cris/axis_dev88.c | 2 +- target/cris/cpu.c | 5 ----- 3 files changed, 2 insertions(+), 8 deletions(-) diff --git a/target/cris/cpu.h b/target/cris/cpu.h index 920e1c3..5d822de 100644 --- a/target/cris/cpu.h +++ b/target/cris/cpu.h @@ -216,7 +216,6 @@ int crisv10_cpu_gdb_read_register(CPUState *cpu, uint8_= t *buf, int reg); int cris_cpu_gdb_read_register(CPUState *cpu, uint8_t *buf, int reg); int cris_cpu_gdb_write_register(CPUState *cpu, uint8_t *buf, int reg); =20 -CRISCPU *cpu_cris_init(const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -268,7 +267,7 @@ enum { #define TARGET_PHYS_ADDR_SPACE_BITS 32 #define TARGET_VIRT_ADDR_SPACE_BITS 32 =20 -#define cpu_init(cpu_model) CPU(cpu_cris_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_CRIS_CPU, cpu_model) =20 #define cpu_signal_handler cpu_cris_signal_handler =20 diff --git a/hw/cris/axis_dev88.c b/hw/cris/axis_dev88.c index 60df887..7030d18 100644 --- a/hw/cris/axis_dev88.c +++ b/hw/cris/axis_dev88.c @@ -271,7 +271,7 @@ void axisdev88_init(MachineState *machine) if (cpu_model =3D=3D NULL) { cpu_model =3D "crisv32"; } - cpu =3D cpu_cris_init(cpu_model); + cpu =3D CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model)); env =3D &cpu->env; =20 /* allocate RAM */ diff --git a/target/cris/cpu.c b/target/cris/cpu.c index 5f766f0..ceebfed 100644 --- a/target/cris/cpu.c +++ b/target/cris/cpu.c @@ -89,11 +89,6 @@ static ObjectClass *cris_cpu_class_by_name(const char *c= pu_model) return oc; } =20 -CRISCPU *cpu_cris_init(const char *cpu_model) -{ - return CRIS_CPU(cpu_generic_init(TYPE_CRIS_CPU, cpu_model)); -} - /* Sort alphabetically by VR. */ static gint cris_cpu_list_compare(gconstpointer a, gconstpointer b) { --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041540016626.4831981289954; Fri, 14 Jul 2017 07:12:20 -0700 (PDT) Received: from localhost ([::1]:38221 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1KG-0003xB-LJ for importer@patchew.org; Fri, 14 Jul 2017 10:12:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41643) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12Z-0002ha-SY for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:59 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12Z-0001yj-5M for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:55 -0400 Received: from mx1.redhat.com ([209.132.183.28]:52160) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12Y-0001yO-Vz for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:55 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D336D83F3F; Fri, 14 Jul 2017 13:53:53 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 9351860608; Fri, 14 Jul 2017 13:53:51 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D336D83F3F Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D336D83F3F From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:14 +0200 Message-Id: <1500040339-119465-24-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Fri, 14 Jul 2017 13:53:54 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 23/28] x86: replace cpu_x86_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Richard Henderson , Paolo Bonzini , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost --- target/i386/cpu.h | 3 +-- target/i386/cpu.c | 5 ----- 2 files changed, 1 insertion(+), 7 deletions(-) diff --git a/target/i386/cpu.h b/target/i386/cpu.h index 7a228af..6631e7b 100644 --- a/target/i386/cpu.h +++ b/target/i386/cpu.h @@ -1326,7 +1326,6 @@ int x86_cpu_gdb_write_register(CPUState *cpu, uint8_t= *buf, int reg); void x86_cpu_exec_enter(CPUState *cpu); void x86_cpu_exec_exit(CPUState *cpu); =20 -X86CPU *cpu_x86_init(const char *cpu_model); void x86_cpu_list(FILE *f, fprintf_function cpu_fprintf); int cpu_x86_support_mca_broadcast(CPUX86State *env); =20 @@ -1506,7 +1505,7 @@ uint64_t cpu_get_tsc(CPUX86State *env); =20 #define PHYS_ADDR_MASK MAKE_64BIT_MASK(0, TCG_PHYS_ADDR_BITS) =20 -#define cpu_init(cpu_model) CPU(cpu_x86_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_X86_CPU, cpu_model) =20 #define cpu_signal_handler cpu_x86_signal_handler #define cpu_list x86_cpu_list diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 91d3684..1bcf208 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -2485,11 +2485,6 @@ static gchar *x86_gdb_arch_name(CPUState *cs) #endif } =20 -X86CPU *cpu_x86_init(const char *cpu_model) -{ - return X86_CPU(cpu_generic_init(TYPE_X86_CPU, cpu_model)); -} - static void x86_cpu_cpudef_class_init(ObjectClass *oc, void *data) { X86CPUDefinition *cpudef =3D data; --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041634133251.2719546674623; Fri, 14 Jul 2017 07:13:54 -0700 (PDT) Received: from localhost ([::1]:38229 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1Lr-000587-Rs for importer@patchew.org; Fri, 14 Jul 2017 10:13:51 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41701) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12f-0002qj-0J for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12b-0001zb-2h for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44206) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12a-0001zA-QB for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:57 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 9549BBAEC2; Fri, 14 Jul 2017 13:53:55 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 1425E6063B; Fri, 14 Jul 2017 13:53:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 9549BBAEC2 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 9549BBAEC2 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:15 +0200 Message-Id: <1500040339-119465-25-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 14 Jul 2017 13:53:55 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 24/28] lm32: replace cpu_lm32_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Michael Walle , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Acked-by: Michael Walle Reviewed-by: Eduardo Habkost --- CC: Michael Walle --- target/lm32/cpu.h | 3 +-- hw/lm32/lm32_boards.c | 4 ++-- hw/lm32/milkymist.c | 2 +- target/lm32/helper.c | 5 ----- 4 files changed, 4 insertions(+), 10 deletions(-) diff --git a/target/lm32/cpu.h b/target/lm32/cpu.h index 1d972cb..de265b5 100644 --- a/target/lm32/cpu.h +++ b/target/lm32/cpu.h @@ -238,7 +238,6 @@ static inline lm32_wp_t lm32_wp_type(uint32_t dc, int i= dx) return (dc >> (idx+1)*2) & 0x3; } =20 -LM32CPU *cpu_lm32_init(const char *cpu_model); /* you can call this signal handler from your SIGBUS and SIGSEGV signal handlers to inform the virtual CPU of exceptions. non zero is returned if the signal was handled by the virtual CPU. */ @@ -256,7 +255,7 @@ void lm32_watchpoint_insert(CPULM32State *env, int inde= x, target_ulong address, void lm32_watchpoint_remove(CPULM32State *env, int index); bool lm32_cpu_do_semihosting(CPUState *cs); =20 -#define cpu_init(cpu_model) CPU(cpu_lm32_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_LM32_CPU, cpu_model) =20 #define cpu_list lm32_cpu_list #define cpu_signal_handler cpu_lm32_signal_handler diff --git a/hw/lm32/lm32_boards.c b/hw/lm32/lm32_boards.c index 8f0c307..eccf0ac 100644 --- a/hw/lm32/lm32_boards.c +++ b/hw/lm32/lm32_boards.c @@ -104,7 +104,7 @@ static void lm32_evr_init(MachineState *machine) if (cpu_model =3D=3D NULL) { cpu_model =3D "lm32-full"; } - cpu =3D cpu_lm32_init(cpu_model); + cpu =3D LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); @@ -205,7 +205,7 @@ static void lm32_uclinux_init(MachineState *machine) if (cpu_model =3D=3D NULL) { cpu_model =3D "lm32-full"; } - cpu =3D cpu_lm32_init(cpu_model); + cpu =3D LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); diff --git a/hw/lm32/milkymist.c b/hw/lm32/milkymist.c index 5cae0f1..dffd879 100644 --- a/hw/lm32/milkymist.c +++ b/hw/lm32/milkymist.c @@ -111,7 +111,7 @@ milkymist_init(MachineState *machine) if (cpu_model =3D=3D NULL) { cpu_model =3D "lm32-full"; } - cpu =3D cpu_lm32_init(cpu_model); + cpu =3D LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "qemu: unable to find CPU '%s'\n", cpu_model); exit(1); diff --git a/target/lm32/helper.c b/target/lm32/helper.c index 891da18..929cc36 100644 --- a/target/lm32/helper.c +++ b/target/lm32/helper.c @@ -219,11 +219,6 @@ bool lm32_cpu_exec_interrupt(CPUState *cs, int interru= pt_request) return false; } =20 -LM32CPU *cpu_lm32_init(const char *cpu_model) -{ - return LM32_CPU(cpu_generic_init(TYPE_LM32_CPU, cpu_model)); -} - /* Some soc ignores the MSB on the address bus. Thus creating a shadow mem= ory * area. As a general rule, 0x00000000-0x7fffffff is cached, whereas * 0x80000000-0xffffffff is not cached and used to access IO devices. */ --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041011491947.8188587999467; Fri, 14 Jul 2017 07:03:31 -0700 (PDT) Received: from localhost ([::1]:38173 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1Bj-0003Ye-3u for importer@patchew.org; Fri, 14 Jul 2017 10:03:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41700) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12f-0002qh-05 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:02 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12c-0001zr-NH for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:01 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50580) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12c-0001zl-H0 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:53:58 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 4B2337CE10; Fri, 14 Jul 2017 13:53:57 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id D37A860605; Fri, 14 Jul 2017 13:53:55 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 4B2337CE10 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 4B2337CE10 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:16 +0200 Message-Id: <1500040339-119465-26-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Fri, 14 Jul 2017 13:53:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 25/28] moxie: replace cpu_moxie_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Anthony Green , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: Anthony Green --- target/moxie/cpu.h | 3 +-- hw/moxie/moxiesim.c | 2 +- target/moxie/cpu.c | 5 ----- 3 files changed, 2 insertions(+), 8 deletions(-) diff --git a/target/moxie/cpu.h b/target/moxie/cpu.h index 8991aae..75decaa 100644 --- a/target/moxie/cpu.h +++ b/target/moxie/cpu.h @@ -112,7 +112,6 @@ static inline MoxieCPU *moxie_env_get_cpu(CPUMoxieState= *env) =20 #define ENV_OFFSET offsetof(MoxieCPU, env) =20 -MoxieCPU *cpu_moxie_init(const char *cpu_model); void moxie_cpu_do_interrupt(CPUState *cs); void moxie_cpu_dump_state(CPUState *cpu, FILE *f, fprintf_function cpu_fprintf, int flags); @@ -121,7 +120,7 @@ void moxie_translate_init(void); int cpu_moxie_signal_handler(int host_signum, void *pinfo, void *puc); =20 -#define cpu_init(cpu_model) CPU(cpu_moxie_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_MOXIE_CPU, cpu_model) =20 #define cpu_signal_handler cpu_moxie_signal_handler =20 diff --git a/hw/moxie/moxiesim.c b/hw/moxie/moxiesim.c index 3069834..719dc0a 100644 --- a/hw/moxie/moxiesim.c +++ b/hw/moxie/moxiesim.c @@ -118,7 +118,7 @@ static void moxiesim_init(MachineState *machine) if (cpu_model =3D=3D NULL) { cpu_model =3D "MoxieLite-moxie-cpu"; } - cpu =3D cpu_moxie_init(cpu_model); + cpu =3D MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model)); if (!cpu) { fprintf(stderr, "Unable to find CPU definition\n"); exit(1); diff --git a/target/moxie/cpu.c b/target/moxie/cpu.c index 927b1a1..748d02f 100644 --- a/target/moxie/cpu.c +++ b/target/moxie/cpu.c @@ -150,11 +150,6 @@ static const MoxieCPUInfo moxie_cpus[] =3D { { .name =3D "any", .initfn =3D moxie_any_initfn }, }; =20 -MoxieCPU *cpu_moxie_init(const char *cpu_model) -{ - return MOXIE_CPU(cpu_generic_init(TYPE_MOXIE_CPU, cpu_model)); -} - static void cpu_register(const MoxieCPUInfo *info) { TypeInfo type_info =3D { --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041611205299.7667184540908; Fri, 14 Jul 2017 07:13:31 -0700 (PDT) Received: from localhost ([::1]:38227 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1LS-0004oq-U9 for importer@patchew.org; Fri, 14 Jul 2017 10:13:26 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41728) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12h-0002vD-Hf for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:04 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12g-00020x-KE for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:03 -0400 Received: from mx1.redhat.com ([209.132.183.28]:56530) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12g-00020k-EV for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:02 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 35E3B7F409; Fri, 14 Jul 2017 13:54:01 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 82F8360629; Fri, 14 Jul 2017 13:53:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 35E3B7F409 Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 35E3B7F409 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:17 +0200 Message-Id: <1500040339-119465-27-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Fri, 14 Jul 2017 13:54:01 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 26/28] openrisc: replace cpu_openrisc_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Stafford Horne , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Jia Liu , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Acked-by: Stafford Horne Reviewed-by: Eduardo Habkost --- CC: Jia Liu CC: Stafford Horne --- target/openrisc/cpu.h | 4 +--- hw/openrisc/openrisc_sim.c | 2 +- target/openrisc/cpu.c | 5 ----- 3 files changed, 2 insertions(+), 9 deletions(-) diff --git a/target/openrisc/cpu.h b/target/openrisc/cpu.h index 2721432..f51b89a 100644 --- a/target/openrisc/cpu.h +++ b/target/openrisc/cpu.h @@ -347,8 +347,6 @@ static inline OpenRISCCPU *openrisc_env_get_cpu(CPUOpen= RISCState *env) =20 #define ENV_OFFSET offsetof(OpenRISCCPU, env) =20 -OpenRISCCPU *cpu_openrisc_init(const char *cpu_model); - void cpu_openrisc_list(FILE *f, fprintf_function cpu_fprintf); void openrisc_cpu_do_interrupt(CPUState *cpu); bool openrisc_cpu_exec_interrupt(CPUState *cpu, int int_req); @@ -390,7 +388,7 @@ int cpu_openrisc_get_phys_data(OpenRISCCPU *cpu, int *prot, target_ulong address, int rw); #endif =20 -#define cpu_init(cpu_model) CPU(cpu_openrisc_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model) =20 #include "exec/cpu-all.h" =20 diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c index fc0d096..d6ed968 100644 --- a/hw/openrisc/openrisc_sim.c +++ b/hw/openrisc/openrisc_sim.c @@ -109,7 +109,7 @@ static void openrisc_sim_init(MachineState *machine) } =20 for (n =3D 0; n < smp_cpus; n++) { - cpu =3D cpu_openrisc_init(cpu_model); + cpu =3D OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model= )); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find CPU definition!\n"); exit(1); diff --git a/target/openrisc/cpu.c b/target/openrisc/cpu.c index 1d6330c..a979f0b 100644 --- a/target/openrisc/cpu.c +++ b/target/openrisc/cpu.c @@ -210,11 +210,6 @@ static void openrisc_cpu_register_types(void) } } =20 -OpenRISCCPU *cpu_openrisc_init(const char *cpu_model) -{ - return OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model)); -} - /* Sort alphabetically by type name, except for "any". */ static gint openrisc_cpu_list_compare(gconstpointer a, gconstpointer b) { --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1500041732505332.22535414405115; Fri, 14 Jul 2017 07:15:32 -0700 (PDT) Received: from localhost ([::1]:38237 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1NQ-0007Ei-9u for importer@patchew.org; Fri, 14 Jul 2017 10:15:28 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41756) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12m-000340-VZ for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:11 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12j-00021a-38 for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:09 -0400 Received: from mx1.redhat.com ([209.132.183.28]:37782) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12i-00021M-Sf for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:05 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 69E2D267DF; Fri, 14 Jul 2017 13:54:03 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id 7D2136BF6F; Fri, 14 Jul 2017 13:54:01 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 69E2D267DF Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 69E2D267DF From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:18 +0200 Message-Id: <1500040339-119465-28-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Fri, 14 Jul 2017 13:54:03 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 27/28] unicore32: replace uc32_cpu_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Guan Xuetao , =?UTF-8?q?Andreas=20F=C3=A4rber?= , Eduardo Habkost Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Reviewed-by: Eduardo Habkost --- CC: Guan Xuetao --- target/unicore32/cpu.h | 4 +--- hw/unicore32/puv3.c | 2 +- target/unicore32/helper.c | 5 ----- 3 files changed, 2 insertions(+), 9 deletions(-) diff --git a/target/unicore32/cpu.h b/target/unicore32/cpu.h index 7b5b405..7724108 100644 --- a/target/unicore32/cpu.h +++ b/target/unicore32/cpu.h @@ -165,9 +165,7 @@ static inline int cpu_mmu_index(CPUUniCore32State *env,= bool ifetch) =20 #include "exec/cpu-all.h" =20 -UniCore32CPU *uc32_cpu_init(const char *cpu_model); - -#define cpu_init(cpu_model) CPU(uc32_cpu_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model) =20 static inline void cpu_get_tb_cpu_state(CPUUniCore32State *env, target_ulo= ng *pc, target_ulong *cs_base, uint32_t *f= lags) diff --git a/hw/unicore32/puv3.c b/hw/unicore32/puv3.c index 032078f..89751b1 100644 --- a/hw/unicore32/puv3.c +++ b/hw/unicore32/puv3.c @@ -125,7 +125,7 @@ static void puv3_init(MachineState *machine) cpu_model =3D "UniCore-II"; } =20 - cpu =3D uc32_cpu_init(cpu_model); + cpu =3D UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model)); if (!cpu) { error_report("Unable to find CPU definition"); exit(1); diff --git a/target/unicore32/helper.c b/target/unicore32/helper.c index f9239dc..309dcd1 100644 --- a/target/unicore32/helper.c +++ b/target/unicore32/helper.c @@ -27,11 +27,6 @@ #define DPRINTF(fmt, ...) do {} while (0) #endif =20 -UniCore32CPU *uc32_cpu_init(const char *cpu_model) -{ - return UNICORE32_CPU(cpu_generic_init(TYPE_UNICORE32_CPU, cpu_model)); -} - #ifndef CONFIG_USER_ONLY void helper_cp0_set(CPUUniCore32State *env, uint32_t val, uint32_t creg, uint32_t cop) --=20 2.7.4 From nobody Wed Apr 24 18:54:43 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zohomail.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 150004116628810.060239995790084; Fri, 14 Jul 2017 07:06:06 -0700 (PDT) Received: from localhost ([::1]:38186 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW1EI-0006jl-20 for importer@patchew.org; Fri, 14 Jul 2017 10:06:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:41767) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1dW12p-00039z-6F for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:12 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1dW12l-000220-Ob for qemu-devel@nongnu.org; Fri, 14 Jul 2017 09:54:11 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45056) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1dW12l-00021q-FY; Fri, 14 Jul 2017 09:54:07 -0400 Received: from smtp.corp.redhat.com (int-mx03.intmail.prod.int.phx2.redhat.com [10.5.11.13]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 45D47A0208; Fri, 14 Jul 2017 13:54:06 +0000 (UTC) Received: from dell-r430-03.lab.eng.brq.redhat.com (dell-r430-03.lab.eng.brq.redhat.com [10.34.112.60]) by smtp.corp.redhat.com (Postfix) with ESMTP id A72B760605; Fri, 14 Jul 2017 13:54:03 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 45D47A0208 Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx02.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=imammedo@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 45D47A0208 From: Igor Mammedov To: qemu-devel@nongnu.org Date: Fri, 14 Jul 2017 15:52:19 +0200 Message-Id: <1500040339-119465-29-git-send-email-imammedo@redhat.com> In-Reply-To: <1500040339-119465-1-git-send-email-imammedo@redhat.com> References: <1500040339-119465-1-git-send-email-imammedo@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.13 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.26]); Fri, 14 Jul 2017 13:54:06 +0000 (UTC) Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH 28/28] ppc: replace cpu_ppc_init() with cpu_generic_init() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Peter Maydell , Eduardo Habkost , qemu-ppc@nongnu.org, Alexander Graf , =?UTF-8?q?Herv=C3=A9=20Poussineau?= , "Edgar E. Iglesias" , =?UTF-8?q?Andreas=20F=C3=A4rber?= , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" it's just a wrapper, drop it and use cpu_generic_init() directly Signed-off-by: Igor Mammedov Acked-by: David Gibson Reviewed-by: Eduardo Habkost Reviewed-by: Herv=C3=A9 Poussineau --- CC: Alexander Graf CC: David Gibson CC: "Herv=C3=A9 Poussineau" CC: "Edgar E. Iglesias" CC: qemu-ppc@nongnu.org --- target/ppc/cpu.h | 3 +-- hw/ppc/e500.c | 3 ++- hw/ppc/mac_newworld.c | 3 ++- hw/ppc/mac_oldworld.c | 3 ++- hw/ppc/ppc440_bamboo.c | 2 +- hw/ppc/ppc4xx_devs.c | 2 +- hw/ppc/prep.c | 5 +++-- hw/ppc/virtex_ml507.c | 2 +- target/ppc/translate_init.c | 5 ----- 9 files changed, 13 insertions(+), 15 deletions(-) diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h index 6ee2a26..696cbeb 100644 --- a/target/ppc/cpu.h +++ b/target/ppc/cpu.h @@ -1276,7 +1276,6 @@ extern const struct VMStateDescription vmstate_ppc_cp= u; #endif =20 /*************************************************************************= ****/ -PowerPCCPU *cpu_ppc_init(const char *cpu_model); void ppc_translate_init(void); const char *ppc_cpu_lookup_alias(const char *alias); /* you can call this signal handler from your SIGBUS and SIGSEGV @@ -1353,7 +1352,7 @@ static inline uint64_t ppc_dump_gpr(CPUPPCState *env,= int gprn) int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp); int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val); =20 -#define cpu_init(cpu_model) CPU(cpu_ppc_init(cpu_model)) +#define cpu_init(cpu_model) cpu_generic_init(TYPE_POWERPC_CPU, cpu_model) =20 #define cpu_signal_handler cpu_ppc_signal_handler #define cpu_list ppc_cpu_list diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c index 62f1857..f0596f3 100644 --- a/hw/ppc/e500.c +++ b/hw/ppc/e500.c @@ -819,7 +819,8 @@ void ppce500_init(MachineState *machine, PPCE500Params = *params) CPUState *cs; qemu_irq *input; =20 - cpu =3D cpu_ppc_init(machine->cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/hw/ppc/mac_newworld.c b/hw/ppc/mac_newworld.c index bae1c0a..72c98e9 100644 --- a/hw/ppc/mac_newworld.c +++ b/hw/ppc/mac_newworld.c @@ -187,7 +187,8 @@ static void ppc_core99_init(MachineState *machine) #endif } for (i =3D 0; i < smp_cpus; i++) { - cpu =3D cpu_ppc_init(machine->cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/mac_oldworld.c b/hw/ppc/mac_oldworld.c index 97bb854..6fc2a19 100644 --- a/hw/ppc/mac_oldworld.c +++ b/hw/ppc/mac_oldworld.c @@ -116,7 +116,8 @@ static void ppc_heathrow_init(MachineState *machine) if (machine->cpu_model =3D=3D NULL) machine->cpu_model =3D "G3"; for (i =3D 0; i < smp_cpus; i++) { - cpu =3D cpu_ppc_init(machine->cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c index 9d997bf..ca26398 100644 --- a/hw/ppc/ppc440_bamboo.c +++ b/hw/ppc/ppc440_bamboo.c @@ -186,7 +186,7 @@ static void bamboo_init(MachineState *machine) if (machine->cpu_model =3D=3D NULL) { machine->cpu_model =3D "440EP"; } - cpu =3D cpu_ppc_init(machine->cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_mo= del)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/hw/ppc/ppc4xx_devs.c b/hw/ppc/ppc4xx_devs.c index e7f413e..6b38ed7 100644 --- a/hw/ppc/ppc4xx_devs.c +++ b/hw/ppc/ppc4xx_devs.c @@ -56,7 +56,7 @@ PowerPCCPU *ppc4xx_init(const char *cpu_model, CPUPPCState *env; =20 /* init CPUs */ - cpu =3D cpu_ppc_init(cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find PowerPC %s CPU definition\n", cpu_model); diff --git a/hw/ppc/prep.c b/hw/ppc/prep.c index 36d3dcd..00f3321 100644 --- a/hw/ppc/prep.c +++ b/hw/ppc/prep.c @@ -520,7 +520,8 @@ static void ppc_prep_init(MachineState *machine) if (machine->cpu_model =3D=3D NULL) machine->cpu_model =3D "602"; for (i =3D 0; i < smp_cpus; i++) { - cpu =3D cpu_ppc_init(machine->cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, + machine->cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to find PowerPC CPU definition\n"); exit(1); @@ -724,7 +725,7 @@ static void ibm_40p_init(MachineState *machine) if (!machine->cpu_model) { machine->cpu_model =3D "604"; } - cpu =3D cpu_ppc_init(machine->cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, machine->cpu_mo= del)); if (!cpu) { error_report("could not initialize CPU '%s'", machine->cpu_model); diff --git a/hw/ppc/virtex_ml507.c b/hw/ppc/virtex_ml507.c index fdbcf22..d5fdc16 100644 --- a/hw/ppc/virtex_ml507.c +++ b/hw/ppc/virtex_ml507.c @@ -96,7 +96,7 @@ static PowerPCCPU *ppc440_init_xilinx(ram_addr_t *ram_siz= e, CPUPPCState *env; qemu_irq *irqs; =20 - cpu =3D cpu_ppc_init(cpu_model); + cpu =3D POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); if (cpu =3D=3D NULL) { fprintf(stderr, "Unable to initialize CPU!\n"); exit(1); diff --git a/target/ppc/translate_init.c b/target/ppc/translate_init.c index 783bf98..b4eaabb 100644 --- a/target/ppc/translate_init.c +++ b/target/ppc/translate_init.c @@ -10250,11 +10250,6 @@ const char *ppc_cpu_lookup_alias(const char *alias) return NULL; } =20 -PowerPCCPU *cpu_ppc_init(const char *cpu_model) -{ - return POWERPC_CPU(cpu_generic_init(TYPE_POWERPC_CPU, cpu_model)); -} - PowerPCCPUClass *ppc_cpu_get_family_class(PowerPCCPUClass *pcc) { ObjectClass *oc =3D OBJECT_CLASS(pcc); --=20 2.7.4