From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403459832866.8192414413476; Wed, 10 May 2017 01:04:19 -0700 (PDT) Received: from localhost ([::1]:40999 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mba-0006za-9H for importer@patchew.org; Wed, 10 May 2017 04:04:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57512) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MZi-0005hl-6z for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:23 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8MZh-0000tD-6z for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:22 -0400 Received: from mx1.redhat.com ([209.132.183.28]:43920) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8MZg-0000t5-UU for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:21 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B10E980475; Wed, 10 May 2017 08:02:19 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id CC7061710B; Wed, 10 May 2017 08:02:13 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com B10E980475 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com B10E980475 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:44 +0800 Message-Id: <1494403315-12760-2-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 10 May 2017 08:02:19 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 01/12] pc: add 2.10 machine type X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, Eduardo Habkost , "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini , Richard Henderson , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" CC: "Michael S. Tsirkin" CC: Paolo Bonzini CC: Richard Henderson CC: Eduardo Habkost Reviewed-by: Eduardo Habkost Signed-off-by: Peter Xu --- hw/i386/pc_piix.c | 15 ++++++++++++--- hw/i386/pc_q35.c | 13 +++++++++++-- include/hw/i386/pc.h | 3 +++ 3 files changed, 26 insertions(+), 5 deletions(-) diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c index 9f102aa..8fb6553 100644 --- a/hw/i386/pc_piix.c +++ b/hw/i386/pc_piix.c @@ -437,21 +437,30 @@ static void pc_i440fx_machine_options(MachineClass *m) m->default_display =3D "std"; } =20 -static void pc_i440fx_2_9_machine_options(MachineClass *m) +static void pc_i440fx_2_10_machine_options(MachineClass *m) { pc_i440fx_machine_options(m); m->alias =3D "pc"; m->is_default =3D 1; } =20 +DEFINE_I440FX_MACHINE(v2_10, "pc-i440fx-2.10", NULL, + pc_i440fx_2_10_machine_options); + +static void pc_i440fx_2_9_machine_options(MachineClass *m) +{ + pc_i440fx_2_10_machine_options(m); + m->is_default =3D 0; + m->alias =3D NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); +} + DEFINE_I440FX_MACHINE(v2_9, "pc-i440fx-2.9", NULL, pc_i440fx_2_9_machine_options); =20 static void pc_i440fx_2_8_machine_options(MachineClass *m) { pc_i440fx_2_9_machine_options(m); - m->is_default =3D 0; - m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_8); } =20 diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c index dd792a8..f07ebec 100644 --- a/hw/i386/pc_q35.c +++ b/hw/i386/pc_q35.c @@ -301,19 +301,28 @@ static void pc_q35_machine_options(MachineClass *m) m->max_cpus =3D 288; } =20 -static void pc_q35_2_9_machine_options(MachineClass *m) +static void pc_q35_2_10_machine_options(MachineClass *m) { pc_q35_machine_options(m); m->alias =3D "q35"; } =20 +DEFINE_Q35_MACHINE(v2_10, "pc-q35-2.10", NULL, + pc_q35_2_10_machine_options); + +static void pc_q35_2_9_machine_options(MachineClass *m) +{ + pc_q35_2_10_machine_options(m); + m->alias =3D NULL; + SET_MACHINE_COMPAT(m, PC_COMPAT_2_9); +} + DEFINE_Q35_MACHINE(v2_9, "pc-q35-2.9", NULL, pc_q35_2_9_machine_options); =20 static void pc_q35_2_8_machine_options(MachineClass *m) { pc_q35_2_9_machine_options(m); - m->alias =3D NULL; SET_MACHINE_COMPAT(m, PC_COMPAT_2_8); } =20 diff --git a/include/hw/i386/pc.h b/include/hw/i386/pc.h index f278b3a..7546d01 100644 --- a/include/hw/i386/pc.h +++ b/include/hw/i386/pc.h @@ -373,6 +373,9 @@ int e820_add_entry(uint64_t, uint64_t, uint32_t); int e820_get_num_entries(void); bool e820_get_entry(int, uint32_t, uint64_t *, uint64_t *); =20 +#define PC_COMPAT_2_9 \ + HW_COMPAT_2_9 \ + #define PC_COMPAT_2_8 \ HW_COMPAT_2_8 \ {\ --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149440350447846.441225128107135; Wed, 10 May 2017 01:05:04 -0700 (PDT) Received: from localhost ([::1]:41000 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8McI-0007Xj-JS for importer@patchew.org; Wed, 10 May 2017 04:05:02 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57584) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MZt-0005vN-67 for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:34 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8MZo-0000vw-JG for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:33 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58978) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8MZo-0000vf-A8 for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:28 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 2F9633D957; Wed, 10 May 2017 08:02:27 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 0CE251710B; Wed, 10 May 2017 08:02:20 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 2F9633D957 Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx06.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 2F9633D957 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:45 +0800 Message-Id: <1494403315-12760-3-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.30]); Wed, 10 May 2017 08:02:27 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 02/12] memory: tune last param of iommu_ops.translate() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch converts the old "is_write" bool into IOMMUAccessFlags. The difference is that "is_write" can only express either read/write, but sometimes what we really want is "none" here (neither read nor write). Replay is an good example - during replay, we should not check any RW permission bits since thats not an actual IO at all. CC: Paolo Bonzini CC: David Gibson Reviewed-by: David Gibson Acked-by: David Gibson Acked-by: Paolo Bonzini Signed-off-by: Peter Xu --- exec.c | 6 ++++-- hw/alpha/typhoon.c | 2 +- hw/dma/rc4030.c | 2 +- hw/i386/amd_iommu.c | 4 ++-- hw/i386/intel_iommu.c | 4 ++-- hw/pci-host/apb.c | 2 +- hw/ppc/spapr_iommu.c | 2 +- hw/s390x/s390-pci-bus.c | 2 +- hw/s390x/s390-pci-inst.c | 2 +- include/exec/memory.h | 10 ++++++++-- memory.c | 3 ++- 11 files changed, 24 insertions(+), 15 deletions(-) diff --git a/exec.c b/exec.c index eac6085..072de5d 100644 --- a/exec.c +++ b/exec.c @@ -481,7 +481,8 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpac= e *as, hwaddr addr, break; } =20 - iotlb =3D mr->iommu_ops->translate(mr, addr, is_write); + iotlb =3D mr->iommu_ops->translate(mr, addr, is_write ? + IOMMU_WO : IOMMU_RO); if (!(iotlb.perm & (1 << is_write))) { iotlb.target_as =3D NULL; break; @@ -513,7 +514,8 @@ MemoryRegion *address_space_translate(AddressSpace *as,= hwaddr addr, break; } =20 - iotlb =3D mr->iommu_ops->translate(mr, addr, is_write); + iotlb =3D mr->iommu_ops->translate(mr, addr, is_write ? + IOMMU_WO : IOMMU_RO); addr =3D ((iotlb.translated_addr & ~iotlb.addr_mask) | (addr & iotlb.addr_mask)); *plen =3D MIN(*plen, (addr | iotlb.addr_mask) - addr + 1); diff --git a/hw/alpha/typhoon.c b/hw/alpha/typhoon.c index f50f5cf..c1cf780 100644 --- a/hw/alpha/typhoon.c +++ b/hw/alpha/typhoon.c @@ -664,7 +664,7 @@ static bool window_translate(TyphoonWindow *win, hwaddr= addr, /* TODO: A translation failure here ought to set PCI error codes on the Pchip and generate a machine check interrupt. */ static IOMMUTLBEntry typhoon_translate_iommu(MemoryRegion *iommu, hwaddr a= ddr, - bool is_write) + IOMMUAccessFlags flag) { TyphoonPchip *pchip =3D container_of(iommu, TyphoonPchip, iommu); IOMMUTLBEntry ret; diff --git a/hw/dma/rc4030.c b/hw/dma/rc4030.c index 0080141..edf9432 100644 --- a/hw/dma/rc4030.c +++ b/hw/dma/rc4030.c @@ -489,7 +489,7 @@ static const MemoryRegionOps jazzio_ops =3D { }; =20 static IOMMUTLBEntry rc4030_dma_translate(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { rc4030State *s =3D container_of(iommu, rc4030State, dma_mr); IOMMUTLBEntry ret =3D { diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c index f86a40a..42b34ef 100644 --- a/hw/i386/amd_iommu.c +++ b/hw/i386/amd_iommu.c @@ -987,7 +987,7 @@ static inline bool amdvi_is_interrupt_addr(hwaddr addr) } =20 static IOMMUTLBEntry amdvi_translate(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { AMDVIAddressSpace *as =3D container_of(iommu, AMDVIAddressSpace, iommu= ); AMDVIState *s =3D as->iommu_state; @@ -1016,7 +1016,7 @@ static IOMMUTLBEntry amdvi_translate(MemoryRegion *io= mmu, hwaddr addr, return ret; } =20 - amdvi_do_translate(as, addr, is_write, &ret); + amdvi_do_translate(as, addr, flag & IOMMU_WO, &ret); trace_amdvi_translation_result(as->bus_num, PCI_SLOT(as->devfn), PCI_FUNC(as->devfn), addr, ret.translated_addr); return ret; diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 02f047c..ea54ec3 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -2221,7 +2221,7 @@ static void vtd_mem_write(void *opaque, hwaddr addr, } =20 static IOMMUTLBEntry vtd_iommu_translate(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { VTDAddressSpace *vtd_as =3D container_of(iommu, VTDAddressSpace, iommu= ); IntelIOMMUState *s =3D vtd_as->iommu_state; @@ -2243,7 +2243,7 @@ static IOMMUTLBEntry vtd_iommu_translate(MemoryRegion= *iommu, hwaddr addr, } =20 vtd_do_iommu_translate(vtd_as, vtd_as->bus, vtd_as->devfn, addr, - is_write, &ret); + flag & IOMMU_WO, &ret); VTD_DPRINTF(MMU, "bus %"PRIu8 " slot %"PRIu8 " func %"PRIu8 " devfn %"PRIu8 " iova 0x%"PRIx64 " hpa 0x%"PRIx64, pci_bus_num(vtd_as->bu= s), diff --git a/hw/pci-host/apb.c b/hw/pci-host/apb.c index 653e711..ad7abb2 100644 --- a/hw/pci-host/apb.c +++ b/hw/pci-host/apb.c @@ -209,7 +209,7 @@ static AddressSpace *pbm_pci_dma_iommu(PCIBus *bus, voi= d *opaque, int devfn) =20 /* Called from RCU critical section */ static IOMMUTLBEntry pbm_translate_iommu(MemoryRegion *iommu, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { IOMMUState *is =3D container_of(iommu, IOMMUState, iommu); hwaddr baseaddr, offset; diff --git a/hw/ppc/spapr_iommu.c b/hw/ppc/spapr_iommu.c index 29c80bb..0341bc0 100644 --- a/hw/ppc/spapr_iommu.c +++ b/hw/ppc/spapr_iommu.c @@ -111,7 +111,7 @@ static void spapr_tce_free_table(uint64_t *table, int f= d, uint32_t nb_table) =20 /* Called from RCU critical section */ static IOMMUTLBEntry spapr_tce_translate_iommu(MemoryRegion *iommu, hwaddr= addr, - bool is_write) + IOMMUAccessFlags flag) { sPAPRTCETable *tcet =3D container_of(iommu, sPAPRTCETable, iommu); uint64_t tce; diff --git a/hw/s390x/s390-pci-bus.c b/hw/s390x/s390-pci-bus.c index a8a1bab..6bdc795 100644 --- a/hw/s390x/s390-pci-bus.c +++ b/hw/s390x/s390-pci-bus.c @@ -357,7 +357,7 @@ out: } =20 static IOMMUTLBEntry s390_translate_iommu(MemoryRegion *mr, hwaddr addr, - bool is_write) + IOMMUAccessFlags flag) { uint64_t pte; uint32_t flags; diff --git a/hw/s390x/s390-pci-inst.c b/hw/s390x/s390-pci-inst.c index 314a9cb..8bc7c98 100644 --- a/hw/s390x/s390-pci-inst.c +++ b/hw/s390x/s390-pci-inst.c @@ -624,7 +624,7 @@ int rpcit_service_call(S390CPU *cpu, uint8_t r1, uint8_= t r2) =20 mr =3D &iommu->iommu_mr; while (start < end) { - entry =3D mr->iommu_ops->translate(mr, start, 0); + entry =3D mr->iommu_ops->translate(mr, start, IOMMU_NONE); =20 if (!entry.translated_addr) { pbdev->state =3D ZPCI_FS_ERROR; diff --git a/include/exec/memory.h b/include/exec/memory.h index 99e0f54..97fd0c2 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -185,8 +185,14 @@ struct MemoryRegionOps { typedef struct MemoryRegionIOMMUOps MemoryRegionIOMMUOps; =20 struct MemoryRegionIOMMUOps { - /* Return a TLB entry that contains a given address. */ - IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, bool is_w= rite); + /* + * Return a TLB entry that contains a given address. Flag should + * be the access permission of this translation operation. We can + * set flag to IOMMU_NONE to mean that we don't need any + * read/write permission checks, like, when for region replay. + */ + IOMMUTLBEntry (*translate)(MemoryRegion *iommu, hwaddr addr, + IOMMUAccessFlags flag); /* Returns minimum supported page size */ uint64_t (*get_min_page_size)(MemoryRegion *iommu); /* Called when IOMMU Notifier flag changed */ diff --git a/memory.c b/memory.c index b727f5e..3f0aae8 100644 --- a/memory.c +++ b/memory.c @@ -1625,6 +1625,7 @@ void memory_region_iommu_replay(MemoryRegion *mr, IOM= MUNotifier *n, { hwaddr addr, granularity; IOMMUTLBEntry iotlb; + IOMMUAccessFlags flag =3D is_write ? IOMMU_WO : IOMMU_RO; =20 /* If the IOMMU has its own replay callback, override */ if (mr->iommu_ops->replay) { @@ -1635,7 +1636,7 @@ void memory_region_iommu_replay(MemoryRegion *mr, IOM= MUNotifier *n, granularity =3D memory_region_iommu_get_min_page_size(mr); =20 for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { - iotlb =3D mr->iommu_ops->translate(mr, addr, is_write); + iotlb =3D mr->iommu_ops->translate(mr, addr, flag); if (iotlb.perm !=3D IOMMU_NONE) { n->notify(n, &iotlb); } --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403612587628.81694233058; Wed, 10 May 2017 01:06:52 -0700 (PDT) Received: from localhost ([::1]:41011 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Me2-0000es-Us for importer@patchew.org; Wed, 10 May 2017 04:06:50 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57628) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MZz-00066K-CA for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:44 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8MZy-00015F-8L for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:39 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45242) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8MZx-00013x-Vt for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:38 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D4B5081127; Wed, 10 May 2017 08:02:36 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id C1D8617117; Wed, 10 May 2017 08:02:27 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D4B5081127 Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx03.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D4B5081127 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:46 +0800 Message-Id: <1494403315-12760-4-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.27]); Wed, 10 May 2017 08:02:37 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 03/12] memory: remove the last param in memory_region_iommu_replay() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We were always passing in that one as "false" to assume that's an read operation, and we also assume that IOMMU translation would always have that read permission. A better permission would be IOMMU_NONE since the replay is after all not a real read operation, but just a page table rebuilding process. CC: David Gibson CC: Paolo Bonzini Reviewed-by: David Gibson Acked-by: Paolo Bonzini Signed-off-by: Peter Xu --- hw/vfio/common.c | 2 +- include/exec/memory.h | 5 +---- memory.c | 8 +++----- 3 files changed, 5 insertions(+), 10 deletions(-) diff --git a/hw/vfio/common.c b/hw/vfio/common.c index a8f12ee..b9abe77 100644 --- a/hw/vfio/common.c +++ b/hw/vfio/common.c @@ -502,7 +502,7 @@ static void vfio_listener_region_add(MemoryListener *li= stener, QLIST_INSERT_HEAD(&container->giommu_list, giommu, giommu_next); =20 memory_region_register_iommu_notifier(giommu->iommu, &giommu->n); - memory_region_iommu_replay(giommu->iommu, &giommu->n, false); + memory_region_iommu_replay(giommu->iommu, &giommu->n); =20 return; } diff --git a/include/exec/memory.h b/include/exec/memory.h index 97fd0c2..bfdc685 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -731,11 +731,8 @@ void memory_region_register_iommu_notifier(MemoryRegio= n *mr, * * @mr: the memory region to observe * @n: the notifier to which to replay iommu mappings - * @is_write: Whether to treat the replay as a translate "write" - * through the iommu */ -void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n, - bool is_write); +void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n); =20 /** * memory_region_iommu_replay_all: replay existing IOMMU translations diff --git a/memory.c b/memory.c index 3f0aae8..0ddc4cc 100644 --- a/memory.c +++ b/memory.c @@ -1620,12 +1620,10 @@ uint64_t memory_region_iommu_get_min_page_size(Memo= ryRegion *mr) return TARGET_PAGE_SIZE; } =20 -void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n, - bool is_write) +void memory_region_iommu_replay(MemoryRegion *mr, IOMMUNotifier *n) { hwaddr addr, granularity; IOMMUTLBEntry iotlb; - IOMMUAccessFlags flag =3D is_write ? IOMMU_WO : IOMMU_RO; =20 /* If the IOMMU has its own replay callback, override */ if (mr->iommu_ops->replay) { @@ -1636,7 +1634,7 @@ void memory_region_iommu_replay(MemoryRegion *mr, IOM= MUNotifier *n, granularity =3D memory_region_iommu_get_min_page_size(mr); =20 for (addr =3D 0; addr < memory_region_size(mr); addr +=3D granularity)= { - iotlb =3D mr->iommu_ops->translate(mr, addr, flag); + iotlb =3D mr->iommu_ops->translate(mr, addr, IOMMU_NONE); if (iotlb.perm !=3D IOMMU_NONE) { n->notify(n, &iotlb); } @@ -1654,7 +1652,7 @@ void memory_region_iommu_replay_all(MemoryRegion *mr) IOMMUNotifier *notifier; =20 IOMMU_NOTIFIER_FOREACH(notifier, mr) { - memory_region_iommu_replay(mr, notifier, false); + memory_region_iommu_replay(mr, notifier); } } =20 --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403616315332.6042584894428; Wed, 10 May 2017 01:06:56 -0700 (PDT) Received: from localhost ([::1]:41012 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Me5-0000gd-So for importer@patchew.org; Wed, 10 May 2017 04:06:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57663) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Ma4-00068v-CK for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8Ma2-00016B-8x for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:44 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49506) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8Ma2-00015y-07 for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:42 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id D9D37C059724; Wed, 10 May 2017 08:02:40 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 690F51710B; Wed, 10 May 2017 08:02:37 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com D9D37C059724 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com D9D37C059724 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:47 +0800 Message-Id: <1494403315-12760-5-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 10 May 2017 08:02:41 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 04/12] memory: fix address_space_get_iotlb_entry() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , Paolo Bonzini , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This function has an assumption that we will definitely call translate() once (or say, the addr will be located inside one IOMMU memory region), otherwise an empty IOTLB will be returned. Nevertheless, this is not what we want. When there is no IOMMU memory region, we should build up a static mapping for the caller, instead of an invalid IOTLB. We won't trigger this path before VT-d passthrough mode. When passthrough mode for a vhost device is setup, VT-d is possible to disable the IOMMU region for that device. Without current patch, we'll get a vhost boot failure, and it'll be failed over to virtio userspace mode. CC: Paolo Bonzini CC: Jason Wang CC: Michael S. Tsirkin Signed-off-by: Peter Xu --- exec.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/exec.c b/exec.c index 072de5d..5cfdacd 100644 --- a/exec.c +++ b/exec.c @@ -463,12 +463,13 @@ address_space_translate_internal(AddressSpaceDispatch= *d, hwaddr addr, hwaddr *x } =20 /* Called from RCU critical section */ -IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr addr, +IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpace *as, hwaddr iova, bool is_write) { IOMMUTLBEntry iotlb =3D {0}; MemoryRegionSection *section; MemoryRegion *mr; + hwaddr addr =3D iova, psize; =20 for (;;) { AddressSpaceDispatch *d =3D atomic_rcu_read(&as->dispatch); @@ -478,6 +479,23 @@ IOMMUTLBEntry address_space_get_iotlb_entry(AddressSpa= ce *as, hwaddr addr, mr =3D section->mr; =20 if (!mr->iommu_ops) { + /* + * We didn't translate() but reached here. It possibly + * means it's a static mapping. If so (it should be RAM), + * we set the IOTLB up. + */ + if (!iotlb.target_as && memory_region_is_ram(mr) && + !memory_region_is_rom(mr)) { + psize =3D mr->ram_block->page_size; + iova &=3D ~(psize - 1); + iotlb =3D (IOMMUTLBEntry) { + .target_as =3D &address_space_memory, + .iova =3D iova, + .translated_addr =3D iova, + .addr_mask =3D psize - 1, + .perm =3D IOMMU_RW, + }; + } break; } =20 --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403753979465.44212478276336; Wed, 10 May 2017 01:09:13 -0700 (PDT) Received: from localhost ([::1]:41019 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MgK-0002xM-HK for importer@patchew.org; Wed, 10 May 2017 04:09:12 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57713) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Ma8-0006De-HQ for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:50 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8Ma7-0001AZ-Mj for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:48 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58114) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8Ma7-00017X-Er for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:47 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5F6014E4C3; Wed, 10 May 2017 08:02:46 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 697991710B; Wed, 10 May 2017 08:02:41 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 5F6014E4C3 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 5F6014E4C3 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:48 +0800 Message-Id: <1494403315-12760-6-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 10 May 2017 08:02:46 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 05/12] x86-iommu: use DeviceClass properties X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" No reason to keep tens of lines if we can do it actually far shorter. Signed-off-by: Peter Xu --- hw/i386/x86-iommu.c | 47 +++++++---------------------------------------- 1 file changed, 7 insertions(+), 40 deletions(-) diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 23dcd3f..02b8825 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -88,55 +88,22 @@ static void x86_iommu_realize(DeviceState *dev, Error *= *errp) x86_iommu_set_default(X86_IOMMU_DEVICE(dev)); } =20 +static Property x86_iommu_properties[] =3D { + DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), + DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), + DEFINE_PROP_END_OF_LIST(), +}; + static void x86_iommu_class_init(ObjectClass *klass, void *data) { DeviceClass *dc =3D DEVICE_CLASS(klass); dc->realize =3D x86_iommu_realize; -} - -static bool x86_iommu_intremap_prop_get(Object *o, Error **errp) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - return s->intr_supported; -} - -static void x86_iommu_intremap_prop_set(Object *o, bool value, Error **err= p) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - s->intr_supported =3D value; -} - -static bool x86_iommu_device_iotlb_prop_get(Object *o, Error **errp) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - return s->dt_supported; -} - -static void x86_iommu_device_iotlb_prop_set(Object *o, bool value, Error *= *errp) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - s->dt_supported =3D value; -} - -static void x86_iommu_instance_init(Object *o) -{ - X86IOMMUState *s =3D X86_IOMMU_DEVICE(o); - - /* By default, do not support IR */ - s->intr_supported =3D false; - object_property_add_bool(o, "intremap", x86_iommu_intremap_prop_get, - x86_iommu_intremap_prop_set, NULL); - s->dt_supported =3D false; - object_property_add_bool(o, "device-iotlb", - x86_iommu_device_iotlb_prop_get, - x86_iommu_device_iotlb_prop_set, - NULL); + dc->props =3D x86_iommu_properties; } =20 static const TypeInfo x86_iommu_info =3D { .name =3D TYPE_X86_IOMMU_DEVICE, .parent =3D TYPE_SYS_BUS_DEVICE, - .instance_init =3D x86_iommu_instance_init, .instance_size =3D sizeof(X86IOMMUState), .class_init =3D x86_iommu_class_init, .class_size =3D sizeof(X86IOMMUClass), --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403675563637.8598265977499; Wed, 10 May 2017 01:07:55 -0700 (PDT) Received: from localhost ([::1]:41014 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mf3-0001oX-SU for importer@patchew.org; Wed, 10 May 2017 04:07:53 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57784) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MaJ-0006Kd-V3 for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:01 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8MaF-0001KL-4H for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:49726) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8MaE-0001KD-Rk for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:55 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id B1B86C059722; Wed, 10 May 2017 08:02:53 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 05CEA1710B; Wed, 10 May 2017 08:02:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com B1B86C059722 Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com B1B86C059722 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:49 +0800 Message-Id: <1494403315-12760-7-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 10 May 2017 08:02:53 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 06/12] intel_iommu: renaming context entry helpers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" The old names are too long and less ordered. Let's start to use vtd_ce_*() as a pattern. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 24 ++++++++++++------------ 1 file changed, 12 insertions(+), 12 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index ea54ec3..4628f04 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -512,7 +512,7 @@ static int vtd_get_root_entry(IntelIOMMUState *s, uint8= _t index, return 0; } =20 -static inline bool vtd_context_entry_present(VTDContextEntry *context) +static inline bool vtd_ce_present(VTDContextEntry *context) { return context->lo & VTD_CONTEXT_ENTRY_P; } @@ -533,7 +533,7 @@ static int vtd_get_context_entry_from_root(VTDRootEntry= *root, uint8_t index, return 0; } =20 -static inline dma_addr_t vtd_get_slpt_base_from_context(VTDContextEntry *c= e) +static inline dma_addr_t vtd_ce_get_slpt_base(VTDContextEntry *ce) { return ce->lo & VTD_CONTEXT_ENTRY_SLPTPTR; } @@ -585,19 +585,19 @@ static inline bool vtd_is_level_supported(IntelIOMMUS= tate *s, uint32_t level) /* Get the page-table level that hardware should use for the second-level * page-table walk from the Address Width field of context-entry. */ -static inline uint32_t vtd_get_level_from_context_entry(VTDContextEntry *c= e) +static inline uint32_t vtd_ce_get_level(VTDContextEntry *ce) { return 2 + (ce->hi & VTD_CONTEXT_ENTRY_AW); } =20 -static inline uint32_t vtd_get_agaw_from_context_entry(VTDContextEntry *ce) +static inline uint32_t vtd_ce_get_agaw(VTDContextEntry *ce) { return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9; } =20 static inline uint64_t vtd_iova_limit(VTDContextEntry *ce) { - uint32_t ce_agaw =3D vtd_get_agaw_from_context_entry(ce); + uint32_t ce_agaw =3D vtd_ce_get_agaw(ce); return 1ULL << MIN(ce_agaw, VTD_MGAW); } =20 @@ -642,8 +642,8 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce, uint6= 4_t iova, bool is_write, uint64_t *slptep, uint32_t *slpte_level, bool *reads, bool *writes) { - dma_addr_t addr =3D vtd_get_slpt_base_from_context(ce); - uint32_t level =3D vtd_get_level_from_context_entry(ce); + dma_addr_t addr =3D vtd_ce_get_slpt_base(ce); + uint32_t level =3D vtd_ce_get_level(ce); uint32_t offset; uint64_t slpte; uint64_t access_right_check; @@ -664,7 +664,7 @@ static int vtd_iova_to_slpte(VTDContextEntry *ce, uint6= 4_t iova, bool is_write, VTD_DPRINTF(GENERAL, "error: fail to access second-level pagin= g " "entry at level %"PRIu32 " for iova 0x%"PRIx64, level, iova); - if (level =3D=3D vtd_get_level_from_context_entry(ce)) { + if (level =3D=3D vtd_ce_get_level(ce)) { /* Invalid programming of context-entry */ return -VTD_FR_CONTEXT_ENTRY_INV; } else { @@ -809,8 +809,8 @@ static int vtd_page_walk(VTDContextEntry *ce, uint64_t = start, uint64_t end, vtd_page_walk_hook hook_fn, void *private, bool notify_unmap) { - dma_addr_t addr =3D vtd_get_slpt_base_from_context(ce); - uint32_t level =3D vtd_get_level_from_context_entry(ce); + dma_addr_t addr =3D vtd_ce_get_slpt_base(ce); + uint32_t level =3D vtd_ce_get_level(ce); =20 if (!vtd_iova_range_check(start, ce)) { return -VTD_FR_ADDR_BEYOND_MGAW; @@ -851,7 +851,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, return ret_fr; } =20 - if (!vtd_context_entry_present(ce)) { + if (!vtd_ce_present(ce)) { /* Not error - it's okay we don't have context entry. */ trace_vtd_ce_not_present(bus_num, devfn); return -VTD_FR_CONTEXT_ENTRY_P; @@ -861,7 +861,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, return -VTD_FR_CONTEXT_ENTRY_RSVD; } /* Check if the programming of context-entry is valid */ - if (!vtd_is_level_supported(s, vtd_get_level_from_context_entry(ce))) { + if (!vtd_is_level_supported(s, vtd_ce_get_level(ce))) { trace_vtd_ce_invalid(ce->hi, ce->lo); return -VTD_FR_CONTEXT_ENTRY_INV; } else { --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403524633292.2794930609664; Wed, 10 May 2017 01:05:24 -0700 (PDT) Received: from localhost ([::1]:41001 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mcd-0007og-Ce for importer@patchew.org; Wed, 10 May 2017 04:05:23 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57786) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MaK-0006Ke-0M for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8MaI-0001Ks-SX for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:00 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58286) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8MaI-0001Ki-Ma for qemu-devel@nongnu.org; Wed, 10 May 2017 04:02:58 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 929A44E4C5; Wed, 10 May 2017 08:02:57 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 43B2C17B05; Wed, 10 May 2017 08:02:53 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 929A44E4C5 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 929A44E4C5 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:50 +0800 Message-Id: <1494403315-12760-8-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 10 May 2017 08:02:57 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 07/12] intel_iommu: provide vtd_ce_get_type() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Helper to fetch VT-d context entry type. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 4628f04..c8751ba 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -595,6 +595,11 @@ static inline uint32_t vtd_ce_get_agaw(VTDContextEntry= *ce) return 30 + (ce->hi & VTD_CONTEXT_ENTRY_AW) * 9; } =20 +static inline uint32_t vtd_ce_get_type(VTDContextEntry *ce) +{ + return ce->lo & VTD_CONTEXT_ENTRY_TT; +} + static inline uint64_t vtd_iova_limit(VTDContextEntry *ce) { uint32_t ce_agaw =3D vtd_ce_get_agaw(ce); @@ -865,7 +870,7 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, trace_vtd_ce_invalid(ce->hi, ce->lo); return -VTD_FR_CONTEXT_ENTRY_INV; } else { - switch (ce->lo & VTD_CONTEXT_ENTRY_TT) { + switch (vtd_ce_get_type(ce)) { case VTD_CONTEXT_TT_MULTI_LEVEL: /* fall through */ case VTD_CONTEXT_TT_DEV_IOTLB: --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403657401231.60408675422104; Wed, 10 May 2017 01:07:37 -0700 (PDT) Received: from localhost ([::1]:41013 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mek-0001Ig-RE for importer@patchew.org; Wed, 10 May 2017 04:07:34 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57873) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MaX-0006WG-Bz for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:16 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8MaS-0001Mm-Gm for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:13 -0400 Received: from mx1.redhat.com ([209.132.183.28]:44440) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8MaS-0001Ma-B0 for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:08 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 32D1A80475; Wed, 10 May 2017 08:03:07 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id DBBD117B05; Wed, 10 May 2017 08:02:57 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 32D1A80475 Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx04.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 32D1A80475 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:51 +0800 Message-Id: <1494403315-12760-9-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.28]); Wed, 10 May 2017 08:03:07 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 08/12] intel_iommu: use IOMMU_ACCESS_FLAG() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" We have that now, so why not use it. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index c8751ba..05ae631 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -1010,7 +1010,7 @@ out: entry->iova =3D addr & page_mask; entry->translated_addr =3D vtd_get_slpte_addr(slpte) & page_mask; entry->addr_mask =3D ~page_mask; - entry->perm =3D (writes ? 2 : 0) + (reads ? 1 : 0); + entry->perm =3D IOMMU_ACCESS_FLAG(reads, writes); } =20 static void vtd_root_table_setup(IntelIOMMUState *s) --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403788802831.9081858501421; Wed, 10 May 2017 01:09:48 -0700 (PDT) Received: from localhost ([::1]:41021 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mgt-0003Q2-DV for importer@patchew.org; Wed, 10 May 2017 04:09:47 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57920) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mad-0006ZP-Ai for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:24 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8Mac-0001R3-Kb for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:19 -0400 Received: from mx1.redhat.com ([209.132.183.28]:58628) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8Mac-0001QH-Ff for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:18 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 5AB5F4E4C5; Wed, 10 May 2017 08:03:17 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id C39F41800C; Wed, 10 May 2017 08:03:07 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 5AB5F4E4C5 Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx09.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 5AB5F4E4C5 From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:52 +0800 Message-Id: <1494403315-12760-10-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.38]); Wed, 10 May 2017 08:03:17 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 09/12] intel_iommu: allow dev-iotlb context entry conditionally X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" When device-iotlb is not specified, we should fail this check. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 13 ++++++++++++- 1 file changed, 12 insertions(+), 1 deletion(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 05ae631..1a7eba2 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -836,6 +836,8 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s,= uint8_t bus_num, { VTDRootEntry re; int ret_fr; + bool type_fail =3D false; + X86IOMMUState *x86_iommu =3D X86_IOMMU_DEVICE(s); =20 ret_fr =3D vtd_get_root_entry(s, bus_num, &re); if (ret_fr) { @@ -872,10 +874,19 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *= s, uint8_t bus_num, } else { switch (vtd_ce_get_type(ce)) { case VTD_CONTEXT_TT_MULTI_LEVEL: - /* fall through */ + /* Always supported */ + break; case VTD_CONTEXT_TT_DEV_IOTLB: + if (!x86_iommu->dt_supported) { + type_fail =3D true; + } break; default: + /* Unknwon type */ + type_fail =3D true; + break; + } + if (type_fail) { trace_vtd_ce_invalid(ce->hi, ce->lo); return -VTD_FR_CONTEXT_ENTRY_INV; } --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403901196920.3571183875439; Wed, 10 May 2017 01:11:41 -0700 (PDT) Received: from localhost ([::1]:41035 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mig-0004zO-Lt for importer@patchew.org; Wed, 10 May 2017 04:11:38 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:57948) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mal-0006f9-69 for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8Maj-0001TD-BK for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:27 -0400 Received: from mx1.redhat.com ([209.132.183.28]:45792) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8Maj-0001T4-2h for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:25 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 04A1E7F3EC; Wed, 10 May 2017 08:03:24 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 096D217575; Wed, 10 May 2017 08:03:17 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 04A1E7F3EC Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx01.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 04A1E7F3EC From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:53 +0800 Message-Id: <1494403315-12760-11-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.25]); Wed, 10 May 2017 08:03:24 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 10/12] intel_iommu: support passthrough (PT) X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Hardware support for VT-d device passthrough. Although current Linux can live with iommu=3Dpt even without this, but this is faster than when using software passthrough. Signed-off-by: Peter Xu --- hw/i386/intel_iommu.c | 210 ++++++++++++++++++++++++++++++++-----= ---- hw/i386/intel_iommu_internal.h | 1 + hw/i386/trace-events | 2 + hw/i386/x86-iommu.c | 1 + include/hw/i386/x86-iommu.h | 1 + 5 files changed, 171 insertions(+), 44 deletions(-) diff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c index 1a7eba2..1d034f9 100644 --- a/hw/i386/intel_iommu.c +++ b/hw/i386/intel_iommu.c @@ -640,6 +640,29 @@ static bool vtd_slpte_nonzero_rsvd(uint64_t slpte, uin= t32_t level) } } =20 +/* Find the VTD address space associated with a given bus number */ +static VTDBus *vtd_find_as_from_bus_num(IntelIOMMUState *s, uint8_t bus_nu= m) +{ + VTDBus *vtd_bus =3D s->vtd_as_by_bus_num[bus_num]; + if (!vtd_bus) { + /* + * Iterate over the registered buses to find the one which + * currently hold this bus number, and update the bus_num + * lookup table: + */ + GHashTableIter iter; + + g_hash_table_iter_init(&iter, s->vtd_as_by_busptr); + while (g_hash_table_iter_next (&iter, NULL, (void**)&vtd_bus)) { + if (pci_bus_num(vtd_bus->bus) =3D=3D bus_num) { + s->vtd_as_by_bus_num[bus_num] =3D vtd_bus; + return vtd_bus; + } + } + } + return vtd_bus; +} + /* Given the @iova, get relevant @slptep. @slpte_level will be the last le= vel * of the translation, can be used for deciding the size of large page. */ @@ -881,6 +904,11 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s= , uint8_t bus_num, type_fail =3D true; } break; + case VTD_CONTEXT_TT_PASS_THROUGH: + if (!x86_iommu->pt_supported) { + type_fail =3D true; + } + break; default: /* Unknwon type */ type_fail =3D true; @@ -894,6 +922,84 @@ static int vtd_dev_to_context_entry(IntelIOMMUState *s= , uint8_t bus_num, return 0; } =20 +/* + * Fetch translation type for specific device. Returns <0 if error + * happens, otherwise return the shifted type to check against + * VTD_CONTEXT_TT_*. + */ +static int vtd_dev_get_trans_type(VTDAddressSpace *as) +{ + IntelIOMMUState *s; + VTDContextEntry ce; + int ret; + + s =3D as->iommu_state; + + ret =3D vtd_dev_to_context_entry(s, pci_bus_num(as->bus), + as->devfn, &ce); + if (ret) { + return ret; + } + + return vtd_ce_get_type(&ce); +} + +static bool vtd_dev_pt_enabled(VTDAddressSpace *as) +{ + int ret; + + assert(as); + + ret =3D vtd_dev_get_trans_type(as); + if (ret < 0) { + /* + * Possibly failed to parse the context entry for some reason + * (e.g., during init, or any guest configuration errors on + * context entries). We should assume PT not enabled for + * safety. + */ + return false; + } + + return ret =3D=3D VTD_CONTEXT_TT_PASS_THROUGH; +} + +/* + * When we are during init phase (device realizations, global + * enable/disable of translations), we should not detect PT + * (passthrough) when switching address spaces. In that cases, we + * should set `detect_pt' to false. + * + * Return whether the device is using IOMMU translation. + */ +static bool vtd_switch_address_space(VTDAddressSpace *as, bool detect_pt) +{ + bool use_iommu; + + assert(as); + + use_iommu =3D as->iommu_state->dmar_enabled; + if (detect_pt) { + use_iommu &=3D !vtd_dev_pt_enabled(as); + } + + trace_vtd_switch_address_space(pci_bus_num(as->bus), + VTD_PCI_SLOT(as->devfn), + VTD_PCI_FUNC(as->devfn), + use_iommu); + + /* Turn off first then on the other */ + if (use_iommu) { + memory_region_set_enabled(&as->sys_alias, false); + memory_region_set_enabled(&as->iommu, true); + } else { + memory_region_set_enabled(&as->iommu, false); + memory_region_set_enabled(&as->sys_alias, true); + } + + return use_iommu; +} + static inline uint16_t vtd_make_source_id(uint8_t bus_num, uint8_t devfn) { return ((bus_num & 0xffUL) << 8) | (devfn & 0xffUL); @@ -931,6 +1037,31 @@ static inline bool vtd_is_interrupt_addr(hwaddr addr) return VTD_INTERRUPT_ADDR_FIRST <=3D addr && addr <=3D VTD_INTERRUPT_A= DDR_LAST; } =20 +static void vtd_pt_enable_fast_path(IntelIOMMUState *s, uint16_t source_id) +{ + VTDBus *vtd_bus; + VTDAddressSpace *vtd_as; + const char *msg =3D "FAIL"; + + vtd_bus =3D vtd_find_as_from_bus_num(s, VTD_SID_TO_BUS(source_id)); + if (!vtd_bus) { + goto out; + } + + vtd_as =3D vtd_bus->dev_as[VTD_SID_TO_DEVFN(source_id)]; + if (!vtd_as) { + goto out; + } + + if (vtd_switch_address_space(vtd_as, true) =3D=3D false) { + /* We switched off IOMMU region successfully. */ + msg =3D "SUCCESS"; + } + +out: + trace_vtd_pt_enable_fast_path(source_id, msg); +} + /* Map dev to context-entry then do a paging-structures walk to do a iommu * translation. * @@ -1002,6 +1133,30 @@ static void vtd_do_iommu_translate(VTDAddressSpace *= vtd_as, PCIBus *bus, cc_entry->context_cache_gen =3D s->context_cache_gen; } =20 + /* + * We don't need to translate for pass-through context entries. + * Also, let's ignore IOTLB caching as well for PT devices. + */ + if (vtd_ce_get_type(&ce) =3D=3D VTD_CONTEXT_TT_PASS_THROUGH) { + entry->translated_addr =3D entry->iova; + entry->addr_mask =3D VTD_PAGE_SIZE - 1; + entry->perm =3D IOMMU_RW; + trace_vtd_translate_pt(source_id, entry->iova); + + /* + * When this happens, it means firstly caching-mode is not + * enabled, and this is the first passthrough translation for + * the device. Let's enable the fast path for passthrough. + * + * When passthrough is disabled again for the device, we can + * capture it via the context entry invalidation, then the + * IOMMU region can be swapped back. + */ + vtd_pt_enable_fast_path(s, source_id); + + return; + } + ret_fr =3D vtd_iova_to_slpte(&ce, addr, is_write, &slpte, &level, &reads, &writes); if (ret_fr) { @@ -1081,29 +1236,6 @@ static void vtd_context_global_invalidate(IntelIOMMU= State *s) vtd_iommu_replay_all(s); } =20 - -/* Find the VTD address space currently associated with a given bus number, - */ -static VTDBus *vtd_find_as_from_bus_num(IntelIOMMUState *s, uint8_t bus_nu= m) -{ - VTDBus *vtd_bus =3D s->vtd_as_by_bus_num[bus_num]; - if (!vtd_bus) { - /* Iterate over the registered buses to find the one - * which currently hold this bus number, and update the bus_num lo= okup table: - */ - GHashTableIter iter; - - g_hash_table_iter_init(&iter, s->vtd_as_by_busptr); - while (g_hash_table_iter_next (&iter, NULL, (void**)&vtd_bus)) { - if (pci_bus_num(vtd_bus->bus) =3D=3D bus_num) { - s->vtd_as_by_bus_num[bus_num] =3D vtd_bus; - return vtd_bus; - } - } - } - return vtd_bus; -} - /* Do a context-cache device-selective invalidation. * @func_mask: FM field after shifting */ @@ -1146,6 +1278,11 @@ static void vtd_context_device_invalidate(IntelIOMMU= State *s, VTD_PCI_FUNC(devfn_it)); vtd_as->context_cache_entry.context_cache_gen =3D 0; /* + * Do switch address space when needed, in case if the + * device passthrough bit is switched. + */ + vtd_switch_address_space(vtd_as, true); + /* * So a device is moving out of (or moving into) a * domain, a replay() suites here to notify all the * IOMMU_NOTIFIER_MAP registers about this change. @@ -1377,25 +1514,6 @@ static void vtd_handle_gcmd_sirtp(IntelIOMMUState *s) vtd_set_clear_mask_long(s, DMAR_GSTS_REG, 0, VTD_GSTS_IRTPS); } =20 -static void vtd_switch_address_space(VTDAddressSpace *as) -{ - assert(as); - - trace_vtd_switch_address_space(pci_bus_num(as->bus), - VTD_PCI_SLOT(as->devfn), - VTD_PCI_FUNC(as->devfn), - as->iommu_state->dmar_enabled); - - /* Turn off first then on the other */ - if (as->iommu_state->dmar_enabled) { - memory_region_set_enabled(&as->sys_alias, false); - memory_region_set_enabled(&as->iommu, true); - } else { - memory_region_set_enabled(&as->iommu, false); - memory_region_set_enabled(&as->sys_alias, true); - } -} - static void vtd_switch_address_space_all(IntelIOMMUState *s) { GHashTableIter iter; @@ -1408,7 +1526,7 @@ static void vtd_switch_address_space_all(IntelIOMMUSt= ate *s) if (!vtd_bus->dev_as[i]) { continue; } - vtd_switch_address_space(vtd_bus->dev_as[i]); + vtd_switch_address_space(vtd_bus->dev_as[i], false); } } } @@ -2712,7 +2830,7 @@ VTDAddressSpace *vtd_find_add_as(IntelIOMMUState *s, = PCIBus *bus, int devfn) &vtd_dev_as->sys_alias, 1); memory_region_add_subregion_overlap(&vtd_dev_as->root, 0, &vtd_dev_as->iommu, 1); - vtd_switch_address_space(vtd_dev_as); + vtd_switch_address_space(vtd_dev_as, false); } return vtd_dev_as; } @@ -2860,6 +2978,10 @@ static void vtd_init(IntelIOMMUState *s) s->ecap |=3D VTD_ECAP_DT; } =20 + if (x86_iommu->pt_supported) { + s->ecap |=3D VTD_ECAP_PT; + } + if (s->caching_mode) { s->cap |=3D VTD_CAP_CM; } diff --git a/hw/i386/intel_iommu_internal.h b/hw/i386/intel_iommu_internal.h index 29d6707..0e73a65 100644 --- a/hw/i386/intel_iommu_internal.h +++ b/hw/i386/intel_iommu_internal.h @@ -187,6 +187,7 @@ /* Interrupt Remapping support */ #define VTD_ECAP_IR (1ULL << 3) #define VTD_ECAP_EIM (1ULL << 4) +#define VTD_ECAP_PT (1ULL << 6) #define VTD_ECAP_MHMV (15ULL << 20) =20 /* CAP_REG */ diff --git a/hw/i386/trace-events b/hw/i386/trace-events index 04a6980..5c3e466 100644 --- a/hw/i386/trace-events +++ b/hw/i386/trace-events @@ -38,6 +38,8 @@ vtd_page_walk_skip_perm(uint64_t iova, uint64_t next) "Pa= ge walk skip iova 0x%"P vtd_page_walk_skip_reserve(uint64_t iova, uint64_t next) "Page walk skip i= ova 0x%"PRIx64" - 0x%"PRIx64" due to rsrv set" vtd_switch_address_space(uint8_t bus, uint8_t slot, uint8_t fn, bool on) "= Device %02x:%02x.%x switching address space (iommu enabled=3D%d)" vtd_as_unmap_whole(uint8_t bus, uint8_t slot, uint8_t fn, uint64_t iova, u= int64_t size) "Device %02x:%02x.%x start 0x%"PRIx64" size 0x%"PRIx64 +vtd_translate_pt(uint16_t sid, uint64_t addr) "source id 0x%"PRIu16", iova= 0x%"PRIx64 +vtd_pt_enable_fast_path(uint16_t sid, const char *msg) "sid 0x%"PRIu16" %s" =20 # hw/i386/amd_iommu.c amdvi_evntlog_fail(uint64_t addr, uint32_t head) "error: fail to write at = addr 0x%"PRIx64" + offset 0x%"PRIx32 diff --git a/hw/i386/x86-iommu.c b/hw/i386/x86-iommu.c index 02b8825..293caf8 100644 --- a/hw/i386/x86-iommu.c +++ b/hw/i386/x86-iommu.c @@ -91,6 +91,7 @@ static void x86_iommu_realize(DeviceState *dev, Error **e= rrp) static Property x86_iommu_properties[] =3D { DEFINE_PROP_BOOL("intremap", X86IOMMUState, intr_supported, false), DEFINE_PROP_BOOL("device-iotlb", X86IOMMUState, dt_supported, false), + DEFINE_PROP_BOOL("pt", X86IOMMUState, pt_supported, true), DEFINE_PROP_END_OF_LIST(), }; =20 diff --git a/include/hw/i386/x86-iommu.h b/include/hw/i386/x86-iommu.h index 361c07c..ef89c0c 100644 --- a/include/hw/i386/x86-iommu.h +++ b/include/hw/i386/x86-iommu.h @@ -74,6 +74,7 @@ struct X86IOMMUState { SysBusDevice busdev; bool intr_supported; /* Whether vIOMMU supports IR */ bool dt_supported; /* Whether vIOMMU supports DT */ + bool pt_supported; /* Whether vIOMMU supports pass-through */ IommuType type; /* IOMMU type - AMD/Intel */ QLIST_HEAD(, IEC_Notifier) iec_notifiers; /* IEC notify list */ }; --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1494403869756332.2996551359503; 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Wed, 10 May 2017 08:03:36 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 913221710B; Wed, 10 May 2017 08:03:24 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 802FBA08FE Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx10.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 802FBA08FE From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:54 +0800 Message-Id: <1494403315-12760-12-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.39]); Wed, 10 May 2017 08:03:36 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 11/12] intel_iommu: turn off pt before 2.9 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This is for compatibility. Signed-off-by: Peter Xu --- include/hw/compat.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-) diff --git a/include/hw/compat.h b/include/hw/compat.h index 846b90e..ff08ec8 100644 --- a/include/hw/compat.h +++ b/include/hw/compat.h @@ -2,7 +2,11 @@ #define HW_COMPAT_H =20 #define HW_COMPAT_2_9 \ - /* empty */ + {\ + .driver =3D "intel-iommu",\ + .property =3D "pt",\ + .value =3D "off",\ + }, =20 #define HW_COMPAT_2_8 \ {\ --=20 2.7.4 From nobody Wed May 8 05:05:44 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149440375852170.93918989663496; Wed, 10 May 2017 01:09:18 -0700 (PDT) Received: from localhost ([::1]:41020 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8MgO-00030B-45 for importer@patchew.org; Wed, 10 May 2017 04:09:16 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:58071) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1d8Mb4-0006vx-SZ for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:47 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1d8Mb3-0001Wf-MF for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:46 -0400 Received: from mx1.redhat.com ([209.132.183.28]:50872) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1d8Mb3-0001WY-DI for qemu-devel@nongnu.org; Wed, 10 May 2017 04:03:45 -0400 Received: from smtp.corp.redhat.com (int-mx06.intmail.prod.int.phx2.redhat.com [10.5.11.16]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mx1.redhat.com (Postfix) with ESMTPS id 55460C05680F; Wed, 10 May 2017 08:03:44 +0000 (UTC) Received: from pxdev.xzpeter.org.com (vpn1-5-83.pek2.redhat.com [10.72.5.83]) by smtp.corp.redhat.com (Postfix) with ESMTP id 165A71710B; Wed, 10 May 2017 08:03:36 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mx1.redhat.com 55460C05680F Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; dmarc=none (p=none dis=none) header.from=redhat.com Authentication-Results: ext-mx08.extmail.prod.ext.phx2.redhat.com; spf=pass smtp.mailfrom=peterx@redhat.com DKIM-Filter: OpenDKIM Filter v2.11.0 mx1.redhat.com 55460C05680F From: Peter Xu To: qemu-devel@nongnu.org Date: Wed, 10 May 2017 16:01:55 +0800 Message-Id: <1494403315-12760-13-git-send-email-peterx@redhat.com> In-Reply-To: <1494403315-12760-1-git-send-email-peterx@redhat.com> References: <1494403315-12760-1-git-send-email-peterx@redhat.com> X-Scanned-By: MIMEDefang 2.79 on 10.5.11.16 X-Greylist: Sender IP whitelisted, not delayed by milter-greylist-4.5.16 (mx1.redhat.com [10.5.110.32]); Wed, 10 May 2017 08:03:44 +0000 (UTC) X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 209.132.183.28 Subject: [Qemu-devel] [PATCH v3 12/12] vhost: iommu: cache static mapping if there is X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Lan Tianyu , yi.l.liu@intel.com, "Michael S . Tsirkin" , Jason Wang , peterx@redhat.com, Marcel Apfelbaum , David Gibson Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" This patch pre-heat vhost iotlb cache when passthrough mode enabled. Sometimes, even if user specified iommu_platform for vhost devices, IOMMU might still be disabled. One case is passthrough mode in VT-d implementation. We can detect this by observing iommu_list. If it's empty, it means IOMMU translation is disabled, then we can actually pre-heat the translation (it'll be static mapping then) by first invalidating all IOTLB, then cache existing memory ranges into vhost backend iotlb using 1:1 mapping. Signed-off-by: Peter Xu --- hw/virtio/trace-events | 4 ++++ hw/virtio/vhost.c | 49 ++++++++++++++++++++++++++++++++++++++++++++++= +++ 2 files changed, 53 insertions(+) diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index 1f7a7c1..54dcbb3 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -24,3 +24,7 @@ virtio_balloon_handle_output(const char *name, uint64_t g= pa) "section name: %s g virtio_balloon_get_config(uint32_t num_pages, uint32_t actual) "num_pages:= %d actual: %d" virtio_balloon_set_config(uint32_t actual, uint32_t oldactual) "actual: %d= oldactual: %d" virtio_balloon_to_target(uint64_t target, uint32_t num_pages) "balloon tar= get: %"PRIx64" num_pages: %d" + +# hw/virtio/vhost.c +vhost_iommu_commit(void) "" +vhost_iommu_static_preheat(void) "" diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index 0001e60..1c92e62 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -27,6 +27,7 @@ #include "hw/virtio/virtio-access.h" #include "migration/migration.h" #include "sysemu/dma.h" +#include "trace.h" =20 /* enabled until disconnected backend stabilizes */ #define _VHOST_DEBUG 1 @@ -730,6 +731,11 @@ static void vhost_iommu_unmap_notify(IOMMUNotifier *n,= IOMMUTLBEntry *iotlb) } } =20 +static bool vhost_iommu_mr_enabled(struct vhost_dev *dev) +{ + return !QLIST_EMPTY(&dev->iommu_list); +} + static void vhost_iommu_region_add(MemoryListener *listener, MemoryRegionSection *section) { @@ -782,6 +788,48 @@ static void vhost_iommu_region_del(MemoryListener *lis= tener, } } =20 +static void vhost_iommu_commit(MemoryListener *listener) +{ + struct vhost_dev *dev =3D container_of(listener, struct vhost_dev, + iommu_listener); + struct vhost_memory_region *r; + int i; + + trace_vhost_iommu_commit(); + + if (!vhost_iommu_mr_enabled(dev)) { + /* + * This means iommu_platform is enabled, however iommu memory + * region is disabled, e.g., when device passthrough is setup. + * Then, no translation is needed any more. + * + * Let's first invalidate the whole IOTLB, then pre-heat the + * static mapping by looping over vhost memory ranges. + */ + + if (dev->vhost_ops->vhost_invalidate_device_iotlb(dev, 0, + UINT64_MAX-1)) { + error_report("%s: flush existing IOTLB failed", __func__); + return; + } + + for (i =3D 0; i < dev->mem->nregions; i++) { + r =3D &dev->mem->regions[i]; + /* Vhost regions are writable RAM, so IOMMU_RW suites. */ + if (dev->vhost_ops->vhost_update_device_iotlb(dev, + r->guest_phys_ad= dr, + r->userspace_add= r, + r->memory_size, + IOMMU_RW)) { + error_report("%s: pre-heat static mapping failed", __func_= _); + return; + } + } + + trace_vhost_iommu_static_preheat(); + } +} + static void vhost_region_nop(MemoryListener *listener, MemoryRegionSection *section) { @@ -1298,6 +1346,7 @@ int vhost_dev_init(struct vhost_dev *hdev, void *opaq= ue, hdev->iommu_listener =3D (MemoryListener) { .region_add =3D vhost_iommu_region_add, .region_del =3D vhost_iommu_region_del, + .commit =3D vhost_iommu_commit, }; =20 if (hdev->migration_blocker =3D=3D NULL) { --=20 2.7.4