From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1491205743226586.4648816828015; Mon, 3 Apr 2017 00:49:03 -0700 (PDT) Received: from localhost ([::1]:57942 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwjV-0003bE-P6 for importer@patchew.org; Mon, 03 Apr 2017 03:49:01 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39676) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwh1-0001qy-7s for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:28 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwgx-0008QE-61 for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:27 -0400 Received: from 4.mo2.mail-out.ovh.net ([87.98.172.75]:43113) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwgw-0008Py-Vt for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:23 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id A33067B0FF for ; Mon, 3 Apr 2017 09:46:21 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 8083E5C009C; Mon, 3 Apr 2017 09:46:17 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:45:57 +0200 Message-Id: <1491205565-12831-2-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18288273662988946406 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.172.75 Subject: [Qemu-devel] [PATCH v5 1/9] spapr: move the IRQ server number mapping under the machine X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This is the second step to abstract the IRQ 'server' number of the XICS layer. Now that the prereq cleanups have been done in the previous patch, we can move down the 'cpu_dt_id' to 'cpu_index' mapping in the sPAPR machine handler. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- hw/intc/xics_spapr.c | 5 ++--- hw/ppc/spapr.c | 3 ++- hw/ppc/spapr_cpu_core.c | 2 +- 3 files changed, 5 insertions(+), 5 deletions(-) diff --git a/hw/intc/xics_spapr.c b/hw/intc/xics_spapr.c index 58f100d379cb..f05308b897f2 100644 --- a/hw/intc/xics_spapr.c +++ b/hw/intc/xics_spapr.c @@ -52,9 +52,8 @@ static target_ulong h_cppr(PowerPCCPU *cpu, sPAPRMachineS= tate *spapr, static target_ulong h_ipi(PowerPCCPU *cpu, sPAPRMachineState *spapr, target_ulong opcode, target_ulong *args) { - target_ulong server =3D xics_get_cpu_index_by_dt_id(args[0]); target_ulong mfrr =3D args[1]; - ICPState *icp =3D xics_icp_get(XICS_FABRIC(spapr), server); + ICPState *icp =3D xics_icp_get(XICS_FABRIC(spapr), args[0]); =20 if (!icp) { return H_PARAMETER; @@ -122,7 +121,7 @@ static void rtas_set_xive(PowerPCCPU *cpu, sPAPRMachine= State *spapr, } =20 nr =3D rtas_ld(args, 0); - server =3D xics_get_cpu_index_by_dt_id(rtas_ld(args, 1)); + server =3D rtas_ld(args, 1); priority =3D rtas_ld(args, 2); =20 if (!ics_valid_irq(ics, nr) || !xics_icp_get(XICS_FABRIC(spapr), serve= r) diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 44c26e4be86c..3358dc9ba638 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -3024,9 +3024,10 @@ static void spapr_ics_resend(XICSFabric *dev) ics_resend(spapr->ics); } =20 -static ICPState *spapr_icp_get(XICSFabric *xi, int server) +static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(xi); + int server =3D xics_get_cpu_index_by_dt_id(cpu_dt_id); =20 return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL; } diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 7db61bd72476..4e1a99591d19 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -64,7 +64,7 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, Powe= rPCCPU *cpu, { CPUPPCState *env =3D &cpu->env; XICSFabric *xi =3D XICS_FABRIC(spapr); - ICPState *icp =3D xics_icp_get(xi, CPU(cpu)->cpu_index); + ICPState *icp =3D xics_icp_get(xi, cpu->cpu_dt_id); =20 /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ); --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1491205710834691.7643074820901; Mon, 3 Apr 2017 00:48:30 -0700 (PDT) Received: from localhost ([::1]:57940 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwiz-0003BI-AC for importer@patchew.org; Mon, 03 Apr 2017 03:48:29 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39708) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwh2-0001rM-Es for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:29 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwh1-0008RU-2U for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:28 -0400 Received: from 5.mo2.mail-out.ovh.net ([87.98.181.248]:55446) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwh0-0008RB-QI for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:27 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id C1A5C7AFF5 for ; Mon, 3 Apr 2017 09:46:25 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id A13A65C00A8; Mon, 3 Apr 2017 09:46:21 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:45:58 +0200 Message-Id: <1491205565-12831-3-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18289399565973162982 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.181.248 Subject: [Qemu-devel] [PATCH v5 2/9] spapr: allocate the ICPState object from under sPAPRCPUCore X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Today, all the ICPs are created before the CPUs, stored in an array under the sPAPR machine and linked to the CPU when the core threads are realized. This modeling brings some complexity when a lookup in the array is required and it can be simplified by allocating the ICPs when the CPUs are. This is the purpose of this proposal which introduces a new 'icp_type' field under the machine and creates the ICP objects of the right type (KVM or not) before the PowerPCCPU object are. This change allows more cleanups : the removal of the icps array under the sPAPR machine and the removal of the xics_get_cpu_index_by_dt_id() helper. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- hw/intc/xics.c | 11 ----------- hw/ppc/spapr.c | 47 ++++++++++++++-------------------------------= -- hw/ppc/spapr_cpu_core.c | 18 ++++++++++++++---- include/hw/ppc/spapr.h | 2 +- include/hw/ppc/xics.h | 2 -- 5 files changed, 29 insertions(+), 51 deletions(-) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index 56fe70cd10e9..d4428b41b03a 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -38,17 +38,6 @@ #include "monitor/monitor.h" #include "hw/intc/intc.h" =20 -int xics_get_cpu_index_by_dt_id(int cpu_dt_id) -{ - PowerPCCPU *cpu =3D ppc_get_vcpu_by_dt_id(cpu_dt_id); - - if (cpu) { - return cpu->parent_obj.cpu_index; - } - - return -1; -} - void xics_cpu_destroy(XICSFabric *xi, PowerPCCPU *cpu) { CPUState *cs =3D CPU(cpu); diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c index 3358dc9ba638..e5a6722daed7 100644 --- a/hw/ppc/spapr.c +++ b/hw/ppc/spapr.c @@ -103,7 +103,6 @@ static int try_create_xics(sPAPRMachineState *spapr, co= nst char *type_ics, XICSFabric *xi =3D XICS_FABRIC(spapr); Error *err =3D NULL, *local_err =3D NULL; ICSState *ics =3D NULL; - int i; =20 ics =3D ICS_SIMPLE(object_new(type_ics)); object_property_add_child(OBJECT(spapr), "ics", OBJECT(ics), NULL); @@ -112,34 +111,14 @@ static int try_create_xics(sPAPRMachineState *spapr, = const char *type_ics, object_property_set_bool(OBJECT(ics), true, "realized", &local_err); error_propagate(&err, local_err); if (err) { - goto error; + error_propagate(errp, err); + return -1; } =20 - spapr->icps =3D g_malloc0(nr_servers * sizeof(ICPState)); spapr->nr_servers =3D nr_servers; - - for (i =3D 0; i < nr_servers; i++) { - ICPState *icp =3D &spapr->icps[i]; - - object_initialize(icp, sizeof(*icp), type_icp); - object_property_add_child(OBJECT(spapr), "icp[*]", OBJECT(icp), NU= LL); - object_property_add_const_link(OBJECT(icp), "xics", OBJECT(xi), NU= LL); - object_property_set_bool(OBJECT(icp), true, "realized", &err); - if (err) { - goto error; - } - object_unref(OBJECT(icp)); - } - spapr->ics =3D ics; + spapr->icp_type =3D type_icp; return 0; - -error: - error_propagate(errp, err); - if (ics) { - object_unparent(OBJECT(ics)); - } - return -1; } =20 static int xics_system_init(MachineState *machine, @@ -1366,9 +1345,10 @@ static int spapr_post_load(void *opaque, int version= _id) int err =3D 0; =20 if (!object_dynamic_cast(OBJECT(spapr->ics), TYPE_ICS_KVM)) { - int i; - for (i =3D 0; i < spapr->nr_servers; i++) { - icp_resend(&spapr->icps[i]); + CPUState *cs; + CPU_FOREACH(cs) { + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + icp_resend(ICP(cpu->intc)); } } =20 @@ -3026,20 +3006,21 @@ static void spapr_ics_resend(XICSFabric *dev) =20 static ICPState *spapr_icp_get(XICSFabric *xi, int cpu_dt_id) { - sPAPRMachineState *spapr =3D SPAPR_MACHINE(xi); - int server =3D xics_get_cpu_index_by_dt_id(cpu_dt_id); + PowerPCCPU *cpu =3D ppc_get_vcpu_by_dt_id(cpu_dt_id); =20 - return (server < spapr->nr_servers) ? &spapr->icps[server] : NULL; + return cpu ? ICP(cpu->intc) : NULL; } =20 static void spapr_pic_print_info(InterruptStatsProvider *obj, Monitor *mon) { sPAPRMachineState *spapr =3D SPAPR_MACHINE(obj); - int i; + CPUState *cs; + + CPU_FOREACH(cs) { + PowerPCCPU *cpu =3D POWERPC_CPU(cs); =20 - for (i =3D 0; i < spapr->nr_servers; i++) { - icp_pic_print_info(&spapr->icps[i], mon); + icp_pic_print_info(ICP(cpu->intc), mon); } =20 ics_pic_print_info(spapr->ics, mon); diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 4e1a99591d19..2e689b542de3 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -63,8 +63,6 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, Powe= rPCCPU *cpu, Error **errp) { CPUPPCState *env =3D &cpu->env; - XICSFabric *xi =3D XICS_FABRIC(spapr); - ICPState *icp =3D xics_icp_get(xi, cpu->cpu_dt_id); =20 /* Set time-base frequency to 512 MHz */ cpu_ppc_tb_init(env, SPAPR_TIMEBASE_FREQ); @@ -82,8 +80,6 @@ static void spapr_cpu_init(sPAPRMachineState *spapr, Powe= rPCCPU *cpu, } } =20 - xics_cpu_setup(xi, cpu, icp); - qemu_register_reset(spapr_cpu_reset, cpu); spapr_cpu_reset(cpu); } @@ -143,18 +139,32 @@ static void spapr_cpu_core_realize_child(Object *chil= d, Error **errp) sPAPRMachineState *spapr =3D SPAPR_MACHINE(qdev_get_machine()); CPUState *cs =3D CPU(child); PowerPCCPU *cpu =3D POWERPC_CPU(cs); + Object *obj; + + obj =3D object_new(spapr->icp_type); + object_property_add_child(OBJECT(cpu), "icp", obj, NULL); + object_property_add_const_link(obj, "xics", OBJECT(spapr), &error_abor= t); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 object_property_set_bool(child, true, "realized", &local_err); if (local_err) { + object_unparent(obj); error_propagate(errp, local_err); return; } =20 spapr_cpu_init(spapr, cpu, &local_err); if (local_err) { + object_unparent(obj); error_propagate(errp, local_err); return; } + + xics_cpu_setup(XICS_FABRIC(spapr), cpu, ICP(obj)); } =20 static void spapr_cpu_core_realize(DeviceState *dev, Error **errp) diff --git a/include/hw/ppc/spapr.h b/include/hw/ppc/spapr.h index 808aac870359..db3d4acb18a6 100644 --- a/include/hw/ppc/spapr.h +++ b/include/hw/ppc/spapr.h @@ -96,7 +96,7 @@ struct sPAPRMachineState { MemoryHotplugState hotplug_memory; =20 uint32_t nr_servers; - ICPState *icps; + const char *icp_type; }; =20 #define H_SUCCESS 0 diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 5e0244447fcd..88e0f021b168 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -172,8 +172,6 @@ void xics_cpu_setup(XICSFabric *xi, PowerPCCPU *cpu, IC= PState *icp); void xics_cpu_destroy(XICSFabric *xi, PowerPCCPU *cpu); =20 /* Internal XICS interfaces */ -int xics_get_cpu_index_by_dt_id(int cpu_dt_id); - void icp_set_cppr(ICPState *icp, uint8_t cppr); void icp_set_mfrr(ICPState *icp, uint8_t mfrr); uint32_t icp_accept(ICPState *ss); --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1491205727168373.3260243223257; Mon, 3 Apr 2017 00:48:47 -0700 (PDT) Received: from localhost ([::1]:57941 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwjF-0003RQ-Nj for importer@patchew.org; Mon, 03 Apr 2017 03:48:45 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39761) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhA-0001wi-GP for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:37 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwh5-0008T2-GR for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:36 -0400 Received: from 8.mo2.mail-out.ovh.net ([188.165.52.147]:32923) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwh5-0008Sr-A6 for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:31 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id E2DCE7B082 for ; Mon, 3 Apr 2017 09:46:29 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id C1B4D5C00A1; Mon, 3 Apr 2017 09:46:25 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:45:59 +0200 Message-Id: <1491205565-12831-4-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18290525463194799078 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.165.52.147 Subject: [Qemu-devel] [PATCH v5 3/9] ppc/xics: add a realize() handler to ICPStateClass X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" It will be used by derived classes in PowerNV for customization. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- hw/intc/xics.c | 5 +++++ include/hw/ppc/xics.h | 1 + 2 files changed, 6 insertions(+) diff --git a/hw/intc/xics.c b/hw/intc/xics.c index d4428b41b03a..292fffecd376 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -337,6 +337,7 @@ static void icp_reset(void *dev) static void icp_realize(DeviceState *dev, Error **errp) { ICPState *icp =3D ICP(dev); + ICPStateClass *icpc =3D ICP_GET_CLASS(dev); Object *obj; Error *err =3D NULL; =20 @@ -349,6 +350,10 @@ static void icp_realize(DeviceState *dev, Error **errp) =20 icp->xics =3D XICS_FABRIC(obj); =20 + if (icpc->realize) { + icpc->realize(dev, errp); + } + qemu_register_reset(icp_reset, dev); } =20 diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 88e0f021b168..05bb10a4ce8f 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -60,6 +60,7 @@ typedef struct XICSFabric XICSFabric; struct ICPStateClass { DeviceClass parent_class; =20 + void (*realize)(DeviceState *dev, Error **errp); void (*pre_save)(ICPState *s); int (*post_load)(ICPState *s, int version_id); void (*cpu_setup)(ICPState *icp, PowerPCCPU *cpu); --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 14912058695341015.3553866953425; Mon, 3 Apr 2017 00:51:09 -0700 (PDT) Received: from localhost ([::1]:57954 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwlY-0005G4-7n for importer@patchew.org; Mon, 03 Apr 2017 03:51:08 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39788) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhD-0001yC-9M for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwh9-0008UM-D3 for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:39 -0400 Received: from 3.mo2.mail-out.ovh.net ([46.105.58.226]:59311) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwh9-0008U4-3V for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:35 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 100EE7B036 for ; Mon, 3 Apr 2017 09:46:34 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id E308C5C009C; Mon, 3 Apr 2017 09:46:29 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:46:00 +0200 Message-Id: <1491205565-12831-5-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18291932839307152358 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 46.105.58.226 Subject: [Qemu-devel] [PATCH v5 4/9] ppc/pnv: add a PnvICPState object X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This provides a new ICPState object for the PowerNV machine (POWER8). Access to the Interrupt Management area is done though a memory region. It contains the registers of the Interrupt Control Presenters of each thread which are used to accept, return, forward interrupts in the system. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- Changes since v1: - moved the memory region from PnvCore to a specific PnvICPState object hw/intc/Makefile.objs | 1 + hw/intc/xics_pnv.c | 192 ++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/xics.h | 12 ++++ 3 files changed, 205 insertions(+) create mode 100644 hw/intc/xics_pnv.c diff --git a/hw/intc/Makefile.objs b/hw/intc/Makefile.objs index adedd0da5fd8..78426a7dafcd 100644 --- a/hw/intc/Makefile.objs +++ b/hw/intc/Makefile.objs @@ -35,6 +35,7 @@ obj-$(CONFIG_SH4) +=3D sh_intc.o obj-$(CONFIG_XICS) +=3D xics.o obj-$(CONFIG_XICS_SPAPR) +=3D xics_spapr.o obj-$(CONFIG_XICS_KVM) +=3D xics_kvm.o +obj-$(CONFIG_POWERNV) +=3D xics_pnv.o obj-$(CONFIG_ALLWINNER_A10_PIC) +=3D allwinner-a10-pic.o obj-$(CONFIG_S390_FLIC) +=3D s390_flic.o obj-$(CONFIG_S390_FLIC_KVM) +=3D s390_flic_kvm.o diff --git a/hw/intc/xics_pnv.c b/hw/intc/xics_pnv.c new file mode 100644 index 000000000000..12ae605f10e8 --- /dev/null +++ b/hw/intc/xics_pnv.c @@ -0,0 +1,192 @@ +/* + * QEMU PowerPC PowerNV Interrupt Control Presenter (ICP) model + * + * Copyright (c) 2017, IBM Corporation. + * + * This library is free software; you can redistribute it and/or + * modify it under the terms of the GNU Lesser General Public License + * as published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This library is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * Lesser General Public License for more details. + * + * You should have received a copy of the GNU Lesser General Public + * License along with this library; if not, see . + */ + +#include "qemu/osdep.h" +#include "sysemu/sysemu.h" +#include "qapi/error.h" +#include "qemu/log.h" +#include "hw/ppc/xics.h" + +#define ICP_XIRR_POLL 0 /* 1 byte (CPRR) or 4 bytes */ +#define ICP_XIRR 4 /* 1 byte (CPRR) or 4 bytes */ +#define ICP_MFRR 12 /* 1 byte access only */ + +#define ICP_LINKA 16 /* unused */ +#define ICP_LINKB 20 /* unused */ +#define ICP_LINKC 24 /* unused */ + +static uint64_t pnv_icp_read(void *opaque, hwaddr addr, unsigned width) +{ + ICPState *icp =3D ICP(opaque); + PnvICPState *picp =3D PNV_ICP(opaque); + bool byte0 =3D (width =3D=3D 1 && (addr & 0x3) =3D=3D 0); + uint64_t val =3D 0xffffffff; + + switch (addr & 0xffc) { + case ICP_XIRR_POLL: + val =3D icp_ipoll(icp, NULL); + if (byte0) { + val >>=3D 24; + } else if (width !=3D 4) { + goto bad_access; + } + break; + case ICP_XIRR: + if (byte0) { + val =3D icp_ipoll(icp, NULL) >> 24; + } else if (width =3D=3D 4) { + val =3D icp_accept(icp); + } else { + goto bad_access; + } + break; + case ICP_MFRR: + if (byte0) { + val =3D icp->mfrr; + } else { + goto bad_access; + } + break; + case ICP_LINKA: + if (width =3D=3D 4) { + val =3D picp->links[0]; + } else { + goto bad_access; + } + break; + case ICP_LINKB: + if (width =3D=3D 4) { + val =3D picp->links[1]; + } else { + goto bad_access; + } + break; + case ICP_LINKC: + if (width =3D=3D 4) { + val =3D picp->links[2]; + } else { + goto bad_access; + } + break; + default: +bad_access: + qemu_log_mask(LOG_GUEST_ERROR, "XICS: Bad ICP access 0x%" + HWADDR_PRIx"/%d\n", addr, width); + } + + return val; +} + +static void pnv_icp_write(void *opaque, hwaddr addr, uint64_t val, + unsigned width) +{ + ICPState *icp =3D ICP(opaque); + PnvICPState *picp =3D PNV_ICP(opaque); + bool byte0 =3D (width =3D=3D 1 && (addr & 0x3) =3D=3D 0); + + switch (addr & 0xffc) { + case ICP_XIRR: + if (byte0) { + icp_set_cppr(icp, val); + } else if (width =3D=3D 4) { + icp_eoi(icp, val); + } else { + goto bad_access; + } + break; + case ICP_MFRR: + if (byte0) { + icp_set_mfrr(icp, val); + } else { + goto bad_access; + } + break; + case ICP_LINKA: + if (width =3D=3D 4) { + picp->links[0] =3D val; + } else { + goto bad_access; + } + break; + case ICP_LINKB: + if (width =3D=3D 4) { + picp->links[1] =3D val; + } else { + goto bad_access; + } + break; + case ICP_LINKC: + if (width =3D=3D 4) { + picp->links[2] =3D val; + } else { + goto bad_access; + } + break; + default: +bad_access: + qemu_log_mask(LOG_GUEST_ERROR, "XICS: Bad ICP access 0x%" + HWADDR_PRIx"/%d\n", addr, width); + } +} + +static const MemoryRegionOps pnv_icp_ops =3D { + .read =3D pnv_icp_read, + .write =3D pnv_icp_write, + .endianness =3D DEVICE_BIG_ENDIAN, + .valid =3D { + .min_access_size =3D 1, + .max_access_size =3D 4, + }, + .impl =3D { + .min_access_size =3D 1, + .max_access_size =3D 4, + }, +}; + +static void pnv_icp_realize(DeviceState *dev, Error **errp) +{ + PnvICPState *icp =3D PNV_ICP(dev); + + memory_region_init_io(&icp->mmio, OBJECT(dev), &pnv_icp_ops, + icp, "icp-thread", 0x1000); +} + +static void pnv_icp_class_init(ObjectClass *klass, void *data) +{ + DeviceClass *dc =3D DEVICE_CLASS(klass); + ICPStateClass *icpc =3D ICP_CLASS(klass); + + icpc->realize =3D pnv_icp_realize; + dc->desc =3D "PowerNV ICP"; +} + +static const TypeInfo pnv_icp_info =3D { + .name =3D TYPE_PNV_ICP, + .parent =3D TYPE_ICP, + .instance_size =3D sizeof(PnvICPState), + .class_init =3D pnv_icp_class_init, + .class_size =3D sizeof(ICPStateClass), +}; + +static void pnv_icp_register_types(void) +{ + type_register_static(&pnv_icp_info); +} + +type_init(pnv_icp_register_types) diff --git a/include/hw/ppc/xics.h b/include/hw/ppc/xics.h index 05bb10a4ce8f..e6699c917e24 100644 --- a/include/hw/ppc/xics.h +++ b/include/hw/ppc/xics.h @@ -41,10 +41,12 @@ */ typedef struct ICPStateClass ICPStateClass; typedef struct ICPState ICPState; +typedef struct PnvICPState PnvICPState; typedef struct ICSStateClass ICSStateClass; typedef struct ICSState ICSState; typedef struct ICSIRQState ICSIRQState; typedef struct XICSFabric XICSFabric; +typedef struct PowerPCCPU PowerPCCPU; =20 #define TYPE_ICP "icp" #define ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_ICP) @@ -52,6 +54,9 @@ typedef struct XICSFabric XICSFabric; #define TYPE_KVM_ICP "icp-kvm" #define KVM_ICP(obj) OBJECT_CHECK(ICPState, (obj), TYPE_KVM_ICP) =20 +#define TYPE_PNV_ICP "pnv-icp" +#define PNV_ICP(obj) OBJECT_CHECK(PnvICPState, (obj), TYPE_PNV_ICP) + #define ICP_CLASS(klass) \ OBJECT_CLASS_CHECK(ICPStateClass, (klass), TYPE_ICP) #define ICP_GET_CLASS(obj) \ @@ -81,6 +86,13 @@ struct ICPState { XICSFabric *xics; }; =20 +struct PnvICPState { + ICPState parent_obj; + + MemoryRegion mmio; + uint32_t links[3]; +}; + #define TYPE_ICS_BASE "ics-base" #define ICS_BASE(obj) OBJECT_CHECK(ICSState, (obj), TYPE_ICS_BASE) =20 --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149120587993825.805738406736282; Mon, 3 Apr 2017 00:51:19 -0700 (PDT) Received: from localhost ([::1]:57956 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwli-0005PW-Ma for importer@patchew.org; Mon, 03 Apr 2017 03:51:18 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39809) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhE-0001zD-HP for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:41 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwhD-00005c-EP for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:40 -0400 Received: from 7.mo2.mail-out.ovh.net ([188.165.48.182]:34543) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwhD-0008WA-7z for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:39 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 3181A7B120 for ; Mon, 3 Apr 2017 09:46:38 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 0FC555C007F; Mon, 3 Apr 2017 09:46:34 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:46:01 +0200 Message-Id: <1491205565-12831-6-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18293058740208503782 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.165.48.182 Subject: [Qemu-devel] [PATCH v5 5/9] ppc/pnv: extend the machine with a XICSFabric interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" A XICSFabric QOM interface is used by the XICS layer to manipulate the ICP and ICS objects. Let's define the associated handlers for the PowerNV machine. All handlers should be defined even if there is no ICS under the PowerNV machine yet. Signed-off-by: C=C3=A9dric Le Goater --- Changes since v4: - removed the empty ics_get() and ics_resend() handlers hw/ppc/pnv.c | 30 ++++++++++++++++++++++++++++++ 1 file changed, 30 insertions(+) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 3fa722af82e6..2d7aa5dcfbca 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -34,6 +34,7 @@ #include "qemu/cutils.h" #include "qapi/visitor.h" =20 +#include "hw/ppc/xics.h" #include "hw/ppc/pnv_xscom.h" =20 #include "hw/isa/isa.h" @@ -737,6 +738,29 @@ static const TypeInfo pnv_chip_info =3D { .abstract =3D true, }; =20 +static PowerPCCPU *ppc_get_vcpu_by_pir(int pir) +{ + CPUState *cs; + + CPU_FOREACH(cs) { + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + CPUPPCState *env =3D &cpu->env; + + if (env->spr_cb[SPR_PIR].default_value =3D=3D pir) { + return cpu; + } + } + + return NULL; +} + +static ICPState *pnv_icp_get(XICSFabric *xi, int pir) +{ + PowerPCCPU *cpu =3D ppc_get_vcpu_by_pir(pir); + + return cpu ? ICP(cpu->intc) : NULL; +} + static void pnv_get_num_chips(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -787,6 +811,7 @@ static void powernv_machine_class_props_init(ObjectClas= s *oc) static void powernv_machine_class_init(ObjectClass *oc, void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); + XICSFabricClass *xic =3D XICS_FABRIC_CLASS(oc); =20 mc->desc =3D "IBM PowerNV (Non-Virtualized)"; mc->init =3D ppc_powernv_init; @@ -797,6 +822,7 @@ static void powernv_machine_class_init(ObjectClass *oc,= void *data) mc->no_parallel =3D 1; mc->default_boot_order =3D NULL; mc->default_ram_size =3D 1 * G_BYTE; + xic->icp_get =3D pnv_icp_get; =20 powernv_machine_class_props_init(oc); } @@ -807,6 +833,10 @@ static const TypeInfo powernv_machine_info =3D { .instance_size =3D sizeof(PnvMachineState), .instance_init =3D powernv_machine_initfn, .class_init =3D powernv_machine_class_init, + .interfaces =3D (InterfaceInfo[]) { + { TYPE_XICS_FABRIC }, + { }, + }, }; =20 static void powernv_machine_register_types(void) --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149120597640892.96131144009598; Mon, 3 Apr 2017 00:52:56 -0700 (PDT) Received: from localhost ([::1]:57962 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwnH-0006ck-8u for importer@patchew.org; Mon, 03 Apr 2017 03:52:55 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39909) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhO-000288-0N for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:51 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwhJ-00007x-Hq for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:50 -0400 Received: from 2.mo2.mail-out.ovh.net ([188.165.53.149]:56834) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwhJ-00006w-BC for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:45 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 4EB937B032 for ; Mon, 3 Apr 2017 09:46:42 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 2FE645C0093; Mon, 3 Apr 2017 09:46:38 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:46:02 +0200 Message-Id: <1491205565-12831-7-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18294184640125242342 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.165.53.149 Subject: [Qemu-devel] [PATCH v5 6/9] ppc/pnv: extend the machine with a InterruptStatsProvider interface X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Signed-off-by: C=C3=A9dric Le Goater --- hw/ppc/pnv.c | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 2d7aa5dcfbca..1c0672cbeb40 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -33,6 +33,8 @@ #include "exec/address-spaces.h" #include "qemu/cutils.h" #include "qapi/visitor.h" +#include "monitor/monitor.h" +#include "hw/intc/intc.h" =20 #include "hw/ppc/xics.h" #include "hw/ppc/pnv_xscom.h" @@ -761,6 +763,18 @@ static ICPState *pnv_icp_get(XICSFabric *xi, int pir) return cpu ? ICP(cpu->intc) : NULL; } =20 +static void pnv_pic_print_info(InterruptStatsProvider *obj, + Monitor *mon) +{ + CPUState *cs; + + CPU_FOREACH(cs) { + PowerPCCPU *cpu =3D POWERPC_CPU(cs); + + icp_pic_print_info(ICP(cpu->intc), mon); + } +} + static void pnv_get_num_chips(Object *obj, Visitor *v, const char *name, void *opaque, Error **errp) { @@ -812,6 +826,7 @@ static void powernv_machine_class_init(ObjectClass *oc,= void *data) { MachineClass *mc =3D MACHINE_CLASS(oc); XICSFabricClass *xic =3D XICS_FABRIC_CLASS(oc); + InterruptStatsProviderClass *ispc =3D INTERRUPT_STATS_PROVIDER_CLASS(o= c); =20 mc->desc =3D "IBM PowerNV (Non-Virtualized)"; mc->init =3D ppc_powernv_init; @@ -823,6 +838,7 @@ static void powernv_machine_class_init(ObjectClass *oc,= void *data) mc->default_boot_order =3D NULL; mc->default_ram_size =3D 1 * G_BYTE; xic->icp_get =3D pnv_icp_get; + ispc->print_info =3D pnv_pic_print_info; =20 powernv_machine_class_props_init(oc); } @@ -835,6 +851,7 @@ static const TypeInfo powernv_machine_info =3D { .class_init =3D powernv_machine_class_init, .interfaces =3D (InterfaceInfo[]) { { TYPE_XICS_FABRIC }, + { TYPE_INTERRUPT_STATS_PROVIDER }, { }, }, }; --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149120607430211.408082222012013; Mon, 3 Apr 2017 00:54:34 -0700 (PDT) Received: from localhost ([::1]:57967 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwoq-0007ry-Q3 for importer@patchew.org; Mon, 03 Apr 2017 03:54:32 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39934) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhP-00028g-Nn for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:52 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwhL-00008n-M1 for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:51 -0400 Received: from 4.mo2.mail-out.ovh.net ([87.98.172.75]:50876) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwhL-00008M-GR for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:47 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 735247B082 for ; Mon, 3 Apr 2017 09:46:46 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 507935C00A0; Mon, 3 Apr 2017 09:46:42 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:46:03 +0200 Message-Id: <1491205565-12831-8-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18295310538048310246 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.172.75 Subject: [Qemu-devel] [PATCH v5 7/9] ppc/pnv: create the ICP object under PnvCore X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Each thread of a core is linked to an ICP. This allocates a PnvICPState object before the PowerPCCPU object is realized and lets the XICSFabric do the store under the 'intc' backlink when xics_cpu_setup() is called. This modeling removes the need of maintaining an array of ICP objects under the PowerNV machine and also simplifies the XICSFabric icp_get() handler. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- Changes since v4: - moved the creation of PnvICPState object before the PowerPCCPU object is realized to handle correctly errors. =20 Changes since v3: =20 - removed the array of ICP objects from under the PowerNV machine and handled the allocation of the PnvICPState object for each thread when the PowerPCCPU object is realized. hw/ppc/pnv.c | 2 ++ hw/ppc/pnv_core.c | 27 +++++++++++++++++++++++++-- 2 files changed, 27 insertions(+), 2 deletions(-) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index 1c0672cbeb40..ab079ac60af5 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -694,6 +694,8 @@ static void pnv_chip_realize(DeviceState *dev, Error **= errp) object_property_set_int(OBJECT(pnv_core), pcc->core_pir(chip, core_hwid), "pir", &error_fatal); + object_property_add_const_link(OBJECT(pnv_core), "xics", + qdev_get_machine(), &error_fatal); object_property_set_bool(OBJECT(pnv_core), true, "realized", &error_fatal); object_unref(OBJECT(pnv_core)); diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index d79d530b4881..1b7ec70f033d 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -25,6 +25,7 @@ #include "hw/ppc/pnv.h" #include "hw/ppc/pnv_core.h" #include "hw/ppc/pnv_xscom.h" +#include "hw/ppc/xics.h" =20 static void powernv_cpu_reset(void *opaque) { @@ -110,23 +111,37 @@ static const MemoryRegionOps pnv_core_xscom_ops =3D { .endianness =3D DEVICE_BIG_ENDIAN, }; =20 -static void pnv_core_realize_child(Object *child, Error **errp) +static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **= errp) { Error *local_err =3D NULL; CPUState *cs =3D CPU(child); PowerPCCPU *cpu =3D POWERPC_CPU(cs); + Object *obj; + + obj =3D object_new(TYPE_PNV_ICP); + object_property_add_child(OBJECT(cpu), "icp", obj, NULL); + object_property_add_const_link(obj, "xics", OBJECT(xi), &error_abort); + object_property_set_bool(obj, true, "realized", &local_err); + if (local_err) { + error_propagate(errp, local_err); + return; + } =20 object_property_set_bool(child, true, "realized", &local_err); if (local_err) { + object_unparent(obj); error_propagate(errp, local_err); return; } =20 powernv_cpu_init(cpu, &local_err); if (local_err) { + object_unparent(obj); error_propagate(errp, local_err); return; } + + xics_cpu_setup(xi, cpu, ICP(obj)); } =20 static void pnv_core_realize(DeviceState *dev, Error **errp) @@ -140,6 +155,14 @@ static void pnv_core_realize(DeviceState *dev, Error *= *errp) void *obj; int i, j; char name[32]; + Object *xi; + + xi =3D object_property_get_link(OBJECT(dev), "xics", &local_err); + if (!xi) { + error_setg(errp, "%s: required link 'xics' not found: %s", + __func__, error_get_pretty(local_err)); + return; + } =20 pc->threads =3D g_malloc0(size * cc->nr_threads); for (i =3D 0; i < cc->nr_threads; i++) { @@ -160,7 +183,7 @@ static void pnv_core_realize(DeviceState *dev, Error **= errp) for (j =3D 0; j < cc->nr_threads; j++) { obj =3D pc->threads + j * size; =20 - pnv_core_realize_child(obj, &local_err); + pnv_core_realize_child(obj, XICS_FABRIC(xi), &local_err); if (local_err) { goto err; } --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 149120601248283.34932278840881; Mon, 3 Apr 2017 00:53:32 -0700 (PDT) Received: from localhost ([::1]:57963 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwnq-0007CV-Cq for importer@patchew.org; Mon, 03 Apr 2017 03:53:30 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:39967) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhT-0002DY-R5 for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:47:00 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwhP-0000Ab-Pm for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:55 -0400 Received: from 8.mo2.mail-out.ovh.net ([188.165.52.147]:45472) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwhP-0000AE-KR for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:51 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id 8F37F7B125 for ; Mon, 3 Apr 2017 09:46:50 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 707025C00A3; Mon, 3 Apr 2017 09:46:46 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:46:04 +0200 Message-Id: <1491205565-12831-9-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18296436438034648038 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 188.165.52.147 Subject: [Qemu-devel] [PATCH v5 8/9] ppc/pnv: add a helper to calculate MMIO addresses registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Some controllers (ICP, PSI) have a base register address which is calculated using the chip id. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- include/hw/ppc/pnv.h | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index df98a72006e4..5693ba181d24 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -91,14 +91,24 @@ typedef struct PnvChipClass { OBJECT_CHECK(PnvChip, (obj), TYPE_PNV_CHIP_POWER9) =20 /* - * This generates a HW chip id depending on an index: + * This generates a HW chip id depending on an index, as found on a + * two socket system with dual chip modules : * * 0x0, 0x1, 0x10, 0x11 * * 4 chips should be the maximum + * + * TODO: use a machine property to define the chip ids */ #define PNV_CHIP_HWID(i) ((((i) & 0x3e) << 3) | ((i) & 0x1)) =20 +/* + * Converts back a HW chip id to an index. This is useful to calculate + * the MMIO addresses of some controllers which depend on the chip id. + */ +#define PNV_CHIP_INDEX(chip) \ + (((chip)->chip_id >> 2) * 2 + ((chip)->chip_id & 0x3)) + #define TYPE_POWERNV_MACHINE MACHINE_TYPE_NAME("powernv") #define POWERNV_MACHINE(obj) \ OBJECT_CHECK(PnvMachineState, (obj), TYPE_POWERNV_MACHINE) --=20 2.7.4 From nobody Sat May 4 19:03:18 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1491205871485979.694613344051; Mon, 3 Apr 2017 00:51:11 -0700 (PDT) Received: from localhost ([::1]:57955 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwla-0005Gq-2w for importer@patchew.org; Mon, 03 Apr 2017 03:51:10 -0400 Received: from eggs.gnu.org ([2001:4830:134:3::10]:40005) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cuwhY-0002Hf-U8 for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:47:06 -0400 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cuwhU-0000Fq-9s for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:47:00 -0400 Received: from 4.mo2.mail-out.ovh.net ([87.98.172.75]:52753) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1cuwhU-0000EV-0P for qemu-devel@nongnu.org; Mon, 03 Apr 2017 03:46:56 -0400 Received: from player796.ha.ovh.net (b7.ovh.net [213.186.33.57]) by mo2.mail-out.ovh.net (Postfix) with ESMTP id B3C0F7B125 for ; Mon, 3 Apr 2017 09:46:54 +0200 (CEST) Received: from zorba.kaod.org.com (LFbn-1-10647-27.w90-89.abo.wanadoo.fr [90.89.233.27]) (Authenticated sender: clg@kaod.org) by player796.ha.ovh.net (Postfix) with ESMTPSA id 90A5F5C009C; Mon, 3 Apr 2017 09:46:50 +0200 (CEST) From: =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= To: David Gibson Date: Mon, 3 Apr 2017 09:46:05 +0200 Message-Id: <1491205565-12831-10-git-send-email-clg@kaod.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1491205565-12831-1-git-send-email-clg@kaod.org> References: <1491205565-12831-1-git-send-email-clg@kaod.org> MIME-Version: 1.0 X-Ovh-Tracer-Id: 18297562336789171174 X-VR-SPAMSTATE: OK X-VR-SPAMSCORE: -100 X-VR-SPAMCAUSE: gggruggvucftvghtrhhoucdtuddrfeelhedrleejgdejhecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfqggfjpdevjffgvefmvefgnecuuegrihhlohhuthemuceftddtnecusecvtfgvtghiphhivghnthhsucdlqddutddtmd Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 87.98.172.75 Subject: [Qemu-devel] [PATCH v5 9/9] ppc/pnv: add memory regions for the ICP registers X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-ppc@nongnu.org, qemu-devel@nongnu.org, =?UTF-8?q?C=C3=A9dric=20Le=20Goater?= Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" This provides to a PowerNV chip (POWER8) access to the Interrupt Management area, which contains the registers of the Interrupt Control Presenters of each thread. These are used to accept, return, forward interrupts in the system. This area is modeled with a per-chip container memory region holding all the ICP registers. Each thread of a chip is then associated with its ICP registers using a memory subregion indexed by its PIR number in the overall region. The device tree is populated accordingly. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: David Gibson --- Changes since v1: - added multichip support - adapted to use PnvICPState object hw/ppc/pnv.c | 81 ++++++++++++++++++++++++++++++++++++++++++++++++= ++++ include/hw/ppc/pnv.h | 19 ++++++++++++ 2 files changed, 100 insertions(+) diff --git a/hw/ppc/pnv.c b/hw/ppc/pnv.c index ab079ac60af5..903bbac03fcc 100644 --- a/hw/ppc/pnv.c +++ b/hw/ppc/pnv.c @@ -218,6 +218,43 @@ static void powernv_create_core_node(PnvChip *chip, Pn= vCore *pc, void *fdt) servers_prop, sizeof(servers_prop)))); } =20 +static void powernv_populate_icp(PnvChip *chip, void *fdt, uint32_t pir, + uint32_t nr_threads) +{ + uint64_t addr =3D PNV_ICP_BASE(chip) | (pir << 12); + char *name; + const char compat[] =3D "IBM,power8-icp\0IBM,ppc-xicp"; + uint32_t irange[2], i, rsize; + uint64_t *reg; + int offset; + + irange[0] =3D cpu_to_be32(pir); + irange[1] =3D cpu_to_be32(nr_threads); + + rsize =3D sizeof(uint64_t) * 2 * nr_threads; + reg =3D g_malloc(rsize); + for (i =3D 0; i < nr_threads; i++) { + reg[i * 2] =3D cpu_to_be64(addr | ((pir + i) * 0x1000)); + reg[i * 2 + 1] =3D cpu_to_be64(0x1000); + } + + name =3D g_strdup_printf("interrupt-controller@%"PRIX64, addr); + offset =3D fdt_add_subnode(fdt, 0, name); + _FDT(offset); + g_free(name); + + _FDT((fdt_setprop(fdt, offset, "compatible", compat, sizeof(compat)))); + _FDT((fdt_setprop(fdt, offset, "reg", reg, rsize))); + _FDT((fdt_setprop_string(fdt, offset, "device_type", + "PowerPC-External-Interrupt-Presentation"))); + _FDT((fdt_setprop(fdt, offset, "interrupt-controller", NULL, 0))); + _FDT((fdt_setprop(fdt, offset, "ibm,interrupt-server-ranges", + irange, sizeof(irange)))); + _FDT((fdt_setprop_cell(fdt, offset, "#interrupt-cells", 1))); + _FDT((fdt_setprop_cell(fdt, offset, "#address-cells", 0))); + g_free(reg); +} + static void powernv_populate_chip(PnvChip *chip, void *fdt) { PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(chip); @@ -231,6 +268,10 @@ static void powernv_populate_chip(PnvChip *chip, void = *fdt) PnvCore *pnv_core =3D PNV_CORE(chip->cores + i * typesize); =20 powernv_create_core_node(chip, pnv_core, fdt); + + /* Interrupt Control Presenters (ICP). One per core. */ + powernv_populate_icp(chip, fdt, pnv_core->pir, + CPU_CORE(pnv_core)->nr_threads); } =20 if (chip->ram_size) { @@ -643,6 +684,38 @@ static void pnv_chip_init(Object *obj) object_property_add_child(obj, "lpc", OBJECT(&chip->lpc), NULL); } =20 +static void pnv_chip_icp_realize(PnvChip *chip, Error **errp) +{ + PnvChipClass *pcc =3D PNV_CHIP_GET_CLASS(chip); + char *typename =3D pnv_core_typename(pcc->cpu_model); + size_t typesize =3D object_type_get_instance_size(typename); + int i, j; + char *name; + XICSFabric *xi =3D XICS_FABRIC(qdev_get_machine()); + + name =3D g_strdup_printf("icp-%x", chip->chip_id); + memory_region_init(&chip->icp_mmio, OBJECT(chip), name, PNV_ICP_SIZE); + sysbus_init_mmio(SYS_BUS_DEVICE(chip), &chip->icp_mmio); + g_free(name); + + sysbus_mmio_map(SYS_BUS_DEVICE(chip), 1, PNV_ICP_BASE(chip)); + + /* Map the ICP registers for each thread */ + for (i =3D 0; i < chip->nr_cores; i++) { + PnvCore *pnv_core =3D PNV_CORE(chip->cores + i * typesize); + int core_hwid =3D CPU_CORE(pnv_core)->core_id; + + for (j =3D 0; j < CPU_CORE(pnv_core)->nr_threads; j++) { + uint32_t pir =3D pcc->core_pir(chip, core_hwid) + j; + PnvICPState *icp =3D PNV_ICP(xics_icp_get(xi, pir)); + + memory_region_add_subregion(&chip->icp_mmio, pir << 12, &icp->= mmio); + } + } + + g_free(typename); +} + static void pnv_chip_realize(DeviceState *dev, Error **errp) { PnvChip *chip =3D PNV_CHIP(dev); @@ -713,6 +786,14 @@ static void pnv_chip_realize(DeviceState *dev, Error *= *errp) object_property_set_bool(OBJECT(&chip->lpc), true, "realized", &error_fatal); pnv_xscom_add_subregion(chip, PNV_XSCOM_LPC_BASE, &chip->lpc.xscom_reg= s); + + /* Interrupt Management Area. This is the memory region holding + * all the Interrupt Control Presenter (ICP) registers */ + pnv_chip_icp_realize(chip, &error); + if (error) { + error_propagate(errp, error); + return; + } } =20 static Property pnv_chip_properties[] =3D { diff --git a/include/hw/ppc/pnv.h b/include/hw/ppc/pnv.h index 5693ba181d24..96231c1ff708 100644 --- a/include/hw/ppc/pnv.h +++ b/include/hw/ppc/pnv.h @@ -54,6 +54,7 @@ typedef struct PnvChip { MemoryRegion xscom_mmio; MemoryRegion xscom; AddressSpace xscom_as; + MemoryRegion icp_mmio; =20 PnvLpcController lpc; } PnvChip; @@ -136,4 +137,22 @@ typedef struct PnvMachineState { #define PNV_XSCOM_BASE(chip) \ (chip->xscom_base + ((uint64_t)(chip)->chip_id) * PNV_XSCOM_SIZE) =20 +/* + * XSCOM 0x20109CA defines the ICP BAR: + * + * 0:29 : bits 14 to 43 of address to define 1 MB region. + * 30 : 1 to enable ICP to receive loads/stores against its BAR region + * 31:63 : Constant 0 + * + * Usually defined as : + * + * 0xffffe00200000000 -> 0x0003ffff80000000 + * 0xffffe00600000000 -> 0x0003ffff80100000 + * 0xffffe02200000000 -> 0x0003ffff80800000 + * 0xffffe02600000000 -> 0x0003ffff80900000 + */ +#define PNV_ICP_SIZE 0x0000000000100000ull +#define PNV_ICP_BASE(chip) \ + (0x0003ffff80000000ull + (uint64_t) PNV_CHIP_INDEX(chip) * PNV_ICP_SIZ= E) + #endif /* _PPC_PNV_H */ --=20 2.7.4