From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750494892638.8863708115282; Fri, 10 Feb 2017 10:14:54 -0800 (PST) Received: from localhost ([::1]:45336 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFif-0007R0-Is for importer@patchew.org; Fri, 10 Feb 2017 13:14:53 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49689) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFcB-00023Y-8L for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc9-0003zt-UP for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48481) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc9-0003vW-NP for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc4-0007am-I6 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:04 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:51 +0000 Message-Id: <1486750082-12324-2-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 01/12] target-arm: Add support for PMU register PMSELR_EL0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Wei Huang This patch adds support for AArch64 register PMSELR_EL0. The existing PMSELR definition is revised accordingly. Signed-off-by: Wei Huang Reviewed-by: Peter Maydell [PMM: Moved #ifndef CONFIG_USER_ONLY to cover new regdefs] Message-id: 1486504171-26807-2-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell --- target/arm/cpu.h | 1 + target/arm/helper.c | 27 +++++++++++++++++++++------ 2 files changed, 22 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index c0b3832..7e609f7 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -309,6 +309,7 @@ typedef struct CPUARMState { uint32_t c9_pmovsr; /* perf monitor overflow status */ uint32_t c9_pmxevtyper; /* perf monitor event type */ uint32_t c9_pmuserenr; /* perf monitor user enable */ + uint64_t c9_pmselr; /* perf monitor counter selection register */ uint32_t c9_pminten; /* perf monitor interrupt enables */ union { /* Memory attribute redirection */ struct { diff --git a/target/arm/helper.c b/target/arm/helper.c index c23df1b..42803d4 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -975,6 +975,17 @@ static uint64_t pmccntr_read(CPUARMState *env, const A= RMCPRegInfo *ri) return total_ticks - env->cp15.c15_ccnt; } =20 +static void pmselr_write(CPUARMState *env, const ARMCPRegInfo *ri, + uint64_t value) +{ + /* The value of PMSELR.SEL affects the behavior of PMXEVTYPER and + * PMXEVCNTR. We allow [0..31] to be written to PMSELR here; in the + * meanwhile, we check PMSELR.SEL when PMXEVTYPER and PMXEVCNTR are + * accessed. + */ + env->cp15.c9_pmselr =3D value & 0x1f; +} + static void pmccntr_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { @@ -1194,13 +1205,17 @@ static const ARMCPRegInfo v7_cp_reginfo[] =3D { /* Unimplemented so WI. */ { .name =3D "PMSWINC", .cp =3D 15, .crn =3D 9, .crm =3D 12, .opc1 =3D = 0, .opc2 =3D 4, .access =3D PL0_W, .accessfn =3D pmreg_access, .type =3D ARM_CP_NOP = }, - /* Since we don't implement any events, writing to PMSELR is UNPREDICT= ABLE. - * We choose to RAZ/WI. - */ - { .name =3D "PMSELR", .cp =3D 15, .crn =3D 9, .crm =3D 12, .opc1 =3D 0= , .opc2 =3D 5, - .access =3D PL0_RW, .type =3D ARM_CP_CONST, .resetvalue =3D 0, - .accessfn =3D pmreg_access }, #ifndef CONFIG_USER_ONLY + { .name =3D "PMSELR", .cp =3D 15, .crn =3D 9, .crm =3D 12, .opc1 =3D 0= , .opc2 =3D 5, + .access =3D PL0_RW, .type =3D ARM_CP_ALIAS, + .fieldoffset =3D offsetoflow32(CPUARMState, cp15.c9_pmselr), + .accessfn =3D pmreg_access, .writefn =3D pmselr_write, + .raw_writefn =3D raw_write}, + { .name =3D "PMSELR_EL0", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 3, .crn =3D 9, .crm =3D 12, .opc2 =3D 5, + .access =3D PL0_RW, .accessfn =3D pmreg_access, + .fieldoffset =3D offsetof(CPUARMState, cp15.c9_pmselr), + .writefn =3D pmselr_write, .raw_writefn =3D raw_write, }, { .name =3D "PMCCNTR", .cp =3D 15, .crn =3D 9, .crm =3D 13, .opc1 =3D = 0, .opc2 =3D 0, .access =3D PL0_RW, .resetvalue =3D 0, .type =3D ARM_CP_IO, .readfn =3D pmccntr_read, .writefn =3D pmccntr_write32, --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486751085180501.4595773868649; Fri, 10 Feb 2017 10:24:45 -0800 (PST) Received: from localhost ([::1]:45395 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFsA-000852-S3 for importer@patchew.org; Fri, 10 Feb 2017 13:24:42 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49638) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFc9-00022O-Vg for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc9-0003z9-3m for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48481) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc8-0003vW-Sp for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc5-0007b9-0F for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:05 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:52 +0000 Message-Id: <1486750082-12324-3-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 02/12] target-arm: Add support for AArch64 PMU register PMXEVTYPER_EL0 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Wei Huang In order to support Linux perf, which uses PMXEVTYPER register, this patch adds read/write access support for PMXEVTYPER. The access is CONSTRAINED UNPREDICTABLE when PMSELR is not 0x1f. Additionally this patch adds support for PMXEVTYPER_EL0. Signed-off-by: Wei Huang Message-id: 1486504171-26807-3-git-send-email-wei@redhat.com Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- target/arm/cpu.h | 1 - target/arm/helper.c | 30 +++++++++++++++++++++++++----- 2 files changed, 25 insertions(+), 6 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index 7e609f7..edc1f76 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -307,7 +307,6 @@ typedef struct CPUARMState { uint64_t c9_pmcr; /* performance monitor control register */ uint64_t c9_pmcnten; /* perf monitor counter enables */ uint32_t c9_pmovsr; /* perf monitor overflow status */ - uint32_t c9_pmxevtyper; /* perf monitor event type */ uint32_t c9_pmuserenr; /* perf monitor user enable */ uint64_t c9_pmselr; /* perf monitor counter selection register */ uint32_t c9_pminten; /* perf monitor interrupt enables */ diff --git a/target/arm/helper.c b/target/arm/helper.c index 42803d4..b837d36 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1054,7 +1054,25 @@ static void pmovsr_write(CPUARMState *env, const ARM= CPRegInfo *ri, static void pmxevtyper_write(CPUARMState *env, const ARMCPRegInfo *ri, uint64_t value) { - env->cp15.c9_pmxevtyper =3D value & 0xff; + /* Attempts to access PMXEVTYPER are CONSTRAINED UNPREDICTABLE when + * PMSELR value is equal to or greater than the number of implemented + * counters, but not equal to 0x1f. We opt to behave as a RAZ/WI. + */ + if (env->cp15.c9_pmselr =3D=3D 0x1f) { + pmccfiltr_write(env, ri, value); + } +} + +static uint64_t pmxevtyper_read(CPUARMState *env, const ARMCPRegInfo *ri) +{ + /* We opt to behave as a RAZ/WI when attempts to access PMXEVTYPER + * are CONSTRAINED UNPREDICTABLE. See comments in pmxevtyper_write(). + */ + if (env->cp15.c9_pmselr =3D=3D 0x1f) { + return env->cp15.pmccfiltr_el0; + } else { + return 0; + } } =20 static void pmuserenr_write(CPUARMState *env, const ARMCPRegInfo *ri, @@ -1234,10 +1252,12 @@ static const ARMCPRegInfo v7_cp_reginfo[] =3D { .fieldoffset =3D offsetof(CPUARMState, cp15.pmccfiltr_el0), .resetvalue =3D 0, }, { .name =3D "PMXEVTYPER", .cp =3D 15, .crn =3D 9, .crm =3D 13, .opc1 = =3D 0, .opc2 =3D 1, - .access =3D PL0_RW, - .fieldoffset =3D offsetof(CPUARMState, cp15.c9_pmxevtyper), - .accessfn =3D pmreg_access, .writefn =3D pmxevtyper_write, - .raw_writefn =3D raw_write }, + .access =3D PL0_RW, .type =3D ARM_CP_NO_RAW, .accessfn =3D pmreg_acc= ess, + .writefn =3D pmxevtyper_write, .readfn =3D pmxevtyper_read }, + { .name =3D "PMXEVTYPER_EL0", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 3, .crn =3D 9, .crm =3D 13, .opc2 =3D 1, + .access =3D PL0_RW, .type =3D ARM_CP_NO_RAW, .accessfn =3D pmreg_acc= ess, + .writefn =3D pmxevtyper_write, .readfn =3D pmxevtyper_read }, /* Unimplemented, RAZ/WI. */ { .name =3D "PMXEVCNTR", .cp =3D 15, .crn =3D 9, .crm =3D 13, .opc1 = =3D 0, .opc2 =3D 2, .access =3D PL0_RW, .type =3D ARM_CP_CONST, .resetvalue =3D 0, --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750486984514.4703319840618; Fri, 10 Feb 2017 10:14:46 -0800 (PST) Received: from localhost ([::1]:45334 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFiX-0007Ko-Mv for importer@patchew.org; Fri, 10 Feb 2017 13:14:45 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49566) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFc8-00021Z-2Q for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc6-0003vz-Qm for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48480) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc6-0003sU-J0 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:06 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc5-0007bW-FB for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:05 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:53 +0000 Message-Id: <1486750082-12324-4-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 03/12] target-arm: Add support for PMU register PMINTENSET_EL1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Wei Huang This patch adds access support for PMINTENSET_EL1. Signed-off-by: Wei Huang Reviewed-by: Peter Maydell Message-id: 1486504171-26807-4-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell --- target/arm/cpu.h | 2 +- target/arm/helper.c | 10 +++++++++- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/target/arm/cpu.h b/target/arm/cpu.h index edc1f76..0956a54 100644 --- a/target/arm/cpu.h +++ b/target/arm/cpu.h @@ -309,7 +309,7 @@ typedef struct CPUARMState { uint32_t c9_pmovsr; /* perf monitor overflow status */ uint32_t c9_pmuserenr; /* perf monitor user enable */ uint64_t c9_pmselr; /* perf monitor counter selection register */ - uint32_t c9_pminten; /* perf monitor interrupt enables */ + uint64_t c9_pminten; /* perf monitor interrupt enables */ union { /* Memory attribute redirection */ struct { #ifdef HOST_WORDS_BIGENDIAN diff --git a/target/arm/helper.c b/target/arm/helper.c index b837d36..5358ac6 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -1275,9 +1275,17 @@ static const ARMCPRegInfo v7_cp_reginfo[] =3D { .writefn =3D pmuserenr_write, .raw_writefn =3D raw_write }, { .name =3D "PMINTENSET", .cp =3D 15, .crn =3D 9, .crm =3D 14, .opc1 = =3D 0, .opc2 =3D 1, .access =3D PL1_RW, .accessfn =3D access_tpm, - .fieldoffset =3D offsetof(CPUARMState, cp15.c9_pminten), + .type =3D ARM_CP_ALIAS, + .fieldoffset =3D offsetoflow32(CPUARMState, cp15.c9_pminten), .resetvalue =3D 0, .writefn =3D pmintenset_write, .raw_writefn =3D raw_write }, + { .name =3D "PMINTENSET_EL1", .state =3D ARM_CP_STATE_AA64, + .opc0 =3D 3, .opc1 =3D 0, .crn =3D 9, .crm =3D 14, .opc2 =3D 1, + .access =3D PL1_RW, .accessfn =3D access_tpm, + .type =3D ARM_CP_IO, + .fieldoffset =3D offsetof(CPUARMState, cp15.c9_pminten), + .writefn =3D pmintenset_write, .raw_writefn =3D raw_write, + .resetvalue =3D 0x0 }, { .name =3D "PMINTENCLR", .cp =3D 15, .crn =3D 9, .crm =3D 14, .opc1 = =3D 0, .opc2 =3D 2, .access =3D PL1_RW, .accessfn =3D access_tpm, .type =3D ARM_CP_ALIAS, .fieldoffset =3D offsetof(CPUARMState, cp15.c9_pminten), --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750225946290.5916688211778; Fri, 10 Feb 2017 10:10:25 -0800 (PST) Received: from localhost ([::1]:45315 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFeJ-0003B4-Gy for importer@patchew.org; Fri, 10 Feb 2017 13:10:23 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49592) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFc8-00021d-R3 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc7-0003xC-Lv for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48480) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc7-0003sU-E1 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:07 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc5-0007bu-Uz for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:05 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:54 +0000 Message-Id: <1486750082-12324-5-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 04/12] target-arm: Enable vPMU support under TCG mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Wei Huang This patch contains several fixes to enable vPMU under TCG mode. It first removes the checking of kvm_enabled() while unsetting ARM_FEATURE_PMU. With it, the .pmu option can be used to turn on/off vPMU under TCG mode. Secondly the PMU node of DT table is now created under TCG. The last fix is to disable the masking of PMUver field of ID_AA64DFR0_EL1. Signed-off-by: Wei Huang Reviewed-by: Peter Maydell Message-id: 1486504171-26807-5-git-send-email-wei@redhat.com Signed-off-by: Peter Maydell --- hw/arm/virt.c | 2 +- target/arm/cpu.c | 2 +- target/arm/helper.c | 7 +------ 3 files changed, 3 insertions(+), 8 deletions(-) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 1f216cf..8eef143 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -471,7 +471,7 @@ static void fdt_add_pmu_nodes(const VirtMachineState *v= ms) CPU_FOREACH(cpu) { armcpu =3D ARM_CPU(cpu); if (!arm_feature(&armcpu->env, ARM_FEATURE_PMU) || - !kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ))) { + (kvm_enabled() && !kvm_arm_pmu_create(cpu, PPI(VIRTUAL_PMU_IRQ= )))) { return; } } diff --git a/target/arm/cpu.c b/target/arm/cpu.c index 4ee250c..4a069f6 100644 --- a/target/arm/cpu.c +++ b/target/arm/cpu.c @@ -781,7 +781,7 @@ static void arm_cpu_realizefn(DeviceState *dev, Error *= *errp) unset_feature(env, ARM_FEATURE_EL2); } =20 - if (!cpu->has_pmu || !kvm_enabled()) { + if (!cpu->has_pmu) { cpu->has_pmu =3D false; unset_feature(env, ARM_FEATURE_PMU); } diff --git a/target/arm/helper.c b/target/arm/helper.c index 5358ac6..47250bc 100644 --- a/target/arm/helper.c +++ b/target/arm/helper.c @@ -4633,12 +4633,7 @@ void register_cp_regs_for_features(ARMCPU *cpu) { .name =3D "ID_AA64DFR0_EL1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 0, .crm =3D 5, .opc2 =3D = 0, .access =3D PL1_R, .type =3D ARM_CP_CONST, - /* We mask out the PMUVer field, because we don't currently - * implement the PMU. Not advertising it prevents the guest - * from trying to use it and getting UNDEFs on registers we - * don't implement. - */ - .resetvalue =3D cpu->id_aa64dfr0 & ~0xf00 }, + .resetvalue =3D cpu->id_aa64dfr0 }, { .name =3D "ID_AA64DFR1_EL1", .state =3D ARM_CP_STATE_AA64, .opc0 =3D 3, .opc1 =3D 0, .crn =3D 0, .crm =3D 5, .opc2 =3D = 1, .access =3D PL1_R, .type =3D ARM_CP_CONST, --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750224199630.7830243469972; Fri, 10 Feb 2017 10:10:24 -0800 (PST) Received: from localhost ([::1]:45314 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFeH-00038t-Ii for importer@patchew.org; Fri, 10 Feb 2017 13:10:21 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49573) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFc8-00021a-BO for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc7-0003wq-FZ for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48481) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc7-0003vW-89 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:07 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc6-0007cL-Do for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:06 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:55 +0000 Message-Id: <1486750082-12324-6-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 05/12] target-arm: Declare virtio-mmio as dma-coherent in dt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alexander Graf QEMU emulated hardware is always dma coherent with its guest. We do annotate that correctly on the PCI host controller, but left out virtio-mmio. Recent kernels have started to interpret that flag rather than take dma coherency as granted with virtio-mmio. While that is considered a kernel bug, as it breaks previously working systems, it showed that our dt description is incomplete. This patch adds the respective marker that allows guest OSs to evaluate that our virtio-mmio devices are indeed cache coherent. Signed-off-by: Alexander Graf Reviewed-by: Laszlo Ersek Reviewed-by: Ard Biesheuvel Message-id: 1486644810-33181-2-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell --- hw/arm/vexpress.c | 1 + hw/arm/virt.c | 1 + 2 files changed, 2 insertions(+) diff --git a/hw/arm/vexpress.c b/hw/arm/vexpress.c index 58760f4..e057568 100644 --- a/hw/arm/vexpress.c +++ b/hw/arm/vexpress.c @@ -452,6 +452,7 @@ static int add_virtio_mmio_node(void *fdt, uint32_t ace= lls, uint32_t scells, acells, addr, scells, size); qemu_fdt_setprop_cells(fdt, nodename, "interrupt-parent", intc); qemu_fdt_setprop_cells(fdt, nodename, "interrupts", 0, irq, 1); + qemu_fdt_setprop(fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); if (rc) { return -1; diff --git a/hw/arm/virt.c b/hw/arm/virt.c index 8eef143..d20e627 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -797,6 +797,7 @@ static void create_virtio_devices(const VirtMachineStat= e *vms, qemu_irq *pic) qemu_fdt_setprop_cells(vms->fdt, nodename, "interrupts", GIC_FDT_IRQ_TYPE_SPI, irq, GIC_FDT_IRQ_FLAGS_EDGE_LO_HI); + qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); } } --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 148675074330062.235459513872684; Fri, 10 Feb 2017 10:19:03 -0800 (PST) Received: from localhost ([::1]:45358 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFmf-0003Cq-7B for importer@patchew.org; Fri, 10 Feb 2017 13:19:01 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49602) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFc9-00021t-8P for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc8-0003yN-FF for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48480) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc8-0003sU-8n for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc6-0007cX-SP for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:06 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:56 +0000 Message-Id: <1486750082-12324-7-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 06/12] hw/arm/virt: Declare virtio-mmio as dma cache coherent in ACPI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alexander Graf Virtio-mmio devices can directly access guest memory and do so in cache coherent fashion. Tell the guest about that fact when it's using ACPI. Signed-off-by: Alexander Graf Reviewed-by: Laszlo Ersek Reviewed-by: Ard Biesheuvel Reviewed-by: Shannon Zhao Message-id: 1486644810-33181-3-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 07a10ac..8955a9d 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -135,6 +135,7 @@ static void acpi_dsdt_add_virtio(Aml *scope, Aml *dev =3D aml_device("VR%02u", i); aml_append(dev, aml_name_decl("_HID", aml_string("LNRO0005"))); aml_append(dev, aml_name_decl("_UID", aml_int(i))); + aml_append(dev, aml_name_decl("_CCA", aml_int(1))); =20 Aml *crs =3D aml_resource_template(); aml_append(crs, aml_memory32_fixed(base, size, AML_READ_WRITE)); --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750227692973.8573288457123; Fri, 10 Feb 2017 10:10:27 -0800 (PST) Received: from localhost ([::1]:45316 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFeL-0003Bi-30 for importer@patchew.org; Fri, 10 Feb 2017 13:10:25 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49598) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFc9-00021n-0H for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc8-0003y7-86 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48481) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc8-0003vW-2I for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc7-0007cy-BW for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:07 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:57 +0000 Message-Id: <1486750082-12324-8-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 07/12] hw/arm/virt: Declare fwcfg as dma cache coherent in ACPI X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alexander Graf Fw-cfg recently learned how to directly access guest memory and does so in cache coherent fashion. Tell the guest about that fact when it's using ACPI. Signed-off-by: Alexander Graf Reviewed-by: Laszlo Ersek Reviewed-by: Ard Biesheuvel Reviewed-by: Shannon Zhao Message-id: 1486644810-33181-4-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell --- hw/arm/virt-acpi-build.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c index 8955a9d..0835e59 100644 --- a/hw/arm/virt-acpi-build.c +++ b/hw/arm/virt-acpi-build.c @@ -90,6 +90,7 @@ static void acpi_dsdt_add_fw_cfg(Aml *scope, const MemMap= Entry *fw_cfg_memmap) aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0002"))); /* device present, functioning, decoding, not shown in UI */ aml_append(dev, aml_name_decl("_STA", aml_int(0xB))); + aml_append(dev, aml_name_decl("_CCA", aml_int(1))); =20 Aml *crs =3D aml_resource_template(); aml_append(crs, aml_memory32_fixed(fw_cfg_memmap->base, --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750940579508.03932350945354; Fri, 10 Feb 2017 10:22:20 -0800 (PST) Received: from localhost ([::1]:45384 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFpr-00067C-Ez for importer@patchew.org; Fri, 10 Feb 2017 13:22:19 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49642) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFcA-00022X-3z for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc8-0003yq-UB for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48482) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc8-0003xp-MH for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:08 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc7-0007dR-R6 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:07 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:58 +0000 Message-Id: <1486750082-12324-9-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 08/12] hw/arm/virt: Declare fwcfg as dma cache coherent in dt X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: Alexander Graf Fw-cfg recently learned how to directly access guest memory and does so in cache coherent fashion. Tell the guest about that fact when it's using DT. Signed-off-by: Alexander Graf Reviewed-by: Laszlo Ersek Reviewed-by: Ard Biesheuvel Reviewed-by: Shannon Zhao Message-id: 1486644810-33181-5-git-send-email-agraf@suse.de Signed-off-by: Peter Maydell --- hw/arm/virt.c | 1 + 1 file changed, 1 insertion(+) diff --git a/hw/arm/virt.c b/hw/arm/virt.c index d20e627..f3440f2 100644 --- a/hw/arm/virt.c +++ b/hw/arm/virt.c @@ -929,6 +929,7 @@ static FWCfgState *create_fw_cfg(const VirtMachineState= *vms, AddressSpace *as) "compatible", "qemu,fw-cfg-mmio"); qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg", 2, base, 2, size); + qemu_fdt_setprop(vms->fdt, nodename, "dma-coherent", NULL, 0); g_free(nodename); return fw_cfg; } --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750495680608.2195077451216; Fri, 10 Feb 2017 10:14:55 -0800 (PST) Received: from localhost ([::1]:45337 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFig-0007S9-BY for importer@patchew.org; Fri, 10 Feb 2017 13:14:54 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49651) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFcA-00022q-FY for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc9-0003zQ-CL for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48480) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc9-0003sU-4n for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc8-0007df-9R for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:08 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:07:59 +0000 Message-Id: <1486750082-12324-10-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 09/12] aspeed: check for negative values returned by blk_getlength() X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: C=C3=A9dric Le Goater write_boot_rom() does not check for negative values. This is more a problem for coverity than the actual code as the size of the flash device is checked when the m25p80 object is created. If there is anything wrong with the backing file, we should not even reach that path. Signed-off-by: C=C3=A9dric Le Goater Message-id: 1486648058-520-2-git-send-email-clg@kaod.org Reviewed-by: Peter Maydell Signed-off-by: Peter Maydell --- hw/arm/aspeed.c | 14 ++++++++++++-- 1 file changed, 12 insertions(+), 2 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index a92c2f1..ac9cbd6 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -113,9 +113,19 @@ static void write_boot_rom(DriveInfo *dinfo, hwaddr ad= dr, size_t rom_size, { BlockBackend *blk =3D blk_by_legacy_dinfo(dinfo); uint8_t *storage; + int64_t size; =20 - if (rom_size > blk_getlength(blk)) { - rom_size =3D blk_getlength(blk); + /* The block backend size should have already been 'validated' by + * the creation of the m25p80 object. + */ + size =3D blk_getlength(blk); + if (size <=3D 0) { + error_setg(errp, "failed to get flash size"); + return; + } + + if (rom_size > size) { + rom_size =3D size; } =20 storage =3D g_new0(uint8_t, rom_size); --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750491758237.9739981285535; Fri, 10 Feb 2017 10:14:51 -0800 (PST) Received: from localhost ([::1]:45335 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFic-0007O8-EX for importer@patchew.org; Fri, 10 Feb 2017 13:14:50 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49678) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFcA-00023A-Tl for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFc9-0003zh-PG for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48482) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFc9-0003xp-HT for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:09 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc8-0007eB-OW for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:08 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:08:00 +0000 Message-Id: <1486750082-12324-11-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 10/12] aspeed: remove useless comment on controller segment size X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: C=C3=A9dric Le Goater The flash devices used for the FMC controller (BMC firmware) are well defined for each Aspeed machine and are all smaller than the default mapping window size, at least for CE0 which is the chip the SoC boots from. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1486648058-520-3-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- hw/arm/aspeed.c | 8 +++----- 1 file changed, 3 insertions(+), 5 deletions(-) diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index ac9cbd6..283c038 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -148,10 +148,6 @@ static void aspeed_board_init_flashes(AspeedSMCState *= s, const char *flashtype, DriveInfo *dinfo =3D drive_get_next(IF_MTD); qemu_irq cs_line; =20 - /* - * FIXME: check that we are not using a flash module exceeding - * the controller segment size - */ fl->flash =3D ssi_create_slave_no_init(s->spi, flashtype); if (dinfo) { qdev_prop_set_drive(fl->flash, "drive", blk_by_legacy_dinfo(di= nfo), @@ -210,7 +206,9 @@ static void aspeed_board_init(MachineState *machine, =20 /* * create a ROM region using the default mapping window size of - * the flash module. + * the flash module. The window size is 64MB for the AST2400 + * SoC and 128MB for the AST2500 SoC, which is twice as big as + * needed by the flash modules of the Aspeed machines. */ memory_region_init_rom(boot_rom, OBJECT(bmc), "aspeed.boot_rom", fl->size, &error_abort); --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750744794985.7032659272061; Fri, 10 Feb 2017 10:19:04 -0800 (PST) Received: from localhost ([::1]:45359 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFmh-0003Ei-IV for importer@patchew.org; Fri, 10 Feb 2017 13:19:03 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49691) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFcB-00023Z-90 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFcA-00040H-9G for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48483) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFcA-0003zU-36 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc9-0007ec-7x for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:09 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:08:01 +0000 Message-Id: <1486750082-12324-12-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 11/12] aspeed/smc: handle dummies only in fast read mode X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: C=C3=A9dric Le Goater HW works fine in normal read mode with dummy bytes being set. So let's check this case to not transfer bytes. Signed-off-by: C=C3=A9dric Le Goater Message-id: 1486648058-520-4-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- hw/ssi/aspeed_smc.c | 9 ++++++--- 1 file changed, 6 insertions(+), 3 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 087b29e..7017707 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -536,10 +536,13 @@ static uint64_t aspeed_smc_flash_read(void *opaque, h= waddr addr, unsigned size) /* * Use fake transfers to model dummy bytes. The value should * be configured to some non-zero value in fast read mode and - * zero in read mode. + * zero in read mode. But, as the HW allows inconsistent + * settings, let's check for fast read mode. */ - for (i =3D 0; i < aspeed_smc_flash_dummies(fl); i++) { - ssi_transfer(fl->controller->spi, 0xFF); + if (aspeed_smc_flash_mode(fl) =3D=3D CTRL_FREADMODE) { + for (i =3D 0; i < aspeed_smc_flash_dummies(fl); i++) { + ssi_transfer(fl->controller->spi, 0xFF); + } } =20 for (i =3D 0; i < size; i++) { --=20 2.7.4 From nobody Thu May 2 15:23:56 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486750748724691.6801720351715; Fri, 10 Feb 2017 10:19:08 -0800 (PST) Received: from localhost ([::1]:45362 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFmk-0003HC-GQ for importer@patchew.org; Fri, 10 Feb 2017 13:19:06 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:49697) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ccFcB-00023m-Fd for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:12 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1ccFcA-00040e-JS for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:11 -0500 Received: from orth.archaic.org.uk ([2001:8b0:1d0::2]:48482) by eggs.gnu.org with esmtps (TLS1.0:RSA_AES_128_CBC_SHA1:16) (Exim 4.71) (envelope-from ) id 1ccFcA-0003xp-DV for qemu-devel@nongnu.org; Fri, 10 Feb 2017 13:08:10 -0500 Received: from pm215 by orth.archaic.org.uk with local (Exim 4.84_2) (envelope-from ) id 1ccFc9-0007f3-N8 for qemu-devel@nongnu.org; Fri, 10 Feb 2017 18:08:09 +0000 From: Peter Maydell To: qemu-devel@nongnu.org Date: Fri, 10 Feb 2017 18:08:02 +0000 Message-Id: <1486750082-12324-13-git-send-email-peter.maydell@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> References: <1486750082-12324-1-git-send-email-peter.maydell@linaro.org> MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: quoted-printable X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 2001:8b0:1d0::2 Subject: [Qemu-devel] [PULL 12/12] aspeed/smc: use a modulo to check segment limits X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 From: C=C3=A9dric Le Goater The size of a segment is not necessarily a power of 2. Signed-off-by: C=C3=A9dric Le Goater Reviewed-by: Philippe Mathieu-Daud=C3=A9 Message-id: 1486648058-520-5-git-send-email-clg@kaod.org Signed-off-by: Peter Maydell --- hw/ssi/aspeed_smc.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/ssi/aspeed_smc.c b/hw/ssi/aspeed_smc.c index 7017707..cb51573 100644 --- a/hw/ssi/aspeed_smc.c +++ b/hw/ssi/aspeed_smc.c @@ -475,15 +475,15 @@ static uint32_t aspeed_smc_check_segment_addr(const A= speedSMCFlash *fl, AspeedSegments seg; =20 aspeed_smc_reg_to_segment(s->regs[R_SEG_ADDR0 + fl->id], &seg); - if ((addr & (seg.size - 1)) !=3D addr) { + if ((addr % seg.size) !=3D addr) { qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid address 0x%08x for CS%d segment : " "[ 0x%"HWADDR_PRIx" - 0x%"HWADDR_PRIx" ]\n", s->ctrl->name, addr, fl->id, seg.addr, seg.addr + seg.size); + addr %=3D seg.size; } =20 - addr &=3D seg.size - 1; return addr; } =20 --=20 2.7.4