From nobody Thu May 2 03:41:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486141764361847.8361555644759; Fri, 3 Feb 2017 09:09:24 -0800 (PST) Received: from localhost ([::1]:35946 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZhMQ-0005l2-8f for importer@patchew.org; Fri, 03 Feb 2017 12:09:22 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:60736) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZhKR-0004bA-NI for qemu-devel@nongnu.org; Fri, 03 Feb 2017 12:07:20 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cZhKQ-0002dl-Ny for qemu-devel@nongnu.org; Fri, 03 Feb 2017 12:07:19 -0500 Received: from greensocs.com ([193.104.36.180]:39021) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZhKQ-0002dV-CC for qemu-devel@nongnu.org; Fri, 03 Feb 2017 12:07:18 -0500 Received: from localhost (localhost [127.0.0.1]) by greensocs.com (Postfix) with ESMTP id AE7931913F5; Fri, 3 Feb 2017 18:07:17 +0100 (CET) Received: from greensocs.com ([127.0.0.1]) by localhost (gs-01.greensocs.com [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id Lv7PzbGZMvHK; Fri, 3 Feb 2017 18:07:17 +0100 (CET) Received: by greensocs.com (Postfix, from userid 998) id D726324CEC6; Fri, 3 Feb 2017 18:07:16 +0100 (CET) Received: from corsair.home (bd231-7-88-127-3-24.fbx.proxad.net [88.127.3.24]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) (Authenticated sender: fred.konrad@greensocs.com) by greensocs.com (Postfix) with ESMTPSA id 158D21913F5; Fri, 3 Feb 2017 18:07:16 +0100 (CET) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141637; bh=18PF8c3PyUfq+tNct/HXy+bj21rBg/co+AD+/XEM+rQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=CSR0IHxB2t8Awa6mhNSC3W9MUrX+swT8m8Rh44sP9s/LoXI60u7a2XWf6oVjUdo8I wMybMtoGVZBZCxt1vDt5llb/UTVJ8keCOPBbM+CqoZKNiKbWUCYwBD8AVXtrYKOz9w si0cBYn5OHZzQtBCPYD9Vm66XWm0zNP+0deQteUw= X-Virus-Scanned: amavisd-new at greensocs.com Authentication-Results: gs-01.greensocs.com (amavisd-new); dkim=pass (1024-bit key) header.d=greensocs.com header.b=JYj7d3wu; dkim=pass (1024-bit key) header.d=greensocs.com header.b=JYj7d3wu DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141636; bh=18PF8c3PyUfq+tNct/HXy+bj21rBg/co+AD+/XEM+rQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=JYj7d3wuUQvXj81tZMmxKCGE9Om7Q1Gw5RnUt16FbaJAgpOl9H1+t9vUBBjOI9ZTD J0Csoq625nrfTjj8L1393xPcj8Fv3G/44x+3macOysl0xnxChIW8glerlfHw++k8is RAwZS0tEAMI2EK2nLyMout7V7gzMxhJeDV1NUdJw= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141636; bh=18PF8c3PyUfq+tNct/HXy+bj21rBg/co+AD+/XEM+rQ=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=JYj7d3wuUQvXj81tZMmxKCGE9Om7Q1Gw5RnUt16FbaJAgpOl9H1+t9vUBBjOI9ZTD J0Csoq625nrfTjj8L1393xPcj8Fv3G/44x+3macOysl0xnxChIW8glerlfHw++k8is RAwZS0tEAMI2EK2nLyMout7V7gzMxhJeDV1NUdJw= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 18:06:33 +0100 Message-Id: <1486141597-13941-2-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> References: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC 1/5] cputlb: cleanup get_page_addr_code to use VICTIM_TLB_HIT X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic This replaces env1 and page_index variables by env and index so we can use VICTIM_TLB_HIT macro later. Signed-off-by: KONRAD Frederic --- cputlb.c | 18 +++++++++--------- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/cputlb.c b/cputlb.c index 6c39927..665caea 100644 --- a/cputlb.c +++ b/cputlb.c @@ -457,21 +457,21 @@ static void report_bad_exec(CPUState *cpu, target_ulo= ng addr) * is actually a ram_addr_t (in system mode; the user mode emulation * version of this function returns a guest virtual address). */ -tb_page_addr_t get_page_addr_code(CPUArchState *env1, target_ulong addr) +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) { - int mmu_idx, page_index, pd; + int mmu_idx, index, pd; void *p; MemoryRegion *mr; - CPUState *cpu =3D ENV_GET_CPU(env1); + CPUState *cpu =3D ENV_GET_CPU(env); CPUIOTLBEntry *iotlbentry; =20 - page_index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - mmu_idx =3D cpu_mmu_index(env1, true); - if (unlikely(env1->tlb_table[mmu_idx][page_index].addr_code !=3D + index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx =3D cpu_mmu_index(env, true); + if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=3D (addr & TARGET_PAGE_MASK))) { - cpu_ldub_code(env1, addr); + cpu_ldub_code(env, addr); } - iotlbentry =3D &env1->iotlb[mmu_idx][page_index]; + iotlbentry =3D &env->iotlb[mmu_idx][index]; pd =3D iotlbentry->addr & ~TARGET_PAGE_MASK; mr =3D iotlb_to_region(cpu, pd, iotlbentry->attrs); if (memory_region_is_unassigned(mr)) { @@ -484,7 +484,7 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env1, t= arget_ulong addr) exit(1); } } - p =3D (void *)((uintptr_t)addr + env1->tlb_table[mmu_idx][page_index].= addend); + p =3D (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend= ); return qemu_ram_addr_from_host_nofail(p); } =20 --=20 1.8.3.1 From nobody Thu May 2 03:41:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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dkim=pass (1024-bit key) header.d=greensocs.com header.b=p6OKv+md; dkim=pass (1024-bit key) header.d=greensocs.com header.b=p6OKv+md DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141638; bh=gyIhXgrpIztPCsO6V7u8crpVs4ubKq1AFGiLiyP0GSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=p6OKv+mdqFftHoN61VK0HVB7NZifCezmt34RMe+X+Job9pxjxRKfW7XXyf3qYpMx/ BDZTKMaCGVBuh72anJcYr8BnFO7Xr+v6VlPZqsmVLPg+uFN+D0NjBlZwNDxJGiwS3S 6TcUInWhhMftWA1mRhoe/plDjQvAIJXwFunoJrdU= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141638; bh=gyIhXgrpIztPCsO6V7u8crpVs4ubKq1AFGiLiyP0GSE=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=p6OKv+mdqFftHoN61VK0HVB7NZifCezmt34RMe+X+Job9pxjxRKfW7XXyf3qYpMx/ BDZTKMaCGVBuh72anJcYr8BnFO7Xr+v6VlPZqsmVLPg+uFN+D0NjBlZwNDxJGiwS3S 6TcUInWhhMftWA1mRhoe/plDjQvAIJXwFunoJrdU= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 18:06:34 +0100 Message-Id: <1486141597-13941-3-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> References: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC 2/5] cputlb: move get_page_addr_code X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic This just moves the code before VICTIM_TLB_HIT macro definition so we can use it. Signed-off-by: KONRAD Frederic --- cputlb.c | 72 ++++++++++++++++++++++++++++++++----------------------------= ---- 1 file changed, 36 insertions(+), 36 deletions(-) diff --git a/cputlb.c b/cputlb.c index 665caea..b3a5f47 100644 --- a/cputlb.c +++ b/cputlb.c @@ -452,42 +452,6 @@ static void report_bad_exec(CPUState *cpu, target_ulon= g addr) log_cpu_state_mask(LOG_GUEST_ERROR, cpu, CPU_DUMP_FPU | CPU_DUMP_CCOP); } =20 -/* NOTE: this function can trigger an exception */ -/* NOTE2: the returned address is not exactly the physical address: it - * is actually a ram_addr_t (in system mode; the user mode emulation - * version of this function returns a guest virtual address). - */ -tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) -{ - int mmu_idx, index, pd; - void *p; - MemoryRegion *mr; - CPUState *cpu =3D ENV_GET_CPU(env); - CPUIOTLBEntry *iotlbentry; - - index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); - mmu_idx =3D cpu_mmu_index(env, true); - if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=3D - (addr & TARGET_PAGE_MASK))) { - cpu_ldub_code(env, addr); - } - iotlbentry =3D &env->iotlb[mmu_idx][index]; - pd =3D iotlbentry->addr & ~TARGET_PAGE_MASK; - mr =3D iotlb_to_region(cpu, pd, iotlbentry->attrs); - if (memory_region_is_unassigned(mr)) { - CPUClass *cc =3D CPU_GET_CLASS(cpu); - - if (cc->do_unassigned_access) { - cc->do_unassigned_access(cpu, addr, false, true, 0, 4); - } else { - report_bad_exec(cpu, addr); - exit(1); - } - } - p =3D (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend= ); - return qemu_ram_addr_from_host_nofail(p); -} - static uint64_t io_readx(CPUArchState *env, CPUIOTLBEntry *iotlbentry, target_ulong addr, uintptr_t retaddr, int size) { @@ -554,6 +518,42 @@ static bool victim_tlb_hit(CPUArchState *env, size_t m= mu_idx, size_t index, victim_tlb_hit(env, mmu_idx, index, offsetof(CPUTLBEntry, TY), \ (ADDR) & TARGET_PAGE_MASK) =20 +/* NOTE: this function can trigger an exception */ +/* NOTE2: the returned address is not exactly the physical address: it + * is actually a ram_addr_t (in system mode; the user mode emulation + * version of this function returns a guest virtual address). + */ +tb_page_addr_t get_page_addr_code(CPUArchState *env, target_ulong addr) +{ + int mmu_idx, index, pd; + void *p; + MemoryRegion *mr; + CPUState *cpu =3D ENV_GET_CPU(env); + CPUIOTLBEntry *iotlbentry; + + index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); + mmu_idx =3D cpu_mmu_index(env, true); + if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=3D + (addr & TARGET_PAGE_MASK))) { + cpu_ldub_code(env, addr); + } + iotlbentry =3D &env->iotlb[mmu_idx][index]; + pd =3D iotlbentry->addr & ~TARGET_PAGE_MASK; + mr =3D iotlb_to_region(cpu, pd, iotlbentry->attrs); + if (memory_region_is_unassigned(mr)) { + CPUClass *cc =3D CPU_GET_CLASS(cpu); + + if (cc->do_unassigned_access) { + cc->do_unassigned_access(cpu, addr, false, true, 0, 4); + } else { + report_bad_exec(cpu, addr); + exit(1); + } + } + p =3D (void *)((uintptr_t)addr + env->tlb_table[mmu_idx][index].addend= ); + return qemu_ram_addr_from_host_nofail(p); +} + /* Probe for whether the specified guest write access is permitted. * If it is not permitted then an exception will be taken in the same * way as if this were a real write access (and we will not return). --=20 1.8.3.1 From nobody Thu May 2 03:41:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; 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dkim=pass (1024-bit key) header.d=greensocs.com header.b=G2lm0ozC; dkim=pass (1024-bit key) header.d=greensocs.com header.b=O9DT8Pmv DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141640; bh=vFs4pz0qoNSPRirMExI/nfF83RiQEDUvvMEt6Nfjry4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=G2lm0ozC/OLf7nHpkcgrlkf3vS6oGfmmzcWb87o63ekvxWpCSTQGhkLhEfBxYDIZa ZzF440l7TCLRFe4bnPwx1YqqbTEyDnAB23l34TRgzqJ0fJZXPbyhNCQL/HFh77n7oU On/FutyqFAdFhkxKNDOGqggUeen3SEK/sssM29cQ= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141639; bh=vFs4pz0qoNSPRirMExI/nfF83RiQEDUvvMEt6Nfjry4=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=O9DT8PmvMmkDfMvarBxZpurUehmfFI/LppDlJVlAAOlk1PT4nNpCrvuGvTPCHoJys aSPLTc4vwMtSAw7Yvnl4j/GbMEPOllNRz6SSm1R5MKbSj0G4dBL5z/CNnkb944w2LS pDILugcLDiQ7QiwHLtw++aXVppRSVJ3IJM5GtQsk= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 18:06:35 +0100 Message-Id: <1486141597-13941-4-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> References: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC 3/5] cputlb: fix the way get_page_addr_code fills the tlb X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic get_page_addr_code(..) does a cpu_ldub_code to fill the tlb: This can lead to some side effects if a device is mapped at this address. So this patch replaces the cpu_memory_ld by a tlb_fill. Signed-off-by: KONRAD Frederic --- cputlb.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/cputlb.c b/cputlb.c index b3a5f47..846341e 100644 --- a/cputlb.c +++ b/cputlb.c @@ -534,8 +534,10 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, t= arget_ulong addr) index =3D (addr >> TARGET_PAGE_BITS) & (CPU_TLB_SIZE - 1); mmu_idx =3D cpu_mmu_index(env, true); if (unlikely(env->tlb_table[mmu_idx][index].addr_code !=3D - (addr & TARGET_PAGE_MASK))) { - cpu_ldub_code(env, addr); + (addr & (TARGET_PAGE_MASK | TLB_INVALID_MASK)))) { + if (!VICTIM_TLB_HIT(addr_read, addr)) { + tlb_fill(ENV_GET_CPU(env), addr, MMU_INST_FETCH, mmu_idx, 0); + } } iotlbentry =3D &env->iotlb[mmu_idx][index]; pd =3D iotlbentry->addr & ~TARGET_PAGE_MASK; --=20 1.8.3.1 From nobody Thu May 2 03:41:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; 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dkim=pass (1024-bit key) header.d=greensocs.com header.b=Eawz2gkL; dkim=pass (1024-bit key) header.d=greensocs.com header.b=Eawz2gkL DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141641; bh=FdcjwPToYfxHdYzOk9jUuzLQxYMJ3/L7aasG6TU4keo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Eawz2gkLekWYzEmg7P9sCxnXn9g7sVpLCBmUBL7ungZMHuAUjZC+dpMxGEuXCncj0 YdmLjF1xzZPAcQSVjFB3zlt6Wc+VIjcWohP8gsy4en0hRlWy6O4xVILrAuwSNbwoBu /OQPm2dXDtkIlUnpoR2DlsM6MzvAko3rUlx+2MKg= DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141641; bh=FdcjwPToYfxHdYzOk9jUuzLQxYMJ3/L7aasG6TU4keo=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=Eawz2gkLekWYzEmg7P9sCxnXn9g7sVpLCBmUBL7ungZMHuAUjZC+dpMxGEuXCncj0 YdmLjF1xzZPAcQSVjFB3zlt6Wc+VIjcWohP8gsy4en0hRlWy6O4xVILrAuwSNbwoBu /OQPm2dXDtkIlUnpoR2DlsM6MzvAko3rUlx+2MKg= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 18:06:36 +0100 Message-Id: <1486141597-13941-5-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> References: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC 4/5] exec: allow to get a pointer for some mmio memory region X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic This introduces a special callback which allows to run code from some MMIO devices. SysBusDevice with a MemoryRegion which implements the request_ptr callback = will be notified when the guest try to execute code from their offset. Then it w= ill be able to eg: pre-load some code from an SPI device or ask a pointer from = an external simulator, etc.. When the pointer or the data in it are no longer valid the device has to invalidate it. Signed-off-by: KONRAD Frederic --- cputlb.c | 7 +++++++ include/exec/memory.h | 35 +++++++++++++++++++++++++++++++++++ memory.c | 45 +++++++++++++++++++++++++++++++++++++++++++++ 3 files changed, 87 insertions(+) diff --git a/cputlb.c b/cputlb.c index 846341e..9077247 100644 --- a/cputlb.c +++ b/cputlb.c @@ -545,6 +545,13 @@ tb_page_addr_t get_page_addr_code(CPUArchState *env, t= arget_ulong addr) if (memory_region_is_unassigned(mr)) { CPUClass *cc =3D CPU_GET_CLASS(cpu); =20 + if (memory_region_request_mmio_ptr(mr, addr)) { + /* A MemoryRegion is potentially added so re-run the + * get_page_addr_code. + */ + return get_page_addr_code(env, addr); + } + if (cc->do_unassigned_access) { cc->do_unassigned_access(cpu, addr, false, true, 0, 4); } else { diff --git a/include/exec/memory.h b/include/exec/memory.h index 987f925..36b0eec 100644 --- a/include/exec/memory.h +++ b/include/exec/memory.h @@ -120,6 +120,15 @@ struct MemoryRegionOps { uint64_t data, unsigned size, MemTxAttrs attrs); + /* Instruction execution pre-callback: + * @addr is the address of the access relative to the @mr. + * @size is the size of the area returned by the callback. + * @offset is the location of the pointer inside @mr. + * + * Returns a pointer to a location which contains guest code. + */ + void *(*request_ptr)(void *opaque, hwaddr addr, unsigned *size, + unsigned *offset); =20 enum device_endian endianness; /* Guest-visible constraints: */ @@ -1253,6 +1262,32 @@ void memory_global_dirty_log_stop(void); void mtree_info(fprintf_function mon_printf, void *f, bool flatview); =20 /** + * memory_region_request_mmio_ptr: request a pointer to an mmio + * MemoryRegion. If it is possible map a RAM MemoryRegion with this pointe= r. + * When the device wants to invalidate the pointer it will call + * memory_region_invalidate_mmio_ptr. + * + * @mr: #MemoryRegion to check + * @addr: address within that region + * + * Returns true on success, false otherwise. + */ +bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr); + +/** + * memory_region_invalidate_mmio_ptr: invalidate the pointer to an mmio + * previously requested. + * In the end that means that if something wants to execute from this area= it + * will need to request the pointer again. + * + * @mr: #MemoryRegion associated to the pointer. + * @addr: address within that region + * @size: size of that area. + */ +void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset, + unsigned size); + +/** * memory_region_dispatch_read: perform a read directly to the specified * MemoryRegion. * diff --git a/memory.c b/memory.c index 6c58373..eb3e8ec 100644 --- a/memory.c +++ b/memory.c @@ -2375,6 +2375,51 @@ void memory_listener_unregister(MemoryListener *list= ener) QTAILQ_REMOVE(&listener->address_space->listeners, listener, link_as); } =20 +bool memory_region_request_mmio_ptr(MemoryRegion *mr, hwaddr addr) +{ + void *host; + unsigned size =3D 0; + unsigned offset =3D 0; + MemoryRegion *sub; + + if (!mr || !mr->ops->request_ptr) { + return false; + } + + /* + * Avoid an update if the request_ptr call + * memory_region_invalidate_mmio_ptr which seems to be likely when we = use + * a cache. + */ + memory_region_transaction_begin(); + + host =3D mr->ops->request_ptr(mr->opaque, addr - mr->addr, &size, &off= set); + + if (!host || !size) { + memory_region_transaction_commit(); + return false; + } + + sub =3D g_new(MemoryRegion, 1); + memory_region_init_ram_ptr(sub, OBJECT(mr), "mmio-map", size, host); + memory_region_add_subregion(mr, offset, sub); + memory_region_transaction_commit(); + return true; +} + +void memory_region_invalidate_mmio_ptr(MemoryRegion *mr, hwaddr offset, + unsigned size) +{ + MemoryRegionSection section =3D memory_region_find(mr, offset, size); + + if (section.mr !=3D mr) { + memory_region_del_subregion(mr, section.mr); + /* memory_region_find add a ref on section.mr */ + memory_region_unref(section.mr); + object_unparent(OBJECT(section.mr)); + } +} + void address_space_init(AddressSpace *as, MemoryRegion *root, const char *= name) { memory_region_ref(root); --=20 1.8.3.1 From nobody Thu May 2 03:41:09 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1486142033454351.12376328445384; Fri, 3 Feb 2017 09:13:53 -0800 (PST) Received: from localhost ([::1]:35969 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cZhQk-0001Kg-Cm for importer@patchew.org; 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a=rsa-sha256; c=relaxed/simple; d=greensocs.com; s=mail; t=1486141642; bh=WWL0abNXIJMY+OeqbXzF5PHT2OOBAypIao+1S4u5zn0=; h=From:To:Cc:Subject:Date:In-Reply-To:References; b=yHKK+8OU56OaTS8imx59OCV8l3NdELldbLhoyLm/LxsIrmkhqNederqnM279HCT3N DfgI8DP2E0n+Z3ZbTOA3SZMMUzu/FU9Nbqwnfqvv4SKvUZerTKZ3/fxv9N014+0u++ 1FJtK0QIHIGKpRd3r6ttxNHhHzCv0e4MekwI0zN8= From: fred.konrad@greensocs.com To: qemu-devel@nongnu.org Date: Fri, 3 Feb 2017 18:06:37 +0100 Message-Id: <1486141597-13941-6-git-send-email-fred.konrad@greensocs.com> X-Mailer: git-send-email 1.8.3.1 In-Reply-To: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> References: <1486141597-13941-1-git-send-email-fred.konrad@greensocs.com> X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 193.104.36.180 Subject: [Qemu-devel] [RFC 5/5] xilinx_spips: allow mmio execution X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: edgar.iglesias@xilinx.com, peter.maydell@linaro.org, mark.burton@greensocs.com, alistair.francis@xilinx.com, clg@kaod.org, pbonzini@redhat.com, fred.konrad@greensocs.com Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Transfer-Encoding: quoted-printable MIME-Version: 1.0 Content-Type: text/plain; charset="utf-8" From: KONRAD Frederic This allows to execute from the lqspi area. When the request_ptr is called the device loads 1024bytes from the SPI devi= ce. Then this code can be executed by the guest. Signed-off-by: KONRAD Frederic --- hw/ssi/xilinx_spips.c | 74 ++++++++++++++++++++++++++++++++++++++---------= ---- 1 file changed, 55 insertions(+), 19 deletions(-) diff --git a/hw/ssi/xilinx_spips.c b/hw/ssi/xilinx_spips.c index da8adfa..e833028 100644 --- a/hw/ssi/xilinx_spips.c +++ b/hw/ssi/xilinx_spips.c @@ -496,6 +496,18 @@ static const MemoryRegionOps spips_ops =3D { .endianness =3D DEVICE_LITTLE_ENDIAN, }; =20 +static void xilinx_qspips_invalidate_mmio_ptr(XilinxQSPIPS *q) +{ + XilinxSPIPS *s =3D &q->parent_obj; + + if (q->lqspi_cached_addr !=3D ~0ULL) { + /* Invalidate the current mapped mmio */ + memory_region_invalidate_mmio_ptr(&s->mmlqspi, q->lqspi_cached_add= r, + LQSPI_CACHE_SIZE); + q->lqspi_cached_addr =3D ~0ULL; + } +} + static void xilinx_qspips_write(void *opaque, hwaddr addr, uint64_t value, unsigned size) { @@ -505,7 +517,7 @@ static void xilinx_qspips_write(void *opaque, hwaddr ad= dr, addr >>=3D 2; =20 if (addr =3D=3D R_LQSPI_CFG) { - q->lqspi_cached_addr =3D ~0ULL; + xilinx_qspips_invalidate_mmio_ptr(q); } } =20 @@ -517,27 +529,20 @@ static const MemoryRegionOps qspips_ops =3D { =20 #define LQSPI_CACHE_SIZE 1024 =20 -static uint64_t -lqspi_read(void *opaque, hwaddr addr, unsigned int size) +static void lqspi_load_cache(void *opaque, hwaddr addr) { - int i; XilinxQSPIPS *q =3D opaque; XilinxSPIPS *s =3D opaque; - uint32_t ret; - - if (addr >=3D q->lqspi_cached_addr && - addr <=3D q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) { - uint8_t *retp =3D &q->lqspi_buf[addr - q->lqspi_cached_addr]; - ret =3D cpu_to_le32(*(uint32_t *)retp); - DB_PRINT_L(1, "addr: %08x, data: %08x\n", (unsigned)addr, - (unsigned)ret); - return ret; - } else { - int flash_addr =3D (addr / num_effective_busses(s)); - int slave =3D flash_addr >> LQSPI_ADDRESS_BITS; - int cache_entry =3D 0; - uint32_t u_page_save =3D s->regs[R_LQSPI_STS] & ~LQSPI_CFG_U_PAGE; - + int i; + int flash_addr =3D ((addr & ~(LQSPI_CACHE_SIZE - 1)) + / num_effective_busses(s)); + int slave =3D flash_addr >> LQSPI_ADDRESS_BITS; + int cache_entry =3D 0; + uint32_t u_page_save =3D s->regs[R_LQSPI_STS] & ~LQSPI_CFG_U_PAGE; + + if (addr < q->lqspi_cached_addr || + addr > q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) { + xilinx_qspips_invalidate_mmio_ptr(q); s->regs[R_LQSPI_STS] &=3D ~LQSPI_CFG_U_PAGE; s->regs[R_LQSPI_STS] |=3D slave ? LQSPI_CFG_U_PAGE : 0; =20 @@ -589,12 +594,43 @@ lqspi_read(void *opaque, hwaddr addr, unsigned int si= ze) xilinx_spips_update_cs_lines(s); =20 q->lqspi_cached_addr =3D flash_addr * num_effective_busses(s); + } +} + +static void *lqspi_request_mmio_ptr(void *opaque, hwaddr addr, unsigned *s= ize, + unsigned *offset) +{ + XilinxQSPIPS *q =3D opaque; + hwaddr offset_within_the_region =3D addr & ~(LQSPI_CACHE_SIZE - 1); + + lqspi_load_cache(opaque, offset_within_the_region); + *size =3D LQSPI_CACHE_SIZE; + *offset =3D offset_within_the_region; + return q->lqspi_buf; +} + +static uint64_t +lqspi_read(void *opaque, hwaddr addr, unsigned int size) +{ + XilinxQSPIPS *q =3D opaque; + uint32_t ret; + + if (addr >=3D q->lqspi_cached_addr && + addr <=3D q->lqspi_cached_addr + LQSPI_CACHE_SIZE - 4) { + uint8_t *retp =3D &q->lqspi_buf[addr - q->lqspi_cached_addr]; + ret =3D cpu_to_le32(*(uint32_t *)retp); + DB_PRINT_L(1, "addr: %08x, data: %08x\n", (unsigned)addr, + (unsigned)ret); + return ret; + } else { + lqspi_load_cache(opaque, addr); return lqspi_read(opaque, addr, size); } } =20 static const MemoryRegionOps lqspi_ops =3D { .read =3D lqspi_read, + .request_ptr =3D lqspi_request_mmio_ptr, .endianness =3D DEVICE_NATIVE_ENDIAN, .valid =3D { .min_access_size =3D 1, --=20 1.8.3.1