From nobody Fri May 3 11:04:12 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) client-ip=208.118.235.17; envelope-from=qemu-devel-bounces+importer=patchew.org@nongnu.org; helo=lists.gnu.org; Authentication-Results: mx.zoho.com; spf=pass (zoho.com: domain of gnu.org designates 208.118.235.17 as permitted sender) smtp.mailfrom=qemu-devel-bounces+importer=patchew.org@nongnu.org; Return-Path: Received: from lists.gnu.org (lists.gnu.org [208.118.235.17]) by mx.zohomail.com with SMTPS id 1487366738843686.5966903873078; Fri, 17 Feb 2017 13:25:38 -0800 (PST) Received: from localhost ([::1]:56095 helo=lists.gnu.org) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1ceq25-00032r-IM for importer@patchew.org; Fri, 17 Feb 2017 16:25:37 -0500 Received: from eggs.gnu.org ([2001:4830:134:3::10]:51357) by lists.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cen7m-0001jg-9m for qemu-devel@nongnu.org; Fri, 17 Feb 2017 13:19:19 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1cen7j-0003sP-0Z for qemu-devel@nongnu.org; Fri, 17 Feb 2017 13:19:18 -0500 Received: from mail.ispras.ru ([83.149.199.45]:34884) by eggs.gnu.org with esmtp (Exim 4.71) (envelope-from ) id 1cen7U-0003bn-Du; Fri, 17 Feb 2017 13:19:05 -0500 Received: from [10.10.132.59] (pluton2.ispras.ru [83.149.199.44]) by mail.ispras.ru (Postfix) with ESMTPSA id 8B14A54006C; Fri, 17 Feb 2017 21:18:22 +0300 (MSK) From: Kurban Mallachiev To: qemu-devel@nongnu.org Message-ID: <076b0d94-738e-252c-1ed8-4640a864ac34@ispras.ru> Date: Fri, 17 Feb 2017 21:18:10 +0300 User-Agent: Mozilla/5.0 (X11; Linux x86_64; rv:45.0) Gecko/20100101 Thunderbird/45.7.1 MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 3.x [fuzzy] X-Received-From: 83.149.199.45 X-Mailman-Approved-At: Fri, 17 Feb 2017 16:15:52 -0500 Content-Transfer-Encoding: quoted-printable X-Content-Filtered-By: Mailman/MimeDel 2.1.21 Subject: [Qemu-devel] [PATCH] ARM i.MX timers: fix software reset X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: qemu-arm@nongnu.org, Peter Chubb Errors-To: qemu-devel-bounces+importer=patchew.org@nongnu.org Sender: "Qemu-devel" X-ZohoMail: RSF_0 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8"; format="flowed" Hello! i.MX6 RM says that setting software reset bit in CR register of GPT=20 (general purpose timers) should resets all of the registers of GPT to=20 their default reset values, except for the CLKSRC, EN, ENMOD, STOPEN,=20 WAITEN, and DBGEN bits in CR. But current implementation does the=20 opposite for CR register (it clears CLKSRC and friends bits and=20 preserves the others). Most importantly this leads to that software reset bit doesn't clears=20 automatically. I have a look at git history and found that software reset bit was being=20 cleared before 462566fc5e3 commit. I have doubts about the correct fixing of this problem. I don't really=20 understand the nature of the "/Soft reset doesn't touch some bits; hard=20 reset clears them/" comment in /imx_gpt_reset/ function, does it mean=20 that /imx_gpt_reset/ performs a hard reset or soft reset? I see two=20 possible fixings: 1. If /imx_gpt_reset/ purpose is to do a software reset of device, then=20 we should fix this function. My patch at the end of email fixes this=20 function. 2. If /imx_gpt_reset/ purpose is to do a hard reset of device? then=20 there should be another function to software reset of device. If so I=20 can create a new patch. --- From e12f689a2f41d18a29714771d83e343ca5195b61 Mon Sep 17 00:00:00 2001 From: Kurban Mallachiev Date: Fri, 17 Feb 2017 20:30:49 +0300 Subject: [PATCH] i.MX timers: fix software reset Software reset function clears CR bits that should not clear and preserves bits that should clear. Signed-off-by: Kurban Mallachiev --- hw/timer/imx_gpt.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/timer/imx_gpt.c b/hw/timer/imx_gpt.c index 010ccbf207..9777160f49 100644 --- a/hw/timer/imx_gpt.c +++ b/hw/timer/imx_gpt.c @@ -306,8 +306,8 @@ static void imx_gpt_reset(DeviceState *dev) /* * Soft reset doesn't touch some bits; hard reset clears them */ - s->cr &=3D ~(GPT_CR_EN|GPT_CR_ENMOD|GPT_CR_STOPEN|GPT_CR_DOZEN| - GPT_CR_WAITEN|GPT_CR_DBGEN); + s->cr &=3D GPT_CR_EN|GPT_CR_ENMOD|GPT_CR_STOPEN|GPT_CR_DOZEN| + GPT_CR_WAITEN|GPT_CR_DBGEN; s->sr =3D 0; s->pr =3D 0; s->ir =3D 0; --=20 2.11.1