Changeset
src/qemu/qemu_capabilities.c                       |   12 +-
tests/cputest.c                                    |    1 +
.../x86_64-cpuid-Core-i5-650-disabled.xml          |    5 +
.../x86_64-cpuid-Core-i5-650-enabled.xml           |    7 +
.../cputestdata/x86_64-cpuid-Core-i5-650-guest.xml |   24 +
.../cputestdata/x86_64-cpuid-Core-i5-650-host.xml  |   25 +
.../cputestdata/x86_64-cpuid-Core-i5-650-json.xml  |   12 +
tests/cputestdata/x86_64-cpuid-Core-i5-650.json    | 1068 ++++++++++++++++++++
tests/cputestdata/x86_64-cpuid-Core-i5-650.xml     |   30 +
9 files changed, 1181 insertions(+), 3 deletions(-)
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-disabled.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-enabled.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-guest.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-host.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-json.xml
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650.json
create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650.xml
Git apply log
Switched to a new branch '1523437052-875790-1-git-send-email-nshirokovskiy@virtuozzo.com'
Applying: cputest: New test for Intel Core i5-650
Applying: qemu: cpu: fix "full" CPU to include all "reported" CPU features
To https://github.com/patchew-project/libvirt
 + 9a98d64...3ec8323 patchew/1523437052-875790-1-git-send-email-nshirokovskiy@virtuozzo.com -> patchew/1523437052-875790-1-git-send-email-nshirokovskiy@virtuozzo.com (forced update)
Test passed: syntax-check

loading

[libvirt] [PATCH v2 0/2] qemu: cpu: fix "full" CPU to include all "reported" CPU features
Posted by Nikolay Shirokovskiy, 1 week ago
diff from v1:
- add test data for CPU for which issue was triggered

Patch 1 adds tests for CPU on which problem was detected. However we
don't test <cpu mode='host-model' check='partial'> case which have
issue.

Patch 2 is actual fix.

Nikolay Shirokovskiy (2):
  cputest: New test for Intel Core i5-650
  qemu: cpu: fix "full" CPU to include all "reported" CPU features

 src/qemu/qemu_capabilities.c                       |   12 +-
 tests/cputest.c                                    |    1 +
 .../x86_64-cpuid-Core-i5-650-disabled.xml          |    5 +
 .../x86_64-cpuid-Core-i5-650-enabled.xml           |    7 +
 .../cputestdata/x86_64-cpuid-Core-i5-650-guest.xml |   24 +
 .../cputestdata/x86_64-cpuid-Core-i5-650-host.xml  |   25 +
 .../cputestdata/x86_64-cpuid-Core-i5-650-json.xml  |   12 +
 tests/cputestdata/x86_64-cpuid-Core-i5-650.json    | 1068 ++++++++++++++++++++
 tests/cputestdata/x86_64-cpuid-Core-i5-650.xml     |   30 +
 9 files changed, 1181 insertions(+), 3 deletions(-)
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-disabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650.xml

-- 
1.8.3.1

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Re: [libvirt] [PATCH v2 0/2] qemu: cpu: fix "full" CPU to include all "reported" CPU features
Posted by Jiri Denemark, 1 day ago
On Wed, Apr 11, 2018 at 11:57:30 +0300, Nikolay Shirokovskiy wrote:
> diff from v1:
> - add test data for CPU for which issue was triggered
> 
> Patch 1 adds tests for CPU on which problem was detected. However we
> don't test <cpu mode='host-model' check='partial'> case which have
> issue.
> 
> Patch 2 is actual fix.
> 
> Nikolay Shirokovskiy (2):
>   cputest: New test for Intel Core i5-650
>   qemu: cpu: fix "full" CPU to include all "reported" CPU features

Oh I see. Thanks for the CPU data which helped me understand what
problem you are fixing. The patch is indeed correct, but I can't push it
since it is missing the Signed-off-by line. You can either resubmit the
patches with SoB line added or just reply with the SoB line here and
I'll update the patches before pushing.

Series

Reviewed-by: Jiri Denemark <jdenemar@redhat.com>

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Re: [libvirt] [PATCH v2 0/2] qemu: cpu: fix "full" CPU to include all "reported" CPU features
Posted by Nikolay Shirokovskiy, 1 day ago

On 18.04.2018 12:11, Jiri Denemark wrote:
> On Wed, Apr 11, 2018 at 11:57:30 +0300, Nikolay Shirokovskiy wrote:
>> diff from v1:
>> - add test data for CPU for which issue was triggered
>>
>> Patch 1 adds tests for CPU on which problem was detected. However we
>> don't test <cpu mode='host-model' check='partial'> case which have
>> issue.
>>
>> Patch 2 is actual fix.
>>
>> Nikolay Shirokovskiy (2):
>>   cputest: New test for Intel Core i5-650
>>   qemu: cpu: fix "full" CPU to include all "reported" CPU features
> 
> Oh I see. Thanks for the CPU data which helped me understand what
> problem you are fixing. The patch is indeed correct, but I can't push it
> since it is missing the Signed-off-by line. You can either resubmit the
> patches with SoB line added or just reply with the SoB line here and
> I'll update the patches before pushing.
> 
> Series
> 
> Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
> 

Ahhh, keep forgetting SoB.

Signed-off-by: Nikolay Shirokovskiy <nshirokovskiy@virtuozzo.com>

Thanx!

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Re: [libvirt] [PATCH v2 0/2] qemu: cpu: fix "full" CPU to include all "reported" CPU features
Posted by Jiri Denemark, 1 day ago
On Wed, Apr 18, 2018 at 12:14:35 +0300, Nikolay Shirokovskiy wrote:
> 
> 
> On 18.04.2018 12:11, Jiri Denemark wrote:
> > On Wed, Apr 11, 2018 at 11:57:30 +0300, Nikolay Shirokovskiy wrote:
> >> diff from v1:
> >> - add test data for CPU for which issue was triggered
> >>
> >> Patch 1 adds tests for CPU on which problem was detected. However we
> >> don't test <cpu mode='host-model' check='partial'> case which have
> >> issue.
> >>
> >> Patch 2 is actual fix.
> >>
> >> Nikolay Shirokovskiy (2):
> >>   cputest: New test for Intel Core i5-650
> >>   qemu: cpu: fix "full" CPU to include all "reported" CPU features
> > 
> > Oh I see. Thanks for the CPU data which helped me understand what
> > problem you are fixing. The patch is indeed correct, but I can't push it
> > since it is missing the Signed-off-by line. You can either resubmit the
> > patches with SoB line added or just reply with the SoB line here and
> > I'll update the patches before pushing.
> > 
> > Series
> > 
> > Reviewed-by: Jiri Denemark <jdenemar@redhat.com>
> > 
> 
> Ahhh, keep forgetting SoB.
> 
> Signed-off-by: Nikolay Shirokovskiy <nshirokovskiy@virtuozzo.com>

Thanks, I updated the patches and pushed them.

Jirka

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[libvirt] [PATCH v2 1/2] cputest: New test for Intel Core i5-650
Posted by Nikolay Shirokovskiy, 1 week ago
---
 tests/cputest.c                                    |    1 +
 .../x86_64-cpuid-Core-i5-650-disabled.xml          |    5 +
 .../x86_64-cpuid-Core-i5-650-enabled.xml           |    7 +
 .../cputestdata/x86_64-cpuid-Core-i5-650-guest.xml |   24 +
 .../cputestdata/x86_64-cpuid-Core-i5-650-host.xml  |   25 +
 .../cputestdata/x86_64-cpuid-Core-i5-650-json.xml  |   12 +
 tests/cputestdata/x86_64-cpuid-Core-i5-650.json    | 1068 ++++++++++++++++++++
 tests/cputestdata/x86_64-cpuid-Core-i5-650.xml     |   30 +
 8 files changed, 1172 insertions(+)
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-disabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-enabled.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-guest.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-host.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650-json.xml
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650.json
 create mode 100644 tests/cputestdata/x86_64-cpuid-Core-i5-650.xml

diff --git a/tests/cputest.c b/tests/cputest.c
index 1e79edb..e86cd0b 100644
--- a/tests/cputest.c
+++ b/tests/cputest.c
@@ -1161,6 +1161,7 @@ mymain(void)
     DO_TEST_CPUID(VIR_ARCH_X86_64, "A10-5800K", JSON_HOST);
     DO_TEST_CPUID(VIR_ARCH_X86_64, "Atom-D510", JSON_NONE);
     DO_TEST_CPUID(VIR_ARCH_X86_64, "Atom-N450", JSON_NONE);
+    DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i5-650", JSON_MODELS_REQUIRED);
     DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i5-2500", JSON_HOST);
     DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i5-2540M", JSON_MODELS);
     DO_TEST_CPUID(VIR_ARCH_X86_64, "Core-i5-4670T", JSON_HOST);
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650-disabled.xml b/tests/cputestdata/x86_64-cpuid-Core-i5-650-disabled.xml
new file mode 100644
index 0000000..0a2b481
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650-disabled.xml
@@ -0,0 +1,5 @@
+<!-- Features disabled by QEMU -->
+<cpudata arch='x86'>
+  <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x0000c1fc' edx='0xb0600000'/>
+  <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/>
+</cpudata>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650-enabled.xml b/tests/cputestdata/x86_64-cpuid-Core-i5-650-enabled.xml
new file mode 100644
index 0000000..d68f9ec
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650-enabled.xml
@@ -0,0 +1,7 @@
+<!-- Features enabled by QEMU -->
+<cpudata arch='x86'>
+  <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x83b82203' edx='0x0f8bfbff'/>
+  <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000004' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000002' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000001' edx='0x28100800'/>
+</cpudata>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650-guest.xml b/tests/cputestdata/x86_64-cpuid-Core-i5-650-guest.xml
new file mode 100644
index 0000000..1c0d44d
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650-guest.xml
@@ -0,0 +1,24 @@
+<cpu mode='custom' match='exact'>
+  <model fallback='forbid'>Westmere</model>
+  <vendor>Intel</vendor>
+  <feature policy='require' name='vme'/>
+  <feature policy='require' name='ds'/>
+  <feature policy='require' name='acpi'/>
+  <feature policy='require' name='ss'/>
+  <feature policy='require' name='ht'/>
+  <feature policy='require' name='tm'/>
+  <feature policy='require' name='pbe'/>
+  <feature policy='require' name='pclmuldq'/>
+  <feature policy='require' name='dtes64'/>
+  <feature policy='require' name='monitor'/>
+  <feature policy='require' name='ds_cpl'/>
+  <feature policy='require' name='vmx'/>
+  <feature policy='require' name='smx'/>
+  <feature policy='require' name='est'/>
+  <feature policy='require' name='tm2'/>
+  <feature policy='require' name='xtpr'/>
+  <feature policy='require' name='pdcm'/>
+  <feature policy='require' name='arat'/>
+  <feature policy='require' name='rdtscp'/>
+  <feature policy='require' name='invtsc'/>
+</cpu>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650-host.xml b/tests/cputestdata/x86_64-cpuid-Core-i5-650-host.xml
new file mode 100644
index 0000000..e7256d5
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650-host.xml
@@ -0,0 +1,25 @@
+<cpu>
+  <arch>x86_64</arch>
+  <model>Westmere</model>
+  <vendor>Intel</vendor>
+  <feature name='vme'/>
+  <feature name='ds'/>
+  <feature name='acpi'/>
+  <feature name='ss'/>
+  <feature name='ht'/>
+  <feature name='tm'/>
+  <feature name='pbe'/>
+  <feature name='pclmuldq'/>
+  <feature name='dtes64'/>
+  <feature name='monitor'/>
+  <feature name='ds_cpl'/>
+  <feature name='vmx'/>
+  <feature name='smx'/>
+  <feature name='est'/>
+  <feature name='tm2'/>
+  <feature name='xtpr'/>
+  <feature name='pdcm'/>
+  <feature name='arat'/>
+  <feature name='rdtscp'/>
+  <feature name='invtsc'/>
+</cpu>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650-json.xml b/tests/cputestdata/x86_64-cpuid-Core-i5-650-json.xml
new file mode 100644
index 0000000..f5980f5
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650-json.xml
@@ -0,0 +1,12 @@
+<cpu mode='custom' match='exact'>
+  <model fallback='forbid'>SandyBridge</model>
+  <vendor>Intel</vendor>
+  <feature policy='require' name='vme'/>
+  <feature policy='require' name='ss'/>
+  <feature policy='require' name='hypervisor'/>
+  <feature policy='require' name='arat'/>
+  <feature policy='require' name='tsc_adjust'/>
+  <feature policy='disable' name='xsave'/>
+  <feature policy='disable' name='avx'/>
+  <feature policy='disable' name='xsaveopt'/>
+</cpu>
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650.json b/tests/cputestdata/x86_64-cpuid-Core-i5-650.json
new file mode 100644
index 0000000..84b215a
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650.json
@@ -0,0 +1,1068 @@
+{
+  "return": {
+    "model": {
+      "name": "base",
+      "props": {
+        "pfthreshold": false,
+        "pku": false,
+        "rtm": false,
+        "tsc_adjust": true,
+        "tsc-deadline": true,
+        "xstore-en": false,
+        "cpuid-0xb": true,
+        "abm": false,
+        "sse": true,
+        "kvm-mmu": false,
+        "xsaveopt": false,
+        "hv-spinlocks": -1,
+        "tce": false,
+        "realized": false,
+        "kvm_steal_time": true,
+        "smep": false,
+        "fpu": true,
+        "xcrypt": false,
+        "sse4_2": true,
+        "clflush": true,
+        "sse4_1": true,
+        "flushbyasid": false,
+        "kvm-steal-time": true,
+        "lm": true,
+        "tsc": true,
+        "adx": false,
+        "fxsr": true,
+        "sha-ni": false,
+        "decodeassists": false,
+        "hv-relaxed": false,
+        "avx512bitalg": false,
+        "xgetbv1": false,
+        "xstore": false,
+        "vmcb_clean": false,
+        "tsc-adjust": true,
+        "vme": true,
+        "vendor": "GenuineIntel",
+        "arat": true,
+        "ffxsr": false,
+        "de": true,
+        "aes": true,
+        "pse": true,
+        "ds-cpl": false,
+        "fxsr_opt": false,
+        "tbm": false,
+        "ia64": false,
+        "phe-en": false,
+        "f16c": false,
+        "ds": false,
+        "mpx": false,
+        "vmware-cpuid-freq": true,
+        "avx512f": false,
+        "avx2": false,
+        "misalignsse": false,
+        "level": 11,
+        "pbe": false,
+        "cx16": true,
+        "ds_cpl": false,
+        "movbe": false,
+        "intel-pt": false,
+        "perfctr-nb": false,
+        "nrip_save": false,
+        "kvm_mmu": false,
+        "ospke": false,
+        "pmu": false,
+        "avx512ifma": false,
+        "stepping": 2,
+        "sep": true,
+        "sse4a": false,
+        "avx512dq": false,
+        "core-id": -1,
+        "pclmuldq": true,
+        "i64": true,
+        "avx512-4vnniw": false,
+        "xsave": false,
+        "hv-runtime": false,
+        "pmm": false,
+        "hle": false,
+        "nodeid_msr": false,
+        "hv-crash": false,
+        "est": false,
+        "x-hv-max-vps": -1,
+        "osxsave": false,
+        "xop": false,
+        "smx": false,
+        "tsc-scale": false,
+        "monitor": false,
+        "avx512er": false,
+        "apic": true,
+        "sse4.1": true,
+        "sse4.2": true,
+        "hv-vapic": false,
+        "pause-filter": false,
+        "lahf-lm": true,
+        "kvm-nopiodelay": true,
+        "cmp_legacy": false,
+        "acpi": false,
+        "fma4": false,
+        "mmx": true,
+        "svm_lock": false,
+        "pcommit": false,
+        "mtrr": true,
+        "clwb": false,
+        "dca": false,
+        "pdcm": false,
+        "xcrypt-en": false,
+        "3dnow": false,
+        "invtsc": false,
+        "tm2": false,
+        "hv-time": false,
+        "kvm-pv-tlb-flush": false,
+        "hypervisor": true,
+        "kvmclock-stable-bit": true,
+        "xlevel": 2147483656,
+        "lahf_lm": true,
+        "enforce": false,
+        "pcid": false,
+        "sse4-1": true,
+        "lbrv": false,
+        "avx512-vpopcntdq": false,
+        "avx512-4fmaps": false,
+        "fill-mtrr-mask": true,
+        "pause_filter": false,
+        "svm-lock": false,
+        "popcnt": true,
+        "nrip-save": false,
+        "avx512vl": false,
+        "x2apic": true,
+        "kvmclock": true,
+        "smap": false,
+        "pdpe1gb": false,
+        "family": 6,
+        "min-level": 11,
+        "xlevel2": 0,
+        "dtes64": false,
+        "xd": true,
+        "kvm_pv_eoi": true,
+        "ace2": false,
+        "kvm_pv_unhalt": true,
+        "xtpr": false,
+        "perfctr_nb": false,
+        "avx512bw": false,
+        "l3-cache": true,
+        "nx": true,
+        "lwp": false,
+        "msr": true,
+        "ibpb": false,
+        "syscall": true,
+        "tm": false,
+        "perfctr-core": false,
+        "memory": "/machine/unattached/system[0]",
+        "pge": true,
+        "pn": false,
+        "fma": false,
+        "nodeid-msr": false,
+        "xsavec": false,
+        "socket-id": -1,
+        "thread-id": -1,
+        "cx8": true,
+        "mce": true,
+        "avx512vbmi2": false,
+        "cr8legacy": false,
+        "mca": true,
+        "avx512pf": false,
+        "pni": true,
+        "hv-vendor-id": "",
+        "rdseed": false,
+        "osvw": false,
+        "fsgsbase": false,
+        "model-id": "Intel(R) Core(TM) i5 CPU         650  @ 3.20GHz",
+        "cmp-legacy": false,
+        "kvm-pv-unhalt": true,
+        "rdtscp": true,
+        "mmxext": false,
+        "host-phys-bits": false,
+        "cid": false,
+        "vmx": false,
+        "ssse3": true,
+        "gfni": false,
+        "vpclmulqdq": false,
+        "extapic": false,
+        "pse36": true,
+        "min-xlevel": 2147483656,
+        "ibs": false,
+        "la57": false,
+        "avx": false,
+        "kvm-no-smi-migration": false,
+        "tcg-cpuid": true,
+        "vaes": false,
+        "ace2-en": false,
+        "umip": false,
+        "invpcid": false,
+        "bmi1": false,
+        "bmi2": false,
+        "vmcb-clean": false,
+        "erms": false,
+        "cmov": true,
+        "kvm-hint-dedicated": true,
+        "check": true,
+        "perfctr_core": false,
+        "xsaves": false,
+        "clflushopt": false,
+        "pat": true,
+        "hv-synic": false,
+        "hv-stimer": false,
+        "sse4-2": true,
+        "3dnowprefetch": false,
+        "rdpid": false,
+        "full-cpuid-auto-level": true,
+        "pae": true,
+        "hv-reset": false,
+        "wdt": false,
+        "tsc_scale": false,
+        "hv-vpindex": false,
+        "skinit": false,
+        "fxsr-opt": false,
+        "kvm_nopiodelay": true,
+        "phys-bits": 0,
+        "avx512cd": false,
+        "kvm": true,
+        "pmm-en": false,
+        "phe": false,
+        "3dnowext": false,
+        "lmce": true,
+        "avx512vnni": false,
+        "ht": false,
+        "tsc-frequency": 0,
+        "kvm-pv-eoi": true,
+        "npt": false,
+        "apic-id": 4294967295,
+        "kvm_asyncpf": true,
+        "min-xlevel2": 0,
+        "pclmulqdq": true,
+        "svm": false,
+        "sse3": true,
+        "sse2": true,
+        "ss": true,
+        "topoext": false,
+        "rdrand": false,
+        "avx512vbmi": false,
+        "kvm-asyncpf": true,
+        "spec-ctrl": false,
+        "model": 37,
+        "node-id": -1
+      }
+    }
+  },
+  "id": "model-expansion"
+}
+
+
+{
+  "return": [
+    {
+      "typename": "max-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": false,
+      "static": false,
+      "name": "max"
+    },
+    {
+      "typename": "host-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": false,
+      "static": false,
+      "name": "host"
+    },
+    {
+      "typename": "base-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": true,
+      "name": "base"
+    },
+    {
+      "typename": "qemu64-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "qemu64"
+    },
+    {
+      "typename": "qemu32-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "qemu32"
+    },
+    {
+      "typename": "phenom-x86_64-cpu",
+      "unavailable-features": [
+        "mmxext",
+        "fxsr-opt",
+        "pdpe1gb",
+        "3dnowext",
+        "3dnow",
+        "abm",
+        "sse4a",
+        "npt"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "phenom"
+    },
+    {
+      "typename": "pentium3-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "pentium3"
+    },
+    {
+      "typename": "pentium2-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "pentium2"
+    },
+    {
+      "typename": "pentium-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "pentium"
+    },
+    {
+      "typename": "n270-x86_64-cpu",
+      "unavailable-features": [
+        "movbe"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "n270"
+    },
+    {
+      "typename": "kvm64-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "kvm64"
+    },
+    {
+      "typename": "kvm32-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "kvm32"
+    },
+    {
+      "typename": "coreduo-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "coreduo"
+    },
+    {
+      "typename": "core2duo-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "core2duo"
+    },
+    {
+      "typename": "athlon-x86_64-cpu",
+      "unavailable-features": [
+        "mmxext",
+        "3dnowext",
+        "3dnow"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "athlon"
+    },
+    {
+      "typename": "Westmere-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "Westmere"
+    },
+    {
+      "typename": "Westmere-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "spec-ctrl"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Westmere-IBRS"
+    },
+    {
+      "typename": "Skylake-Server-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "mpx",
+        "avx512f",
+        "avx512dq",
+        "rdseed",
+        "adx",
+        "smap",
+        "clflushopt",
+        "clwb",
+        "avx512cd",
+        "avx512bw",
+        "avx512vl",
+        "pdpe1gb",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsavec",
+        "xgetbv1",
+        "xsave",
+        "xsave",
+        "avx",
+        "mpx",
+        "mpx",
+        "avx512f",
+        "avx512f",
+        "avx512f"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Skylake-Server"
+    },
+    {
+      "typename": "Skylake-Server-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "mpx",
+        "avx512f",
+        "avx512dq",
+        "rdseed",
+        "adx",
+        "smap",
+        "clwb",
+        "avx512cd",
+        "avx512bw",
+        "avx512vl",
+        "spec-ctrl",
+        "pdpe1gb",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsavec",
+        "xgetbv1",
+        "xsave",
+        "xsave",
+        "avx",
+        "mpx",
+        "mpx",
+        "avx512f",
+        "avx512f",
+        "avx512f"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Skylake-Server-IBRS"
+    },
+    {
+      "typename": "Skylake-Client-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "mpx",
+        "rdseed",
+        "adx",
+        "smap",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsavec",
+        "xgetbv1",
+        "xsave",
+        "xsave",
+        "avx",
+        "mpx",
+        "mpx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Skylake-Client"
+    },
+    {
+      "typename": "Skylake-Client-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "mpx",
+        "rdseed",
+        "adx",
+        "smap",
+        "spec-ctrl",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsavec",
+        "xgetbv1",
+        "xsave",
+        "xsave",
+        "avx",
+        "mpx",
+        "mpx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Skylake-Client-IBRS"
+    },
+    {
+      "typename": "SandyBridge-x86_64-cpu",
+      "unavailable-features": [
+        "xsave",
+        "avx",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "SandyBridge"
+    },
+    {
+      "typename": "SandyBridge-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "xsave",
+        "avx",
+        "spec-ctrl",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "SandyBridge-IBRS"
+    },
+    {
+      "typename": "Penryn-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "Penryn"
+    },
+    {
+      "typename": "Opteron_G5-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "xsave",
+        "avx",
+        "f16c",
+        "pdpe1gb",
+        "abm",
+        "sse4a",
+        "misalignsse",
+        "3dnowprefetch",
+        "xop",
+        "fma4",
+        "tbm",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Opteron_G5"
+    },
+    {
+      "typename": "Opteron_G4-x86_64-cpu",
+      "unavailable-features": [
+        "xsave",
+        "avx",
+        "pdpe1gb",
+        "abm",
+        "sse4a",
+        "misalignsse",
+        "3dnowprefetch",
+        "xop",
+        "fma4",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Opteron_G4"
+    },
+    {
+      "typename": "Opteron_G3-x86_64-cpu",
+      "unavailable-features": [
+        "abm",
+        "sse4a",
+        "misalignsse"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Opteron_G3"
+    },
+    {
+      "typename": "Opteron_G2-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "Opteron_G2"
+    },
+    {
+      "typename": "Opteron_G1-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "Opteron_G1"
+    },
+    {
+      "typename": "Nehalem-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "Nehalem"
+    },
+    {
+      "typename": "Nehalem-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "spec-ctrl"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Nehalem-IBRS"
+    },
+    {
+      "typename": "IvyBridge-x86_64-cpu",
+      "unavailable-features": [
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "smep",
+        "erms",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "IvyBridge"
+    },
+    {
+      "typename": "IvyBridge-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "smep",
+        "erms",
+        "spec-ctrl",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "IvyBridge-IBRS"
+    },
+    {
+      "typename": "Haswell-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "abm",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Haswell"
+    },
+    {
+      "typename": "Haswell-noTSX-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "abm",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Haswell-noTSX"
+    },
+    {
+      "typename": "Haswell-noTSX-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "spec-ctrl",
+        "abm",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Haswell-noTSX-IBRS"
+    },
+    {
+      "typename": "Haswell-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "spec-ctrl",
+        "abm",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Haswell-IBRS"
+    },
+    {
+      "typename": "EPYC-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "avx2",
+        "smep",
+        "bmi2",
+        "rdseed",
+        "adx",
+        "smap",
+        "clflushopt",
+        "sha-ni",
+        "mmxext",
+        "fxsr-opt",
+        "pdpe1gb",
+        "cr8legacy",
+        "abm",
+        "sse4a",
+        "misalignsse",
+        "3dnowprefetch",
+        "osvw",
+        "xsaveopt",
+        "xsavec",
+        "xgetbv1",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "EPYC"
+    },
+    {
+      "typename": "EPYC-IBPB-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "avx2",
+        "smep",
+        "bmi2",
+        "rdseed",
+        "adx",
+        "smap",
+        "clflushopt",
+        "sha-ni",
+        "mmxext",
+        "fxsr-opt",
+        "pdpe1gb",
+        "cr8legacy",
+        "abm",
+        "sse4a",
+        "misalignsse",
+        "3dnowprefetch",
+        "osvw",
+        "ibpb",
+        "xsaveopt",
+        "xsavec",
+        "xgetbv1",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "EPYC-IBPB"
+    },
+    {
+      "typename": "Conroe-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "Conroe"
+    },
+    {
+      "typename": "Broadwell-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "rdseed",
+        "adx",
+        "smap",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Broadwell"
+    },
+    {
+      "typename": "Broadwell-noTSX-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rdseed",
+        "adx",
+        "smap",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Broadwell-noTSX"
+    },
+    {
+      "typename": "Broadwell-noTSX-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rdseed",
+        "adx",
+        "smap",
+        "spec-ctrl",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Broadwell-noTSX-IBRS"
+    },
+    {
+      "typename": "Broadwell-IBRS-x86_64-cpu",
+      "unavailable-features": [
+        "fma",
+        "pcid",
+        "movbe",
+        "xsave",
+        "avx",
+        "f16c",
+        "rdrand",
+        "fsgsbase",
+        "bmi1",
+        "hle",
+        "avx2",
+        "smep",
+        "bmi2",
+        "erms",
+        "invpcid",
+        "rtm",
+        "rdseed",
+        "adx",
+        "smap",
+        "spec-ctrl",
+        "abm",
+        "3dnowprefetch",
+        "xsaveopt",
+        "xsave",
+        "xsave",
+        "avx"
+      ],
+      "migration-safe": true,
+      "static": false,
+      "name": "Broadwell-IBRS"
+    },
+    {
+      "typename": "486-x86_64-cpu",
+      "unavailable-features": [],
+      "migration-safe": true,
+      "static": false,
+      "name": "486"
+    }
+  ],
+  "id": "definitions"
+}
diff --git a/tests/cputestdata/x86_64-cpuid-Core-i5-650.xml b/tests/cputestdata/x86_64-cpuid-Core-i5-650.xml
new file mode 100644
index 0000000..e29df94
--- /dev/null
+++ b/tests/cputestdata/x86_64-cpuid-Core-i5-650.xml
@@ -0,0 +1,30 @@
+<!-- Intel(R) Core(TM) i5 CPU         650  @ 3.20GHz -->
+<cpudata arch='x86'>
+  <cpuid eax_in='0x00000000' ecx_in='0x00' eax='0x0000000b' ebx='0x756e6547' ecx='0x6c65746e' edx='0x49656e69'/>
+  <cpuid eax_in='0x00000001' ecx_in='0x00' eax='0x00020652' ebx='0x01100800' ecx='0x0298e3ff' edx='0xbfebfbff'/>
+  <cpuid eax_in='0x00000002' ecx_in='0x00' eax='0x55035a01' ebx='0x00f0b2e3' ecx='0x00000000' edx='0x09ca212c'/>
+  <cpuid eax_in='0x00000003' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x00000004' ecx_in='0x00' eax='0x1c004121' ebx='0x01c0003f' ecx='0x0000003f' edx='0x00000000'/>
+  <cpuid eax_in='0x00000004' ecx_in='0x01' eax='0x1c004122' ebx='0x00c0003f' ecx='0x0000007f' edx='0x00000000'/>
+  <cpuid eax_in='0x00000004' ecx_in='0x02' eax='0x1c004143' ebx='0x01c0003f' ecx='0x000001ff' edx='0x00000000'/>
+  <cpuid eax_in='0x00000004' ecx_in='0x03' eax='0x1c03c163' ebx='0x03c0003f' ecx='0x00000fff' edx='0x00000002'/>
+  <cpuid eax_in='0x00000005' ecx_in='0x00' eax='0x00000040' ebx='0x00000040' ecx='0x00000003' edx='0x00001120'/>
+  <cpuid eax_in='0x00000006' ecx_in='0x00' eax='0x00000007' ebx='0x00000002' ecx='0x00000001' edx='0x00000000'/>
+  <cpuid eax_in='0x00000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x00000008' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x00000009' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x0000000a' ecx_in='0x00' eax='0x07300403' ebx='0x00000004' ecx='0x00000000' edx='0x00000603'/>
+  <cpuid eax_in='0x0000000b' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000001'/>
+  <cpuid eax_in='0x0000000b' ecx_in='0x01' eax='0x00000004' ebx='0x00000004' ecx='0x00000201' edx='0x00000001'/>
+  <cpuid eax_in='0x80000000' ecx_in='0x00' eax='0x80000008' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x80000001' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000001' edx='0x28100800'/>
+  <cpuid eax_in='0x80000002' ecx_in='0x00' eax='0x65746e49' ebx='0x2952286c' ecx='0x726f4320' edx='0x4d542865'/>
+  <cpuid eax_in='0x80000003' ecx_in='0x00' eax='0x35692029' ebx='0x55504320' ecx='0x20202020' edx='0x20202020'/>
+  <cpuid eax_in='0x80000004' ecx_in='0x00' eax='0x30353620' ebx='0x20402020' ecx='0x30322e33' edx='0x007a4847'/>
+  <cpuid eax_in='0x80000005' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x80000006' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x01006040' edx='0x00000000'/>
+  <cpuid eax_in='0x80000007' ecx_in='0x00' eax='0x00000000' ebx='0x00000000' ecx='0x00000000' edx='0x00000100'/>
+  <cpuid eax_in='0x80000008' ecx_in='0x00' eax='0x00003024' ebx='0x00000000' ecx='0x00000000' edx='0x00000000'/>
+  <cpuid eax_in='0x80860000' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000001'/>
+  <cpuid eax_in='0xc0000000' ecx_in='0x00' eax='0x00000001' ebx='0x00000002' ecx='0x00000100' edx='0x00000001'/>
+</cpudata>
-- 
1.8.3.1

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[libvirt] [PATCH v2 2/2] qemu: cpu: fix "full" CPU to include all "reported" CPU features
Posted by Nikolay Shirokovskiy, 1 week ago
On Core i5 650 x86_64 kvm guest fail to start with error [1] for next cpu config:

  <cpu mode='host-model' check='partial'>
    <model fallback='allow'/>
    <feature policy='require' name='x2apic'/>
  </cpu>

The problem is in full CPU calculation in virQEMUCapsInitHostCPUModel.
It is supposed to include features emulated by qemu and missed on host. Some of
such features may be not included however.

For Core i5 650  host CPU is detected as Westmere and reported CPU as
SandyBridge. x2apic is missed on host and provided by installed qemu. The
feature is not mentioned in reported CPU features explicitly because SandyBridge
model include it. As a result full CPU does not include x2apic too.

Solution is to expand guest cpu features before updating fullCPU features.

[1] error: the CPU is incompatible with host CPU: \
       Host CPU does not provide required features: x2apic
---
 src/qemu/qemu_capabilities.c | 12 +++++++++---
 1 file changed, 9 insertions(+), 3 deletions(-)

diff --git a/src/qemu/qemu_capabilities.c b/src/qemu/qemu_capabilities.c
index 35905e9..04f0f60 100644
--- a/src/qemu/qemu_capabilities.c
+++ b/src/qemu/qemu_capabilities.c
@@ -3494,6 +3494,7 @@ virQEMUCapsInitHostCPUModel(virQEMUCapsPtr qemuCaps,
                             virDomainVirtType type)
 {
     virCPUDefPtr cpu = NULL;
+    virCPUDefPtr cpuExpanded = NULL;
     virCPUDefPtr migCPU = NULL;
     virCPUDefPtr hostCPU = NULL;
     virCPUDefPtr fullCPU = NULL;
@@ -3528,9 +3529,13 @@ virQEMUCapsInitHostCPUModel(virQEMUCapsPtr qemuCaps,
                                       NULL, NULL)))
             goto error;
 
-        for (i = 0; i < cpu->nfeatures; i++) {
-            if (cpu->features[i].policy == VIR_CPU_FEATURE_REQUIRE &&
-                virCPUDefUpdateFeature(fullCPU, cpu->features[i].name,
+        if (!(cpuExpanded = virCPUDefCopy(cpu)) ||
+            virCPUExpandFeatures(qemuCaps->arch, cpuExpanded) < 0)
+            goto error;
+
+        for (i = 0; i < cpuExpanded->nfeatures; i++) {
+            if (cpuExpanded->features[i].policy == VIR_CPU_FEATURE_REQUIRE &&
+                virCPUDefUpdateFeature(fullCPU, cpuExpanded->features[i].name,
                                        VIR_CPU_FEATURE_REQUIRE) < 0)
                 goto error;
         }
@@ -3552,6 +3557,7 @@ virQEMUCapsInitHostCPUModel(virQEMUCapsPtr qemuCaps,
     virQEMUCapsSetHostModel(qemuCaps, type, cpu, migCPU, fullCPU);
 
  cleanup:
+    virCPUDefFree(cpuExpanded);
     virCPUDefFree(hostCPU);
     return;
 
-- 
1.8.3.1

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