src/conf/capabilities.c | 110 +++++++++++++++++++++++ src/conf/capabilities.h | 13 ++- tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml | 2 + tests/vircaps2xmltest.c | 9 ++ 4 files changed, 132 insertions(+), 2 deletions(-)
This patch is based on Martin's cache branch.
This patch amends the cache bank capability as follow:
<cache>
<bank id='0' level='3' type='unified' size='15360' unit='KiB' cpus='0-5'/>
<control min='768' unit='KiB' type='unified' nallocations='4'/>
<bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11'/>
<control min='768' unit='KiB' type='unified' nallocations='4'/>
</cache>
Along with vircaps2xmltest case updated.
Signed-off-by: Eli Qiao <liyong.qiao@intel.com>
---
src/conf/capabilities.c | 110 +++++++++++++++++++++++
src/conf/capabilities.h | 13 ++-
tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml | 2 +
tests/vircaps2xmltest.c | 9 ++
4 files changed, 132 insertions(+), 2 deletions(-)
diff --git a/src/conf/capabilities.c b/src/conf/capabilities.c
index 416dd1a..3ea518e 100644
--- a/src/conf/capabilities.c
+++ b/src/conf/capabilities.c
@@ -52,6 +52,7 @@
#define VIR_FROM_THIS VIR_FROM_CAPABILITIES
#define SYSFS_SYSTEM_PATH "/sys/devices/system/"
+#define SYSFS_RESCTRL_PATH "/sys/fs/resctrl/"
VIR_LOG_INIT("conf.capabilities")
@@ -873,6 +874,7 @@ virCapabilitiesFormatCaches(virBufferPtr buf,
virCapsHostCacheBankPtr *caches)
{
size_t i = 0;
+ size_t j = 0;
if (!ncaches)
return 0;
@@ -900,6 +902,18 @@ virCapabilitiesFormatCaches(virBufferPtr buf,
bank->size >> (kilos * 10),
kilos ? "KiB" : "B",
cpus_str);
+ virBufferAdjustIndent(buf, 2);
+ for (j = 0; j < bank->ncontrol; j++) {
+ bool min_kilos = !(bank->controls[j]->min % 1024);
+ virBufferAsprintf(buf,
+ "<control min='%llu' unit='%s' "
+ "type='%s' nallocations='%u'/>\n",
+ bank->controls[j]->min >> (min_kilos * 10),
+ min_kilos ? "KiB" : "B",
+ virCacheTypeToString(bank->controls[j]->type),
+ bank->controls[j]->nallocations);
+ }
+ virBufferAdjustIndent(buf, -2);
VIR_FREE(cpus_str);
}
@@ -1513,13 +1527,97 @@ virCapsHostCacheBankEquals(virCapsHostCacheBankPtr a,
void
virCapsHostCacheBankFree(virCapsHostCacheBankPtr ptr)
{
+ size_t i;
+
if (!ptr)
return;
virBitmapFree(ptr->cpus);
+ for (i = 0; i < ptr->ncontrol; i++)
+ VIR_FREE(ptr->controls[i]);
+ VIR_FREE(ptr->controls);
VIR_FREE(ptr);
}
+/* test which kinds of cache control supported
+ * -1: don't support
+ * 0: cat
+ * 1: cdp
+ */
+static int
+virCapabilitiesGetCacheControlType(virCapsHostCacheBankPtr bank)
+{
+ int ret = -1;
+ char *path = NULL;
+ if (virAsprintf(&path, SYSFS_RESCTRL_PATH "info/L%u", bank->level) < 0)
+ return -1;
+
+ if (virFileExists(path)) {
+ ret = 0;
+ } else {
+ VIR_FREE(path);
+ if (virAsprintf(&path, SYSFS_RESCTRL_PATH "info/L%uCODE", bank->level) < 0)
+ return -1;
+ if (virFileExists(path))
+ ret = 1;
+ }
+
+ VIR_FREE(path);
+ return ret;
+}
+
+static int
+virCapabilitiesGetCacheControl(virCapsHostCacheBankPtr bank, const char* type)
+{
+ int ret = -1;
+ char *path = NULL;
+ char *cbm_mask = NULL;
+ virCapsHostCacheControlPtr control;
+
+ if (VIR_ALLOC(control) < 0)
+ goto cleanup;
+
+ if (virFileReadValueUint(&control->nallocations,
+ SYSFS_RESCTRL_PATH "info/L%u%s/num_closids",
+ bank->level,
+ type) < 0)
+ goto cleanup;
+
+ if (virFileReadValueString(&cbm_mask,
+ SYSFS_RESCTRL_PATH
+ "info/L%u%s/cbm_mask",
+ bank->level,
+ type) < 0)
+ goto cleanup;
+
+ virStringTrimOptionalNewline(cbm_mask);
+
+ control->min = bank->size / (strlen(cbm_mask) * 4);
+
+ if (STREQ("", type))
+ control->type = VIR_CACHE_TYPE_UNIFIED;
+ else if (STREQ("CODE", type))
+ control->type = VIR_CACHE_TYPE_INSTRUCTION;
+ else if (STREQ("DATA", type))
+ control->type = VIR_CACHE_TYPE_DATA;
+ else
+ goto cleanup;
+
+ if (VIR_APPEND_ELEMENT(bank->controls,
+ bank->ncontrol,
+ control) < 0)
+ goto error;
+
+ ret = 0;
+
+ cleanup:
+ VIR_FREE(path);
+ return ret;
+ error:
+ VIR_FREE(control);
+ return -1;
+}
+
int
virCapabilitiesInitCaches(virCapsPtr caps)
{
@@ -1601,6 +1699,17 @@ virCapabilitiesInitCaches(virCapsPtr caps)
continue;
}
+ ret = virCapabilitiesGetCacheControlType(bank);
+
+ if (ret == 0) {
+ if (virCapabilitiesGetCacheControl(bank, "") < 0)
+ goto cleanup;
+ } else if (ret == 1) {
+ if ((virCapabilitiesGetCacheControl(bank, "CODE") < 0) ||
+ (virCapabilitiesGetCacheControl(bank, "DATA") < 0))
+ goto cleanup;
+ }
+
for (tmp_c = type; *tmp_c != '\0'; tmp_c++)
*tmp_c = c_tolower(*tmp_c);
@@ -1617,6 +1726,7 @@ virCapabilitiesInitCaches(virCapsPtr caps)
if (virCapsHostCacheBankEquals(bank, caps->host.caches[i]))
break;
}
+
if (i == caps->host.ncaches) {
if (VIR_APPEND_ELEMENT(caps->host.caches,
caps->host.ncaches,
diff --git a/src/conf/capabilities.h b/src/conf/capabilities.h
index e099ccc..1007c30 100644
--- a/src/conf/capabilities.h
+++ b/src/conf/capabilities.h
@@ -139,15 +139,22 @@ struct _virCapsHostSecModel {
};
typedef enum {
- VIR_CACHE_TYPE_DATA,
- VIR_CACHE_TYPE_INSTRUCTION,
VIR_CACHE_TYPE_UNIFIED,
+ VIR_CACHE_TYPE_INSTRUCTION,
+ VIR_CACHE_TYPE_DATA,
VIR_CACHE_TYPE_LAST
} virCacheType;
VIR_ENUM_DECL(virCache);
+typedef struct _virCapsHostCacheControl virCapsHostCacheControl;
+typedef virCapsHostCacheControl *virCapsHostCacheControlPtr;
+struct _virCapsHostCacheControl {
+ unsigned long long min; /* B */
+ virCacheType type; /* Data, Instruction or Unified */
+ unsigned int nallocations; /* number of supported allocation */
+};
typedef struct _virCapsHostCacheBank virCapsHostCacheBank;
typedef virCapsHostCacheBank *virCapsHostCacheBankPtr;
struct _virCapsHostCacheBank {
@@ -156,6 +163,8 @@ struct _virCapsHostCacheBank {
unsigned long long size; /* B */
virCacheType type; /* Data, Instruction or Unified */
virBitmapPtr cpus; /* All CPUs that share this bank */
+ size_t ncontrol;
+ virCapsHostCacheControlPtr *controls;
};
typedef struct _virCapsHost virCapsHost;
diff --git a/tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml b/tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml
index c30ea87..e9d7805 100644
--- a/tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml
+++ b/tests/vircaps2xmldata/vircaps-x86_64-resctrl.xml
@@ -42,7 +42,9 @@
</topology>
<cache>
<bank id='0' level='3' type='unified' size='15360' unit='KiB' cpus='0-5'/>
+ <control min='768' unit='KiB' type='unified' nallocations='4'/>
<bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11'/>
+ <control min='768' unit='KiB' type='unified' nallocations='4'/>
</cache>
</host>
diff --git a/tests/vircaps2xmltest.c b/tests/vircaps2xmltest.c
index f590249..f8dbda2 100644
--- a/tests/vircaps2xmltest.c
+++ b/tests/vircaps2xmltest.c
@@ -47,6 +47,7 @@ test_virCapabilities(const void *opaque)
char *capsXML = NULL;
char *path = NULL;
char *dir = NULL;
+ char *resctrl_dir = NULL;
int ret = -1;
/*
@@ -58,6 +59,13 @@ test_virCapabilities(const void *opaque)
data->resctrl ? "/system" : "") < 0)
goto cleanup;
+ if (data->resctrl) {
+ if (virAsprintf(&resctrl_dir, "%s/vircaps2xmldata/linux-%s/resctrl",
+ abs_srcdir, data->filename) < 0)
+ goto cleanup;
+ virFileMockAddPrefix("/sys/fs/resctrl", resctrl_dir);
+ }
+
virFileMockAddPrefix("/sys/devices/system", dir);
caps = virCapabilitiesNew(data->arch, data->offlineMigrate, data->liveMigrate);
@@ -84,6 +92,7 @@ test_virCapabilities(const void *opaque)
cleanup:
VIR_FREE(dir);
+ VIR_FREE(resctrl_dir);
VIR_FREE(path);
VIR_FREE(capsXML);
virObjectUnref(caps);
--
1.9.1
--
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On Thu, Apr 06, 2017 at 07:32:59PM +0800, Eli Qiao wrote: > This patch is based on Martin's cache branch. > > This patch amends the cache bank capability as follow: > > <cache> > <bank id='0' level='3' type='unified' size='15360' unit='KiB' cpus='0-5'/> > <control min='768' unit='KiB' type='unified' nallocations='4'/> > <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11'/> > <control min='768' unit='KiB' type='unified' nallocations='4'/> > </cache> This is still wrong per my previous comments. Regards, Daniel -- |: http://berrange.com -o- http://www.flickr.com/photos/dberrange/ :| |: http://libvirt.org -o- http://virt-manager.org :| |: http://entangle-photo.org -o- http://search.cpan.org/~danberr/ :| -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list
On Thursday, 6 April 2017 at 7:56 PM, Daniel P. Berrange wrote: > On Thu, Apr 06, 2017 at 07:32:59PM +0800, Eli Qiao wrote: > > This patch is based on Martin's cache branch. > > > > This patch amends the cache bank capability as follow: > > > > <cache> > > <bank id='0' level='3' type='unified' size='15360' unit='KiB' cpus='0-5'/> > > <control min='768' unit='KiB' type='unified' nallocations='4'/> > > <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11'/> > > <control min='768' unit='KiB' type='unified' nallocations='4'/> > > </cache> > > > > > This is still wrong per my previous comments. > > I will repost V3 to change it as your comments. one question, if there’s no `control`, what’s the bank should be like? <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11’/> or <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11’> </bank> Thanks, -Eli. > > Regards, > Daniel > -- > |: http://berrange.com -o- http://www.flickr.com/photos/dberrange/ :| > |: http://libvirt.org -o- http://virt-manager.org :| > |: http://entangle-photo.org -o- http://search.cpan.org/~danberr/ :| > > -- > libvir-list mailing list > libvir-list@redhat.com (mailto:libvir-list@redhat.com) > https://www.redhat.com/mailman/listinfo/libvir-list > > -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list
On Thu, Apr 06, 2017 at 08:09:35PM +0800, Eli Qiao wrote: > > > On Thursday, 6 April 2017 at 7:56 PM, Daniel P. Berrange wrote: > > > On Thu, Apr 06, 2017 at 07:32:59PM +0800, Eli Qiao wrote: > > > This patch is based on Martin's cache branch. > > > > > > This patch amends the cache bank capability as follow: > > > > > > <cache> > > > <bank id='0' level='3' type='unified' size='15360' unit='KiB' cpus='0-5'/> > > > <control min='768' unit='KiB' type='unified' nallocations='4'/> > > > <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11'/> > > > <control min='768' unit='KiB' type='unified' nallocations='4'/> > > > </cache> > > > > > > > > > This is still wrong per my previous comments. > > > > > I will repost V3 to change it as your comments. > > one question, if there’s no `control`, what’s the bank should be like? > > <bank id='1' level='3' type='unified' size='15360' unit='KiB' cpus='6-11’/> This is preferred Regards, Daniel -- |: http://berrange.com -o- http://www.flickr.com/photos/dberrange/ :| |: http://libvirt.org -o- http://virt-manager.org :| |: http://entangle-photo.org -o- http://search.cpan.org/~danberr/ :| -- libvir-list mailing list libvir-list@redhat.com https://www.redhat.com/mailman/listinfo/libvir-list
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