From nobody Fri Apr 19 23:47:44 2024 Delivered-To: importer@patchew.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1505184850699869.5820912012202; Mon, 11 Sep 2017 19:54:10 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 9CEED21CEB11A; Mon, 11 Sep 2017 19:51:12 -0700 (PDT) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id DCBE721CEB0F5 for ; Mon, 11 Sep 2017 19:51:11 -0700 (PDT) Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 11 Sep 2017 19:54:07 -0700 Received: from shwdeopenpsi011.ccr.corp.intel.com (HELO SHWDEOPENPSI011.local) ([10.239.9.21]) by fmsmga004.fm.intel.com with SMTP; 11 Sep 2017 19:54:06 -0700 X-Original-To: edk2-devel@lists.01.org X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.42,381,1500966000"; d="scan'208";a="310575973" Date: Tue, 12 Sep 2017 10:54:07 +0800 From: lushifex To: edk2-devel@lists.01.org Message-ID: X-Mailer: TortoiseGit MIME-Version: 1.0 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoard3-UDK2017] Change Reset Type X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.22 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: , david.wei@intel.com Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Change Reset Type according to different Board. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: lushifex Reviewed-by: zwei4 --- .../Board/BensonGlacier/BoardInitPostMem/BoardInit.c | 7 +++= ++++ .../Board/BensonGlacier/BoardInitPostMem/BoardInit.h | 1 + .../Board/BensonGlacier/BoardInitPostMem/BoardInitPostMem.inf | 1 + .../BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.c | 7 +++= ++++ .../BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit.h | 1 + .../Board/LeafHill/BoardInitPostMem/BoardInitPostMem.inf | 3 ++- .../Board/MinnowBoard3/BoardInitPostMem/BoardInit.c | 7 +++= ++++ .../Board/MinnowBoard3/BoardInitPostMem/BoardInit.h | 1 + .../Board/MinnowBoard3/BoardInitPostMem/BoardInitPostMem.inf | 3 ++- .../BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c | 2 +- .../Common/Acpi/AcpiPlatformDxe/AcpiPlatformDxe.inf | 2 ++ .../Common/PlatformSettings/PlatformSetupDxe/SystemComponent.vfi | 2 ++ Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec | 1 + .../BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.c | 6 +++= --- .../BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.h | 3 ++- .../BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset.inf | 3 ++- 16 files changed, 42 insertions(+), 8 deletions(-) diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= ostMem/BoardInit.c index 729a158..a4f3414 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.c +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.c @@ -48,6 +48,7 @@ BensonGlacierPostMemInitCallback ( VOID *Instance; UINT8 BoardId; UINT8 FabId; + UINT8 ResetType; =20 Status =3D PeiServicesLocatePpi ( &gBoardPostMemInitDoneGuid, @@ -76,6 +77,12 @@ BensonGlacierPostMemInitCallback ( PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) BensonMultiPlatformI= nfoInit); =20 // + // Set Reset Type according to different Board + // + ResetType =3D V_RST_CNT_HARDRESET; + PcdSet8 (PcdResetType, (UINT8) ResetType); + + // // Add init steps here // // diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitP= ostMem/BoardInit.h index 870f9c3..c065ed2 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.h +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInit.h @@ -33,6 +33,7 @@ #include =20 #include "BoardInitMiscs.h" +#include =20 VOID BensonGpioTest (VOID); =20 diff --git a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostM= em/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/B= oardInitPostMem/BoardInitPostMem.inf index def40bf..32849c0 100644 --- a/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitPostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/BensonGlacier/BoardInitPostMem/Boar= dInitPostMem.inf @@ -61,6 +61,7 @@ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc gPlatformModuleTokenSpaceGuid.PcdBoardId gPlatformModuleTokenSpaceGuid.PcdFabId + gSiPkgTokenSpaceGuid.PcdResetType =20 [Guids] gEfiPlatformInfoGuid diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInit.c b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Boa= rdInit.c index 501e810..e591b1d 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .c +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .c @@ -56,6 +56,7 @@ LeafHillPostMemInitCallback ( VOID *Instance; UINT8 BoardId; UINT8 FabId; + UINT8 ResetType; =20 Status =3D PeiServicesLocatePpi ( &gBoardPostMemInitDoneGuid, @@ -82,6 +83,12 @@ LeafHillPostMemInitCallback ( // Set init function PCD // PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) LeafHillMultiPlatfor= mInfoInit); + =20 + // + // Set Reset Type according to different Board + // + ResetType =3D V_RST_CNT_FULLRESET; + PcdSet8 (PcdResetType, (UINT8) ResetType); =20 // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInit.h b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Boa= rdInit.h index 298613a..5b92f75 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .h +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= .h @@ -22,6 +22,7 @@ #include #include #include +#include =20 VOID LeafHillGpioTest (VOID); =20 diff --git a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/Bo= ardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPo= stMem/BoardInitPostMem.inf index a613fda..3578d4b 100644 --- a/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= PostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/LeafHill/BoardInitPostMem/BoardInit= PostMem.inf @@ -3,7 +3,7 @@ # # It will detect the board ID. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -59,6 +59,7 @@ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc gPlatformModuleTokenSpaceGuid.PcdBoardId gPlatformModuleTokenSpaceGuid.PcdFabId + gSiPkgTokenSpaceGuid.PcdResetType =20 [Guids] gEfiPlatformInfoGuid diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInit.c b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPos= tMem/BoardInit.c index ac6bf58..ef14216 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.c +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.c @@ -56,6 +56,7 @@ MinnowBoard3PostMemInitCallback ( VOID *Instance; UINT8 BoardId; UINT8 FabId; + UINT8 ResetType; =20 Status =3D PeiServicesLocatePpi ( &gBoardPostMemInitDoneGuid, @@ -82,6 +83,12 @@ MinnowBoard3PostMemInitCallback ( // Set init function PCD // PcdSet64 (PcdBoardPostMemInitFunc, (UINT64) (UINTN) Minnow3MultiPlatform= InfoInit); + =20 + // + // Set Reset Type according to different Board + // + ResetType =3D V_RST_CNT_FULLRESET; + PcdSet8 (PcdResetType, (UINT8) ResetType); =20 // // Add init steps here diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInit.h b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPos= tMem/BoardInit.h index b00f53e..196d140 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.h +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= Init.h @@ -22,6 +22,7 @@ #include #include #include +#include =20 VOID Minnow3GpioTest (VOID); =20 diff --git a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMe= m/BoardInitPostMem.inf b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/Boa= rdInitPostMem/BoardInitPostMem.inf index d7ba739..f9dc676 100644 --- a/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= InitPostMem.inf +++ b/Platform/BroxtonPlatformPkg/Board/MinnowBoard3/BoardInitPostMem/Board= InitPostMem.inf @@ -2,7 +2,7 @@ # Board detected module for Intel(R) Atom(TM) x5 Processor Series. # It will detect the board ID. # -# Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -57,6 +57,7 @@ gPlatformModuleTokenSpaceGuid.PcdBoardPostMemInitFunc gPlatformModuleTokenSpaceGuid.PcdBoardId gPlatformModuleTokenSpaceGuid.PcdFabId + gSiPkgTokenSpaceGuid.PcdResetType =20 [Guids] gEfiPlatformInfoGuid diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atform.c b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlat= form.c index 3007132..d3c10b1 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatform.c @@ -656,7 +656,7 @@ PlatformUpdateTables ( =20 case EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE: pFACP =3D (EFI_ACPI_3_0_FIXED_ACPI_DESCRIPTION_TABLE *) Table; - pFACP->ResetValue =3D mSystemConfiguration.ResetSelect; + pFACP->ResetValue =3D (UINT8) PcdGet8 (PcdResetType); pFACP->Flags |=3D BIT10; DEBUG ((DEBUG_INFO, "FACP ResetValue =3D %x\n", pFACP->ResetValue)); =20 diff --git a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPl= atformDxe.inf b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/Acp= iPlatformDxe.inf index 31c2a77..e70b843 100644 --- a/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformD= xe.inf +++ b/Platform/BroxtonPlatformPkg/Common/Acpi/AcpiPlatformDxe/AcpiPlatformD= xe.inf @@ -45,6 +45,7 @@ DxeVtdLib SteppingLib SeCLib + PcdLib =20 [Guids] gACPIOSFRMfgStringVariableGuid @@ -84,6 +85,7 @@ gEfiBxtTokenSpaceGuid.PcdScAcpiIoPortBaseAddress gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress + gSiPkgTokenSpaceGuid.PcdResetType =20 [Depex] gEfiAcpiSupportProtocolGuid AND diff --git a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSe= tupDxe/SystemComponent.vfi b/Platform/BroxtonPlatformPkg/Common/PlatformSet= tings/PlatformSetupDxe/SystemComponent.vfi index 16822f6..9bd93d3 100644 --- a/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= SystemComponent.vfi +++ b/Platform/BroxtonPlatformPkg/Common/PlatformSettings/PlatformSetupDxe/= SystemComponent.vfi @@ -45,12 +45,14 @@ form formid =3D SYSTEM_COMPONENT_FORM_ID, option text =3D STRING_TOKEN(STR_PNP_POWER_PERFORMANCE_STRING), value = =3D 3, flags =3D MANUFACTURING | DEFAULT | RESET_REQUIRED; endoneof; =20 +suppressif TRUE; oneof varid =3D Setup.ResetSelect, prompt =3D STRING_TOKEN(STR_RESET_SELECT), help =3D STRING_TOKEN(STR_RESET_SELECT_HELP), option text =3D STRING_TOKEN(STR_WARM_RESET), value =3D 0x6, flags =3D= DEFAULT | MANUFACTURING | RESET_REQUIRED; option text =3D STRING_TOKEN(STR_COLD_RESET), value =3D 0xE, flags =3D= RESET_REQUIRED; endoneof; +endif; =20 // Embedded Power Instrumentation oneof varid =3D Setup.EPIEnable, diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec b/Silicon/Bro= xtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec index f17a3e0..69036e7 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/BroxtonSiPkg.dec @@ -332,6 +332,7 @@ gEfiBxtTokenSpaceGuid.PcdSetCoreCount|0|UINT32|0x10000223 gEfiBxtTokenSpaceGuid.PcdVtdGfxBaseAddress|0xFED64000|UINT32|0x10000224 gSiPkgTokenSpaceGuid.PcdForceVolatileVariable|FALSE|BOOLEAN|0x30000012 + gSiPkgTokenSpaceGuid.PcdResetType|0x0E|UINT8|0x30000013 =20 [PcdsFeatureFlag] gBxtRefCodePkgTokenSpaceGuid.PcdCeAtaSupport|FALSE|BOOLEAN|0x12 diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/= ScReset.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/S= cReset.c index 2bac0a5..64598b8 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset= .c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset= .c @@ -1,7 +1,7 @@ /** @file Reset Architectural Protocol implementation. =20 - Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -114,7 +114,7 @@ InitializeScReset ( =20 mResetInstance->AcpiBar =3D (UINT16) PcdGet16 (PcdScAcpiIoPortBaseAddres= s); =20 - mResetInstance->ResetSelect =3D (UINT8) GeneralConfig->ResetSelect; + mResetInstance->ResetSelect =3D (UINT8) PcdGet8 (PcdResetType); =20 // // Make sure the Reset Architectural Protocol is not already installed i= n the system @@ -296,7 +296,7 @@ IntelScResetSystem ( =20 case EfiResetCold: InitialData =3D V_RST_CNT_HARDSTARTSTATE; - OutputData =3D V_RST_CNT_HARDRESET; + OutputData =3D PcdGet8 (PcdResetType); break; =20 case EfiResetShutdown: diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/= ScReset.h b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/S= cReset.h index 0c90d11..dd27e6d 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset= .h +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset= .h @@ -1,7 +1,7 @@ /** @file Header file definitions for SC reset. =20 - Copyright (c) 2011 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2011 - 2017, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -30,6 +30,7 @@ #include #include "ScAccess.h" #include +#include =20 // // Driver private data diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/= ScReset.inf b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe= /ScReset.inf index 9e4a4df..51b973e 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset= .inf +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Reset/RuntimeDxe/ScReset= .inf @@ -1,7 +1,7 @@ ## @file # Sc Reset driver. # -# Copyright (c) 2012 - 2016, Intel Corporation. All rights reserved.
+# Copyright (c) 2012 - 2017, Intel Corporation. All rights reserved.
# # This program and the accompanying materials # are licensed and made available under the terms and conditions of the B= SD License @@ -52,6 +52,7 @@ [Pcd] gEfiBxtTokenSpaceGuid.PcdScAcpiIoPortBaseAddress ## SOMETIMES_CONSUMES gEfiBxtTokenSpaceGuid.PcdPmcGcrBaseAddress ## SOMETIMES_CONSUMES + gSiPkgTokenSpaceGuid.PcdResetType =20 [Depex] TRUE --=20 2.7.0.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel