From nobody Sat May 18 21:26:52 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+81078+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+81078+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1632477352; cv=none; d=zohomail.com; s=zohoarc; b=Gu3W4gsxFFODibW96rL3zq7oh9GNoTfav6AdCnUoDtUcCCUuTpVxUckz+60JDA5qFOC+nqF9UyFz9DlklNQbIrNc27BN4XDsAtoUkmv/lw5NPZ5NOGLux+LXKZ6/G2QCsnNrZtri36LNT6gcsZXZ/gGGqKYK79kbjtes7at1yUw= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1632477352; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=v9IfIHRKalKXKEktv43ugSF0BMjZbwviD/d4ivZC7G8=; b=fi6J/zJzbi56CY3hT4AGZtDCKYmEZQHm2TU/RLBbvxS7yMe3XRcs11e5g3TmfVYweIvBXJyEJaw+LoBUpHfbEAX2FjyL9UL770swc1V3k99L/MgcE6T2VBmX0IsNTF59hR5nqUkxsY4IJcTueTfPO/zbOfOkPd7AYawrHT9glzI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+81078+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1632477352077391.78200249414886; Fri, 24 Sep 2021 02:55:52 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 4CqhYY1788612xM3CQeZ0gt6; Fri, 24 Sep 2021 02:55:51 -0700 X-Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web12.6126.1632477350759006107 for ; Fri, 24 Sep 2021 02:55:51 -0700 X-IronPort-AV: E=McAfee;i="6200,9189,10116"; a="224087138" X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="224087138" X-Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 02:55:49 -0700 X-IronPort-AV: E=Sophos;i="5.85,319,1624345200"; d="scan'208";a="475942834" X-Received: from basfe004.gar.corp.intel.com ([10.66.129.57]) by fmsmga007-auth.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Sep 2021 02:55:45 -0700 From: "Ashraf Ali S" To: devel@edk2.groups.io Cc: Ashraf Ali S , Chasel Chiu , Nate DeSimone , Star Zeng , Kuo Ted , Duggapu Chinni B , Rangasai V Chaganty , Digant H Solanki , Sangeetha V , Ray Ni Subject: [edk2-devel] [PATCH v6] IntelFsp2WrapperPkg : FSPM/S UPD data address based on Build Type Date: Fri, 24 Sep 2021 15:25:28 +0530 Message-Id: <8d7642c8ade6b79673bcbd39d5dd13b2414b6810.1632477232.git.ashraf.ali.s@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ashraf.ali.s@intel.com X-Gm-Message-State: Ir0BFJUHY9UvpR2oPFxeLE1Lx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1632477351; bh=XvTBx9W97NmHRhnqu2jOWj6KUnND2iP4kBGK+5ZsYg8=; h=Cc:Date:From:Reply-To:Subject:To; b=SN8UIKkMRfMdB0CZe5nqcLe0upTzGUoWhDkmVhZIfB4A0XeI3ITJKaMKas36X7n8btc u33l6mhdQ2h4Ai5/CKAiCRQHd4KGkpR3mqtK39EdKFePkpZ+5Hu6q8kuAdL7mBYWlPJ6T bvW7dKCi/vyZY2NXmcfr/5Elw7aDbaEGCUw= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1632477353578100002 Content-Type: text/plain; charset="utf-8" REF:https://bugzilla.tianocore.org/show_bug.cgi?id=3D3642 when the module is not building in IA32 mode which will lead to building error. when a module built-in X64 function pointer will be the size of 64bit width which cannot be fit in 32bit address which will lead to error. to overcome this issue introducing the 2 new PCD's for the 64bit modules can consume it. Creating the API's to support different architecture Cc: Chasel Chiu Cc: Nate DeSimone Cc: Star Zeng Cc: Kuo Ted Cc: Duggapu Chinni B Cc: Rangasai V Chaganty Cc: Digant H Solanki Cc: Sangeetha V Cc: Ray Ni Signed-off-by: Ashraf Ali S --- .../FspmWrapperPeim/FspmWrapperPeim.c | 19 +++++++++++--- .../FspmWrapperPeim/FspmWrapperPeim.inf | 16 ++++++++++-- .../FspmWrapperPeim/IA32/FspmHelper.c | 26 +++++++++++++++++++ .../FspmWrapperPeim/X64/FspmHelper.c | 26 +++++++++++++++++++ .../FspsWrapperPeim/FspsWrapperPeim.c | 17 +++++++++--- .../FspsWrapperPeim/FspsWrapperPeim.inf | 14 +++++++++- .../FspsWrapperPeim/IA32/FspsHelper.c | 26 +++++++++++++++++++ .../FspsWrapperPeim/X64/FspsHelper.c | 26 +++++++++++++++++++ .../Include/Library/FspWrapperPlatformLib.h | 2 +- IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec | 2 ++ 10 files changed, 163 insertions(+), 11 deletions(-) create mode 100644 IntelFsp2WrapperPkg/FspmWrapperPeim/IA32/FspmHelper.c create mode 100644 IntelFsp2WrapperPkg/FspmWrapperPeim/X64/FspmHelper.c create mode 100644 IntelFsp2WrapperPkg/FspsWrapperPeim/IA32/FspsHelper.c create mode 100644 IntelFsp2WrapperPkg/FspsWrapperPeim/X64/FspsHelper.c diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c b/IntelF= sp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c index 24ab534620..4a15136c39 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi notify to call FspSiliconInit API. =20 - Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -39,6 +39,17 @@ =20 extern EFI_GUID gFspHobGuid; =20 +/** + Get the Fspm Upd Data Address from the PCD + + @return FSPM UPD Data Address +**/ +UINTN +EFIAPI +GetFspmUpdDataAddress ( + VOID + ); + /** Call FspMemoryInit API. =20 @@ -59,7 +70,7 @@ PeiFspMemoryInit ( =20 DEBUG ((DEBUG_INFO, "PeiFspMemoryInit enter\n")); =20 - FspHobListPtr =3D NULL; + FspHobListPtr =3D NULL; FspmUpdDataPtr =3D NULL; =20 FspmHeaderPtr =3D (FSP_INFO_HEADER *) FspFindFspHeader (PcdGet32 (PcdFsp= mBaseAddress)); @@ -68,7 +79,7 @@ PeiFspMemoryInit ( return EFI_DEVICE_ERROR; } =20 - if (PcdGet32 (PcdFspmUpdDataAddress) =3D=3D 0 && (FspmHeaderPtr->CfgRegi= onSize !=3D 0) && (FspmHeaderPtr->CfgRegionOffset !=3D 0)) { + if (GetFspmUpdDataAddress () =3D=3D 0 && (FspmHeaderPtr->CfgRegionSize != =3D 0) && (FspmHeaderPtr->CfgRegionOffset !=3D 0)) { // // Copy default FSP-M UPD data from Flash // @@ -80,7 +91,7 @@ PeiFspMemoryInit ( // // External UPD is ready, get the buffer from PCD pointer. // - FspmUpdDataPtr =3D (FSPM_UPD_COMMON *)PcdGet32 (PcdFspmUpdDataAddress); + FspmUpdDataPtr =3D (FSPM_UPD_COMMON *) GetFspmUpdDataAddress (); ASSERT (FspmUpdDataPtr !=3D NULL); } =20 diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf b/Inte= lFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf index 00166e56a0..5b4ad531e7 100644 --- a/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/FspmWrapperPeim.inf @@ -6,7 +6,7 @@ # register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi # notify to call FspSiliconInit API. # -# Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
+# Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
# # SPDX-License-Identifier: BSD-2-Clause-Patent # @@ -45,6 +45,7 @@ FspWrapperApiLib FspWrapperApiTestLib FspMeasurementLib + PcdLib =20 [Packages] MdePkg/MdePkg.dec @@ -56,14 +57,25 @@ =20 [Pcd] gIntelFsp2WrapperTokenSpaceGuid.PcdFspmBaseAddress ## CONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFsptBaseAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig ## CONSUMES =20 +[Pcd.IA32] + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress ## CONSUMES + +[Pcd.X64] + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress64 ## CONSUMES + [Sources] FspmWrapperPeim.c =20 +[Sources.IA32] + IA32/FspmHelper.c + +[Sources.X64] + X64/FspmHelper.c + [Guids] gFspHobGuid ## PRODUCES ## HOB gFspApiPerformanceGuid ## SOMETIMES_CONSUMES ## GUID diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/IA32/FspmHelper.c b/IntelF= sp2WrapperPkg/FspmWrapperPeim/IA32/FspmHelper.c new file mode 100644 index 0000000000..cab11173cc --- /dev/null +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/IA32/FspmHelper.c @@ -0,0 +1,26 @@ +/** @file + Sample to provide FSP wrapper related function. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + +#include +#include +#include + +/** + Get the Fspm Upd Data Address from the PCD + + @return FSPM UPD Data Address +**/ +UINTN +EFIAPI +GetFspmUpdDataAddress ( + VOID + ) +{ + return PcdGet32 (PcdFspmUpdDataAddress); +} diff --git a/IntelFsp2WrapperPkg/FspmWrapperPeim/X64/FspmHelper.c b/IntelFs= p2WrapperPkg/FspmWrapperPeim/X64/FspmHelper.c new file mode 100644 index 0000000000..25b89ff2e1 --- /dev/null +++ b/IntelFsp2WrapperPkg/FspmWrapperPeim/X64/FspmHelper.c @@ -0,0 +1,26 @@ +/** @file + Sample to provide FSP wrapper related function. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + +#include +#include +#include + +/** + Get the Fspm Upd Data Address from the PCD + + @return FSPM UPD Data Address +**/ +UINTN +EFIAPI +GetFspmUpdDataAddress ( + VOID + ) +{ + return PcdGet64 (PcdFspmUpdDataAddress64); +} diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c b/IntelF= sp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c index 9d4f279e81..8bd510502f 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.c @@ -3,7 +3,7 @@ register TemporaryRamDonePpi to call TempRamExit API, and register Memor= yDiscoveredPpi notify to call FspSiliconInit API. =20 - Copyright (c) 2014 - 2020, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -58,6 +58,17 @@ S3EndOfPeiNotify( IN VOID *Ppi ); =20 +/** + Get the Fsps Upd Data Address from the PCD + + @return FSPS UPD Data Address +**/ +UINTN +EFIAPI +GetFspsUpdDataAddress ( + VOID + ); + EFI_PEI_NOTIFY_DESCRIPTOR mS3EndOfPeiNotifyDesc =3D { (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINA= TE_LIST), &gEfiEndOfPeiSignalPpiGuid, @@ -283,7 +294,7 @@ PeiMemoryDiscoveredNotify ( return EFI_DEVICE_ERROR; } =20 - if (PcdGet32 (PcdFspsUpdDataAddress) =3D=3D 0 && (FspsHeaderPtr->CfgRegi= onSize !=3D 0) && (FspsHeaderPtr->CfgRegionOffset !=3D 0)) { + if (GetFspsUpdDataAddress () =3D=3D 0 && (FspsHeaderPtr->CfgRegionSize != =3D 0) && (FspsHeaderPtr->CfgRegionOffset !=3D 0)) { // // Copy default FSP-S UPD data from Flash // @@ -292,7 +303,7 @@ PeiMemoryDiscoveredNotify ( SourceData =3D (UINTN *)((UINTN)FspsHeaderPtr->ImageBase + (UINTN)Fsps= HeaderPtr->CfgRegionOffset); CopyMem (FspsUpdDataPtr, SourceData, (UINTN)FspsHeaderPtr->CfgRegionSi= ze); } else { - FspsUpdDataPtr =3D (FSPS_UPD_COMMON *)PcdGet32 (PcdFspsUpdDataAddress); + FspsUpdDataPtr =3D (FSPS_UPD_COMMON *) GetFspsUpdDataAddress (); ASSERT (FspsUpdDataPtr !=3D NULL); } =20 diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf b/Inte= lFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf index aeeca58d6d..e988ebab21 100644 --- a/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/FspsWrapperPeim.inf @@ -45,6 +45,7 @@ FspWrapperApiLib FspWrapperApiTestLib FspMeasurementLib + PcdLib =20 [Packages] MdePkg/MdePkg.dec @@ -65,10 +66,15 @@ =20 [Pcd] gIntelFsp2WrapperTokenSpaceGuid.PcdFspsBaseAddress ## CONSUMES - gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspModeSelection ## CONSUMES gIntelFsp2WrapperTokenSpaceGuid.PcdFspMeasurementConfig ## CONSUMES =20 +[Pcd.IA32] + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress ## CONSUMES + +[Pcd.X64] + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress64 ## CONSUMES + [Guids] gFspHobGuid ## CONSUMES ## HOB gFspApiPerformanceGuid ## SOMETIMES_CONSUMES ## GUID @@ -76,5 +82,11 @@ [Sources] FspsWrapperPeim.c =20 +[Sources.IA32] + IA32/FspsHelper.c + +[Sources.X64] + X64/FspsHelper.c + [Depex] gEfiPeiMemoryDiscoveredPpiGuid diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/IA32/FspsHelper.c b/IntelF= sp2WrapperPkg/FspsWrapperPeim/IA32/FspsHelper.c new file mode 100644 index 0000000000..c4ae292ffb --- /dev/null +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/IA32/FspsHelper.c @@ -0,0 +1,26 @@ +/** @file + Sample to provide FSP wrapper related function. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + +#include +#include +#include + +/** + Get the Fsps Upd Data Address from the PCD + + @return FSPS UPD Data Address +**/ +UINTN +EFIAPI +GetFspsUpdDataAddress ( + VOID + ) +{ + return PcdGet32 (PcdFspsUpdDataAddress); +} diff --git a/IntelFsp2WrapperPkg/FspsWrapperPeim/X64/FspsHelper.c b/IntelFs= p2WrapperPkg/FspsWrapperPeim/X64/FspsHelper.c new file mode 100644 index 0000000000..a0d6adb281 --- /dev/null +++ b/IntelFsp2WrapperPkg/FspsWrapperPeim/X64/FspsHelper.c @@ -0,0 +1,26 @@ +/** @file + Sample to provide FSP wrapper related function. + + Copyright (c) 2021, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + + +#include +#include +#include + +/** + Get the Fsps Upd Data Address from the PCD + + @return FSPS UPD Data Address +**/ +UINTN +EFIAPI +GetFspsUpdDataAddress ( + VOID + ) +{ + return PcdGet64 (PcdFspsUpdDataAddress64); +} diff --git a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h b/= IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h index 2aa14c92fd..4a75c3b536 100644 --- a/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h +++ b/IntelFsp2WrapperPkg/Include/Library/FspWrapperPlatformLib.h @@ -1,7 +1,7 @@ /** @file Provide FSP wrapper platform related function. =20 - Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.
+ Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ diff --git a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec b/IntelFsp2Wrapper= Pkg/IntelFsp2WrapperPkg.dec index a3b9363779..8c98dbd55d 100644 --- a/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec +++ b/IntelFsp2WrapperPkg/IntelFsp2WrapperPkg.dec @@ -121,3 +121,5 @@ # gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress|0x00000000|UINT32|= 0x50000000 gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress|0x00000000|UINT32|= 0x50000001 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspmUpdDataAddress64|0x00000000|UINT6= 4|0x50000002 + gIntelFsp2WrapperTokenSpaceGuid.PcdFspsUpdDataAddress64|0x00000000|UINT6= 4|0x50000003 --=20 2.30.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#81078): https://edk2.groups.io/g/devel/message/81078 Mute This Topic: https://groups.io/mt/85835546/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-