From nobody Sat May 18 17:16:01 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+103721+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103721+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1682609395; cv=none; d=zohomail.com; s=zohoarc; b=eUZXuf+4gHMmspK3HUjMv9QmkrEuDoao4/s9yKH5rWsVDC6j7PgfXaDhKJk8mccWL3zbav1gAicj8x5hT4FH9WgSL5xbHQZtQL/SRcQys9KhD3V8TZzuLBGi862I33Jb/kJ23GmwSXgZo4CaC2GwVkhAHEvMwsi6CM6nnE1AZvU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1682609395; h=Content-Transfer-Encoding:Cc:Date:From:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:Sender:Subject:To; bh=dFeS9QaOjrNN8Ei893v1uLvJIMzlQhVhJIHp2QFbe8Y=; b=e2B8uxOGCeNpO8vuZEe7xnskgtQEyRiUGvCEUR63qKI1YeGiDZ0sfi1osmXcHn+IEoPHYyDDX7gBoHvSDBXE79TlKllTu+8vjJp+LNbOyfC11fdS/5QNfvKXEnnVkyWrcglniAJB3Q11MHfTW7TV158ayaT3SHBME3WYi0zPXyA= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+103721+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1682609395824374.48236067521657; Thu, 27 Apr 2023 08:29:55 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id uRqqYY1788612xPqHgoYCXhK; Thu, 27 Apr 2023 08:29:55 -0700 X-Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by mx.groups.io with SMTP id smtpd.web10.14042.1682576028955085765 for ; Wed, 26 Apr 2023 23:13:49 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10692"; a="350174449" X-IronPort-AV: E=Sophos;i="5.99,230,1677571200"; d="scan'208";a="350174449" X-Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 Apr 2023 23:13:48 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10692"; a="763655971" X-IronPort-AV: E=Sophos;i="5.99,230,1677571200"; d="scan'208";a="763655971" X-Received: from coreboot.itwn.intel.com (HELO linuswux-mobl.gar.corp.intel.com) ([10.5.215.15]) by fmsmga004.fm.intel.com with ESMTP; 26 Apr 2023 23:13:46 -0700 From: paytonx.hsieh@intel.com To: devel@edk2.groups.io Cc: PaytonX Hsieh , Guo Dong , Ray Ni , Sean Rhodes , James Lu , Gua Guo Subject: [edk2-devel] [PATCH] UefiPayloadPkg: Fix issues when MULTIPLE_DEBUG_PORT_SUPPORT is true Date: Thu, 27 Apr 2023 14:13:40 +0800 Message-Id: <88c2cfeb4dc16d4ae1ee934d79085ee8538ff404.1682571439.git.paytonx.hsieh@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,paytonx.hsieh@intel.com X-Gm-Message-State: Wnz6nvyiwfJT7R9sp78G29QJx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1682609395; bh=yebL3bsz/VK0mS6rKZedZTeACYaQeyOuXtmN53SF3EY=; h=Cc:Date:From:Reply-To:Subject:To; b=GMRkjyLzLD15kNjw+gtaEc69Ho0Wgp75ZZrsMc3Nl1z8hIRMkILMTjAK/oqhctna9za uVHVxPREFfQCl9qhiPZnPOixso4SAWu6CUk5/RkZnSEuBAVVLRE0ISV1xc5YAvyuIpYZ1 EgQBefVUiqcktIcBEWeU4zlfNZvlRdNg8KY= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1682609397770100007 Content-Type: text/plain; charset="utf-8" From: PaytonX Hsieh REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4427 1. Since UART speed is slower than CPU, BIOS need to check the write buffer is empty, to avoid overwrite the buffer content. 2. LPSS UART might disable MMIO space for Windows debug usage during ExitBootServices event. BIOS need to avoid access the MMIO space after ExitBootServices. Cc: Guo Dong Cc: Ray Ni Cc: Sean Rhodes Cc: James Lu Cc: Gua Guo Signed-off-by: PaytonX Hsieh Reviewed-by: Gua Guo --- .../BaseSerialPortLibHob.c | 7 + .../DxeBaseSerialPortLibHob.c | 903 ++++++++++++++++++ .../DxeBaseSerialPortLibHob.inf | 40 + UefiPayloadPkg/UefiPayloadPkg.dsc | 11 +- 4 files changed, 959 insertions(+), 2 deletions(-) create mode 100644 UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSeri= alPortLibHob.c create mode 100644 UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSeri= alPortLibHob.inf diff --git a/UefiPayloadPkg/Library/BaseSerialPortLibHob/BaseSerialPortLibH= ob.c b/UefiPayloadPkg/Library/BaseSerialPortLibHob/BaseSerialPortLibHob.c index 8216195c62..3f844a42e1 100644 --- a/UefiPayloadPkg/Library/BaseSerialPortLibHob/BaseSerialPortLibHob.c +++ b/UefiPayloadPkg/Library/BaseSerialPortLibHob/BaseSerialPortLibHob.c @@ -294,6 +294,13 @@ SerialPortWrite ( BytesLeft =3D NumberOfBytes; =20 while (BytesLeft !=3D 0) { + // + // Wait for the serial port to be ready, to make sure both the trans= mit FIFO + // and shift register empty. + // + while ((SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, St= ride) & B_UART_LSR_TXRDY) =3D=3D 0) { + } + // // Fill the entire Tx FIFO // diff --git a/UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSerialPortL= ibHob.c b/UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSerialPortLibH= ob.c new file mode 100644 index 0000000000..5fcae9a699 --- /dev/null +++ b/UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSerialPortLibHob.c @@ -0,0 +1,903 @@ +/** @file + UART Serial Port library functions. + + Copyright (c) 2022, Intel Corporation. All rights reserved.
+ SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +// +// 16550 UART register offsets and bitfields +// +#define R_UART_RXBUF 0 // LCR_DLAB =3D 0 +#define R_UART_TXBUF 0 // LCR_DLAB =3D 0 +#define R_UART_BAUD_LOW 0 // LCR_DLAB =3D 1 +#define R_UART_BAUD_HIGH 1 // LCR_DLAB =3D 1 +#define R_UART_IER 1 // LCR_DLAB =3D 0 +#define R_UART_FCR 2 +#define B_UART_FCR_FIFOE BIT0 +#define B_UART_FCR_FIFO64 BIT5 +#define R_UART_LCR 3 +#define B_UART_LCR_DLAB BIT7 +#define R_UART_MCR 4 +#define B_UART_MCR_DTRC BIT0 +#define B_UART_MCR_RTS BIT1 +#define R_UART_LSR 5 +#define B_UART_LSR_RXRDY BIT0 +#define B_UART_LSR_TXRDY BIT5 +#define B_UART_LSR_TEMT BIT6 +#define R_UART_MSR 6 +#define B_UART_MSR_CTS BIT4 +#define B_UART_MSR_DSR BIT5 +#define B_UART_MSR_RI BIT6 +#define B_UART_MSR_DCD BIT7 + +#define MAX_SIZE 16 + +typedef struct { + UINTN BaseAddress; + BOOLEAN UseMmio; + UINT32 BaudRate; + UINT8 RegisterStride; +} UART_INFO; + +UART_INFO mUartInfo[MAX_SIZE]; +UINT8 mUartCount =3D 0; +EFI_EVENT mBaseSerialPortLibHobExitBootServicesEvent; +BOOLEAN mBaseSerialPortLibHobAtRuntime =3D FALSE; + +/** + Reads an 8-bit register. If UseMmio is TRUE, then the value is read from + MMIO space. If UseMmio is FALSE, then the value is read from I/O space. = The + parameter Offset is added to the base address of the register. + + @param Base The base address register of UART device. + @param Offset The offset of the register to read. + @param UseMmio Check if value has to be read from MMIO space o= r IO space. + @param RegisterStride Number of bytes between registers in serial dev= ice. + + @return The value read from the register. + +**/ +UINT8 +SerialPortReadRegister ( + UINTN Base, + UINTN Offset, + BOOLEAN UseMmio, + UINT8 RegisterStride + ) +{ + if (UseMmio) { + return MmioRead8 (Base + Offset * RegisterStride); + } else { + return IoRead8 (Base + Offset * RegisterStride); + } +} + +/** + Writes an 8-bit register.. If UseMmio is TRUE, then the value is written= to + MMIO space. If UseMmio is FALSE, then the value is written to I/O space.= The + parameter Offset is added to the base address of the registers. + + @param Base The base address register of UART device. + @param Offset The offset of the register to write. + @param Value Value to be written. + @param UseMmio Check if value has to be written to MMIO space = or IO space. + @param RegisterStride Number of bytes between registers in serial dev= ice. + + @return The value written to the register. + +**/ +UINT8 +SerialPortWriteRegister ( + UINTN Base, + UINTN Offset, + UINT8 Value, + BOOLEAN UseMmio, + UINT8 RegisterStride + ) +{ + if (UseMmio) { + return MmioWrite8 (Base + Offset * RegisterStride, Value); + } else { + return IoWrite8 (Base + Offset * RegisterStride, Value); + } +} + +/** + Initialize the serial device hardware. + + If no initialization is required, then return RETURN_SUCCESS. + If the serial device was successfully initialized, then return RETURN_SU= CCESS. + + @retval RETURN_SUCCESS The serial device was initialized. + +**/ +RETURN_STATUS +EFIAPI +SerialPortInitialize ( + VOID + ) +{ + UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *SerialPortInfo; + EFI_HOB_GUID_TYPE *GuidHob; + UINTN SerialRegisterBase; + UINT8 RegisterStride; + UINT32 Divisor; + UINT32 CurrentDivisor; + UINT32 BaudRate; + BOOLEAN Initialized; + BOOLEAN MmioEnable; + UINT8 Value; + + if (mUartCount > 0) { + return RETURN_SUCCESS; + } + + GuidHob =3D GetFirstGuidHob (&gUniversalPayloadSerialPortInfoGuid); + while (GuidHob !=3D NULL) { + SerialPortInfo =3D (UNIVERSAL_PAYLOAD_SERIAL_PORT_INFO *)GET_GUID_= HOB_DATA (GuidHob); + SerialRegisterBase =3D SerialPortInfo->RegisterBase; + MmioEnable =3D SerialPortInfo->UseMmio; + BaudRate =3D SerialPortInfo->BaudRate; + RegisterStride =3D SerialPortInfo->RegisterStride; + + if (SerialRegisterBase =3D=3D 0) { + GuidHob =3D GET_NEXT_HOB (GuidHob); + GuidHob =3D GetNextGuidHob (&gUniversalPayloadSerialPortInfoGuid, Gu= idHob); + continue; + } + + mUartInfo[mUartCount].BaseAddress =3D SerialRegisterBase; + mUartInfo[mUartCount].UseMmio =3D MmioEnable; + mUartInfo[mUartCount].BaudRate =3D BaudRate; + mUartInfo[mUartCount].RegisterStride =3D RegisterStride; + mUartCount++; + + Divisor =3D PcdGet32 (PcdSerialClockRate) / (BaudRate * 16); + if ((PcdGet32 (PcdSerialClockRate) % (BaudRate * 16)) >=3D BaudRate * = 8) { + Divisor++; + } + + // + // See if the serial port is already initialized + // + Initialized =3D TRUE; + if ((SerialPortReadRegister (SerialRegisterBase, R_UART_LCR, MmioEnabl= e, RegisterStride) & 0x3F) !=3D (PcdGet8 (PcdSerialLineControl) & 0x3F)) { + Initialized =3D FALSE; + } + + Value =3D (UINT8)(SerialPortReadRegister (SerialRegisterBase, R_UART_L= CR, MmioEnable, RegisterStride) | B_UART_LCR_DLAB); + SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, Value, MmioEn= able, RegisterStride); + CurrentDivisor =3D SerialPortReadRegister (SerialRegisterBase, R_UAR= T_BAUD_HIGH, MmioEnable, RegisterStride) << 8; + CurrentDivisor |=3D (UINT32)SerialPortReadRegister (SerialRegisterBase= , R_UART_BAUD_LOW, MmioEnable, RegisterStride); + Value =3D (UINT8)(SerialPortReadRegister (SerialRegisterBase= , R_UART_LCR, MmioEnable, RegisterStride) & ~B_UART_LCR_DLAB); + SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, Value, MmioEn= able, RegisterStride); + if (CurrentDivisor !=3D Divisor) { + Initialized =3D FALSE; + } + + if (Initialized) { + GuidHob =3D GET_NEXT_HOB (GuidHob); + GuidHob =3D GetNextGuidHob (&gUniversalPayloadSerialPortInfoGuid, Gu= idHob); + continue; + } + + // + // Configure baud rate + // + SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, B_UART_LCR_DL= AB, MmioEnable, RegisterStride); + SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_HIGH, (UINT8)= (Divisor >> 8), MmioEnable, RegisterStride); + SerialPortWriteRegister (SerialRegisterBase, R_UART_BAUD_LOW, (UINT8)(= Divisor & 0xff), MmioEnable, RegisterStride); + + // + // Clear DLAB and configure Data Bits, Parity, and Stop Bits. + // Strip reserved bits from PcdSerialLineControl + // + SerialPortWriteRegister (SerialRegisterBase, R_UART_LCR, (UINT8)(PcdGe= t8 (PcdSerialLineControl) & 0x3F), MmioEnable, RegisterStride); + + // + // Enable and reset FIFOs + // Strip reserved bits from PcdSerialFifoControl + // + SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, 0x00, MmioEna= ble, RegisterStride); + SerialPortWriteRegister (SerialRegisterBase, R_UART_FCR, (UINT8)(PcdGe= t8 (PcdSerialFifoControl) & (B_UART_FCR_FIFOE | B_UART_FCR_FIFO64)), MmioEn= able, RegisterStride); + + // + // Set FIFO Polled Mode by clearing IER after setting FCR + // + SerialPortWriteRegister (SerialRegisterBase, R_UART_IER, 0x00, MmioEna= ble, RegisterStride); + + // + // Put Modem Control Register(MCR) into its reset state of 0x00. + // + SerialPortWriteRegister (SerialRegisterBase, R_UART_MCR, 0x00, MmioEna= ble, RegisterStride); + + GuidHob =3D GET_NEXT_HOB (GuidHob); + GuidHob =3D GetNextGuidHob (&gUniversalPayloadSerialPortInfoGuid, Guid= Hob); + } + + return RETURN_SUCCESS; +} + +/** + Write data from buffer to serial device. + + Writes NumberOfBytes data bytes from Buffer to the serial device. + The number of bytes actually written to the serial device is returned. + If the return value is less than NumberOfBytes, then the write operation= failed. + + If Buffer is NULL, then return 0. + + If NumberOfBytes is zero, then return 0. + + @param Buffer Pointer to the data buffer to be written. + @param NumberOfBytes Number of bytes to written to the serial device. + + @retval 0 NumberOfBytes is 0. + @retval >0 The number of bytes written to the serial devic= e. + If this value is less than NumberOfBytes, then = the write operation failed. + +**/ +UINTN +EFIAPI +SerialPortWrite ( + IN UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + UINTN BaseAddress; + BOOLEAN UseMmio; + UINTN BytesLeft; + UINTN Index; + UINTN FifoSize; + UINT8 *DataBuffer; + UINT8 Count; + UINT8 Stride; + + if ((Buffer =3D=3D NULL) || (NumberOfBytes =3D=3D 0) || (mUartCount =3D= =3D 0)) { + return 0; + } + + // + // Compute the maximum size of the Tx FIFO + // + FifoSize =3D 1; + if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFOE) !=3D 0) { + if ((PcdGet8 (PcdSerialFifoControl) & B_UART_FCR_FIFO64) =3D=3D 0) { + FifoSize =3D 16; + } else { + FifoSize =3D PcdGet32 (PcdSerialExtendedTxFifoSize); + } + } + + Count =3D 0; + while (Count < mUartCount) { + BaseAddress =3D mUartInfo[Count].BaseAddress; + UseMmio =3D mUartInfo[Count].UseMmio; + Stride =3D mUartInfo[Count].RegisterStride; + + if (UseMmio && mBaseSerialPortLibHobAtRuntime) { + Count++; + continue; + } + + if (BaseAddress =3D=3D 0) { + Count++; + continue; + } + + DataBuffer =3D Buffer; + BytesLeft =3D NumberOfBytes; + + while (BytesLeft !=3D 0) { + // + // Wait for the serial port to be ready, to make sure both the trans= mit FIFO + // and shift register empty. + // + while ((SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, St= ride) & B_UART_LSR_TXRDY) =3D=3D 0) { + } + + // + // Fill the entire Tx FIFO + // + for (Index =3D 0; Index < FifoSize && BytesLeft !=3D 0; Index++, Byt= esLeft--, DataBuffer++) { + // + // Write byte to the transmit buffer. + // + SerialPortWriteRegister (BaseAddress, R_UART_TXBUF, *DataBuffer, U= seMmio, Stride); + } + + MicroSecondDelay (20); + } + + Count++; + } + + return NumberOfBytes; +} + +/** + Reads data from a serial device into a buffer. + + @param Buffer Pointer to the data buffer to store the data re= ad from the serial device. + @param NumberOfBytes Number of bytes to read from the serial device. + + @retval 0 NumberOfBytes is 0. + @retval >0 The number of bytes read from the serial device. + If this value is less than NumberOfBytes, then = the read operation failed. + +**/ +UINTN +EFIAPI +SerialPortRead ( + OUT UINT8 *Buffer, + IN UINTN NumberOfBytes + ) +{ + UINTN BaseAddress; + BOOLEAN UseMmio; + BOOLEAN IsNextPort; + UINT8 *DataBuffer; + UINTN BytesLeft; + UINTN Result; + UINT8 Mcr; + UINT8 Count; + UINT8 Stride; + + if (Buffer =3D=3D NULL) { + return 0; + } + + Count =3D 0; + while (Count < mUartCount) { + BaseAddress =3D mUartInfo[Count].BaseAddress; + UseMmio =3D mUartInfo[Count].UseMmio; + Stride =3D mUartInfo[Count].RegisterStride; + + if (BaseAddress =3D=3D 0) { + Count++; + continue; + } + + DataBuffer =3D Buffer; + BytesLeft =3D NumberOfBytes; + IsNextPort =3D FALSE; + + Mcr =3D (UINT8)(SerialPortReadRegister (BaseAddress, R_UART_MCR, UseMm= io, Stride) & ~B_UART_MCR_RTS); + + for (Result =3D 0; BytesLeft-- !=3D 0; Result++, DataBuffer++) { + // + // Wait for the serial port to have some data. + // + while ((SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, St= ride) & B_UART_LSR_RXRDY) =3D=3D 0) { + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Set RTS to let the peer send some data + // + SerialPortWriteRegister (BaseAddress, R_UART_MCR, (UINT8)(Mcr | = B_UART_MCR_RTS), UseMmio, Stride); + } + + IsNextPort =3D TRUE; + break; + } + + if (IsNextPort) { + break; + } + + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Clear RTS to prevent peer from sending data + // + SerialPortWriteRegister (BaseAddress, R_UART_MCR, Mcr, UseMmio, St= ride); + } + + // + // Read byte from the receive buffer. + // + *DataBuffer =3D SerialPortReadRegister (BaseAddress, R_UART_RXBUF, U= seMmio, Stride); + } + + if ((!IsNextPort) && (*(--DataBuffer) !=3D '\0')) { + return Result; + } + + Count++; + } + + return Result; +} + +/** + Polls a serial device to see if there is any data waiting to be read. + + Polls a serial device to see if there is any data waiting to be read. + If there is data waiting to be read from the serial device, then TRUE is= returned. + If there is no data waiting to be read from the serial device, then FALS= E is returned. + + @retval TRUE Data is waiting to be read from the serial devi= ce. + @retval FALSE There is no data waiting to be read from the se= rial device. + +**/ +BOOLEAN +EFIAPI +SerialPortPoll ( + VOID + ) +{ + UINTN BaseAddress; + BOOLEAN UseMmio; + UINT8 Stride; + UINT8 Count; + BOOLEAN IsDataReady; + + Count =3D 0; + while (Count < mUartCount) { + BaseAddress =3D mUartInfo[Count].BaseAddress; + UseMmio =3D mUartInfo[Count].UseMmio; + Stride =3D mUartInfo[Count].RegisterStride; + + if (BaseAddress =3D=3D 0) { + Count++; + continue; + } + + IsDataReady =3D FALSE; + + // + // Read the serial port status + // + if ((SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, Stride)= & B_UART_LSR_RXRDY) !=3D 0) { + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Clear RTS to prevent peer from sending data + // + SerialPortWriteRegister (BaseAddress, R_UART_MCR, (UINT8)(SerialPo= rtReadRegister (BaseAddress, R_UART_MCR, UseMmio, Stride) & ~B_UART_MCR_RTS= ), UseMmio, Stride); + } + + IsDataReady =3D TRUE; + } + + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + // + // Set RTS to let the peer send some data + // + SerialPortWriteRegister (BaseAddress, R_UART_MCR, (UINT8)(SerialPort= ReadRegister (BaseAddress, R_UART_MCR, UseMmio, Stride) | B_UART_MCR_RTS), = UseMmio, Stride); + } + + if (IsDataReady) { + return IsDataReady; + } + + Count++; + } + + return IsDataReady; +} + +/** + Sets the control bits on a serial device. + + @param Control Sets the bits of Control that are settable. + + @retval RETURN_SUCCESS The new control bits were set on the seria= l device. + +**/ +RETURN_STATUS +EFIAPI +SerialPortSetControl ( + IN UINT32 Control + ) +{ + UINTN BaseAddress; + BOOLEAN UseMmio; + UINT8 Mcr; + UINT8 Count; + UINT8 Stride; + + Count =3D 0; + while (Count < mUartCount) { + BaseAddress =3D mUartInfo[Count].BaseAddress; + UseMmio =3D mUartInfo[Count].UseMmio; + Stride =3D mUartInfo[Count].RegisterStride; + + if (BaseAddress =3D=3D 0) { + Count++; + continue; + } + + // + // First determine the parameter is invalid. + // + if ((Control & (~(EFI_SERIAL_REQUEST_TO_SEND | EFI_SERIAL_DATA_TERMINA= L_READY | + EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE))) !=3D 0) + { + Count++; + continue; + } + + // + // Read the Modem Control Register. + // + Mcr =3D SerialPortReadRegister (BaseAddress, R_UART_MCR, UseMmio, Str= ide); + Mcr &=3D (~(B_UART_MCR_DTRC | B_UART_MCR_RTS)); + + if ((Control & EFI_SERIAL_DATA_TERMINAL_READY) =3D=3D EFI_SERIAL_DATA_= TERMINAL_READY) { + Mcr |=3D B_UART_MCR_DTRC; + } + + if ((Control & EFI_SERIAL_REQUEST_TO_SEND) =3D=3D EFI_SERIAL_REQUEST_T= O_SEND) { + Mcr |=3D B_UART_MCR_RTS; + } + + // + // Write the Modem Control Register. + // + SerialPortWriteRegister (BaseAddress, R_UART_MCR, Mcr, UseMmio, Stride= ); + Count++; + } + + return RETURN_SUCCESS; +} + +/** + Retrieve the status of the control bits on a serial device. + + @param Control A pointer to return the current control si= gnals from the serial device. + + @retval RETURN_SUCCESS The control bits were read from the serial= device. + +**/ +RETURN_STATUS +EFIAPI +SerialPortGetControl ( + OUT UINT32 *Control + ) +{ + UINTN BaseAddress; + BOOLEAN UseMmio; + UINT8 Msr; + UINT8 Mcr; + UINT8 Lsr; + UINT8 Count; + UINT8 Stride; + + Count =3D 0; + while (Count < mUartCount) { + BaseAddress =3D mUartInfo[Count].BaseAddress; + UseMmio =3D mUartInfo[Count].UseMmio; + Stride =3D mUartInfo[Count].RegisterStride; + + if (BaseAddress =3D=3D 0) { + Count++; + continue; + } + + *Control =3D 0; + + // + // Read the Modem Status Register. + // + Msr =3D SerialPortReadRegister (BaseAddress, R_UART_MSR, UseMmio, Stri= de); + + if ((Msr & B_UART_MSR_CTS) =3D=3D B_UART_MSR_CTS) { + *Control |=3D EFI_SERIAL_CLEAR_TO_SEND; + } + + if ((Msr & B_UART_MSR_DSR) =3D=3D B_UART_MSR_DSR) { + *Control |=3D EFI_SERIAL_DATA_SET_READY; + } + + if ((Msr & B_UART_MSR_RI) =3D=3D B_UART_MSR_RI) { + *Control |=3D EFI_SERIAL_RING_INDICATE; + } + + if ((Msr & B_UART_MSR_DCD) =3D=3D B_UART_MSR_DCD) { + *Control |=3D EFI_SERIAL_CARRIER_DETECT; + } + + // + // Read the Modem Control Register. + // + Mcr =3D SerialPortReadRegister (BaseAddress, R_UART_MCR, UseMmio, Stri= de); + + if ((Mcr & B_UART_MCR_DTRC) =3D=3D B_UART_MCR_DTRC) { + *Control |=3D EFI_SERIAL_DATA_TERMINAL_READY; + } + + if ((Mcr & B_UART_MCR_RTS) =3D=3D B_UART_MCR_RTS) { + *Control |=3D EFI_SERIAL_REQUEST_TO_SEND; + } + + if (PcdGetBool (PcdSerialUseHardwareFlowControl)) { + *Control |=3D EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE; + } + + // + // Read the Line Status Register. + // + Lsr =3D SerialPortReadRegister (BaseAddress, R_UART_LSR, UseMmio, Stri= de); + + if ((Lsr & (B_UART_LSR_TEMT | B_UART_LSR_TXRDY)) =3D=3D (B_UART_LSR_TE= MT | B_UART_LSR_TXRDY)) { + *Control |=3D EFI_SERIAL_OUTPUT_BUFFER_EMPTY; + } + + if ((Lsr & B_UART_LSR_RXRDY) =3D=3D 0) { + *Control |=3D EFI_SERIAL_INPUT_BUFFER_EMPTY; + } + + if ((((*Control & EFI_SERIAL_OUTPUT_BUFFER_EMPTY) =3D=3D EFI_SERIAL_OU= TPUT_BUFFER_EMPTY) && + ((*Control & EFI_SERIAL_INPUT_BUFFER_EMPTY) !=3D EFI_SERIAL_INPUT= _BUFFER_EMPTY)) || + ((*Control & (EFI_SERIAL_DATA_SET_READY | EFI_SERIAL_CLEAR_TO_SEND= | + EFI_SERIAL_CARRIER_DETECT)) =3D=3D (EFI_SERIAL_DATA_= SET_READY | EFI_SERIAL_CLEAR_TO_SEND | + EFI_SERIAL_CARRIER_D= ETECT))) + { + return RETURN_SUCCESS; + } + + Count++; + } + + return RETURN_SUCCESS; +} + +/** + Sets the baud rate, receive FIFO depth, transmit/receice time out, parit= y, + data bits, and stop bits on a serial device. + + @param BaudRate The requested baud rate. A BaudRate value of 0= will use the + device's default interface speed. + On output, the value actually set. + @param ReveiveFifoDepth The requested depth of the FIFO on the receive= side of the + serial interface. A ReceiveFifoDepth value of = 0 will use + the device's default FIFO depth. + On output, the value actually set. + @param Timeout The requested time out for a single character = in microseconds. + This timeout applies to both the transmit and = receive side of the + interface. A Timeout value of 0 will use the d= evice's default time + out value. + On output, the value actually set. + @param Parity The type of parity to use on this serial devic= e. A Parity value of + DefaultParity will use the device's default pa= rity value. + On output, the value actually set. + @param DataBits The number of data bits to use on the serial d= evice. A DataBits + vaule of 0 will use the device's default data = bit setting. + On output, the value actually set. + @param StopBits The number of stop bits to use on this serial = device. A StopBits + value of DefaultStopBits will use the device's= default number of + stop bits. + On output, the value actually set. + + @retval RETURN_SUCCESS The new attributes were set on the ser= ial device. + +**/ +RETURN_STATUS +EFIAPI +SerialPortSetAttributes ( + IN OUT UINT64 *BaudRate, + IN OUT UINT32 *ReceiveFifoDepth, + IN OUT UINT32 *Timeout, + IN OUT EFI_PARITY_TYPE *Parity, + IN OUT UINT8 *DataBits, + IN OUT EFI_STOP_BITS_TYPE *StopBits + ) +{ + UINTN BaseAddress; + BOOLEAN UseMmio; + UINT32 SerialBaudRate; + UINTN Divisor; + UINT8 Lcr; + UINT8 LcrData; + UINT8 LcrParity; + UINT8 LcrStop; + UINT8 Count; + UINT8 Stride; + + Count =3D 0; + while (Count < mUartCount) { + BaseAddress =3D mUartInfo[Count].BaseAddress; + UseMmio =3D mUartInfo[Count].UseMmio; + Stride =3D mUartInfo[Count].RegisterStride; + + if (BaseAddress =3D=3D 0) { + Count++; + continue; + } + + // + // Check for default settings and fill in actual values. + // + if (*BaudRate =3D=3D 0) { + *BaudRate =3D mUartInfo[Count].BaudRate; + } + + SerialBaudRate =3D (UINT32)*BaudRate; + + if (*DataBits =3D=3D 0) { + LcrData =3D (UINT8)(PcdGet8 (PcdSerialLineControl) & 0x3); + *DataBits =3D LcrData + 5; + } else { + if ((*DataBits < 5) || (*DataBits > 8)) { + Count++; + continue; + } + + // + // Map 5..8 to 0..3 + // + LcrData =3D (UINT8)(*DataBits - (UINT8)5); + } + + if (*Parity =3D=3D DefaultParity) { + LcrParity =3D (UINT8)((PcdGet8 (PcdSerialLineControl) >> 3) & 0x7); + switch (LcrParity) { + case 0: + *Parity =3D NoParity; + break; + + case 3: + *Parity =3D EvenParity; + break; + + case 1: + *Parity =3D OddParity; + break; + + case 7: + *Parity =3D SpaceParity; + break; + + case 5: + *Parity =3D MarkParity; + break; + + default: + break; + } + } else { + switch (*Parity) { + case NoParity: + LcrParity =3D 0; + break; + + case EvenParity: + LcrParity =3D 3; + break; + + case OddParity: + LcrParity =3D 1; + break; + + case SpaceParity: + LcrParity =3D 7; + break; + + case MarkParity: + LcrParity =3D 5; + break; + + default: + Count++; + continue; + } + } + + if (*StopBits =3D=3D DefaultStopBits) { + LcrStop =3D (UINT8)((PcdGet8 (PcdSerialLineControl) >> 2) & 0x1); + switch (LcrStop) { + case 0: + *StopBits =3D OneStopBit; + break; + + case 1: + if (*DataBits =3D=3D 5) { + *StopBits =3D OneFiveStopBits; + } else { + *StopBits =3D TwoStopBits; + } + + break; + + default: + break; + } + } else { + switch (*StopBits) { + case OneStopBit: + LcrStop =3D 0; + break; + + case OneFiveStopBits: + case TwoStopBits: + LcrStop =3D 1; + break; + + default: + Count++; + continue; + } + } + + // + // Calculate divisor for baud generator + // Ref_Clk_Rate / Baud_Rate / 16 + // + Divisor =3D PcdGet32 (PcdSerialClockRate) / (SerialBaudRate * 16); + if ((PcdGet32 (PcdSerialClockRate) % (SerialBaudRate * 16)) >=3D Seria= lBaudRate * 8) { + Divisor++; + } + + // + // Configure baud rate + // + SerialPortWriteRegister (BaseAddress, R_UART_LCR, B_UART_LCR_DLAB, Use= Mmio, Stride); + SerialPortWriteRegister (BaseAddress, R_UART_BAUD_HIGH, (UINT8)(Diviso= r >> 8), UseMmio, Stride); + SerialPortWriteRegister (BaseAddress, R_UART_BAUD_LOW, (UINT8)(Divisor= & 0xff), UseMmio, Stride); + + // + // Clear DLAB and configure Data Bits, Parity, and Stop Bits. + // Strip reserved bits from line control value + // + Lcr =3D (UINT8)((LcrParity << 3) | (LcrStop << 2) | LcrData); + SerialPortWriteRegister (BaseAddress, R_UART_LCR, (UINT8)(Lcr & 0x3F),= UseMmio, Stride); + Count++; + } + + return RETURN_SUCCESS; +} + +/** + Set mSerialIoUartLibAtRuntime flag as TRUE after ExitBootServices. + + @param[in] Event The Event that is being processed. + @param[in] Context The Event Context. + +**/ +STATIC +VOID +EFIAPI +BaseSerialPortLibHobExitBootServicesEvent ( + IN EFI_EVENT Event, + IN VOID *Context + ) +{ + mBaseSerialPortLibHobAtRuntime =3D TRUE; +} + +/** + The constructor function registers a callback for the ExitBootServices e= vent. + + @param[in] ImageHandle The firmware allocated handle for the EFI imag= e. + @param[in] SystemTable A pointer to the EFI System Table. + + @retval EFI_SUCCESS The operation completed successfully. + @retval other Either the serial port failed to initialize or the + ExitBootServices event callback registration faile= d. +**/ +EFI_STATUS +EFIAPI +DxeBaseSerialPortLibHobConstructor ( + IN EFI_HANDLE ImageHandle, + IN EFI_SYSTEM_TABLE *SystemTable + ) +{ + return SystemTable->BootServices->CreateEvent ( + EVT_SIGNAL_EXIT_BOOT_SERVICES, + TPL_NOTIFY, + BaseSerialPortLibHobExitBootServices= Event, + NULL, + &mBaseSerialPortLibHobExitBootServic= esEvent + ); +} diff --git a/UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSerialPortL= ibHob.inf b/UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSerialPortLi= bHob.inf new file mode 100644 index 0000000000..e16a9a4a83 --- /dev/null +++ b/UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSerialPortLibHob.i= nf @@ -0,0 +1,40 @@ +## @file +# SerialPortLib instance for UART information retrieved from bootloader. +# +# Copyright (c) 2022, Intel Corporation. All rights reserved.
+# +# SPDX-License-Identifier: BSD-2-Clause-Patent +# +## + +[Defines] + INF_VERSION =3D 0x00010005 + BASE_NAME =3D DxeBaseSerialPortLibHob + FILE_GUID =3D c8def0c5-48e7-45b8-8299-485ea2e63b2c + MODULE_TYPE =3D DXE_DRIVER + VERSION_STRING =3D 1.0 + LIBRARY_CLASS =3D SerialPortLib|DXE_CORE DXE_DRIVER DXE= _RUNTIME_DRIVER DXE_SMM_DRIVER UEFI_APPLICATION UEFI_DRIVER + CONSTRUCTOR =3D DxeBaseSerialPortLibHobConstructor + +[Packages] + MdePkg/MdePkg.dec + MdeModulePkg/MdeModulePkg.dec + +[LibraryClasses] + PcdLib + IoLib + HobLib + TimerLib + +[Sources] + DxeBaseSerialPortLibHob.c + +[Pcd] + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialLineControl + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialFifoControl + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialClockRate + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialExtendedTxFifoSize + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialUseHardwareFlowControl + +[Guids] + gUniversalPayloadSerialPortInfoGuid diff --git a/UefiPayloadPkg/UefiPayloadPkg.dsc b/UefiPayloadPkg/UefiPayload= Pkg.dsc index 9847f189ff..998d222909 100644 --- a/UefiPayloadPkg/UefiPayloadPkg.dsc +++ b/UefiPayloadPkg/UefiPayloadPkg.dsc @@ -256,7 +256,11 @@ SerialPortLib|UefiPayloadPkg/Library/CbSerialPortLib/CbSerialPortLib.inf PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatfor= mHookLibNull.inf !else - SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPort= Lib16550.inf + !if $(MULTIPLE_DEBUG_PORT_SUPPORT) =3D=3D TRUE + SerialPortLib|UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseSeria= lPortLibHob.inf + !else + SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPo= rtLib16550.inf + !endif PlatformHookLib|UefiPayloadPkg/Library/PlatformHookLib/PlatformHookLib.i= nf !endif PlatformBootManagerLib|UefiPayloadPkg/Library/PlatformBootManagerLib/Pla= tformBootManagerLib.inf @@ -313,6 +317,9 @@ PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf DxeHobListLib|UefiPayloadPkg/Library/DxeHobListLibNull/DxeHobListLibNull= .inf DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf +!if $(MULTIPLE_DEBUG_PORT_SUPPORT) =3D=3D TRUE + SerialPortLib|UefiPayloadPkg/Library/BaseSerialPortLibHob/BaseSerialPort= LibHob.inf +!endif =20 [LibraryClasses.common.DXE_CORE] DxeHobListLib|UefiPayloadPkg/Library/DxeHobListLibNull/DxeHobListLibNull= .inf @@ -617,7 +624,7 @@ !if $(MULTIPLE_DEBUG_PORT_SUPPORT) =3D=3D TRUE DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialP= ort.inf - SerialPortLib|UefiPayloadPkg/Library/BaseSerialPortLibHob/BaseSeri= alPortLibHob.inf + SerialPortLib|UefiPayloadPkg/Library/BaseSerialPortLibHob/DxeBaseS= erialPortLibHob.inf !endif NULL|MdeModulePkg/Library/LzmaCustomDecompressLib/LzmaCustomDecompre= ssLib.inf } --=20 2.39.2.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#103721): https://edk2.groups.io/g/devel/message/103721 Mute This Topic: https://groups.io/mt/98531776/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-