From nobody Mon Apr 29 03:28:11 2024 Delivered-To: importer@patchew.org Authentication-Results: mx.zohomail.com; spf=none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) smtp.mailfrom=edk2-devel-bounces@lists.01.org; dmarc=fail(p=none dis=none) header.from=intel.com Return-Path: Received: from ml01.01.org (ml01.01.org [198.145.21.10]) by mx.zohomail.com with SMTPS id 1528880731334793.6535876459087; Wed, 13 Jun 2018 02:05:31 -0700 (PDT) Received: from [127.0.0.1] (localhost [IPv6:::1]) by ml01.01.org (Postfix) with ESMTP id 767C0212FD4E6; Wed, 13 Jun 2018 02:05:30 -0700 (PDT) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by ml01.01.org (Postfix) with ESMTPS id 4EB682098EACD for ; Wed, 13 Jun 2018 02:05:29 -0700 (PDT) Received: from fmsmga007.fm.intel.com ([10.253.24.52]) by fmsmga102.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 13 Jun 2018 02:05:28 -0700 Received: from fmsmsx108.amr.corp.intel.com ([10.18.124.206]) by fmsmga007.fm.intel.com with ESMTP; 13 Jun 2018 02:05:28 -0700 Received: from fmsmsx156.amr.corp.intel.com (10.18.116.74) by FMSMSX108.amr.corp.intel.com (10.18.124.206) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 13 Jun 2018 02:05:28 -0700 Received: from shsmsx101.ccr.corp.intel.com (10.239.4.153) by fmsmsx156.amr.corp.intel.com (10.18.116.74) with Microsoft SMTP Server (TLS) id 14.3.319.2; Wed, 13 Jun 2018 02:05:28 -0700 Received: from shsmsx103.ccr.corp.intel.com ([169.254.4.51]) by SHSMSX101.ccr.corp.intel.com ([169.254.1.82]) with mapi id 14.03.0319.002; Wed, 13 Jun 2018 17:05:26 +0800 X-Original-To: edk2-devel@lists.01.org Received-SPF: none (zoho.com: 198.145.21.10 is neither permitted nor denied by domain of lists.01.org) client-ip=198.145.21.10; envelope-from=edk2-devel-bounces@lists.01.org; helo=ml01.01.org; Received-SPF: Pass (sender SPF authorized) identity=mailfrom; client-ip=192.55.52.93; helo=mga11.intel.com; envelope-from=mang.guo@intel.com; receiver=edk2-devel@lists.01.org X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.51,218,1526367600"; d="dat'59?scan'59,208,59";a="46751487" From: "Guo, Mang" To: "edk2-devel@lists.01.org" Thread-Topic: [Patch][edk2-platforms/devel-MinnowBoardMax-UDK2017] Set R_SPI_LVSCC Thread-Index: AdQC9arnUvq/1KXCSyOtaAJ85PdkRw== Date: Wed, 13 Jun 2018 09:05:26 +0000 Message-ID: <22D2C85ED001C54AA20BFE3B0E4751D15269153D@SHSMSX103.ccr.corp.intel.com> Accept-Language: en-US Content-Language: en-US X-MS-Has-Attach: X-MS-TNEF-Correlator: <22D2C85ED001C54AA20BFE3B0E4751D15269153D@SHSMSX103.ccr.corp.intel.com> x-originating-ip: [10.239.127.40] MIME-Version: 1.0 X-Content-Filtered-By: Mailman/MimeDel 2.1.26 Subject: [edk2] [Patch][edk2-platforms/devel-MinnowBoardMax-UDK2017] Set R_SPI_LVSCC X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.26 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: "Wei, David" Content-Transfer-Encoding: quoted-printable Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" X-ZohoMail: RSF_4 Z_629925259 SPT_0 Content-Type: text/plain; charset="utf-8" Set bit30(VCL) of R_SPI_LVSCC because Vendor Specific Component Capabilitie= s should be locked. Cc: David Wei Contributed-under: TianoCore Contribution Agreement 1.1 Signed-off-by: Guo Mang Reviewed-by: zwei4 --- .../BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonLib/SpiCommon.c | 4 = +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpi= CommonLib/SpiCommon.c b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Librar= y/BaseScSpiCommonLib/SpiCommon.c index 722f297..4240fd5 100644 --- a/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonL= ib/SpiCommon.c +++ b/Silicon/BroxtonSoC/BroxtonSiPkg/SouthCluster/Library/BaseScSpiCommonL= ib/SpiCommon.c @@ -1,7 +1,7 @@ /** @file SC SPI Common Driver implements the SPI Host Controller Compatibility In= terface. =20 - Copyright (c) 2008 - 2017, Intel Corporation. All rights reserved.
+ Copyright (c) 2008 - 2018, Intel Corporation. All rights reserved.
=20 This program and the accompanying materials are licensed and made available under the terms and conditions of the BS= D License @@ -74,6 +74,8 @@ SpiProtocolConstructor ( SpiInstance->RegionPermission =3D MmioRead16 (ScSpiBar0 + R_SPI_FRAP); DEBUG ((DEBUG_INFO, "Flash RegionPermission : %0x\n", SpiInstance->Regio= nPermission)); =20 + MmioOr32 (ScSpiBar0 + R_SPI_LVSCC, B_SPI_LVSCC_VCL); + SpiInstance->SfdpVscc0Value =3D MmioRead32 (ScSpiBar0 + R_SPI_LVSCC); DEBUG ((DEBUG_INFO, "Component 0 SFDP VSCC value : %0x\n", SpiInstance->= SfdpVscc0Value)); SpiInstance->SfdpVscc1Value =3D MmioRead32 (ScSpiBar0 + R_SPI_UVSCC); --=20 2.10.1.windows.1 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel