Implementing code to support Cache Management Operations (CMO) defined by
RISC-V CMO instructions.https://github.com/riscv/riscv-CMOs
This is a re-write of original series v5.
The patchset contains 5 patches- created based on V5 feedback.
1. Restructuring of existing code and move instruction declarations into BaseLib
2. Renaming existing functions to denote type of instruction used to maanage cache.
   This is useful for further patches where more cache management instructions are added.
3. Add the new cache maintenance operations to BaseLib, including the
	 new assembly instruction encodings.
4. Update BaseCacheMaintenanceLib (utilizing the new BaseLib primitives)
5. Add platform level PCD to allow overriding of RISC-V features.

Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
Cc: Jiewen Yao <jiewen.yao@intel.com>
Cc: Jordan Justen <jordan.l.justen@intel.com>
Cc: Gerd Hoffmann <kraxel@redhat.com>
Cc: Sunil V L <sunilvl@ventanamicro.com>
Cc: Andrei Warkentin <andrei.warkentin@intel.com>
Cc: Laszlo Ersek <lersek@redhat.com>
Cc: Michael D Kinney <michael.d.kinney@intel.com>
Cc: Liming Gao <gaoliming@byosoft.com.cn>
Cc: Zhiguang Liu <zhiguang.liu@intel.com>
Cc: Daniel Schaefer <git@danielschaefer.me>

Dhaval (5):
  MdePkg: Move RISC-V Cache Management Declarations Into BaseLib
  MdePkg: Rename Cache Management Function To Clarify Fence Based Op
  MdePkg: Implement RISC-V Cache Management Operations
  MdePkg: Utilize Cache Management Operations Implementation For RISC-V
  OvmfPkg/RiscVVirt: Override for RV CPU Features

 MdePkg/MdePkg.dec                                                  |   8 +
 OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc                                |   1 +
 MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf |   5 +
 MdePkg/Library/BaseLib/BaseLib.inf                                 |   2 +-
 MdePkg/Include/Library/BaseLib.h                                   |  53 ++++++
 MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c                | 172 ++++++++++++++++----
 MdePkg/Include/RiscV64/RiscVasm.inc                                |  19 +++
 MdePkg/Library/BaseLib/RiscV64/FlushCache.S                        |  21 ---
 MdePkg/Library/BaseLib/RiscV64/RiscVCacheMgmt.S                    |  38 +++++
 MdePkg/MdePkg.uni                                                  |   4 +
 10 files changed, 269 insertions(+), 54 deletions(-)
 create mode 100644 MdePkg/Include/RiscV64/RiscVasm.inc
 delete mode 100644 MdePkg/Library/BaseLib/RiscV64/FlushCache.S
 create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVCacheMgmt.S

-- 
2.39.2



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On Sun, Oct 29, 2023 at 2:46 PM Dhaval Sharma <dhaval@rivosinc.com> wrote:
>
> Implementing code to support Cache Management Operations (CMO) defined by
> RISC-V CMO instructions.https://github.com/riscv/riscv-CMOs
> This is a re-write of original series v5.
> The patchset contains 5 patches- created based on V5 feedback.
> 1. Restructuring of existing code and move instruction declarations into BaseLib
> 2. Renaming existing functions to denote type of instruction used to maanage cache.
>    This is useful for further patches where more cache management instructions are added.
> 3. Add the new cache maintenance operations to BaseLib, including the
>          new assembly instruction encodings.
> 4. Update BaseCacheMaintenanceLib (utilizing the new BaseLib primitives)
> 5. Add platform level PCD to allow overriding of RISC-V features.
>

With or without nits fixed:

Reviewed-by: Pedro Falcato <pedro.falcato@gmail.com>

But I would *really* prefer it if you could test this on a real board
with this extension.

-- 
Pedro


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Hi Dhaval,

Do you mind sharing the repo with the full patch set? Like a github link?

A

> -----Original Message-----
> From: Dhaval <dhaval@rivosinc.com>
> Sent: Sunday, October 29, 2023 9:46 AM
> To: devel@edk2.groups.io
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Yao, Jiewen
> <jiewen.yao@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>; Gerd
> Hoffmann <kraxel@redhat.com>; Sunil V L <sunilvl@ventanamicro.com>;
> Warkentin, Andrei <andrei.warkentin@intel.com>; Laszlo Ersek
> <lersek@redhat.com>; Kinney, Michael D <michael.d.kinney@intel.com>;
> Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang
> <zhiguang.liu@intel.com>; Daniel Schaefer <git@danielschaefer.me>
> Subject: [PATCH v7 0/5] Cache Management Operations Support For RISC-V
> 
> Implementing code to support Cache Management Operations (CMO) defined
> by RISC-V CMO instructions.https://github.com/riscv/riscv-CMOs
> This is a re-write of original series v5.
> The patchset contains 5 patches- created based on V5 feedback.
> 1. Restructuring of existing code and move instruction declarations into
> BaseLib 2. Renaming existing functions to denote type of instruction used to
> maanage cache.
>    This is useful for further patches where more cache management
> instructions are added.
> 3. Add the new cache maintenance operations to BaseLib, including the
> 	 new assembly instruction encodings.
> 4. Update BaseCacheMaintenanceLib (utilizing the new BaseLib primitives) 5.
> Add platform level PCD to allow overriding of RISC-V features.
> 
> Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> Cc: Jiewen Yao <jiewen.yao@intel.com>
> Cc: Jordan Justen <jordan.l.justen@intel.com>
> Cc: Gerd Hoffmann <kraxel@redhat.com>
> Cc: Sunil V L <sunilvl@ventanamicro.com>
> Cc: Andrei Warkentin <andrei.warkentin@intel.com>
> Cc: Laszlo Ersek <lersek@redhat.com>
> Cc: Michael D Kinney <michael.d.kinney@intel.com>
> Cc: Liming Gao <gaoliming@byosoft.com.cn>
> Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> Cc: Daniel Schaefer <git@danielschaefer.me>
> 
> Dhaval (5):
>   MdePkg: Move RISC-V Cache Management Declarations Into BaseLib
>   MdePkg: Rename Cache Management Function To Clarify Fence Based Op
>   MdePkg: Implement RISC-V Cache Management Operations
>   MdePkg: Utilize Cache Management Operations Implementation For RISC-V
>   OvmfPkg/RiscVVirt: Override for RV CPU Features
> 
>  MdePkg/MdePkg.dec                                                  |   8 +
>  OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc                                |   1 +
>  MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf |
> 5 +
>  MdePkg/Library/BaseLib/BaseLib.inf                                 |   2 +-
>  MdePkg/Include/Library/BaseLib.h                                   |  53 ++++++
>  MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c                | 172
> ++++++++++++++++----
>  MdePkg/Include/RiscV64/RiscVasm.inc                                |  19 +++
>  MdePkg/Library/BaseLib/RiscV64/FlushCache.S                        |  21 ---
>  MdePkg/Library/BaseLib/RiscV64/RiscVCacheMgmt.S                    |  38 +++++
>  MdePkg/MdePkg.uni                                                  |   4 +
>  10 files changed, 269 insertions(+), 54 deletions(-)  create mode 100644
> MdePkg/Include/RiscV64/RiscVasm.inc
>  delete mode 100644 MdePkg/Library/BaseLib/RiscV64/FlushCache.S
>  create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVCacheMgmt.S
> 
> --
> 2.39.2



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Here we go. https://github.com/tianocore/edk2/pull/4974


On Tue, Oct 31, 2023 at 9:46 AM Warkentin, Andrei <
andrei.warkentin@intel.com> wrote:

> Hi Dhaval,
>
> Do you mind sharing the repo with the full patch set? Like a github link?
>
> A
>
> > -----Original Message-----
> > From: Dhaval <dhaval@rivosinc.com>
> > Sent: Sunday, October 29, 2023 9:46 AM
> > To: devel@edk2.groups.io
> > Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>; Yao, Jiewen
> > <jiewen.yao@intel.com>; Justen, Jordan L <jordan.l.justen@intel.com>;
> Gerd
> > Hoffmann <kraxel@redhat.com>; Sunil V L <sunilvl@ventanamicro.com>;
> > Warkentin, Andrei <andrei.warkentin@intel.com>; Laszlo Ersek
> > <lersek@redhat.com>; Kinney, Michael D <michael.d.kinney@intel.com>;
> > Gao, Liming <gaoliming@byosoft.com.cn>; Liu, Zhiguang
> > <zhiguang.liu@intel.com>; Daniel Schaefer <git@danielschaefer.me>
> > Subject: [PATCH v7 0/5] Cache Management Operations Support For RISC-V
> >
> > Implementing code to support Cache Management Operations (CMO) defined
> > by RISC-V CMO instructions.https://github.com/riscv/riscv-CMOs
> > This is a re-write of original series v5.
> > The patchset contains 5 patches- created based on V5 feedback.
> > 1. Restructuring of existing code and move instruction declarations into
> > BaseLib 2. Renaming existing functions to denote type of instruction
> used to
> > maanage cache.
> >    This is useful for further patches where more cache management
> > instructions are added.
> > 3. Add the new cache maintenance operations to BaseLib, including the
> >        new assembly instruction encodings.
> > 4. Update BaseCacheMaintenanceLib (utilizing the new BaseLib primitives)
> 5.
> > Add platform level PCD to allow overriding of RISC-V features.
> >
> > Cc: Ard Biesheuvel <ardb+tianocore@kernel.org>
> > Cc: Jiewen Yao <jiewen.yao@intel.com>
> > Cc: Jordan Justen <jordan.l.justen@intel.com>
> > Cc: Gerd Hoffmann <kraxel@redhat.com>
> > Cc: Sunil V L <sunilvl@ventanamicro.com>
> > Cc: Andrei Warkentin <andrei.warkentin@intel.com>
> > Cc: Laszlo Ersek <lersek@redhat.com>
> > Cc: Michael D Kinney <michael.d.kinney@intel.com>
> > Cc: Liming Gao <gaoliming@byosoft.com.cn>
> > Cc: Zhiguang Liu <zhiguang.liu@intel.com>
> > Cc: Daniel Schaefer <git@danielschaefer.me>
> >
> > Dhaval (5):
> >   MdePkg: Move RISC-V Cache Management Declarations Into BaseLib
> >   MdePkg: Rename Cache Management Function To Clarify Fence Based Op
> >   MdePkg: Implement RISC-V Cache Management Operations
> >   MdePkg: Utilize Cache Management Operations Implementation For RISC-V
> >   OvmfPkg/RiscVVirt: Override for RV CPU Features
> >
> >  MdePkg/MdePkg.dec                                                  |
>  8 +
> >  OvmfPkg/RiscVVirt/RiscVVirt.dsc.inc                                |
>  1 +
> >  MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf |
> > 5 +
> >  MdePkg/Library/BaseLib/BaseLib.inf                                 |
>  2 +-
> >  MdePkg/Include/Library/BaseLib.h                                   |
> 53 ++++++
> >  MdePkg/Library/BaseCacheMaintenanceLib/RiscVCache.c                | 172
> > ++++++++++++++++----
> >  MdePkg/Include/RiscV64/RiscVasm.inc                                |
> 19 +++
> >  MdePkg/Library/BaseLib/RiscV64/FlushCache.S                        |
> 21 ---
> >  MdePkg/Library/BaseLib/RiscV64/RiscVCacheMgmt.S                    |
> 38 +++++
> >  MdePkg/MdePkg.uni                                                  |
>  4 +
> >  10 files changed, 269 insertions(+), 54 deletions(-)  create mode 100644
> > MdePkg/Include/RiscV64/RiscVasm.inc
> >  delete mode 100644 MdePkg/Library/BaseLib/RiscV64/FlushCache.S
> >  create mode 100644 MdePkg/Library/BaseLib/RiscV64/RiscVCacheMgmt.S
> >
> > --
> > 2.39.2
>
>

-- 
Thanks!
=D


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