From nobody Fri May 17 18:17:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+107188+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+107188+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1690229729; cv=none; d=zohomail.com; s=zohoarc; b=lrxOPWyid82agvY+UJ4fLGciqi8knP3nHgTum2d+th2yIlQsw8UnG15RqLX6OGlDg6VpcESVYEIZrUd9BINIY6RA1eLIhlBoum/O7qq8QiMrx/FbgGeb4Gz9coYOnTG792UuLhtdPUVPgJKrtzUtI+DrOXTrkDkbI/uFppCTleU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1690229729; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=cNkgvzt/0z33QA8UJ0J6Xk5+ml8FUhTCO2rmM9+BEv0=; b=WfMQA/mVOGh4J0umzdJYZtwjVnt4H/UU1JzF8iBdvXU1p+PGsRNXM4ZUNT/k0YG7JiURnMtQcE8po+4S1GeU0G20vsB2RNm4soHaafyYGymWRY4bVQReyKLIyYtNfjidPfkc8XOoLDN/RRH6l5EXpRknjAQsjK1CjqL8RDU+OEM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+107188+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 16902297295531002.9239710117905; Mon, 24 Jul 2023 13:15:29 -0700 (PDT) Return-Path: DKIM-Signature: a=rsa-sha256; bh=/cLdYUl9R3rAb+4EUoBFywtbf0gbqVBIxMe5h+WTiCI=; c=relaxed/simple; d=groups.io; h=X-Received:X-Received:X-Received:X-Gm-Message-State:X-Google-Smtp-Source:X-Received:X-Received:From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1690229729; v=1; b=NUM1Q0EBfnA9yzEoNz4o3sBB8RjpgrzXsep9vw/Pe7yhwAi+7UjoqI74Du0F7Io6sfE62Yxg DyQguzxS8Q/cpV6NyizsXbeJgDHKwanms2Znel/ZzD3leL853/bZNaQ8Dhqn9I8abPnCJWM/g1g CEB3suJ5P2RjJZug3Y/aDpHc= X-Received: by 127.0.0.2 with SMTP id ErycYY1788612xZyMa82tZne; Mon, 24 Jul 2023 13:15:29 -0700 X-Received: from mail-pl1-f176.google.com (mail-pl1-f176.google.com [209.85.214.176]) by mx.groups.io with SMTP id smtpd.web10.4781.1690229728761817249 for ; Mon, 24 Jul 2023 13:15:28 -0700 X-Received: by mail-pl1-f176.google.com with SMTP id d9443c01a7336-1b8bd586086so38450495ad.2 for ; Mon, 24 Jul 2023 13:15:28 -0700 (PDT) X-Gm-Message-State: MxrDyJyYPA0oznTPrUT8EJU7x1787277AA= X-Google-Smtp-Source: APBJJlHY6yBpyjvlRFYu3QEE67bpPanuVyYPUFqgtSKOabUe81/m+KR4D4TZfEGJMwZcthUM3faMFA== X-Received: by 2002:a17:902:8209:b0:1bb:8f37:dd0b with SMTP id x9-20020a170902820900b001bb8f37dd0bmr7026700pln.52.1690229727998; Mon, 24 Jul 2023 13:15:27 -0700 (PDT) X-Received: from MININT-0U7P5GU.redmond.corp.microsoft.com ([2001:4898:80e8:0:18a3:9b95:e44:14fd]) by smtp.gmail.com with ESMTPSA id y7-20020a1709029b8700b001b89045ff03sm9398104plp.233.2023.07.24.13.15.27 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 13:15:27 -0700 (PDT) From: "Kun Qin" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Sami Mujawar Subject: [edk2-devel] [PATCH v1 1/3] ArmPkg: ArmGic: Added support to send SGI to NS G1 EL1 Date: Mon, 24 Jul 2023 13:15:20 -0700 Message-ID: <20230724201523.852-2-kuqin12@gmail.com> In-Reply-To: <20230724201523.852-1-kuqin12@gmail.com> References: <20230724201523.852-1-kuqin12@gmail.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kuqin12@gmail.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1690229731143100006 Content-Type: text/plain; charset="utf-8" From: Kun Qin REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4466 This change extended the functionality of ArmGic to support sending software generated interrupts to non-secure group 1 at EL1. The change made here follows the ARM documentation `ICC_SGI1R_EL1, Interrupt Controller Software Generated Interrupt Group 1 Register`. Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Sami Mujawar Signed-off-by: Kun Qin --- ArmPkg/ArmPkg.ci.yaml | 1 + ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S | 11 +++++++++++ ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S | 10 ++++++++++ ArmPkg/Include/Library/ArmGicLib.h | 5 +++++ 4 files changed, 27 insertions(+) diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml index d31248161189..8a8f738437d5 100644 --- a/ArmPkg/ArmPkg.ci.yaml +++ b/ArmPkg/ArmPkg.ci.yaml @@ -158,6 +158,7 @@ "ipriority", "irouter", "isenabler", + "ishst", "istatus", "itargets", "lable", diff --git a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S b/ArmPkg/Driver= s/ArmGic/GicV3/AArch64/ArmGicV3.S index 20f83aa85f3b..f2ab57174be3 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S +++ b/ArmPkg/Drivers/ArmGic/GicV3/AArch64/ArmGicV3.S @@ -23,6 +23,7 @@ #define ICC_IAR1_EL1 S3_0_C12_C12_0 #define ICC_PMR_EL1 S3_0_C4_C6_0 #define ICC_BPR1_EL1 S3_0_C12_C12_3 +#define ICC_SGI1R_EL1 S3_0_C12_C11_5 =20 #endif =20 @@ -55,6 +56,16 @@ ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable) 4: isb ret =20 +// VOID +// ArmGicV3SendNsG1Sgi ( +// IN UINT64 SgiVal +// ); +ASM_FUNC(ArmGicV3SendNsG1Sgi) + dsb ishst + msr ICC_SGI1R_EL1, x0 + isb + ret + //VOID //ArmGicV3EnableInterruptInterface ( // VOID diff --git a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S b/ArmPkg/Drivers/Ar= mGic/GicV3/Arm/ArmGicV3.S index 8c43a613dc57..79e57e4afb70 100644 --- a/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S +++ b/ArmPkg/Drivers/ArmGic/GicV3/Arm/ArmGicV3.S @@ -29,6 +29,16 @@ ASM_FUNC(ArmGicV3SetControlSystemRegisterEnable) isb bx lr =20 +// VOID +// ArmGicV3SendNsG1Sgi ( +// IN UINT64 SgiVal +// ); +ASM_FUNC(ArmGicV3SendNsG1Sgi) + dsb ishst + mcrr p15, 0, r0, r1, c12 // ICC_SGI1R_EL1 + isb + bx lr + //VOID //ArmGicV3EnableInterruptInterface ( // VOID diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 93ce8aeb1994..773b27954522 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -332,4 +332,9 @@ ArmGicV3SetPriorityMask ( IN UINTN Priority ); =20 +VOID +ArmGicV3SendNsG1Sgi ( + IN UINT64 SgiVal + ); + #endif // ARMGIC_H_ --=20 2.41.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107188): https://edk2.groups.io/g/devel/message/107188 Mute This Topic: https://groups.io/mt/100337222/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 18:17:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+107189+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+107189+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1690229730; cv=none; d=zohomail.com; s=zohoarc; b=MxqcoZryN6Z4ZTNInyab7JUaHeuhYLjZPWVRZINksFhzmLq/49NlqdQAbbYpEu8/dOiuYZxMpOti+VhF55rlDJYIvGoshhVH7zuzduAnMOy8OXXE0f75Ty0o3IULgOCNKrf9yKqEcO0S3koTnqls+/WK29sJ1llhA013an+oDvE= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1690229730; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=lQQRL6ncFTAg1iPPNlwHDfhkhwLgH1HrwwFSZrITIxU=; b=hr2Nmf6t5zZiphhkMGxOb5BbY+fhqnK07/Sxj4UOpplch7KKmV6LPkAi5ywF6huzi4tJQVqwNnbZmJxiGLQ7de2N7kynCjpeKX9pw65pF8BXwD5Z3mYkdSNu0FbI6rZ9c/NP6JeeG2XPVsEA7HnMAjMrQlHP/Zap0QaE3yBNlRQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+107189+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 169022973047967.52225297550694; Mon, 24 Jul 2023 13:15:30 -0700 (PDT) Return-Path: DKIM-Signature: a=rsa-sha256; bh=HW2NaArLu1j+LusOzYBnTqTNd4qrU5r+NzgT714nmrI=; c=relaxed/simple; d=groups.io; h=X-Received:X-Received:X-Received:X-Gm-Message-State:X-Google-Smtp-Source:X-Received:X-Received:From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1690229730; v=1; b=kvp1Ok5vFDPIUw1LQWENgksNv4KsrLPAuDvGs6SV4nIrBPvswi7vvD54viJop7YsTbas2rvp VaI4FReZ8ZYhItsRQXSdJPRBp7NhDz9VGV2n26IhRin1p7TX6J9Uopki03+uQiEfrpFVbiUPda0 rWBYMEvXdsTB/ag/GVg4scpc= X-Received: by 127.0.0.2 with SMTP id Vts0YY1788612xMTSXsszs1s; Mon, 24 Jul 2023 13:15:30 -0700 X-Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) by mx.groups.io with SMTP id smtpd.web11.4786.1690229729646798215 for ; Mon, 24 Jul 2023 13:15:29 -0700 X-Received: by mail-pl1-f170.google.com with SMTP id d9443c01a7336-1bb2468257fso24875155ad.0 for ; Mon, 24 Jul 2023 13:15:29 -0700 (PDT) X-Gm-Message-State: vXm4OaqRYtvokf2neCX2fAqqx1787277AA= X-Google-Smtp-Source: APBJJlHQRAMNYWgT21txRmrkFpH7JaUKhW42QPsOghV43iz3IHvSgiYIlDeMGSxIT5mie+LoYGg+lw== X-Received: by 2002:a17:903:2445:b0:1b8:a7ec:38c5 with SMTP id l5-20020a170903244500b001b8a7ec38c5mr10297210pls.57.1690229728762; Mon, 24 Jul 2023 13:15:28 -0700 (PDT) X-Received: from MININT-0U7P5GU.redmond.corp.microsoft.com ([2001:4898:80e8:0:18a3:9b95:e44:14fd]) by smtp.gmail.com with ESMTPSA id y7-20020a1709029b8700b001b89045ff03sm9398104plp.233.2023.07.24.13.15.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 13:15:28 -0700 (PDT) From: "Kun Qin" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Sami Mujawar Subject: [edk2-devel] [PATCH v1 2/3] ArmPkg: ArmGicLib: Added GIC v3 and v4 support to ArmGicSendSgiTo Date: Mon, 24 Jul 2023 13:15:21 -0700 Message-ID: <20230724201523.852-3-kuqin12@gmail.com> In-Reply-To: <20230724201523.852-1-kuqin12@gmail.com> References: <20230724201523.852-1-kuqin12@gmail.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kuqin12@gmail.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1690229731693100009 Content-Type: text/plain; charset="utf-8" From: Kun Qin REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4466 This change extended the existing function `ArmGicSendSgiTo` of ArmGicLib to format the incoming parameters to comply with GICv3 and GICv4 spec, and signal software generated interrupts to non secure group 1 at EL1. Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Sami Mujawar Signed-off-by: Kun Qin --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 52 +++++++++++++++++--- ArmPkg/Include/Library/ArmGicLib.h | 22 +++++++++ 2 files changed, 68 insertions(+), 6 deletions(-) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 7f4bb248fc72..830d822d2c05 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -146,12 +146,52 @@ ArmGicSendSgiTo ( IN UINT8 SgiId ) { - MmioWrite32 ( - GicDistributorBase + ARM_GIC_ICDSGIR, - ((TargetListFilter & 0x3) << 24) | - ((CPUTargetList & 0xFF) << 16) | - (SgiId & 0xF) - ); + ARM_GIC_ARCH_REVISION Revision; + UINT32 ApplicableTargets; + UINT32 AFF3; + UINT32 AFF2; + UINT32 AFF1; + UINT32 AFF0; + UINT32 Irm; + UINT64 SGIValue; + + Revision =3D ArmGicGetSupportedArchRevision (); + if (Revision =3D=3D ARM_GIC_ARCH_REVISION_2) { + MmioWrite32 ( + GicDistributorBase + ARM_GIC_ICDSGIR, + ((TargetListFilter & 0x3) << 24) | + ((CPUTargetList & 0xFF) << 16) | + (SgiId & 0xF) + ); + } else { + // Below routine is adopted from gicv3_raise_secure_g0_sgi in TF-A + + /* Extract affinity fields from target */ + AFF0 =3D GET_MPIDR_AFF0 (CPUTargetList); + AFF1 =3D GET_MPIDR_AFF1 (CPUTargetList); + AFF2 =3D GET_MPIDR_AFF2 (CPUTargetList); + AFF3 =3D GET_MPIDR_AFF3 (CPUTargetList); + + /* + * Make target list from affinity 0, and ensure GICv3 SGI can target + * this PE. + */ + ApplicableTargets =3D (1 << AFF0); + + /* + * Evaluate the filter to see if this is for the target or all others + */ + Irm =3D (TargetListFilter =3D=3D ARM_GIC_ICDSGIR_FILTER_EVERYONEELSE) = ? SGIR_IRM_TO_OTHERS : SGIR_IRM_TO_AFF; + + /* Raise SGI to PE specified by its affinity */ + SGIValue =3D GICV3_SGIR_VALUE (AFF3, AFF2, AFF1, SgiId, Irm, Applicabl= eTargets); + + /* + * Ensure that any shared variable updates depending on out of band + * interrupt trigger are observed before raising SGI. + */ + ArmGicV3SendNsG1Sgi (SGIValue); + } } =20 /* diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 773b27954522..28d58f187d4f 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -110,6 +110,28 @@ // Bit Mask for #define ARM_GIC_ICCIAR_ACKINTID 0x3FF =20 +/* ICC SGI macros */ +#define SGIR_TGT_MASK ((UINT64)0xffff) +#define SGIR_AFF1_SHIFT 16 +#define SGIR_INTID_SHIFT 24 +#define SGIR_INTID_MASK ((UINT64)0xf) +#define SGIR_AFF2_SHIFT 32 +#define SGIR_IRM_SHIFT 40 +#define SGIR_IRM_MASK ((UINT64)0x1) +#define SGIR_AFF3_SHIFT 48 +#define SGIR_AFF_MASK ((UINT64)0xff) + +#define SGIR_IRM_TO_AFF 0 +#define SGIR_IRM_TO_OTHERS 1 + +#define GICV3_SGIR_VALUE(_aff3, _aff2, _aff1, _intid, _irm, _tgt) \ + ((((UINT64) (_aff3) & SGIR_AFF_MASK) << SGIR_AFF3_SHIFT) | \ + (((UINT64) (_irm) & SGIR_IRM_MASK) << SGIR_IRM_SHIFT) | \ + (((UINT64) (_aff2) & SGIR_AFF_MASK) << SGIR_AFF2_SHIFT) | \ + (((_intid) & SGIR_INTID_MASK) << SGIR_INTID_SHIFT) | \ + (((_aff1) & SGIR_AFF_MASK) << SGIR_AFF1_SHIFT) | \ + ((_tgt) & SGIR_TGT_MASK)) + UINT32 EFIAPI ArmGicGetInterfaceIdentification ( --=20 2.41.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#107189): https://edk2.groups.io/g/devel/message/107189 Mute This Topic: https://groups.io/mt/100337223/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 18:17:57 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+107190+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+107190+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=gmail.com ARC-Seal: i=1; a=rsa-sha256; t=1690229731; cv=none; d=zohomail.com; s=zohoarc; b=Qbnn1wyKki66PsWjS+2E6AJ0DXL0cxnymA1JFzdSjKFBZdt0mVzvspo369bzW6+upnSY1Apw4tc1ab3rgnzAcug6biFdxDzMrUD/oMNU3jLR7YUjDnzui8l6OwbWFv8qhLlc61OYW9CKaYosGDp1ZMTKKaekG3sn2G8tJ0aKroc= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1690229731; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=FICclHSV3wXblCBoCVZmbMODfAulFCFuglcXsz5I0lw=; b=eOuJ5QhyzdHY6NlLIJt9ImLClTzg4VKxKN9MytRTDcy1zsMIQb44W2kkOVV/eHAqJ1E0tr1HyY1Pn7xz2Ux0koN+xOMYwGgQHcfRtxmTBEOim/wF3gb1sfAJAYpkfVdoGjaSGuS5WffZb37n/teaWCR84SUJ/KoOVYS6lZQdb/0= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+107190+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1690229731312618.71718515506; Mon, 24 Jul 2023 13:15:31 -0700 (PDT) Return-Path: DKIM-Signature: a=rsa-sha256; bh=ME1tYTxwTi/qf3TjxjNdi324y7r94iZT+cGU6sivB/w=; c=relaxed/simple; d=groups.io; h=X-Received:X-Received:X-Received:X-Gm-Message-State:X-Google-Smtp-Source:X-Received:X-Received:From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:MIME-Version:Precedence:List-Subscribe:List-Help:Sender:List-Id:Mailing-List:Delivered-To:Reply-To:List-Unsubscribe-Post:List-Unsubscribe:Content-Transfer-Encoding; s=20140610; t=1690229731; v=1; b=PgseTWAxkgFENp+zn0tHqdP4yyOJObYRdctpPORdF9N7dtWZzfhhmeEonxj6IBfscsXaKDNV f01H7bbdk+bmJ6o7uIpksX0qb9MuwP/JMoDxIL3JjLc+GyTue5BY+7g/Qhrm0ZcZMXp3f8ut1UK Ko27OVVuj7362cF7bLWCr4m8= X-Received: by 127.0.0.2 with SMTP id EkNLYY1788612xxG3r8yeVcy; Mon, 24 Jul 2023 13:15:31 -0700 X-Received: from mail-pl1-f170.google.com (mail-pl1-f170.google.com [209.85.214.170]) by mx.groups.io with SMTP id smtpd.web11.4787.1690229730477987254 for ; Mon, 24 Jul 2023 13:15:30 -0700 X-Received: by mail-pl1-f170.google.com with SMTP id d9443c01a7336-1b9e93a538dso24805165ad.3 for ; Mon, 24 Jul 2023 13:15:30 -0700 (PDT) X-Gm-Message-State: doUesAYYYCalZb1iKLgRxyoOx1787277AA= X-Google-Smtp-Source: APBJJlGbh8YKzAG/Z//ai6vDGrzqOjGBEvSlyEdaTYtdvbIweHC28c5c4Kql4E7vQttPev2KzZl7Fg== X-Received: by 2002:a17:902:d509:b0:1b9:de67:2870 with SMTP id b9-20020a170902d50900b001b9de672870mr10684661plg.40.1690229729659; Mon, 24 Jul 2023 13:15:29 -0700 (PDT) X-Received: from MININT-0U7P5GU.redmond.corp.microsoft.com ([2001:4898:80e8:0:18a3:9b95:e44:14fd]) by smtp.gmail.com with ESMTPSA id y7-20020a1709029b8700b001b89045ff03sm9398104plp.233.2023.07.24.13.15.28 (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256); Mon, 24 Jul 2023 13:15:29 -0700 (PDT) From: "Kun Qin" To: devel@edk2.groups.io Cc: Leif Lindholm , Ard Biesheuvel , Sami Mujawar Subject: [edk2-devel] [PATCH v1 3/3] ArmPkg: ArmGic: Added functionalities to manipulate pending interrupts Date: Mon, 24 Jul 2023 13:15:22 -0700 Message-ID: <20230724201523.852-4-kuqin12@gmail.com> In-Reply-To: <20230724201523.852-1-kuqin12@gmail.com> References: <20230724201523.852-1-kuqin12@gmail.com> MIME-Version: 1.0 Precedence: Bulk List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,kuqin12@gmail.com List-Unsubscribe-Post: List-Unsubscribe=One-Click List-Unsubscribe: Content-Transfer-Encoding: quoted-printable X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1690229731738100010 Content-Type: text/plain; charset="utf-8" REF: https://bugzilla.tianocore.org/show_bug.cgi?id=3D4466 This change provides additional functionalities to `ArmGicLib` to manipulate pending interrupt related status. The added functions include: - `ArmGicSetPendingInterrupt` - `ArmGicClearPendingInterrupt` - `ArmGicIsInterruptPending` Cc: Leif Lindholm Cc: Ard Biesheuvel Cc: Sami Mujawar Signed-off-by: Kun Qin --- ArmPkg/Drivers/ArmGic/ArmGicLib.c | 162 ++++++++++++++++++++ ArmPkg/ArmPkg.ci.yaml | 2 + ArmPkg/Include/Library/ArmGicLib.h | 49 ++++++ 3 files changed, 213 insertions(+) diff --git a/ArmPkg/Drivers/ArmGic/ArmGicLib.c b/ArmPkg/Drivers/ArmGic/ArmG= icLib.c index 830d822d2c05..3844dc05e2af 100644 --- a/ArmPkg/Drivers/ArmGic/ArmGicLib.c +++ b/ArmPkg/Drivers/ArmGic/ArmGicLib.c @@ -33,6 +33,12 @@ #define IPRIORITY_ADDRESS(base, offset) ((base) +\ ARM_GICR_CTLR_FRAME_SIZE + ARM_GIC_ICDIPR + 4 * (offset)) =20 +#define ISPENDR_ADDRESS(base, offset) ((base) +\ + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ISPENDR + 4 * (offset)) + +#define ICPENDR_ADDRESS(base, offset) ((base) +\ + ARM_GICR_CTLR_FRAME_SIZE + ARM_GICR_ICPENDR + 4 * (offset)) + /** * * Return whether the Source interrupt index refers to a shared interrupt = (SPI) @@ -440,6 +446,162 @@ ArmGicIsInterruptEnabled ( return ((Interrupts & (1 << RegShift)) !=3D 0); } =20 +/** + Set an interrupt to pending state from GIC. + + @param GicDistributorBase Base address of platform GIC Distributor. + @param GicRedistributorBase Base address of platform GIC Redistributor. + @param Source Interrupt source ID. +**/ +VOID +EFIAPI +ArmGicSetPendingInterrupt ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source + ) +{ + UINT32 RegOffset; + UINTN RegShift; + ARM_GIC_ARCH_REVISION Revision; + UINTN GicCpuRedistributorBase; + + // Calculate enable register offset and bit position + RegOffset =3D (UINT32)(Source / 32); + RegShift =3D Source % 32; + + Revision =3D ArmGicGetSupportedArchRevision (); + if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || + FeaturePcdGet (PcdArmGicV3WithV2Legacy) || + SourceIsSpi (Source)) + { + // Write set-pending register + MmioWrite32 ( + GicDistributorBase + ARM_GIC_ICDSPR + (4 * RegOffset), + 1 << RegShift + ); + } else { + GicCpuRedistributorBase =3D GicGetCpuRedistributorBase ( + GicRedistributorBase, + Revision + ); + if (GicCpuRedistributorBase =3D=3D 0) { + ASSERT_EFI_ERROR (EFI_NOT_FOUND); + return; + } + + // Write set-enable register + MmioWrite32 ( + ISPENDR_ADDRESS (GicCpuRedistributorBase, RegOffset), + 1 << RegShift + ); + } +} + +/** + Clear a pending interrupt from GIC. + + @param GicDistributorBase Base address of platform GIC Distributor. + @param GicRedistributorBase Base address of platform GIC Redistributor. + @param Source Interrupt source ID. +**/ +VOID +EFIAPI +ArmGicClearPendingInterrupt ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source + ) +{ + UINT32 RegOffset; + UINTN RegShift; + ARM_GIC_ARCH_REVISION Revision; + UINTN GicCpuRedistributorBase; + + // Calculate enable register offset and bit position + RegOffset =3D (UINT32)(Source / 32); + RegShift =3D Source % 32; + + Revision =3D ArmGicGetSupportedArchRevision (); + if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || + FeaturePcdGet (PcdArmGicV3WithV2Legacy) || + SourceIsSpi (Source)) + { + // Write clear-enable register + MmioWrite32 ( + GicDistributorBase + ARM_GIC_ICDICPR + (4 * RegOffset), + 1 << RegShift + ); + } else { + GicCpuRedistributorBase =3D GicGetCpuRedistributorBase ( + GicRedistributorBase, + Revision + ); + if (GicCpuRedistributorBase =3D=3D 0) { + return; + } + + // Write clear-enable register + MmioWrite32 ( + ICPENDR_ADDRESS (GicCpuRedistributorBase, RegOffset), + 1 << RegShift + ); + } +} + +/** + Check if an interrupt is pending in GIC. + + @param GicDistributorBase Base address of platform GIC Distributor. + @param GicRedistributorBase Base address of platform GIC Redistributor. + @param Source Interrupt source ID. + + @return BOOLEAN TRUE if the interrupt is pending, FALSE otherwise. +**/ +BOOLEAN +EFIAPI +ArmGicIsInterruptPending ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source + ) +{ + UINT32 RegOffset; + UINTN RegShift; + ARM_GIC_ARCH_REVISION Revision; + UINTN GicCpuRedistributorBase; + UINT32 Interrupts; + + // Calculate enable register offset and bit position + RegOffset =3D (UINT32)(Source / 32); + RegShift =3D Source % 32; + + Revision =3D ArmGicGetSupportedArchRevision (); + if ((Revision =3D=3D ARM_GIC_ARCH_REVISION_2) || + FeaturePcdGet (PcdArmGicV3WithV2Legacy) || + SourceIsSpi (Source)) + { + Interrupts =3D MmioRead32 ( + GicDistributorBase + ARM_GIC_ICDSPR + (4 * RegOffset) + ); + } else { + GicCpuRedistributorBase =3D GicGetCpuRedistributorBase ( + GicRedistributorBase, + Revision + ); + if (GicCpuRedistributorBase =3D=3D 0) { + return 0; + } + + // Read set-enable register + Interrupts =3D MmioRead32 ( + ISPENDR_ADDRESS (GicCpuRedistributorBase, RegOffset) + ); + } + + return ((Interrupts & (1 << RegShift)) !=3D 0); +} + VOID EFIAPI ArmGicDisableDistributor ( diff --git a/ArmPkg/ArmPkg.ci.yaml b/ArmPkg/ArmPkg.ci.yaml index 8a8f738437d5..06e31498cf79 100644 --- a/ArmPkg/ArmPkg.ci.yaml +++ b/ArmPkg/ArmPkg.ci.yaml @@ -154,11 +154,13 @@ "icdsgir", "icdspr", "icenabler", + "icpendr", "intid", "ipriority", "irouter", "isenabler", "ishst", + "ispendr", "istatus", "itargets", "lable", diff --git a/ArmPkg/Include/Library/ArmGicLib.h b/ArmPkg/Include/Library/Ar= mGicLib.h index 28d58f187d4f..83d52756d61a 100644 --- a/ArmPkg/Include/Library/ArmGicLib.h +++ b/ArmPkg/Include/Library/ArmGicLib.h @@ -78,6 +78,8 @@ // GIC SGI & PPI Redistributor frame #define ARM_GICR_ISENABLER 0x0100 // Interrupt Set-Enable Registers #define ARM_GICR_ICENABLER 0x0180 // Interrupt Clear-Enable Registers +#define ARM_GICR_ISPENDR 0x0200 // Interrupt Set-Pending Registers +#define ARM_GICR_ICPENDR 0x0280 // Interrupt Clear-Pending Registe= rs =20 // GIC Cpu interface #define ARM_GIC_ICCICR 0x00 // CPU Interface Control Register @@ -167,6 +169,53 @@ ArmGicDisableInterruptInterface ( IN UINTN GicInterruptInterfaceBase ); =20 +/** + Set an interrupt to pending state from GIC. + + @param GicDistributorBase Base address of platform GIC Distributor. + @param GicRedistributorBase Base address of platform GIC Redistributor. + @param Source Interrupt source ID. +**/ +VOID +EFIAPI +ArmGicSetPendingInterrupt ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source + ); + +/** + Clear a pending interrupt from GIC. + + @param GicDistributorBase Base address of platform GIC Distributor. + @param GicRedistributorBase Base address of platform GIC Redistributor. + @param Source Interrupt source ID. +**/ +VOID +EFIAPI +ArmGicClearPendingInterrupt ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source + ); + +/** + Check if an interrupt is pending in GIC. + + @param GicDistributorBase Base address of platform GIC Distributor. + @param GicRedistributorBase Base address of platform GIC Redistributor. + @param Source Interrupt source ID. + + @return BOOLEAN TRUE if the interrupt is pending, FALSE otherwise. +**/ +BOOLEAN +EFIAPI +ArmGicIsInterruptPending ( + IN UINTN GicDistributorBase, + IN UINTN GicRedistributorBase, + IN UINTN Source + ); + VOID EFIAPI ArmGicEnableDistributor ( --=20 2.41.0.windows.2 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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