From nobody Fri May 17 11:59:00 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+106523+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106523+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1688056883; cv=none; d=zohomail.com; s=zohoarc; b=ZX2t0Z4tnnq2+EUINnqFrzRseqLPje2i7YbnknOBFLGpoi398GVc8Hr/N9lmy+07yR4Q/9cSgBnrAIwvYIOIOSDE07BrJGp1xYV9q/KycS46Rzyh3MxbxZmzEM1HeEwYyzPywCTjJM4ycv/0txapfk7pJBkyGwkzTUvgN5ns5S8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688056883; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=MxhJbMIFwuxPPlDK6rKjZFXMbVclxrYUleeuZjHIh8Q=; b=k/IPQ2bg415y68644Kx9gJAScYAc8cv5yIuEsB3xf804DzXsyJa7hKmjBWIJlInuutS26VWj4N1CPWEpan4r2oQEBKwZaswZflgWMM38DCEvXRNcHdQmdrYoDFR16YjAQjd6Wrh+QpHRFCJeCWk6/IlmmW3aSYfD0Psj61rfeeI= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106523+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1688056883699560.0830374339904; Thu, 29 Jun 2023 09:41:23 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id aIhDYY1788612xbPEro0POX6; Thu, 29 Jun 2023 09:41:23 -0700 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web11.1968.1688056881593582266 for ; Thu, 29 Jun 2023 09:41:22 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 6BF10260172; Thu, 29 Jun 2023 18:41:18 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id I6UWmPOUsRcd; Thu, 29 Jun 2023 18:41:16 +0200 (CEST) X-Received: from applejack.lan (83.21.150.32.ipv4.supernova.orange.pl [83.21.150.32]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 4B58D260A74; Thu, 29 Jun 2023 18:41:16 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Shashi Mallela , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH edk2-platforms v2 1/3] Platform/SbsaQemu: add GIC ITS support Date: Thu, 29 Jun 2023 18:41:04 +0200 Message-ID: <20230629164106.744289-2-marcin.juszkiewicz@linaro.org> In-Reply-To: <20230629164106.744289-1-marcin.juszkiewicz@linaro.org> References: <20230629164106.744289-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: 66Yz944a8LjVkVBnSoooMBgSx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1688056883; bh=u67ytTEK0fMst4kZfkt4HJF/rGmAdvmB0joVA6QmzqU=; h=Cc:Date:From:Reply-To:Subject:To; b=Fxf8GrufbNq3XBYtLfGCXqB735/DNRWlKKXXj5FlWqb2Y25FrtXH1lab86G+BWbm7fV YUnZxs/BMiWQvJlBfeqqM1tqUPEx8meWxvsEGN0B+pTwIhLg9jDSy8k9xVWs6Am6S+oVc qJP43SJYiCuesNDQDVGpiOziV2QNw4vYIp8= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1688056885512100009 Content-Type: text/plain; charset="utf-8" From: Shashi Mallela SBSA Reference Platform has GIC ITS support. Let make use of it. Base address is read from TF-A via SMC call. GIC ITS allows us to have complex PCI Express setups. Co-authored-by: Marcin Juszkiewicz Signed-off-by: Shashi Mallela Signed-off-by: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 3 + Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 3 + .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 2 + .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 1 + .../SbsaQemuPlatformDxe.inf | 1 + .../Include/IndustryStandard/SbsaQemuAcpi.h | 11 ++ .../Include/IndustryStandard/SbsaQemuSmc.h | 1 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 12 +- .../SbsaQemuPlatformDxe/SbsaQemuPlatformDxe.c | 10 ++ Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc | 135 ++++++++++++++++++ 10 files changed, 178 insertions(+), 1 deletion(-) create mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/Sbs= aQemu.dec index 5182978cf56d..ff2a4721a131 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -70,3 +70,6 @@ [PcdsDynamic.common] =20 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMajor|0x0|UINT3= 2|0x0000011E gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformVersionMinor|0x0|UINT3= 2|0x0000011F + + # ARM Generic Interrupt Controller ITS + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase|0|UINT64|0x00000120 diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/S= bsaQemu.dsc index b88729ad8ad6..4ae2479628b6 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -523,6 +523,9 @@ [PcdsDynamicDefault.common] gArmTokenSpaceGuid.PcdGicDistributorBase|0x40060000 gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x40080000 =20 + # GIC ITS + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase|0 + # # Set video resolution for boot options # PlatformDxe can set the former at runtime. diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu= /SbsaQemu/AcpiTables/AcpiTables.inf index 0501c670d565..554c5e4b6f9e 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -22,6 +22,7 @@ [Sources] Gtdt.aslc Mcfg.aslc Spcr.aslc + Iort.aslc =20 [Packages] ArmPlatformPkg/ArmPlatformPkg.dec @@ -75,3 +76,4 @@ [FixedPcd] [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index c1c33788567d..3ec7ffd8dd5c 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -48,6 +48,7 @@ [Pcd] =20 gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase =20 [Depex] gEfiAcpiTableProtocolGuid ## CONSUMES diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlat= formDxe.inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPla= tformDxe.inf index 545794a8c7ff..0e3b11d60426 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .inf @@ -43,6 +43,7 @@ [Pcd] =20 gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase =20 =20 [Depex] diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h = b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h index 853b81b34df5..983d17f6fa50 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuAcpi.h @@ -27,6 +27,7 @@ #define SBSAQEMU_MADT_GIC_HBASE 0x2c010000 #define SBSAQEMU_MADT_GIC_PMU_IRQ 23 #define SBSAQEMU_MADT_GICR_SIZE 0x4000000 +#define SBSAQEMU_MADT_GITS_SIZE 0x20000 =20 // Macro for MADT GIC Redistributor Structure #define SBSAQEMU_MADT_GICR_INIT() { = \ @@ -37,6 +38,16 @@ SBSAQEMU_MADT_GICR_SIZE /* DiscoveryRangeLength */ = \ } =20 +// Macro for MADT GIC ITS Structure +#define SBSAQEMU_MADT_GIC_ITS_INIT(GicItsId) { = \ + EFI_ACPI_6_5_GIC_ITS, /* Type */ = \ + sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE), /* Length */ = \ + EFI_ACPI_RESERVED_WORD, /* Reserved */ = \ + GicItsId, /* GicItsId */ = \ + PcdGet64 (PcdGicItsBase), /* PhysicalBaseAddress */ = \ + EFI_ACPI_RESERVED_DWORD /* Reserved2 */ = \ + } + #define SBSAQEMU_ACPI_SCOPE_OP_MAX_LENGTH 5 =20 #define SBSAQEMU_ACPI_SCOPE_NAME { '_', 'S', 'B', '_' } diff --git a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h b= /Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h index 7fbd3bd887d0..7934875e4aba 100644 --- a/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h +++ b/Silicon/Qemu/SbsaQemu/Include/IndustryStandard/SbsaQemuSmc.h @@ -13,5 +13,6 @@ =20 #define SIP_SVC_VERSION SMC_SIP_FUNCTION_ID(1) #define SIP_SVC_GET_GIC SMC_SIP_FUNCTION_ID(100) +#define SIP_SVC_GET_GIC_ITS SMC_SIP_FUNCTION_ID(101) =20 #endif /* SBSA_QEMU_SMC_H_ */ diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index ae5397bab768..961482269678 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -91,6 +91,11 @@ AddMadtTable ( // Initialize GIC Redistributor Structure EFI_ACPI_6_0_GICR_STRUCTURE Gicr =3D SBSAQEMU_MADT_GICR_INIT(); =20 + // Initialize GIC ITS Structure + EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its =3D SBSAQEMU_MADT_GIC_ITS_INIT(0); + + DEBUG ((DEBUG_ERROR, "itsBaseAddr is 0x%4x\n", PcdGet64 (PcdGicItsBase))= ); + // Get CoreCount which was determined eariler after parsing device tree NumCores =3D PcdGet32 (PcdCoreCount); =20 @@ -98,7 +103,8 @@ AddMadtTable ( TableSize =3D sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADE= R) + (sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) + sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) + - sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE) + + sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); =20 Status =3D gBS->AllocatePages ( AllocateAnyPages, @@ -138,6 +144,10 @@ AddMadtTable ( CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE)); New +=3D sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); =20 + // GIC ITS Structure + CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE)); + New +=3D sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); =20 Status =3D AcpiTable->InstallAcpiTable ( diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlat= formDxe.c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatf= ormDxe.c index f6a3e84483fe..ddcca2b7243c 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuPlatformDxe/SbsaQemuPlatformDxe= .c @@ -86,5 +86,15 @@ InitializeSbsaQemuPlatformDxe ( =20 DEBUG ((DEBUG_INFO, "GICR base: 0x%x\n", Arg0)); =20 + SmcResult =3D ArmCallSmc0 (SIP_SVC_GET_GIC_ITS, &Arg0, NULL, NULL); + if (SmcResult =3D=3D SMC_ARCH_CALL_SUCCESS) { + Result =3D PcdSet64S (PcdGicItsBase, Arg0); + ASSERT_RETURN_ERROR (Result); + } + + Arg0 =3D PcdGet64 (PcdGicItsBase); + + DEBUG ((DEBUG_INFO, "GICI base: 0x%x\n", Arg0)); + return EFI_SUCCESS; } diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc b/Silicon/Qemu/Sbsa= Qemu/AcpiTables/Iort.aslc new file mode 100644 index 000000000000..ec4ce504efd1 --- /dev/null +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc @@ -0,0 +1,135 @@ +/** @file + + Copyright (c) 2023, Linaro Ltd. All rights reserved.
+ + SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include +#include +#include + +#pragma pack(1) + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node; + UINT32 Identifiers; +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; + +typedef struct +{ + EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap; +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; + +typedef struct +{ + EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap; +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; + SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode; + SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; + SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; +} SBSA_IO_REMAPPING_STRUCTURE; + +#pragma pack () + +STATIC SBSA_IO_REMAPPING_STRUCTURE Iort =3D { + { + SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, + SBSA_IO_REMAPPING_STRUCTURE, + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00), + 3, // NumNodes + sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset + 0 // Reserved + }, + // SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE + { + // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE + { + // EFI_ACPI_6_0_IO_REMAPPING_NODE + { + EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length + 0, // Revision + 0, // Reserved + 0, // NumIdMappings + 0, // IdReference + }, + 1, // ITS count + }, + 0, // GIC ITS Identifiers + }, + // SMMU + { + // EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE + { + // EFI_ACPI_6_0_IO_REMAPPING_NODE + { + EFI_ACPI_IORT_TYPE_SMMUv3, // Type + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE), // Length + 2, // Revision + 0, // Reserved + 1, // NumIdMapping + OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap), = // IdReference + }, + 0x60050000, // Base address + EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags + 0, // Reserved + 0, // VATOS address + EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model + 74, // Event + 75, // Pri + 77, // Gerror + 76, // Sync + 0, // Proximity domain + 1, // DevIDMappingIndex + }, + // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE + { + 0x0000, // InputBase + 0xffff, // NumIds + 0x0000, // OutputBase + OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReferen= ce + 0, // Flags + }, + }, + // SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE + { + // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE + { + // EFI_ACPI_6_0_IO_REMAPPING_NODE + { + EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length + 0, // Revision + 0, // Reserved + 1, // NumIdMappings + OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // Id= Reference + }, + 1, // CacheCoherent + 0, // AllocationHints + 0, // Reserved + 0, // MemoryAccessFlags + EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute + 0x0, // PciSegmentNumber + //0, //MemoryAddressSizeLimit + }, + // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE + { + 0x0000, // InputBase + 0xffff, // NumIds + 0x0000, // OutputBase + OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReferen= ce + 0, // Flags + } + } +}; + +#pragma pack() + +VOID* CONST ReferenceAcpiTable =3D &Iort; \ No newline at end of file --=20 2.41.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106523): https://edk2.groups.io/g/devel/message/106523 Mute This Topic: https://groups.io/mt/99854679/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 11:59:00 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+106524+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106524+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1688056883; cv=none; d=zohomail.com; s=zohoarc; b=iPKlkNAW3gE4SjtAnCFCzWHdrnGVDOoX6jzH6OLezfQ1pniO3P78gsDvk8/cIMfBF2WIOAfdWl1TsS3nLSDQXZjI4lkTKmqHt9oKsJszDgKdgk4NG9v69kT/VevICzNz57YDKTuWw9Wk5HidpFQVXQoL8TJ1XmzRSFVkrhdoTVM= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688056883; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=ZjQD4WHDdP+2g0jLmZZaob3hg92ICJBJjte1FrNJ/kw=; b=SzZxhelwhOKLMnrpC1vZ8eMYIR0I08F6+msG08OZTicwMuq8SeLZVS3j/Ep5QXjHGR4n4+U+6X67e2QMNVTAD2QLRm+juS/eo1VBexnKepMfnj30ePmG24w/T61KNocV6/pYQB4TX2A/ikuyWhIx2PPyoA0YsxlM2MV/D68Tr8s= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106524+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1688056883163119.42108793974023; Thu, 29 Jun 2023 09:41:23 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id nZGgYY1788612xmPIErE4Sqw; Thu, 29 Jun 2023 09:41:22 -0700 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.1937.1688056881801544355 for ; Thu, 29 Jun 2023 09:41:22 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 291F7260A74; Thu, 29 Jun 2023 18:41:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id goeU1HI4M1QO; Thu, 29 Jun 2023 18:41:18 +0200 (CEST) X-Received: from applejack.lan (83.21.150.32.ipv4.supernova.orange.pl [83.21.150.32]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id B0823260A89; Thu, 29 Jun 2023 18:41:16 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Shashi Mallela , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH edk2-platforms v2 2/3] Platform/QemuSbsa: add dynamic PcdSmmuBase Date: Thu, 29 Jun 2023 18:41:05 +0200 Message-ID: <20230629164106.744289-3-marcin.juszkiewicz@linaro.org> In-Reply-To: <20230629164106.744289-1-marcin.juszkiewicz@linaro.org> References: <20230629164106.744289-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: XY3qMRo9UvAuzIv24EirOYtTx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1688056882; bh=nEw4nSfAE3UzJSMLVHcCPc0S10qGLtoVEmEmEXz/108=; h=Cc:Date:From:Reply-To:Subject:To; b=b7TIHO7XtJZ1Oq5vEETXgwmmMBWwQPP+2kr68lLTaBmqfju71ReqA62/x8WlDCcqdCF +z1Rg5beIjLZ5O9+6TTl06ibukApl+ry7Oe+5PzeX2m6vc5RmdRtSdAC6YvtV3VM5Wq4y iDd1Fp2FkoiwHVNSiKBMOIh1IVGR1vqyI5o= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1688056884105100003 Content-Type: text/plain; charset="utf-8" Store Smmu base address in variable in case it would be needed in more than one place. Signed-off-by: Marcin Juszkiewicz --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 1 + Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 1 + 2 files changed, 2 insertions(+) diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/Sbs= aQemu.dec index ff2a4721a131..aab2894e6455 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -73,3 +73,4 @@ [PcdsDynamic.common] =20 # ARM Generic Interrupt Controller ITS gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase|0|UINT64|0x00000120 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase|0|UINT64|0x00000121 diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/S= bsaQemu.dsc index 4ae2479628b6..be406144c242 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -525,6 +525,7 @@ [PcdsDynamicDefault.common] =20 # GIC ITS gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase|0 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase|0x60050000 =20 # # Set video resolution for boot options --=20 2.41.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106524): https://edk2.groups.io/g/devel/message/106524 Mute This Topic: https://groups.io/mt/99854680/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Fri May 17 11:59:00 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+106525+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106525+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1688056885; cv=none; d=zohomail.com; s=zohoarc; b=Tx8zWK+5ORZCLZulgXalRRy3ONHm6PQ4tvtg1CzOIIzZHLrGOKdklKayWX4T6vZGz39yjy/0ssWf9rs9/yg5HOnmNwEyFQEYjYRsu58MhTe7htOYwsGVDeY/PpLRkr6EOYZxehhIx48Df2GgmS7VqnGt/+qOh1VXO3UCLG+SGwY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1688056885; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=t8ys3OwteJ3i4EysruIeswH3et+IVqGepAGB4S/tayU=; b=gznG7QqDHo43sBcKLW1Y/BZvsQGqw75RbUNnXiNJ8f/1R/aTwcSM6gQ9zrla4pLNLHxePqDcxbZgiGyJMWoLLfKHtYExor9f3awm/5GJZzm1IP2CU7fG2+njGOaRGuo8xRGPyWDji75Nb5gsAK0WgBfuKlCsWdVi1PZJlkxmiQs= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106525+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1688056885160413.60584233401266; Thu, 29 Jun 2023 09:41:25 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id J4wPYY1788612x8AzQRaW2Z8; Thu, 29 Jun 2023 09:41:24 -0700 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web10.1939.1688056882222022724 for ; Thu, 29 Jun 2023 09:41:22 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id D1611260A89; Thu, 29 Jun 2023 18:41:20 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id 2vCSzX725d5L; Thu, 29 Jun 2023 18:41:18 +0200 (CEST) X-Received: from applejack.lan (83.21.150.32.ipv4.supernova.orange.pl [83.21.150.32]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 1BED2260ACF; Thu, 29 Jun 2023 18:41:17 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Shashi Mallela , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH edk2-platforms v2 3/3] Platform/SbsaQemu: handle systems without GIC ITS Date: Thu, 29 Jun 2023 18:41:06 +0200 Message-ID: <20230629164106.744289-4-marcin.juszkiewicz@linaro.org> In-Reply-To: <20230629164106.744289-1-marcin.juszkiewicz@linaro.org> References: <20230629164106.744289-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: 6rESDxaBtjyu6Zrcj27gWUNqx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1688056884; bh=E6wmrR54Aof2n/RVYUHqoBczmq+JLG1q9+gy93Z4nUY=; h=Cc:Date:From:Reply-To:Subject:To; b=hQrhW7vAH2HNyzso7wZmG/27QY9uVvPx6P+6EW6B3YfjvAKTxWrgDx9oemPLb29v2zN Jxld4fCNgN6V0VOFWi3XTTpV8OVeVgPUP2kLI+WOTkz/3KEcvHVB/0y0RwtCmCs9Sbc+W lBto4uO+cq0ubx3Lzh569XhJDpVWZd9i0RM= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1688056885554100010 Content-Type: text/plain; charset="utf-8" If firmware is used with QEMU 8.0 or older then there will be no GIC ITS support. In such case we would not add information about it into MADT and IORT tables. Signed-off-by: Marcin Juszkiewicz --- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 - .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 1 + .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 226 +++++++++++++++++- Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc | 135 ----------- 4 files changed, 216 insertions(+), 147 deletions(-) delete mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu= /SbsaQemu/AcpiTables/AcpiTables.inf index 554c5e4b6f9e..97021f7971c7 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -22,7 +22,6 @@ [Sources] Gtdt.aslc Mcfg.aslc Spcr.aslc - Iort.aslc =20 [Packages] ArmPlatformPkg/ArmPlatformPkg.dec diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index 3ec7ffd8dd5c..14d760b36400 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -49,6 +49,7 @@ [Pcd] gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdGicItsBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdSmmuBase =20 [Depex] gEfiAcpiTableProtocolGuid ## CONSUMES diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index 961482269678..17d47f56d611 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -8,6 +8,7 @@ **/ #include #include +#include #include #include #include @@ -21,6 +22,34 @@ #include #include =20 +#pragma pack(1) + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node; + UINT32 Identifiers; +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; + +typedef struct +{ + EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap; +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; + +typedef struct +{ + EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; + EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap; +} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; + +typedef struct { + EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; + SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode; + SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; + SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; +} SBSA_IO_REMAPPING_STRUCTURE; + +#pragma pack () + /* * A Function to Compute the ACPI Table Checksum */ @@ -40,6 +69,169 @@ AcpiPlatformChecksum ( Buffer[ChecksumOffset] =3D CalculateCheckSum8(Buffer, Size); } =20 +/* + * A function that add the IORT ACPI table. + IN EFI_ACPI_COMMON_HEADER *CurrentTable + */ +EFI_STATUS +AddIortTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + UINTN GicItsBase; + + // Initialize IORT ACPI Header + EFI_ACPI_6_0_IO_REMAPPING_TABLE Header =3D { + SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, + SBSA_IO_REMAPPING_STRUCTURE, + EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00), + 2, + sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset + 0 }; + + // Initialize SMMU3 Structure + SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE Smmu3 =3D { + { + { + EFI_ACPI_IORT_TYPE_SMMUv3, + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE), + 2, // Revision + 0, // Reserved + 1, // NumIdMapping + OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap) /= / IdReference + }, + PcdGet64 (PcdSmmuBase), // Base address + EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags + 0, // Reserved + 0, // VATOS address + EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model + 0, // Event + 0, // Pri + 0, // Gerror + 0, // Sync + 0, // Proximity domain + 1 // DevIDMappingIndex + }, + { + 0x0000, // InputBase + 0xffff, // NumIds + 0x0000, // OutputBase + OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReferen= ce + 0 // Flags + } + }; + + SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE Rc =3D { + { + { + EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length + 0, // Revision + 0, // Reserved + 1, // NumIdMappings + OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // Id= Reference + }, + 1, // CacheCoherent + 0, // AllocationHints + 0, // Reserved + 0, // MemoryAccessFlags + EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute + 0x0, // PciSegmentNumber + //0, //MemoryAddressSizeLimit + }, + { + 0x0000, // InputBase + 0xffff, // NumIds + 0x0000, // OutputBase + OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReferen= ce + 0, // Flags + } + }; + + SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Its =3D { + // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE + { + // EFI_ACPI_6_0_IO_REMAPPING_NODE + { + EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length + 0, // Revision + 0, // Identifier + 0, // NumIdMappings + 0, // IdReference + }, + 0, // ITS count + }, + 0, // GIC ITS Identifiers + }; + + // Calculate the new table size based on the number of cores + TableSize =3D sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE) + + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE) + + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE) + + sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE) ; + + Status =3D gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to allocate pages for IORT table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New =3D (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + GicItsBase =3D PcdGet64 (PcdGicItsBase); + + if (GicItsBase > 0) { + Header.NumNodes =3D 3; + } + + // Add the ACPI Description table header + CopyMem (New, &Header, sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE)); + ((EFI_ACPI_DESCRIPTION_HEADER*) New)->Length =3D TableSize; + New +=3D sizeof (EFI_ACPI_6_0_IO_REMAPPING_TABLE); + + // SMMUv3 Node + CopyMem (New, &Smmu3, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE)= ); + New +=3D sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE); + + // RC Node + CopyMem (New, &Rc, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE)); + New +=3D sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE); + + if (GicItsBase > 0) { + Its.Node.NumItsIdentifiers =3D 1; + + // ITS Node + CopyMem (New, &Its, sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE)); + New +=3D sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE); + } + + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status =3D AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to install IORT table\n")); + } + + return Status; +} + /* * A function that add the MADT ACPI table. IN EFI_ACPI_COMMON_HEADER *CurrentTable @@ -56,6 +248,7 @@ AddMadtTable ( UINT8 *New; UINT32 NumCores; UINT32 CoreIndex; + UINTN GicItsBase; =20 // Initialize MADT ACPI Header EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER Header =3D { @@ -91,11 +284,6 @@ AddMadtTable ( // Initialize GIC Redistributor Structure EFI_ACPI_6_0_GICR_STRUCTURE Gicr =3D SBSAQEMU_MADT_GICR_INIT(); =20 - // Initialize GIC ITS Structure - EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its =3D SBSAQEMU_MADT_GIC_ITS_INIT(0); - - DEBUG ((DEBUG_ERROR, "itsBaseAddr is 0x%4x\n", PcdGet64 (PcdGicItsBase))= ); - // Get CoreCount which was determined eariler after parsing device tree NumCores =3D PcdGet32 (PcdCoreCount); =20 @@ -103,8 +291,17 @@ AddMadtTable ( TableSize =3D sizeof (EFI_ACPI_6_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADE= R) + (sizeof (EFI_ACPI_6_0_GIC_STRUCTURE) * NumCores) + sizeof (EFI_ACPI_6_0_GIC_DISTRIBUTOR_STRUCTURE) + - sizeof (EFI_ACPI_6_0_GICR_STRUCTURE) + - sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); + sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); + + // Initialize GIC ITS Structure + EFI_ACPI_6_5_GIC_ITS_STRUCTURE Gic_Its =3D SBSAQEMU_MADT_GIC_ITS_INIT(0); + + GicItsBase =3D PcdGet64 (PcdGicItsBase); + DEBUG ((DEBUG_ERROR, "itsBaseAddr is 0x%8x\n", GicItsBase)); + + if (GicItsBase > 0) { + TableSize +=3D sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); + } =20 Status =3D gBS->AllocatePages ( AllocateAnyPages, @@ -144,9 +341,11 @@ AddMadtTable ( CopyMem (New, &Gicr, sizeof (EFI_ACPI_6_0_GICR_STRUCTURE)); New +=3D sizeof (EFI_ACPI_6_0_GICR_STRUCTURE); =20 - // GIC ITS Structure - CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE)); - New +=3D sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); + if (GicItsBase > 0) { + // GIC ITS Structure + CopyMem (New, &Gic_Its, sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE)); + New +=3D sizeof (EFI_ACPI_6_5_GIC_ITS_STRUCTURE); + } =20 AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); =20 @@ -317,7 +516,7 @@ AddSsdtTable ( } =20 /* - * A function that adds the SSDT ACPI table. + * A function that adds the PPTT ACPI table. */ EFI_STATUS AddPpttTable ( @@ -448,6 +647,11 @@ InitializeSbsaQemuAcpiDxe ( return Status; } =20 + Status =3D AddIortTable (AcpiTable); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Failed to add IORT table\n")); + } + Status =3D AddMadtTable (AcpiTable); if (EFI_ERROR(Status)) { DEBUG ((DEBUG_ERROR, "Failed to add MADT table\n")); diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc b/Silicon/Qemu/Sbsa= Qemu/AcpiTables/Iort.aslc deleted file mode 100644 index ec4ce504efd1..000000000000 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Iort.aslc +++ /dev/null @@ -1,135 +0,0 @@ -/** @file - - Copyright (c) 2023, Linaro Ltd. All rights reserved.
- - SPDX-License-Identifier: BSD-2-Clause-Patent - -**/ - -#include -#include -#include - -#pragma pack(1) - -typedef struct { - EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE Node; - UINT32 Identifiers; -} SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE; - -typedef struct -{ - EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; - EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE SmmuIdMap; -} SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE; - -typedef struct -{ - EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; - EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE RcIdMap; -} SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE; - -typedef struct { - EFI_ACPI_6_0_IO_REMAPPING_TABLE Iort; - SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE ItsNode; - SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE SmmuNode; - SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE RcNode; -} SBSA_IO_REMAPPING_STRUCTURE; - -#pragma pack () - -STATIC SBSA_IO_REMAPPING_STRUCTURE Iort =3D { - { - SBSAQEMU_ACPI_HEADER(EFI_ACPI_6_0_IO_REMAPPING_TABLE_SIGNATURE, - SBSA_IO_REMAPPING_STRUCTURE, - EFI_ACPI_IO_REMAPPING_TABLE_REVISION_00), - 3, // NumNodes - sizeof(EFI_ACPI_6_0_IO_REMAPPING_TABLE), // NodeOffset - 0 // Reserved - }, - // SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE - { - // EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE - { - // EFI_ACPI_6_0_IO_REMAPPING_NODE - { - EFI_ACPI_IORT_TYPE_ITS_GROUP, // Type - sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_ITS_NODE), // Length - 0, // Revision - 0, // Reserved - 0, // NumIdMappings - 0, // IdReference - }, - 1, // ITS count - }, - 0, // GIC ITS Identifiers - }, - // SMMU - { - // EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE - { - // EFI_ACPI_6_0_IO_REMAPPING_NODE - { - EFI_ACPI_IORT_TYPE_SMMUv3, // Type - sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE), // Length - 2, // Revision - 0, // Reserved - 1, // NumIdMapping - OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_SMMU3_NODE, SmmuIdMap), = // IdReference - }, - 0x60050000, // Base address - EFI_ACPI_IORT_SMMUv3_FLAG_COHAC_OVERRIDE, // Flags - 0, // Reserved - 0, // VATOS address - EFI_ACPI_IORT_SMMUv3_MODEL_GENERIC, // SMMUv3 Model - 74, // Event - 75, // Pri - 77, // Gerror - 76, // Sync - 0, // Proximity domain - 1, // DevIDMappingIndex - }, - // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE - { - 0x0000, // InputBase - 0xffff, // NumIds - 0x0000, // OutputBase - OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, ItsNode), // OutputReferen= ce - 0, // Flags - }, - }, - // SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE - { - // EFI_ACPI_6_0_IO_REMAPPING_RC_NODE - { - // EFI_ACPI_6_0_IO_REMAPPING_NODE - { - EFI_ACPI_IORT_TYPE_ROOT_COMPLEX, // Type - sizeof (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE), // Length - 0, // Revision - 0, // Reserved - 1, // NumIdMappings - OFFSET_OF (SBSA_EFI_ACPI_6_0_IO_REMAPPING_RC_NODE, RcIdMap) // Id= Reference - }, - 1, // CacheCoherent - 0, // AllocationHints - 0, // Reserved - 0, // MemoryAccessFlags - EFI_ACPI_IORT_ROOT_COMPLEX_ATS_UNSUPPORTED, // AtsAttribute - 0x0, // PciSegmentNumber - //0, //MemoryAddressSizeLimit - }, - // EFI_ACPI_6_0_IO_REMAPPING_ID_TABLE - { - 0x0000, // InputBase - 0xffff, // NumIds - 0x0000, // OutputBase - OFFSET_OF (SBSA_IO_REMAPPING_STRUCTURE, SmmuNode), // OutputReferen= ce - 0, // Flags - } - } -}; - -#pragma pack() - -VOID* CONST ReferenceAcpiTable =3D &Iort; \ No newline at end of file --=20 2.41.0 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106525): https://edk2.groups.io/g/devel/message/106525 Mute This Topic: https://groups.io/mt/99854681/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-