From nobody Thu May 16 03:37:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+106063+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106063+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1686684571; cv=none; d=zohomail.com; s=zohoarc; b=amGRT21T1kl8itQVm7v98U+Bc5Y6IzleBwmzK2JmJTZI8fb5lalv5MoBHGGflLQqwp7T0RNUrD8Dgl9KxXUQ/0En6RGpsz02mxUk4JY9woKDrsNJSxfbQfVB678THoFxlFS1vLzHjHlGN5Aq8llHh3hv/Sq7NIBesswRgEUHICY= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686684571; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; 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Tue, 13 Jun 2023 21:29:26 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id vGx7FDSSQqJN; Tue, 13 Jun 2023 21:29:24 +0200 (CEST) X-Received: from applejack.lan (83.11.39.176.ipv4.supernova.orange.pl [83.11.39.176]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 38E0626021A; Tue, 13 Jun 2023 21:29:24 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH edk2-platforms 1/3] WIP: SbsaQemu: make PCIe variables dynamic (part 1) Date: Tue, 13 Jun 2023 21:28:58 +0200 Message-Id: <20230613192900.158022-2-marcin.juszkiewicz@linaro.org> In-Reply-To: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> References: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: 8lV1qjJikOWJh3CYZ37q3iifx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1686684570; bh=4Jvhjzs621iQgZrmVEDD+gl0OqGyQuVnwosuMn+sk4Y=; h=Cc:Date:From:Reply-To:Subject:To; b=Um2cJugoTW67yIgZjvZWBIsWJgdIA3Kxz/vYW35VFbQSiOIOIphpwk8lf06c1tgZqEj GZbrbT/CNE4kOZ4yaRUhBEj8U+ayZekNDuKCNITGN+vQvtIUIIEtpZGDiAebb+QBnjlGa tqHZWowhDgwjH1zYjrj+tbnj7/3MI43U9zs= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1686684572534100011 Content-Type: text/plain; charset="utf-8" DSDT and PciHostBridge gets hardcoded values directly instead of using FixedPcd* functions. --- .../SbsaQemuPciHostBridgeLib.c | 16 ++++---- Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl | 38 +++++++++---------- 2 files changed, 27 insertions(+), 27 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQem= uPciHostBridgeLib.c b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLi= b/SbsaQemuPciHostBridgeLib.c index 9739c7500def..08e9b23c5b33 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHos= tBridgeLib.c +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHos= tBridgeLib.c @@ -83,31 +83,31 @@ STATIC PCI_ROOT_BRIDGE mRootBridge =3D { { /* PCI_ROOT_BRIDGE_APERTURE Bus; Bus aperture which can be used by the * root bridge. */ - FixedPcdGet32 (PcdPciBusMin), - FixedPcdGet32 (PcdPciBusMax) + 0, //PcdGet32 (PcdPciBusMin), + 255 //PcdGet32 (PcdPciBusMax) }, =20 /* PCI_ROOT_BRIDGE_APERTURE Io; IO aperture which can be used by the root bridge */ { - FixedPcdGet64 (PcdPciIoBase), - FixedPcdGet64 (PcdPciIoBase) + FixedPcdGet64 (PcdPciIoSize) - 1 + 0, //PcdGet64 (PcdPciIoBase), + 0XFFFF //PcdGet64 (PcdPciIoBase) + PcdGet64 (PcdPciIoSize) - 1 }, =20 /* PCI_ROOT_BRIDGE_APERTURE Mem; MMIO aperture below 4GB which can be us= ed by the root bridge (gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation as 0x0) */ { - FixedPcdGet32 (PcdPciMmio32Base), - FixedPcdGet32 (PcdPciMmio32Base) + FixedPcdGet32 (PcdPciMmio32Size) - = 1, + 0x80000000, //PcdGet32 (PcdPciMmio32Base), + 0xEFFFFFFF //PcdGet32 (PcdPciMmio32Base) + PcdGet32 (PcdPciMmio32Siz= e) - 1, }, =20 /* PCI_ROOT_BRIDGE_APERTURE MemAbove4G; MMIO aperture above 4GB which ca= n be used by the root bridge. (gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation as 0x0) */ { - FixedPcdGet64 (PcdPciMmio64Base), - FixedPcdGet64 (PcdPciMmio64Base) + FixedPcdGet64 (PcdPciMmio64Size) - 1 + 0x0100000000, //PcdGet64 (PcdPciMmio64Base), + 0xFFFFFFFFFF //PcdGet64 (PcdPciMmio64Base) + PcdGet64 (PcdPciMmio64S= ize) - 1 }, =20 /* PCI_ROOT_BRIDGE_APERTURE PMem; Prefetchable MMIO aperture below 4GB w= hich diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl b/Silicon/Qemu/SbsaQ= emu/AcpiTables/Dsdt.asl index e50772fcf76d..7193c87cdcf2 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/Dsdt.asl @@ -198,7 +198,7 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", } =20 Method (_CBA, 0, NotSerialized) { - return (FixedPcdGet32 (PcdPciExpressBaseAddress)) + return (0xF0000000) // return (PcdGet32 (PcdPciExpressBaseAddres= s)) } =20 LINK_DEVICE(0, GSI0, 0x23) @@ -376,8 +376,8 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", ResourceProducer, MinFixed, MaxFixed, PosDecode, 0, // AddressGranularity - FixedPcdGet32 (PcdPciBusMin), // AddressMinimum - Minimum Bus Nu= mber - FixedPcdGet32 (PcdPciBusMax), // AddressMaximum - Maximum Bus Nu= mber + 0, // PcdGet32 (PcdPciBusMin), // AddressMinimum - Minimum Bus= Number + 255, // PcdGet32 (PcdPciBusMax), // AddressMaximum - Maximum Bus= Number 0, // AddressTranslation - Set to 0 256 // RangeLength - Number of Busses ) @@ -387,10 +387,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity - FixedPcdGet32 (PcdPciMmio32Base), // Min Base Address - FixedPcdGet32 (PcdPciMmio32Limit), // Max Base Address - FixedPcdGet32 (PcdPciMmio32Translation), // Translate - FixedPcdGet32 (PcdPciMmio32Size) // Length + 0x80000000, // PcdGet32 (PcdPciMmio32Base), // Min Base A= ddress + 0xEFFFFFFF, // PcdGet32 (PcdPciMmio32Limit), // Max Base A= ddress + 0, // PcdGet32 (PcdPciMmio32Translation), // Translate + 0x70000000, // PcdGet32 (PcdPciMmio32Size) // Length ) =20 QWordMemory ( // 64-bit BAR Windows @@ -398,10 +398,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", MinFixed, MaxFixed, Cacheable, ReadWrite, 0x00000000, // Granularity - FixedPcdGet64 (PcdPciMmio64Base), // Min Base Address - FixedPcdGet64 (PcdPciMmio64Limit), // Max Base Address - FixedPcdGet64 (PcdPciMmio64Translation), // Translate - FixedPcdGet64 (PcdPciMmio64Size) // Length + 0x100000000, // PcdGet64 (PcdPciMmio64Base), // Min Base= Address + 0xFFFFFFFFFF, // PcdGet64 (PcdPciMmio64Limit), // Max Base= Address + 0, // PcdGet64 (PcdPciMmio64Translation), // Translate + 0xFF00000000, // PcdGet64 (PcdPciMmio64Size) // Length ) =20 DWordIo ( // IO window @@ -411,10 +411,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", PosDecode, EntireRange, 0x00000000, // Granularity - FixedPcdGet32 (PcdPciIoBase), // Min Base Address - FixedPcdGet32 (PcdPciIoLimit), // Max Base Address - FixedPcdGet32 (PcdPciIoTranslation), // Translate - FixedPcdGet32 (PcdPciIoSize), // Length + 0, // PcdGet32 (PcdPciIoBase), // Min Base A= ddress + 0x0000ffff, // PcdGet32 (PcdPciIoLimit), // Max Base A= ddress + 0x7fff0000, // PcdGet32 (PcdPciIoTranslation), // Translate + 0x00010000, // PcdGet32 (PcdPciIoSize), // Length ,,,TypeTranslation ) }) // Name(RBUF) @@ -429,10 +429,10 @@ DefinitionBlock ("DsdtTable.aml", "DSDT", { QWordMemory (ResourceProducer, PosDecode, MinFixed, MaxFixed, N= onCacheable, ReadWrite, 0x0000000000000000, // Granularity - FixedPcdGet64 (PcdPciExpressBaseAddress), // Range Minimum - FixedPcdGet64 (PcdPciExpressBarLimit), // Range Maximum - 0x0000000000000000, // Translation Offset - FixedPcdGet64 (PcdPciExpressBarSize), // Length + 0xf0000000, // PcdGet64 (PcdPciExpressBaseAddress), // = Range Minimum + 0xFFFFFFFF, // PcdGet64 (PcdPciExpressBarLimit), // = Range Maximum + 0x0000000000000000, // Translation Offset + 0x10000000, // PcdGet64 (PcdPciExpressBarSize), // = Length ,, , AddressRangeMemory, TypeStatic) }) Method (_STA) { --=20 2.40.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106063): https://edk2.groups.io/g/devel/message/106063 Mute This Topic: https://groups.io/mt/99513049/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Thu May 16 03:37:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+106064+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106064+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1686684570; cv=none; d=zohomail.com; s=zohoarc; b=M8hNyplaLj7L7zN7Ks5I7xDejkZU7LrNIm635dALBzLCGZ3mp7adsBSyZfHVYf4mj/amOu6ew2vxan7D5Gl4Tb5AssXBLGbO97uP+Zdhf6VXfTmnsT+kjeXzpfoAotki2x1RIHUL83rN6QK5IogxzGxJNLuCOJVlFOuTHn+s52c= ARC-Message-Signature: i=1; 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Tue, 13 Jun 2023 12:29:29 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id CFAD926021A; Tue, 13 Jun 2023 21:29:27 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id qMBnoJIk7bdM; Tue, 13 Jun 2023 21:29:26 +0200 (CEST) X-Received: from applejack.lan (83.11.39.176.ipv4.supernova.orange.pl [83.11.39.176]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 9C552260A8B; Tue, 13 Jun 2023 21:29:24 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH edk2-platforms 2/3] WIP: SbsaQemu: make PCIe variables dynamic (part 2) Date: Tue, 13 Jun 2023 21:28:59 +0200 Message-Id: <20230613192900.158022-3-marcin.juszkiewicz@linaro.org> In-Reply-To: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> References: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: fMoUxMifsIg3kKZKYkfHwecdx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1686684570; bh=DfUheERQzN+zw852UUF31yROLfcRnbeBnghlaPdh6z4=; h=Cc:Date:From:Reply-To:Subject:To; b=NlIC+EIRpdjqYP8icM7ixTjNG5tqEIdFlhIC5oqgsyj1IfsdhToMJSAuQARzCjn2GBw dQU23GRW2Tq6MO+MkSdK5zQ/0CuYL10GFHUssoVNyffeQK9KKANy2gnvZYGxdj3YoKf3K p03Zhqdn4uj14kPjsc2R5PsymZRyJPESV6s= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1686684572336100006 Content-Type: text/plain; charset="utf-8" Create MCFG table directly from C code instead of ASLC as we cannot use FixedPcd* for PCIe data. --- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 1 - .../SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf | 9 +++ .../Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c | 74 +++++++++++++++++++ Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc | 43 ----------- 4 files changed, 83 insertions(+), 44 deletions(-) delete mode 100644 Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu= /SbsaQemu/AcpiTables/AcpiTables.inf index 0501c670d565..5607878c2040 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -20,7 +20,6 @@ [Sources] Dsdt.asl Fadt.aslc Gtdt.aslc - Mcfg.aslc Spcr.aslc =20 [Packages] diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= inf b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf index c1c33788567d..aad4c8086c40 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.inf @@ -43,11 +43,20 @@ [LibraryClasses] =20 [Pcd] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiTableStorageFile + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount =20 gArmTokenSpaceGuid.PcdGicDistributorBase gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdPciBusMin + gArmTokenSpaceGuid.PcdPciBusMax + gArmTokenSpaceGuid.PcdPciIoBase + gArmTokenSpaceGuid.PcdPciIoSize + gArmTokenSpaceGuid.PcdPciMmio32Base + gArmTokenSpaceGuid.PcdPciMmio32Size + gArmTokenSpaceGuid.PcdPciMmio64Base + gArmTokenSpaceGuid.PcdPciMmio64Size =20 [Depex] gEfiAcpiTableProtocolGuid ## CONSUMES diff --git a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.= c b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c index ae5397bab768..af95f7e14672 100644 --- a/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c +++ b/Silicon/Qemu/SbsaQemu/Drivers/SbsaQemuAcpiDxe/SbsaQemuAcpiDxe.c @@ -8,6 +8,7 @@ **/ #include #include +#include #include #include #include @@ -306,6 +307,74 @@ AddSsdtTable ( return Status; } =20 +/* + * A function that adds the MCFG ACPI table. + */ +EFI_STATUS +AddMcfgTable ( + IN EFI_ACPI_TABLE_PROTOCOL *AcpiTable + ) +{ + EFI_STATUS Status; + UINTN TableHandle; + UINT32 TableSize; + EFI_PHYSICAL_ADDRESS PageAddress; + UINT8 *New; + + EFI_ACPI_DESCRIPTION_HEADER Header =3D + SBSAQEMU_ACPI_HEADER ( + EFI_ACPI_6_5_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDR= ESS_DESCRIPTION_TABLE_SIGNATURE, + EFI_ACPI_DESCRIPTION_HEADER, + EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION); + + TableSize =3D sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_= TABLE_HEADER) + + sizeof(EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADD= RESS_ALLOCATION_STRUCTURE); + + Status =3D gBS->AllocatePages ( + AllocateAnyPages, + EfiACPIReclaimMemory, + EFI_SIZE_TO_PAGES (TableSize), + &PageAddress + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to allocate pages for MCFG table\n")); + return EFI_OUT_OF_RESOURCES; + } + + New =3D (UINT8 *)(UINTN) PageAddress; + ZeroMem (New, TableSize); + + Header.Length =3D TableSize; + + // Add the ACPI Description table header + CopyMem (New, &Header, sizeof (EFI_ACPI_DESCRIPTION_HEADER)); + New +=3D sizeof (EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE= _HEADER); + + EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCAT= ION_STRUCTURE *CfgPtr; + + CfgPtr =3D (VOID *)New; + + CfgPtr->BaseAddress =3D PcdGet64 (PcdPciExpressBaseAddress); + CfgPtr->StartBusNumber =3D PcdGet32 (PcdPciBusMin); + CfgPtr->EndBusNumber =3D PcdGet32 (PcdPciBusMax); + CfgPtr->PciSegmentGroupNumber =3D 0; + + // Perform Checksum + AcpiPlatformChecksum ((UINT8*) PageAddress, TableSize); + + Status =3D AcpiTable->InstallAcpiTable ( + AcpiTable, + (EFI_ACPI_COMMON_HEADER *)PageAddress, + TableSize, + &TableHandle + ); + if (EFI_ERROR(Status)) { + DEBUG ((DEBUG_ERROR, "Failed to install MCFG table\n")); + } + + return Status; +} + /* * A function that adds the SSDT ACPI table. */ @@ -443,6 +512,11 @@ InitializeSbsaQemuAcpiDxe ( DEBUG ((DEBUG_ERROR, "Failed to add MADT table\n")); } =20 + Status =3D AddMcfgTable (AcpiTable); + if (EFI_ERROR (Status)) { + DEBUG ((DEBUG_ERROR, "Failed to add MCFG table\n")); + } + Status =3D AddSsdtTable (AcpiTable); if (EFI_ERROR(Status)) { DEBUG ((DEBUG_ERROR, "Failed to add SSDT table\n")); diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc b/Silicon/Qemu/Sbsa= Qemu/AcpiTables/Mcfg.aslc deleted file mode 100644 index 289f4ad4ea3a..000000000000 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/Mcfg.aslc +++ /dev/null @@ -1,43 +0,0 @@ -/** @file -* ACPI Memory mapped configuration space base address Description Table (= MCFG). -* -* Copyright (c) 2020, Linaro Limited. All rights reserved. -* -* SPDX-License-Identifier: BSD-2-Clause-Patent -**/ - -#include -#include -#include - -#pragma pack(push, 1) - -typedef struct { - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_HEADER Header; - EFI_ACPI_MEMORY_MAPPED_ENHANCED_CONFIGURATION_SPACE_BASE_ADDRESS_ALLOCAT= ION_STRUCTURE Structure[1]; -} EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE; - -EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE Mcfg = =3D { - { - SBSAQEMU_ACPI_HEADER ( - EFI_ACPI_6_0_PCI_EXPRESS_MEMORY_MAPPED_CONFIGURATION_SPACE_BASE_ADDR= ESS_DESCRIPTION_TABLE_SIGNATURE, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_DESCRIPTION_TABLE, - EFI_ACPI_MEMORY_MAPPED_CONFIGURATION_SPACE_ACCESS_TABLE_REVISION), - EFI_ACPI_RESERVED_QWORD - }, - { - { - FixedPcdGet32 (PcdPciExpressBaseAddress), - 0, - FixedPcdGet32 (PcdPciBusMin), - FixedPcdGet32 (PcdPciBusMax), - EFI_ACPI_RESERVED_DWORD - } - } -}; - -#pragma pack(pop) - -// Reference the table being generated to prevent the optimizer -// from removing the data structure from the executable -VOID* CONST ReferenceAcpiTable =3D &Mcfg; --=20 2.40.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#106064): https://edk2.groups.io/g/devel/message/106064 Mute This Topic: https://groups.io/mt/99513050/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/unsub [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Thu May 16 03:37:02 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+106066+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106066+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=linaro.org ARC-Seal: i=1; a=rsa-sha256; t=1686684571; cv=none; d=zohomail.com; s=zohoarc; b=mx6yb62N+BBaRs0qIiWWHEYy4Lb/u+EZEUEOoe1HrHh0BROcDWFGoQeN9GSoIBdCnXL3W3IErZGGd4JprBZ5COZPRfHkXNUOt2jbnjQg4Jpm6dEFvv9eFOyIGxHr52WUTGoxX1wLZ/AHziev5QxEvAzXAySxUHzNLlxyxZKf4iA= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1686684571; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=V5u4f88ZNHP9dDp+oogooYR4F0eoi99i8nT+s3hqxnY=; b=VzPFbdikjyRPSjnAqnovVa4vFpOHU1QBgd1ES3gbCGlopMcy7OEaIsa1iDE1/5ZGiIRjyagBDuY20EPlRoQemJHPr3ocMxFyAHjuZj9DLDE7vy6R7O8OKPDe4XL4Bv6kyRrT4uXjCnwtjbHb00y68lx5F2Y4f0ifUd73q7G5nNQ= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+106066+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1686684571742358.87053907400775; Tue, 13 Jun 2023 12:29:31 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id aCDYYY1788612xWQucLHWIEC; Tue, 13 Jun 2023 12:29:31 -0700 X-Received: from muminek.juszkiewicz.com.pl (muminek.juszkiewicz.com.pl [213.251.184.221]) by mx.groups.io with SMTP id smtpd.web11.45.1686684569532374039 for ; Tue, 13 Jun 2023 12:29:29 -0700 X-Received: from localhost (localhost [127.0.0.1]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTP id 1ECC3260A8B; Tue, 13 Jun 2023 21:29:28 +0200 (CEST) X-Virus-Scanned: Debian amavisd-new at juszkiewicz.com.pl X-Received: from muminek.juszkiewicz.com.pl ([127.0.0.1]) by localhost (muminek.juszkiewicz.com.pl [127.0.0.1]) (amavisd-new, port 10024) with ESMTP id YMxEsRcDH92A; Tue, 13 Jun 2023 21:29:26 +0200 (CEST) X-Received: from applejack.lan (83.11.39.176.ipv4.supernova.orange.pl [83.11.39.176]) by muminek.juszkiewicz.com.pl (Postfix) with ESMTPSA id 0D230260A92; Tue, 13 Jun 2023 21:29:25 +0200 (CEST) From: "Marcin Juszkiewicz" To: devel@edk2.groups.io Cc: Ard Biesheuvel , Leif Lindholm , Graeme Gregory , Marcin Juszkiewicz Subject: [edk2-devel] [PATCH edk2-platforms 3/3] WIP: SbsaQemu: make PCIe variables dynamic (part 3) Date: Tue, 13 Jun 2023 21:29:00 +0200 Message-Id: <20230613192900.158022-4-marcin.juszkiewicz@linaro.org> In-Reply-To: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> References: <20230613192900.158022-1-marcin.juszkiewicz@linaro.org> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,marcin.juszkiewicz@linaro.org X-Gm-Message-State: gEpp1qqkNRP1FmMBXmWgqAhlx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1686684571; bh=C/4ewpqIklb3m1twAyzRoC+sRQ3T+fIwpf5lv8SxNg8=; h=Cc:Date:From:Reply-To:Subject:To; b=cv+Plq0oHYS5oB3SnEAzoMlgqHOwR/tyo6Cd5iVt0cR+bCrREzotm/TumzVo/RyYWlx Sssf7h0HL6iyM1xFCHzOhdDo0qMKD0LCJr9k9WHEkOLSLB9LIBzzPAd+XfiYWlyu+Q1S+ JZQuOWaPgy+1ifbyTTHCFrSHRgs1Mpc4sn4= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1686684572325100005 Content-Type: text/plain; charset="utf-8" Make those PCIe variables dynamic. But this breaks things: InstallProtocolInterface: 18A031AB-B443-4D1A-A5C0-0C09261E9F71 100FB866190 InstallProtocolInterface: 107A772C-D5E1-11D4-9A46-0090273FC14D 100FB866178 InstallProtocolInterface: 6A7A5CFF-E8D9-4F70-BADA-75AB3025CE14 100FB866160 [Bds] Entry... [BdsDxe] Locate Variable Policy protocol - Success Variable Driver Auto Update PlatformLang, PlatformLang:en, Lang:eng Status:= Success [Variable]END_OF_DXE is signaled Initialize variable error flag (FF) PCI Bus First Scanning PciBus: Discovered PCI @ [00|00|00] [VID =3D 0x1B36, DID =3D 0x8] FATAL ERROR - RaiseTpl with OldTpl(0x1F) > NewTpl(0x10) ASSERT [DxeCore] /home/marcin/devel/linaro/sbsa-qemu/code/edk2/MdeModulePkg= /Core/Dxe/Event/Tpl.c(66): ((BOOLEAN)(0=3D=3D1)) --- Silicon/Qemu/SbsaQemu/SbsaQemu.dec | 2 +- Platform/Qemu/SbsaQemu/SbsaQemu.dsc | 53 ++++++++++--------- .../Qemu/SbsaQemu/AcpiTables/AcpiTables.inf | 22 ++++---- .../SbsaQemuPciHostBridgeLib.inf | 2 +- 4 files changed, 40 insertions(+), 39 deletions(-) diff --git a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec b/Silicon/Qemu/SbsaQemu/Sbs= aQemu.dec index 9448852967b6..3fdf23b77a08 100644 --- a/Silicon/Qemu/SbsaQemu/SbsaQemu.dec +++ b/Silicon/Qemu/SbsaQemu/SbsaQemu.dec @@ -36,6 +36,7 @@ [PcdsFixedAtBuild.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize|0x10000|UINT3= 2|0x00000004 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdDeviceTreeBaseAddress|0x100000= 00000|UINT64|0x00000005 =20 +[PcdsDynamic.common] # PCDs complementing PCIe layout pulled into ACPI tables # Limit =3D Base + Size - 1 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciIoLimit|0x0000ffff|UINT32|0= x00000006 @@ -47,7 +48,6 @@ [PcdsFixedAtBuild.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize|0x10000000|U= INT64|0x00000009 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit|0xFFFFFFFF|= UINT64|0x00000010 =20 -[PcdsDynamic.common] gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdCoreCount|0x1|UINT32|0x00000100 gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdClusterCount|0x1|UINT32|0x0000= 0101 =20 diff --git a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc b/Platform/Qemu/SbsaQemu/S= bsaQemu.dsc index 0bd0df4f0239..3cc0f2a270ba 100644 --- a/Platform/Qemu/SbsaQemu/SbsaQemu.dsc +++ b/Platform/Qemu/SbsaQemu/SbsaQemu.dsc @@ -459,32 +459,6 @@ [PcdsFixedAtBuild.common] # point only, for entry point versions >=3D 3.0. gEfiMdeModulePkgTokenSpaceGuid.PcdSmbiosEntryPointProvideMethod|0x2 =20 - # - # PLDA PCI Root Complex - # - # ECAM size =3D=3D 0x10000000 - gArmTokenSpaceGuid.PcdPciBusMin|0 - gArmTokenSpaceGuid.PcdPciBusMax|255 - gArmTokenSpaceGuid.PcdPciIoBase|0x0 - gArmTokenSpaceGuid.PcdPciIoSize|0x00010000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciIoLimit|0x0000ffff - gArmTokenSpaceGuid.PcdPciMmio32Base|0x80000000 - gArmTokenSpaceGuid.PcdPciMmio32Size|0x70000000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio32Limit|0xEFFFFFFF - gArmTokenSpaceGuid.PcdPciMmio64Base|0x100000000 - gArmTokenSpaceGuid.PcdPciMmio64Size|0xFF00000000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio64Limit|0xFFFFFFFFFF - - # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this - # PCD and PcdPciDisableBusEnumeration have not been assigned yet - # TODO: PcdPciExpressBaseAddress set to max_uint64 - gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xf0000000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize|0x10000000 - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit|0xFFFFFFFF - - gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x7fff0000 - gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation|0x0 - gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation|0x0 ## If TRUE, OvmfPkg/AcpiPlatformDxe will not wait for PCI # enumeration to complete before installing ACPI tables. gEfiMdeModulePkgTokenSpaceGuid.PcdPciDisableBusEnumeration|FALSE @@ -523,6 +497,33 @@ [PcdsDynamicDefault.common] gArmTokenSpaceGuid.PcdGicDistributorBase|0x40060000 gArmTokenSpaceGuid.PcdGicRedistributorsBase|0x40080000 =20 + # + # PLDA PCI Root Complex + # + # ECAM size =3D=3D 0x10000000 + gArmTokenSpaceGuid.PcdPciBusMin|0 + gArmTokenSpaceGuid.PcdPciBusMax|255 + gArmTokenSpaceGuid.PcdPciIoBase|0x0 + gArmTokenSpaceGuid.PcdPciIoSize|0x00010000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciIoLimit|0x0000ffff + gArmTokenSpaceGuid.PcdPciMmio32Base|0x80000000 + gArmTokenSpaceGuid.PcdPciMmio32Size|0x70000000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio32Limit|0xEFFFFFFF + gArmTokenSpaceGuid.PcdPciMmio64Base|0x100000000 + gArmTokenSpaceGuid.PcdPciMmio64Size|0xFF00000000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciMmio64Limit|0xFFFFFFFFFF + + # set PcdPciExpressBaseAddress to MAX_UINT64, which signifies that this + # PCD and PcdPciDisableBusEnumeration have not been assigned yet + # TODO: PcdPciExpressBaseAddress set to max_uint64 + gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xf0000000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize|0x10000000 + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit|0xFFFFFFFF + + gEfiMdePkgTokenSpaceGuid.PcdPciIoTranslation|0x7fff0000 + gEfiMdePkgTokenSpaceGuid.PcdPciMmio32Translation|0x0 + gEfiMdePkgTokenSpaceGuid.PcdPciMmio64Translation|0x0 + # # Set video resolution for boot options # PlatformDxe can set the former at runtime. diff --git a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf b/Silicon/Qemu= /SbsaQemu/AcpiTables/AcpiTables.inf index 5607878c2040..a8300fd355fd 100644 --- a/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf +++ b/Silicon/Qemu/SbsaQemu/AcpiTables/AcpiTables.inf @@ -42,6 +42,17 @@ [FixedPcd] gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemTableId gEfiMdeModulePkgTokenSpaceGuid.PcdAcpiDefaultOemRevision =20 + gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase + + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase + gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize + +[Pcd] + gArmTokenSpaceGuid.PcdGicDistributorBase + gArmTokenSpaceGuid.PcdGicRedistributorsBase + gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax =20 @@ -63,14 +74,3 @@ [FixedPcd] gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarSize gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPciExpressBarLimit - - gEfiMdeModulePkgTokenSpaceGuid.PcdSerialRegisterBase - - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciBase - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformAhciSize - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciBase - gArmVirtSbsaQemuPlatformTokenSpaceGuid.PcdPlatformEhciSize - -[Pcd] - gArmTokenSpaceGuid.PcdGicDistributorBase - gArmTokenSpaceGuid.PcdGicRedistributorsBase diff --git a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQem= uPciHostBridgeLib.inf b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridge= Lib/SbsaQemuPciHostBridgeLib.inf index 9d6791ff7dc2..6bc78ac108f0 100644 --- a/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHos= tBridgeLib.inf +++ b/Silicon/Qemu/SbsaQemu/Library/SbsaQemuPciHostBridgeLib/SbsaQemuPciHos= tBridgeLib.inf @@ -33,7 +33,7 @@ [Packages] [LibraryClasses] DebugLib =20 -[FixedPcd] +[Pcd] gArmTokenSpaceGuid.PcdPciBusMin gArmTokenSpaceGuid.PcdPciBusMax gArmTokenSpaceGuid.PcdPciIoBase --=20 2.40.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. 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