From nobody Sat May 18 22:31:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+105333+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105333+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1685111716; cv=none; d=zohomail.com; s=zohoarc; b=JiDIu2XGIa3v5WrnrwTKmwFioAxPF2fHbHzwWuk24Zj2+6TqKItaj5voqIjZyh3R2QIBdv8+/7zU28Nauo3EF4eXSrn6RDGqAoWH83FYl5LllCMO3S48jzw8jhzx02LRTsMBE7tRW+Y5QwA62UuVRjdWKqiSrn6kgSsU/w9ICjU= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685111716; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=lYfUc5JkfB07ZDQAEiudoY9gZ/6hEMFLu3z0r9I8YPI=; b=eBtTUkHR2HzjoruAsZOA9Gwl4YGlGqPEq+VhKDkpxdiqJHYQvlI+bBVDTHNhAh3f7nGwQFHqZ2uhphvQ8ePeQzTVXqx6EdTHfRFEkTfVOmvh4boQdjB5Nh/rFhcoBU6jdVLgRk+eHZlgGZc3/akbtO+ZUkyfh9XB3xeit+VqN04= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105333+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1685111716126304.88808975533186; Fri, 26 May 2023 07:35:16 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id G2XWYY1788612xQqWKQ2r8nB; Fri, 26 May 2023 07:35:15 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.9554.1685111714902914724 for ; Fri, 26 May 2023 07:35:14 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="333838589" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="333838589" X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2023 07:34:36 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="770361054" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="770361054" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by fmsmga008.fm.intel.com with ESMTP; 26 May 2023 07:34:35 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Rahul Kumar , Gerd Hoffmann Subject: [edk2-devel] [PATCH 1/3] UefiCpuPkg/CpuSmm: Add perf-logging for time-consuming BSP procedures Date: Fri, 26 May 2023 22:34:29 +0800 Message-Id: <20230526143431.2100-2-ray.ni@intel.com> In-Reply-To: <20230526143431.2100-1-ray.ni@intel.com> References: <20230526143431.2100-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: Wyd6uFNGUucyCGZnELCmfClUx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1685111715; bh=5abofeg/yPP7QOaAP0m41KLCJgAfeBNCvtp4NT7ll6A=; h=Cc:Date:From:Reply-To:Subject:To; b=ZGx4/GgcGtM1ldS7Pc6jxf+VgORVw0oeOfiUTnjPoCIYmOeCKocHwwckWOH5MahMcUB eQcATzIEuZ1WUgQRp3x+9h8xhKqgDzhaDEL66Fl9FOwMpE7ib0xdC5c5RnOm3aim1ErWj VkK8b04qf6ifDNZa+FdTvfjnDMstw7f7828= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1685111716794100005 Content-Type: text/plain; charset="utf-8" The patch adds perf-logging for the following potential time-consuming BSP procedures: * PiCpuSmmEntry - SmmRelocateBases * ExecuteFirstSmiInit * BSPHandler - SmmWaitForApArrival - PerformRemainingTasks * InitPaging * SetMemMapAttributes * SetUefiMemMapAttributes * SetPageTableAttributes * ConfigSmmCodeAccessCheck * SmmCpuFeaturesCompleteSmmReadyToLock Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 8 +++++- UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 27 +++++++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 1 + UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 1 + .../PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c | 13 ++++++--- UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c | 4 ++- 6 files changed, 49 insertions(+), 5 deletions(-) diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/MpService.c index baf827cf9d..fa666bd118 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -351,6 +351,8 @@ SmmWaitForApArrival ( UINT32 DelayedCount; UINT32 BlockedCount; =20 + PERF_FUNCTION_BEGIN (); + DelayedCount =3D 0; BlockedCount =3D 0; =20 @@ -439,7 +441,7 @@ SmmWaitForApArrival ( DEBUG ((DEBUG_INFO, "SmmWaitForApArrival: Delayed AP Count =3D %d, Blo= cked AP Count =3D %d\n", DelayedCount, BlockedCount)); } =20 - return; + PERF_FUNCTION_END (); } =20 /** @@ -577,6 +579,8 @@ BSPHandler ( ASSERT (CpuIndex =3D=3D mSmmMpSyncData->BspIndex); ApCount =3D 0; =20 + PERF_FUNCTION_BEGIN (); + // // Flag BSP's presence // @@ -792,6 +796,8 @@ BSPHandler ( *mSmmMpSyncData->Counter =3D 0; *mSmmMpSyncData->AllCpusInSync =3D FALSE; mSmmMpSyncData->AllApArrivedWithException =3D FALSE; + + PERF_FUNCTION_END (); } =20 /** diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.c index c0e368ea94..2fc7dda682 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -410,12 +410,15 @@ ExecuteFirstSmiInit ( { UINTN Index; =20 + PERF_FUNCTION_BEGIN (); + if (mSmmInitialized =3D=3D NULL) { mSmmInitialized =3D (BOOLEAN *)AllocatePool (sizeof (BOOLEAN) * mMaxNu= mberOfCpus); } =20 ASSERT (mSmmInitialized !=3D NULL); if (mSmmInitialized =3D=3D NULL) { + PERF_FUNCTION_END (); return; } =20 @@ -442,6 +445,8 @@ ExecuteFirstSmiInit ( while (!(BOOLEAN)mSmmInitialized[Index]) { } } + + PERF_FUNCTION_END (); } =20 /** @@ -463,6 +468,8 @@ SmmRelocateBases ( UINTN Index; UINTN BspIndex; =20 + PERF_FUNCTION_BEGIN (); + // // Make sure the reserved size is large enough for procedure SmmInitTemp= late. // @@ -540,6 +547,7 @@ SmmRelocateBases ( // CopyMem (CpuStatePtr, &BakBuf2, sizeof (BakBuf2)); CopyMem (U8Ptr, BakBuf, sizeof (BakBuf)); + PERF_FUNCTION_END (); } =20 /** @@ -617,6 +625,8 @@ PiCpuSmmEntry ( GuidHob =3D NULL; SmmBaseHobData =3D NULL; =20 + PERF_FUNCTION_BEGIN (); + // // Initialize address fixup // @@ -1194,6 +1204,7 @@ PiCpuSmmEntry ( =20 DEBUG ((DEBUG_INFO, "SMM CPU Module exit from SMRAM with EFI_SUCCESS\n")= ); =20 + PERF_FUNCTION_END (); return EFI_SUCCESS; } =20 @@ -1348,12 +1359,15 @@ ConfigSmmCodeAccessCheck ( UINTN Index; EFI_STATUS Status; =20 + PERF_FUNCTION_BEGIN (); + // // Check to see if the Feature Control MSR is supported on this CPU // Index =3D gSmmCpuPrivate->SmmCoreEntryContext.CurrentlyExecutingCpu; if (!SmmCpuFeaturesIsSmmRegisterSupported (Index, SmmRegFeatureControl))= { mSmmCodeAccessCheckEnable =3D FALSE; + PERF_FUNCTION_END (); return; } =20 @@ -1363,6 +1377,7 @@ ConfigSmmCodeAccessCheck ( // if ((AsmReadMsr64 (EFI_MSR_SMM_MCA_CAP) & SMM_CODE_ACCESS_CHK_BIT) =3D= =3D 0) { mSmmCodeAccessCheckEnable =3D FALSE; + PERF_FUNCTION_END (); return; } =20 @@ -1419,6 +1434,8 @@ ConfigSmmCodeAccessCheck ( ReleaseSpinLock (mConfigSmmCodeAccessCheckLock); } } + + PERF_FUNCTION_END (); } =20 /** @@ -1540,6 +1557,8 @@ PerformRemainingTasks ( ) { if (mSmmReadyToLock) { + PERF_FUNCTION_BEGIN (); + // // Start SMM Profile feature // @@ -1574,12 +1593,20 @@ PerformRemainingTasks ( // ConfigSmmCodeAccessCheck (); =20 + // + // Measure performance of SmmCpuFeaturesCompleteSmmReadyToLock() from = caller side + // as the implementation is provided by platform. + // + PERF_START (NULL, "SmmCompleteReadyToLock", NULL, 0); SmmCpuFeaturesCompleteSmmReadyToLock (); + PERF_END (NULL, "SmmCompleteReadyToLock", NULL, 0); =20 // // Clean SMM ready to lock flag // mSmmReadyToLock =3D FALSE; + + PERF_FUNCTION_END (); } } =20 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.h index a5c2bdd971..b03f2ef882 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -50,6 +50,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent #include #include #include +#include =20 #include #include diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf index 158e05e264..af66a1941c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -97,6 +97,7 @@ ReportStatusCodeLib SmmCpuFeaturesLib PeCoffGetEntryPointLib + PerformanceLib =20 [Protocols] gEfiSmmAccess2ProtocolGuid ## CONSUMES diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c b/UefiCpuPk= g/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c index 834a756061..8b21e16f1c 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmCpuMemoryManagement.c @@ -1,6 +1,6 @@ /** @file =20 -Copyright (c) 2016 - 2019, Intel Corporation. All rights reserved.
+Copyright (c) 2016 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -1100,6 +1100,8 @@ SetMemMapAttributes ( return; } =20 + PERF_FUNCTION_BEGIN (); + DEBUG ((DEBUG_INFO, "MemoryAttributesTable:\n")); DEBUG ((DEBUG_INFO, " Version - 0x%08x\n", MemoryAttr= ibutesTable->Version)); DEBUG ((DEBUG_INFO, " NumberOfEntries - 0x%08x\n", MemoryAttr= ibutesTable->NumberOfEntries)); @@ -1152,7 +1154,7 @@ SetMemMapAttributes ( PatchSmmSaveStateMap (); PatchGdtIdtMap (); =20 - return; + PERF_FUNCTION_END (); } =20 /** @@ -1454,6 +1456,8 @@ SetUefiMemMapAttributes ( UINTN Index; EFI_MEMORY_DESCRIPTOR *Entry; =20 + PERF_FUNCTION_BEGIN (); + DEBUG ((DEBUG_INFO, "SetUefiMemMapAttributes\n")); =20 if (mUefiMemoryMap !=3D NULL) { @@ -1537,6 +1541,8 @@ SetUefiMemMapAttributes ( // // Do not free mUefiMemoryAttributesTable, it will be checked in IsSmmCo= mmBufferForbiddenAddress(). // + + PERF_FUNCTION_END (); } =20 /** @@ -1862,6 +1868,7 @@ SetPageTableAttributes ( return; } =20 + PERF_FUNCTION_BEGIN (); DEBUG ((DEBUG_INFO, "SetPageTableAttributes\n")); =20 // @@ -1900,5 +1907,5 @@ SetPageTableAttributes ( EnableCet (); } =20 - return; + PERF_FUNCTION_END (); } diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c b/UefiCpuPkg/PiSmmCpuDx= eSmm/SmmProfile.c index 1b0b6673e1..ed6e58065f 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmProfile.c @@ -575,6 +575,8 @@ InitPaging ( IA32_CR4 Cr4; BOOLEAN Enable5LevelPaging; =20 + PERF_FUNCTION_BEGIN (); + Cr4.UintN =3D AsmReadCr4 (); Enable5LevelPaging =3D (BOOLEAN)(Cr4.Bits.LA57 =3D=3D 1); =20 @@ -810,7 +812,7 @@ InitPaging ( // mXdEnabled =3D TRUE; =20 - return; + PERF_FUNCTION_END (); } =20 /** --=20 2.39.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#105333): https://edk2.groups.io/g/devel/message/105333 Mute This Topic: https://groups.io/mt/99150954/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076= /xyzzy [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 22:31:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+105332+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105332+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1685111715; cv=none; d=zohomail.com; s=zohoarc; b=J8cyHzZmAEEB91nBO65kcwneTADGSCSXcR2KTSgRAg/zK8y/8wlh9iRhHOeb+IkSYtQusJwHXTaEVS2jnzwDTXYfvtxETfEIYnOJwoTWlg3WKZwnBn25sY15/3i5ekgF9H5GJ2lkUf1/vgF27D8tQSo87yut87J+OCZpcHYalP8= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685111715; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=nDX8onEcx/2mPvwYwiDoMWKEvjw3DS7R4YhYau2dsJk=; b=aEEAmbdMb7xKKYEefKZOE72r91MsI91yvhCDrfbtHxrLu+eS/W4nh0NY1EtiB4lqTDbimFvA0zpCk8MTVmRou++tI2GUSqgSIjYaIeInQrK6G73o2ozojxWCirUVUnSszZj3aoSuOdDXjQW+n080zXShvrRo/IcRKjHCgb0w6hM= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105332+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1685111715955684.9913105828011; Fri, 26 May 2023 07:35:15 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id AeayYY1788612xf2FUV4XjhA; Fri, 26 May 2023 07:35:15 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web10.9553.1685111713765396407 for ; Fri, 26 May 2023 07:35:14 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="333838602" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="333838602" X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2023 07:34:38 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="770361068" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="770361068" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by fmsmga008.fm.intel.com with ESMTP; 26 May 2023 07:34:36 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Eric Dong , Rahul Kumar , Gerd Hoffmann , Jiaxin Wu Subject: [edk2-devel] [PATCH 2/3] UefiCpuPkg/CpuSmm: Add perf-logging for MP procedures Date: Fri, 26 May 2023 22:34:30 +0800 Message-Id: <20230526143431.2100-3-ray.ni@intel.com> In-Reply-To: <20230526143431.2100-1-ray.ni@intel.com> References: <20230526143431.2100-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: 3ONueTnPT1thAK3uL80ZXwGfx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1685111715; bh=KuhgClvzb7ht8wPYymvF0v2WN/o+tzMp1fhwX+2UEss=; h=Cc:Date:From:Reply-To:Subject:To; b=hzbkHYoSGphWe99/xywOdh6Wmm+TSvZzbInVHgyqmbPirsINltxER8HWjtc/s1SRSwb N+C0SAngjqueEKNY+LLbcWJJPOgtSsxM6jzvPHg+YXS3MH5PtThvazCC8siWQ/OWpGO5a LSd3J9513zftInudr4u6ZdOKujbzVoG82eg= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1685111716800100006 Content-Type: text/plain; charset="utf-8" MP procedures are those procedures that run in every CPU thread. The EDKII perf infra is not MP safe so it doesn't support to be called from those MP procedures. The patch adds SMM MP perf-logging support in SmmMpPerf.c. The following procedures are perf-logged: * SmmInitHandler * SmmCpuFeaturesRendezvousEntry * PlatformValidSmi * SmmCpuFeaturesRendezvousExit Cc: Eric Dong Cc: Rahul Kumar Cc: Gerd Hoffmann Cc: Jiaxin Wu --- UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c | 34 ++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c | 11 +++ UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h | 1 + UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf | 2 + UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.c | 91 ++++++++++++++++++++ UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h | 77 +++++++++++++++++ 6 files changed, 216 insertions(+) create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.c create mode 100644 UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/MpService.c index fa666bd118..bcd90f0671 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/MpService.c @@ -778,6 +778,15 @@ BSPHandler ( // WaitForAllAPs (ApCount); =20 + // + // At this point, all APs should have exited from APHandler(). + // Migrate the SMM MP performance logging to standard SMM performance lo= gging. + // Any SMM MP performance logging after this point will be migrated in n= ext SMI. + // + PERF_CODE ( + MigrateMpPerf (gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus); + ); + // // Reset the tokens buffer. // @@ -1769,12 +1778,24 @@ SmiRendezvous ( // // Perform CPU specific entry hooks // + PERF_CODE ( + MpPerfBegin (CpuIndex, SMM_MP_PERF_PROCEDURE_ID (SmmRendezvousEntry)); + ); SmmCpuFeaturesRendezvousEntry (CpuIndex); + PERF_CODE ( + MpPerfEnd (CpuIndex, SMM_MP_PERF_PROCEDURE_ID (SmmRendezvousEntry)); + ); =20 // // Determine if this is a valid SMI // + PERF_CODE ( + MpPerfBegin (CpuIndex, SMM_MP_PERF_PROCEDURE_ID (PlatformValidSmi)); + ); ValidSmi =3D PlatformValidSmi (); + PERF_CODE ( + MpPerfEnd (CpuIndex, SMM_MP_PERF_PROCEDURE_ID (PlatformValidSmi)); + ); =20 // // Determine if BSP has been already in progress. Note this must be chec= ked after @@ -1904,7 +1925,20 @@ SmiRendezvous ( } =20 Exit: + // + // Note: SmmRendezvousExit perf-logging entry is the only one that will = be + // migrated to standard perf-logging database in next SMI by BSPHa= ndler(). + // Hence, the number of SmmRendezvousEntry entries will be larger = than + // the number of SmmRendezvousExit entries. Delta equals to the nu= mber + // of CPU threads. + // + PERF_CODE ( + MpPerfBegin (CpuIndex, SMM_MP_PERF_PROCEDURE_ID (SmmRendezvousExit)); + ); SmmCpuFeaturesRendezvousExit (CpuIndex); + PERF_CODE ( + MpPerfEnd (CpuIndex, SMM_MP_PERF_PROCEDURE_ID (SmmRendezvousExit)); + ); =20 // // Restore Cr2 diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.c index 2fc7dda682..5afab1e040 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.c @@ -362,6 +362,9 @@ SmmInitHandler ( =20 for (Index =3D 0; Index < mNumberOfCpus; Index++) { if (ApicId =3D=3D (UINT32)gSmmCpuPrivate->ProcessorInfo[Index].Process= orId) { + PERF_CODE ( + MpPerfBegin (Index, SMM_MP_PERF_PROCEDURE_ID (SmmInitHandler)); + ); // // Initialize SMM specific features on the currently executing CPU // @@ -392,6 +395,10 @@ SmmInitHandler ( SemaphoreHook (Index, &mRebased[Index]); } =20 + PERF_CODE ( + MpPerfEnd (Index, SMM_MP_PERF_PROCEDURE_ID (SmmInitHandler)); + ); + return; } } @@ -699,6 +706,10 @@ PiCpuSmmEntry ( =20 gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus =3D mMaxNumberOfCpus; =20 + PERF_CODE ( + InitializeMpPerf (gSmmCpuPrivate->SmmCoreEntryContext.NumberOfCpus); + ); + // // The CPU save state and code for the SMI entry point are tiled within = an SMRAM // allocated buffer. The minimum size of this buffer for a uniprocessor= system diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h b/UefiCpuPkg/PiSmmC= puDxeSmm/PiSmmCpuDxeSmm.h index b03f2ef882..1876a27cae 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.h @@ -60,6 +60,7 @@ SPDX-License-Identifier: BSD-2-Clause-Patent =20 #include "CpuService.h" #include "SmmProfile.h" +#include "SmmMpPerf.h" =20 // // CET definition diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf b/UefiCpuPkg/PiSm= mCpuDxeSmm/PiSmmCpuDxeSmm.inf index af66a1941c..4864532c35 100644 --- a/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/PiSmmCpuDxeSmm.inf @@ -42,6 +42,8 @@ SmmCpuMemoryManagement.c SmmMp.h SmmMp.c + SmmMpPerf.h + SmmMpPerf.c =20 [Sources.Ia32] Ia32/Semaphore.c diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.c b/UefiCpuPkg/PiSmmCpuDxe= Smm/SmmMpPerf.c new file mode 100644 index 0000000000..c13556af46 --- /dev/null +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.c @@ -0,0 +1,91 @@ +/** @file +SMM MP perf-logging implementation + +Copyright (c) 2023, Intel Corporation. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#include "PiSmmCpuDxeSmm.h" + + +#define SMM_MP_PERF_PROCEDURE_NAME(procedure) # procedure +GLOBAL_REMOVE_IF_UNREFERENCED +CHAR8 *gSmmMpPerfProcedureName[] =3D { + SMM_MP_PERF_PROCEDURE_LIST (SMM_MP_PERF_PROCEDURE_NAME) +}; +// +// Each element holds the performance data for one processor. +// +GLOBAL_REMOVE_IF_UNREFERENCED +SMM_PERF_AP_PROCEDURE_PERFORMANCE *mSmmMpProcedurePerformance =3D NULL; + +/** + Initialize the perf-logging feature for APs. + + @param NumberofCpus Number of processors in the platform. +**/ +VOID +InitializeMpPerf ( + UINTN NumberofCpus + ) +{ + mSmmMpProcedurePerformance =3D AllocateZeroPool (NumberofCpus * sizeof (= *mSmmMpProcedurePerformance)); + ASSERT (mSmmMpProcedurePerformance !=3D NULL); +} + +/** + Migrate MP performance data to standardized performance database. + + @param NumberofCpus Number of processors in the platform. +**/ +VOID +MigrateMpPerf ( + UINTN NumberofCpus + ) +{ + UINTN CpuIndex; + UINTN MpProcecureId; + + for (CpuIndex =3D 0; CpuIndex < NumberofCpus; CpuIndex++) { + for (MpProcecureId =3D 0; MpProcecureId < SMM_MP_PERF_PROCEDURE_ID (Sm= mMpProcedureMax); MpProcecureId++) { + if (mSmmMpProcedurePerformance[CpuIndex].Begin[MpProcecureId] !=3D 0= ) { + PERF_START (NULL, gSmmMpPerfProcedureName[MpProcecureId], NULL, mS= mmMpProcedurePerformance[CpuIndex].Begin[MpProcecureId]); + PERF_END (NULL, gSmmMpPerfProcedureName[MpProcecureId], NULL, mSmm= MpProcedurePerformance[CpuIndex].End[MpProcecureId]); + } + } + } + + ZeroMem (mSmmMpProcedurePerformance, NumberofCpus * sizeof (*mSmmMpProce= durePerformance)); +} + +/** + Save the performance counter value before running the MP procedure. + + @param CpuIndex The index of the CPU. + @param MpProcedureId The ID of the MP procedure. +**/ +VOID +MpPerfBegin ( + IN UINTN CpuIndex, + IN UINTN MpProcedureId + ) +{ + mSmmMpProcedurePerformance[CpuIndex].Begin[MpProcedureId] =3D GetPerform= anceCounter (); +} + +/** + Save the performance counter value after running the MP procedure. + + @param CpuIndex The index of the CPU. + @param MpProcedureId The ID of the MP procedure. +**/ +VOID +MpPerfEnd ( + IN UINTN CpuIndex, + IN UINTN MpProcedureId + ) +{ + mSmmMpProcedurePerformance[CpuIndex].End[MpProcedureId] =3D GetPerforman= ceCounter (); +} diff --git a/UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h b/UefiCpuPkg/PiSmmCpuDxe= Smm/SmmMpPerf.h new file mode 100644 index 0000000000..b148a99e86 --- /dev/null +++ b/UefiCpuPkg/PiSmmCpuDxeSmm/SmmMpPerf.h @@ -0,0 +1,77 @@ +/** @file +SMM MP perf-logging implementation + +Copyright (c) 2023, Intel Corporation. All rights reserved.
+ +SPDX-License-Identifier: BSD-2-Clause-Patent + +**/ + +#ifndef _MP_PERF_H_ +#define _MP_PERF_H_ + +// +// The list of all MP procedures that need to be perf-logged. +// +#define SMM_MP_PERF_PROCEDURE_LIST(_) \ + _(SmmInitHandler), \ + _(SmmRendezvousEntry), \ + _(PlatformValidSmi), \ + _(SmmRendezvousExit), \ + _(SmmMpProcedureMax) // Add new entries above this line + +#define SMM_MP_PERF_PROCEDURE_ID(procedure) SmmMpProcedureId ## procedure +enum { + SMM_MP_PERF_PROCEDURE_LIST (SMM_MP_PERF_PROCEDURE_ID) +}; + +typedef struct { + UINT64 Begin[SMM_MP_PERF_PROCEDURE_ID (SmmMpProcedureMax)]; + UINT64 End[SMM_MP_PERF_PROCEDURE_ID (SmmMpProcedureMax)]; +} SMM_PERF_AP_PROCEDURE_PERFORMANCE; + +/** + Initialize the perf-logging feature for APs. + + @param NumberofCpus Number of processors in the platform. +**/ +VOID +InitializeMpPerf ( + UINTN NumberofCpus + ); + +/** + Migrate MP performance data to standardized performance database. + + @param NumberofCpus Number of processors in the platform. +**/ +VOID +MigrateMpPerf ( + UINTN NumberofCpus + ); + +/** + Save the performance counter value before running the MP procedure. + + @param CpuIndex The index of the CPU. + @param MpProcedureId The ID of the MP procedure. +**/ +VOID +MpPerfBegin ( + IN UINTN CpuIndex, + IN UINTN MpProcedureId + ); + +/** + Save the performance counter value after running the MP procedure. + + @param CpuIndex The index of the CPU. + @param MpProcedureId The ID of the MP procedure. +**/ +VOID +MpPerfEnd ( + IN UINTN CpuIndex, + IN UINTN MpProcedureId + ); + +#endif --=20 2.39.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#105332): https://edk2.groups.io/g/devel/message/105332 Mute This Topic: https://groups.io/mt/99150953/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076= /xyzzy [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- From nobody Sat May 18 22:31:27 2024 Delivered-To: importer@patchew.org Received-SPF: pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) client-ip=66.175.222.108; envelope-from=bounce+27952+105334+1787277+3901457@groups.io; helo=mail02.groups.io; Authentication-Results: mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105334+1787277+3901457@groups.io; dmarc=fail(p=none dis=none) header.from=intel.com ARC-Seal: i=1; a=rsa-sha256; t=1685111720; cv=none; d=zohomail.com; s=zohoarc; b=BG7lI6UHYcIQ7NuqMAGj4u1mMWCqIPrCsD1oHsfF5Aaj6FVHSGLrxOFSUsaT02RXp54FAi9c2ZAIeg2IeXk2gXmDl4BOoNBZ53ML5DTl45+bCc36D02wdmWuJPMgJkaFGYApdUBZxV+ZMMdRqhzZig0/fsyO3gljcXUA2uumnkg= ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com; s=zohoarc; t=1685111720; h=Content-Transfer-Encoding:Cc:Date:From:In-Reply-To:List-Subscribe:List-Id:List-Help:List-Unsubscribe:MIME-Version:Message-ID:Reply-To:References:Sender:Subject:To; bh=g1Y9KeDBgwgGb/goxlbWW4LAulD52bt8lHinUvGPCyo=; b=MUub34uM3uQPaxwgT+2acZILEZtMC+Om7Z8VBR0xbtvczZqiMi5RnuC+0BkJE5vJRrVST7hfoEjPY7cYQqVW6/TLPKa0cOCo1xVHp3OzjcxHUV/wvgQk4sjRrsttlUrqWXYctycgL0mS0iva2Rdi5pbF4DZWeZl0Fv0dRRS3NIE= ARC-Authentication-Results: i=1; mx.zohomail.com; dkim=pass; spf=pass (zohomail.com: domain of groups.io designates 66.175.222.108 as permitted sender) smtp.mailfrom=bounce+27952+105334+1787277+3901457@groups.io; dmarc=fail header.from= (p=none dis=none) Received: from mail02.groups.io (mail02.groups.io [66.175.222.108]) by mx.zohomail.com with SMTPS id 1685111720627661.7980845415573; Fri, 26 May 2023 07:35:20 -0700 (PDT) Return-Path: X-Received: by 127.0.0.2 with SMTP id 1jeSYY1788612xCuYqwlaTFL; Fri, 26 May 2023 07:35:20 -0700 X-Received: from mga12.intel.com (mga12.intel.com [192.55.52.136]) by mx.groups.io with SMTP id smtpd.web11.9554.1685111719214787346 for ; Fri, 26 May 2023 07:35:19 -0700 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="333838642" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="333838642" X-Received: from fmsmga008.fm.intel.com ([10.253.24.58]) by fmsmga106.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 26 May 2023 07:34:50 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=McAfee;i="6600,9927,10722"; a="770361081" X-IronPort-AV: E=Sophos;i="6.00,194,1681196400"; d="scan'208";a="770361081" X-Received: from shwdeopenlab706.ccr.corp.intel.com ([10.239.55.95]) by fmsmga008.fm.intel.com with ESMTP; 26 May 2023 07:34:38 -0700 From: "Ni, Ray" To: devel@edk2.groups.io Cc: Jian J Wang , Liming Gao , Jiaxin Wu Subject: [edk2-devel] [PATCH 3/3] MdeModulePkg/SmmCore: Add perf-logging for time-consuming procedures Date: Fri, 26 May 2023 22:34:31 +0800 Message-Id: <20230526143431.2100-4-ray.ni@intel.com> In-Reply-To: <20230526143431.2100-1-ray.ni@intel.com> References: <20230526143431.2100-1-ray.ni@intel.com> MIME-Version: 1.0 Precedence: Bulk List-Unsubscribe: List-Subscribe: List-Help: Sender: devel@edk2.groups.io List-Id: Mailing-List: list devel@edk2.groups.io; contact devel+owner@edk2.groups.io Reply-To: devel@edk2.groups.io,ray.ni@intel.com X-Gm-Message-State: jdmHrNKTDDPRqazuhyC04HWjx1787277AA= Content-Transfer-Encoding: quoted-printable DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=groups.io; q=dns/txt; s=20140610; t=1685111720; bh=CDqrvrp5GymY6jEh7Wjv4M4nPnIB9GRo1qGoUKyuLcE=; h=Cc:Date:From:Reply-To:Subject:To; b=iR+33JKNfh4lp84iF8sHpwy2LSdgPk7G1pSPQaIRyxtaOiJzlH/lYaeh2Qaabsi68v6 sheLHSVRI1D11WCxYDjNkSsZqgc8W8hsy/osxsb43dx9JnlV2be2XX99wYqg8bVknCvvA bB1U+gAQkbDDcefBnH2xm6Ein+PRlh+JulE= X-ZohoMail-DKIM: pass (identity @groups.io) X-ZM-MESSAGEID: 1685111722622100003 Content-Type: text/plain; charset="utf-8" Following procedures are perf-logged: * SmmReadyToBootHandler * SmmReadyToLockHandler * SmmEndOfDxeHandler * SmmEntryPoint (It's the main routine run in BSP when SMI happens.) * SmiManage Cc: Jian J Wang Cc: Liming Gao Cc: Jiaxin Wu --- MdeModulePkg/Core/PiSmmCore/PiSmmCore.c | 14 +++++++++++++- MdeModulePkg/Core/PiSmmCore/Smi.c | 6 ++++++ 2 files changed, 19 insertions(+), 1 deletion(-) diff --git a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c b/MdeModulePkg/Core/Pi= SmmCore/PiSmmCore.c index 875c7c0258..a15afa8dd6 100644 --- a/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c +++ b/MdeModulePkg/Core/PiSmmCore/PiSmmCore.c @@ -1,7 +1,7 @@ /** @file SMM Core Main Entry Point =20 - Copyright (c) 2009 - 2019, Intel Corporation. All rights reserved.
+ Copyright (c) 2009 - 2023, Intel Corporation. All rights reserved.
SPDX-License-Identifier: BSD-2-Clause-Patent =20 **/ @@ -304,6 +304,7 @@ SmmReadyToBootHandler ( { EFI_STATUS Status; EFI_HANDLE SmmHandle; + PERF_CALLBACK_BEGIN (&gEfiEventReadyToBootGuid); =20 // // Install SMM Ready To Boot protocol. @@ -318,6 +319,7 @@ SmmReadyToBootHandler ( =20 SmiHandlerUnRegister (DispatchHandle); =20 + PERF_CALLBACK_END (&gEfiEventReadyToBootGuid); return Status; } =20 @@ -352,6 +354,8 @@ SmmReadyToLockHandler ( EFI_HANDLE SmmHandle; VOID *Interface; =20 + PERF_CALLBACK_BEGIN (&gEfiDxeSmmReadyToLockProtocolGuid); + // // Unregister SMI Handlers that are no required after the SMM driver dis= patch is stopped // @@ -408,6 +412,7 @@ SmmReadyToLockHandler ( =20 SmramProfileReadyToLock (); =20 + PERF_CALLBACK_END (&gEfiDxeSmmReadyToLockProtocolGuid); return Status; } =20 @@ -442,6 +447,8 @@ SmmEndOfDxeHandler ( =20 DEBUG ((DEBUG_INFO, "SmmEndOfDxeHandler\n")); =20 + PERF_CALLBACK_BEGIN (&gEfiEndOfDxeEventGroupGuid); + // // Install SMM EndOfDxe protocol // @@ -479,6 +486,7 @@ SmmEndOfDxeHandler ( } } =20 + PERF_CALLBACK_END (&gEfiEndOfDxeEventGroupGuid); return EFI_SUCCESS; } =20 @@ -669,6 +677,8 @@ SmmEntryPoint ( VOID *CommunicationBuffer; UINTN BufferSize; =20 + PERF_FUNCTION_BEGIN (); + // // Update SMST with contents of the SmmEntryContext structure // @@ -769,6 +779,8 @@ SmmEntryPoint ( // gSmmCorePrivate->InSmm =3D FALSE; } + + PERF_FUNCTION_END (); } =20 /** diff --git a/MdeModulePkg/Core/PiSmmCore/Smi.c b/MdeModulePkg/Core/PiSmmCor= e/Smi.c index 6d13969979..2985f989c3 100644 --- a/MdeModulePkg/Core/PiSmmCore/Smi.c +++ b/MdeModulePkg/Core/PiSmmCore/Smi.c @@ -109,6 +109,8 @@ SmiManage ( BOOLEAN SuccessReturn; EFI_STATUS Status; =20 + PERF_FUNCTION_BEGIN (); + Status =3D EFI_NOT_FOUND; SuccessReturn =3D FALSE; if (HandlerType =3D=3D NULL) { @@ -125,6 +127,7 @@ SmiManage ( // // There is no handler registered for this interrupt source // + PERF_FUNCTION_END (); return Status; } } @@ -148,6 +151,7 @@ SmiManage ( // no additional handlers will be processed and EFI_INTERRUPT_PEND= ING will be returned. // if (HandlerType !=3D NULL) { + PERF_FUNCTION_END (); return EFI_INTERRUPT_PENDING; } =20 @@ -160,6 +164,7 @@ SmiManage ( // additional handlers will be processed. // if (HandlerType !=3D NULL) { + PERF_FUNCTION_END (); return EFI_SUCCESS; } =20 @@ -194,6 +199,7 @@ SmiManage ( Status =3D EFI_SUCCESS; } =20 + PERF_FUNCTION_END (); return Status; } =20 --=20 2.39.1.windows.1 -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D- Groups.io Links: You receive all messages sent to this group. View/Reply Online (#105334): https://edk2.groups.io/g/devel/message/105334 Mute This Topic: https://groups.io/mt/99150955/1787277 Group Owner: devel+owner@edk2.groups.io Unsubscribe: https://edk2.groups.io/g/devel/leave/3901457/1787277/102458076= /xyzzy [importer@patchew.org] -=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-=3D-